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onsemi launches EliteSiC M3e MOSFETs as its latest-generation silicon carbide technology platform

Semiconductor today - Thu, 07/18/2024 - 19:27
In the face of escalating climate crises and a dramatic rise in global energy demands, governments and industries are committing to ambitious climate goals aimed at mitigating environmental impact and securing a sustainable future. Key to these efforts is the transition to electrification to reduce carbon emissions and embrace renewable energy resources...

Micropillar surface yields lower-temperature boiling, better heat shedding

EDN Network - Thu, 07/18/2024 - 18:12

System designers spend a lot their time, mental energy, and effort on heat, sources, intensity, and especially how to get it away from sensitive components (a mentor once told me that “away” is that wonderful place where the heat becomes someone else’s problem). Understanding the mechanisms by which excess heat can be channeled and conveyed are important parts of the design plan. Among the many options are heat sinks, pipes, and bridges to draw the heat away locally, as well as active and passive cooling with convection, conduction, fans, and air or liquid fluids.

Now, a multi-university team lead by researchers at Virginia Polytechnic Institute and State University (better known as Viiginia Tech or VPI) has leveraged a subtle thermal phenomenon called the Leidenfrost effect to lower the temperature at which water droplets can hover on a bed of their own vapor—around 230°C—and thus accelerate heat transfer. You may have observed this thermal-physics effect without realizing what it is when you sprinkle small drops of water on the surface of a hot pan.

Wait…everyone knows water boils at 100°C under standard conditions, so what’s going on? The Leidenfrost effect occurs because there are two different states of water coexisting. If you could see the water at the droplet level, you would observe that the entire droplet doesn’t boil at the surface, only part of it does. The heat vaporizes the bottom, but the energy doesn’t travel through the entire droplet. The liquid portion above the vapor is receiving less energy because much of it is used to boil the bottom.

That critical hot temperature is well above the 100°C boiling point of water because the heat must be high enough to instantly form a vapor layer. If it is too low, and the droplets don’t hover; if too high, the heat will vaporize the entire droplet.

That liquid portion remains intact, and this is seen as the levitation and hovering of liquid drops on hot solid surfaces on their own layer of vapor (no, this levitation is not some sort of anti-gravity effect). It is called Leidenfrost effect due to its formal discovery in the late 18th century by German physician Johann Gottlob Leidenfrost.

The Leidenfrost effect has been studied extensively for over 200 years, but the Virginia Tech team was able to use advanced instrumentation such as high-speed video camera operating at 10,000 frames per second for their project.

The traditional measurement of the Leidenfrost effect assumes that the heated surface is flat, which causes the heat to hit the water droplets uniformly. The team has found a way to lower the starting point of the effect by using a specially created surface covered with micropillars, thus giving the surface interface new properties.

Their micropillars were 0.08 millimeters tall, arranged in a regular pattern 0.12 millimeters apart, and fabricated on a silicon wafer by means of photolithography and deep reactive ion etching. A single droplet of water encompasses 100 or more of them, as these tiny pillars press into a water droplet, releasing heat into the interior of the droplet and making it boil more quickly, Figure 1.

Figure 1 Leidenfrost-like droplet jumping dynamics on a hot micropillared surface. a) Selected snapshots of Leidenfrost-like droplet jumping on the micropillared substrate ([D, L, H] = [20, 120, 80] μm) with surface temperature 𝑇W = 130°C. The inset in (a) is the scanning electron micrography (SEM) of the micropillared substrate. a) Height variation of the center of mass of the droplet shown in (a). The time 𝑡 = 0 msec denotes the onset of the interfacial deformation. Source: Virginia Polytechnic Institute and State University

Compared to the traditional assessment that the Leidenfrost effect triggers at 230°C, their array of micropillars press more heat into the water than a flat surface. This causes microdroplets to levitate and jump off the surface within milliseconds at lower temperatures because the speed of boiling can be controlled by changing the height of the pillars. With the pillars, the temperature at which the floating effect started was down to 130°C significantly lower than that of a flat surface.

The Leidenfrost effect is more than an intriguing phenomenon to watch; it is also a critical point in heat transfer performance, Figure 2.

Figure 2 Droplet jumping velocity and equivalent thermal boundary layer (TBL) thickness. a) Jumping velocity of droplets with different volumes during vibrational jumping (on substrate [D, L, H] = [20, 120, 20] μm ) and Leidenfrost-like jumping (on substrate [D, L, H] = [20, 120, 80 μm ). b) Simulated results of temperature distribution of quiescent TBL on the substrates with micropillar height H = 20 μm and H = 80 μm , respectively. c) Thickness of equivalent TBL on substrates with different micropillar heights (from 20 μm to 80 μm ) an different substrate temperatures (from 120 °C to 140 °C). d) Phase map of occurrence of droplet jumping behaviors on substrates with different micropillar heights placed on hot plate at different temperatures. Source: Virginia Polytechnic Institute and State University

Another benefit of micropillars is that the generation of vapor bubbles in their presence is able to dislodge microscopic foreign particles from surface roughness and suspend them in the droplet. This means that the boiling bubbles can physically move thermal-blocking impurities away from the surface while removing heat.

There’s a very rough heat-transfer analogy here with “solid state” cooling via standard heat sinks. With a heat sink, it is critical to minimize thermal impedance between the heat source and heat sink. Since even apparently flat surfaces have tiny surface imperfections, any mating between source and sink surfaces will have micro-voids and nearly invisible air pockets which act as micro-insulators and impede heat flow.

The standard solution is to interpose an extremely thin layer of thermal grease or a thermally conductive pad to fill those gaps and provide a thermally continuous, gap-free source to sink path, Figure 3. These micropillars have a similar role, using their intrusion into the cooling liquid to which they are transferring heat.

Figure 3 The use of an interposed thermal grease layer or pad is essential to ensuring minimal thermal impedance between heat source and sink. Source: Taica Corporation/Japan

The team is not using overused words such as “revolutionary” or “breakthrough”; what they have done is look at this effect with a new perspective to see how and if it can be leveraged. If you want to read the full story including relevant intense thermal-physics equations and analysis, check their paper “Low-temperature Leidenfrost-like jumping of sessile droplets on microstructured surfaces” published in Nature Physics. (I had to look that word up, too: “sessile” is an adjective regularly in some technical disciplines, meaning “attached directly by the base, not raised upon a stalk”.) While that formal paper is behind a paywall, a pre-print version is here; both version also have links to some short but captivating videos of drops and their motions.

Their deeper insight of the potential modern-day thermal implications of the Leidenfrost effect may not result in any actual advances in cooling techniques and technologies; these sorts of project usually do not (but sometimes they certainly do have a huge impact). Either way, it’s interesting to see what modern solid-state material-fabrication tenancies, coupled with advanced instrumentation, can show us about fairly old physics.

Bill Schweber is an EE who has written three textbooks, hundreds of technical articles, opinion columns, and product features.

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First Solar commissions Western Hemisphere’s largest solar R&D center

Semiconductor today - Thu, 07/18/2024 - 17:52
Cadmium telluride (CdTe) thin-film photovoltaic (PV) module maker First Solar Inc of Tempe, AZ, USA has commissioned a new research & development innovation center in Lake Township, Ohio, which is believed to be the largest facility of its kind in the Western Hemisphere. The Jim Nolan Center for Solar Innovation is dedicated to the late James ‘Jim’ F. Nolan, a former member of First Solar’s board of directors and the architect of the company’s CdTe semiconductor platform...

KYOCERA AVX Launches 20 New KAM Series Automotive MLCCs

ELE Times - Thu, 07/18/2024 - 12:58

The 20 new KAM Series capacitors deliver high capacitance values in compact, lightweight, surface-mount packages optimized for EV, ADAS, and ADS applications and are designed, manufactured, and tested to meet the high quality and reliability standards of the automotive industry.

KYOCERA AVX, a leading global manufacturer of advanced electronic components engineered to accelerate technological innovation and build a better future, has expanded its line of KAM Series automotive MLCCs with the addition of 20 new components.

Manufactured using miniaturization and high-capacity atomization technologies developed for smartphones and materials proven to maintain high-reliability performance in automotive environments, KAM Series automotive MLCCs are available in an extensive range of case sizes, capacitance values, and voltage ratings optimized for use in small, densely packed automotive circuits with fast processing speeds. These compact and lightweight surface-mount components minimize board space requirements and deliver capacitance values high enough to reduce capacitor component counts, both of which are essential to helping automotive engineers overcome some of the many challenges posed by evolving electric vehicle (EV), advanced driver assistance system (ADAS) and automated driving system (ADS) designs.

KAM Series automotive MLCCs are designed, manufactured, and tested to ensure that they meet the high quality and reliability standards of automotive industry applications. They are compliant with the AEC-Q200 Stress Test Qualification for Passive Components standard, manufactured in IATF, QS9000, and VDA 6.4-approved facilities, and continuously tested in quality assurance (QA) laboratories to ensure superior quality and performance. QA methods include 100% visual inspection, increased sampling for accelerated wave soldering, and lot-by-lot reliability testing. All KAM Series automotive MLCCs are also RoHS compliant and designed to be operated below the rated voltage.

The latest expansion of the KAM Series automotive MLCCs includes 20 new components. The new releases are available in four case sizes (0201, 0402, 0603, and 0805) with thicknesses extending from 0.33mm to 1.45mm, nickel/tin terminations, two dielectrics (X7R and X7T), four voltage ratings (4, 6.3, 10, and 16V), capacitance values extending from 0.1–22µF (±10%), and 7” reels loaded with paper or embossed plastic tape.

Ideal applications for the new KAM Series automotive MLCCs include electric vehicle (EV), automated driver assistance system (ADAS), and automated driving system (ADS) engine control units (ECUs), powertrains, central gateway (CGW) communication nodes, cluster heads-up displays (HUDs), door control units (DCUs), cameras, radar, LiDAR, memory, CPU/MPU decoupling, and other low-voltage safety systems with space constraints and high capacitance demands. They are also well suited for use in high-reliability applications outside of the automotive industry.

With this latest extension, the KAM Series automotive MLCCs is now available with nine case sizes (0201, 0402, 0603, 0805, 1206, 1210, 1808, 1812, and 2220), two termination styles (nickel/tin and FLEXITERM), six dielectrics (C0G/NP0, X7R, X7T, X8R, X8L, and X8G), 16 voltages extending from 4V to 3,000V, capacitance values extending from 0.5pF to 22µF, eight capacitance tolerances spanning­ ±0.1pF to ±20%, and 7” and 13” reels loaded with paper or embossed plastic tape. As such, KAM Series MLCCs are also well suited for use in hybrid automotive battery control, inverter, converter, motor control, and water pump applications; on-engine automotive applications; hybrid electric commercial applications, including emergency circuits, sensors, and temperature regulation devices; oil exploration applications; and other applications with a 150°C operating requirement.

KYOCERA AVX has been a trusted supplier of automotive MLCCs for several decades and is very proud to introduce the new small-case-size, high-capacitance-value, wide-voltage-range, and AEC-Q200-qualified KAM Series automotive MLCCs to market,” said Kensuke Ikeda, Senior Manager – MLCC Development, KYOCERA Corporation. “The number of MLCCs mounted in circuits related to EV, ADAS, and autonomous driving systems is steadily increasing, accelerating market demand for miniature components, and the voltage ratings of the ICs employed in these systems is decreasing, driving new demand for low-voltage MLCCs. Our evolving line of KAM Series capacitors satisfy these market demands. For example, when 5VDC is applied to our 0805 X7R dielectric MLCC rated for 10V and 10µF, it maintains 86.3% of its capacitance due to excellent DC bias characteristics. In addition, KAM Series MLCCs are precision engineered, manufactured, and tested to provide optimal solutions for EV, AD, and ADAS circuits and will continue to satisfy evolving automotive market demands with future series extensions.”

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New Reality AI Explorer Tier Offers Free Access to Comprehensive Evaluation “Sandbox” of Powerful AI/ML Development Environment

ELE Times - Thu, 07/18/2024 - 12:47

Includes Automated AI Model Construction, Validation, and Deployment Modules of Reality AI Tools along with Tutorials, Application Examples and Email Support

Renesas Electronics Corporation, a premier supplier of advanced semiconductor solutions, today introduced Reality AI Explorer Tier, a free version of the popular Reality AI Tools software for developing AI and TinyML solutions in industrial, automotive and commercial applications.
The new Reality AI Explorer Tier provides users with free access to a comprehensive, self-guided evaluation sandbox. Qualified customers can now access the complete range of features in Reality AI Tools, including automated AI model construction, validation and deployment modules. Reality AI Explorer Tier includes a rich library of tutorials, application examples, and FAQs, access to the community forum and email support. Users can quickly get started with a simplified click-through end user agreement within
Reality AI Explorer Tier is designed to simplify the customer experience for evaluating the development environment for embedded real-time analytics. Users can explore a variety of pre-built AI applications, offering a practical way to experience the capabilities of Reality AI Tools without the need for extensive setup or support. Examples allow the user to leverage Renesas Kits such as AI Kits with sample datasets that span use cases across accelerometry/vibration analysis, audio classification, and motor control.
“As AIoT becomes increasingly important, many customers are showing keen interest and developing expertise in building AI applications at the edge and endpoint,” said Mohammed Dogar, Vice President and Head of Business Development and Ecosystem for Renesas. “Reality AI Explorer offers the opportunity to experience the full potential of a market-leading AI development environment without any up-front cost. We are confident that many customers will use this platform as a first step to creating production AIoT implementations.”
We have used Reality AI Tools extensively to deploy extremely cost-efficient AI solutions for automated quality assurance applications,” said Dr. Kilian von Neumann-Cosel, Head of Brose Silicon Valley. “We envision enabling a variety of embedded sensing applications through this powerful AI/ML development.
Reality AI Tools is now tightly integrated with Renesas compute products and supports all Renesas MCUs and MPUs natively with a built-in parts picker engine. Support for automatic context switching between Reality AI Tools and e2 Studio, Renesas’ flagship embedded development environment, is also in place.
Winning Combinations
Renesas has combined its AI technology into numerous Winning Combinations across automotive, industrial, and IoT applications. These Winning Combinations highlight applications where Reality AI technology can enable intelligence to detect anomalies for preventative maintenance, which can provide customers with significant savings in repair costs. Winning Combinations are technically vetted system architectures from mutually compatible devices that work together seamlessly to bring an optimized low-risk design for a faster time to market. Renesas offers more than 400 Winning Combinations with a wide range of products from the Renesas portfolio to enable customers to speed up the design process and bring their products to market more quickly. They can be found at renesas.com/win.

 

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TI pioneers new magnetic packaging technology for power modules, cutting power solution size in half

ELE Times - Thu, 07/18/2024 - 12:19

News highlights:

  • New power modules with MagPack technology are up to 50% smaller than previous generations, doubling power density while maintaining excellent thermal performance.
  • The industry’s smallest 6A power modules reduce electromagnetic interference (EMI) radiation by 8dB and simultaneously improve efficiency by up to 2% compared to predecessors.

Texas Instruments today introduced six new power modules designed to improve power density, enhance efficiency and reduce EMI. These power modules leverage TI’s proprietary MagPack integrated magnetic packaging technology, shrinking their size by up to 23% compared to competing modules, enabling designers of industrial, enterprise and communications applications to achieve previously impossible performance levels.  In fact, three of the six new devices, the TPSM82866ATPSM82866C and TPSM82816, are the industry’s smallest 6A power modules, supplying an industry-leading power density of nearly 1A per 1mm2 of area.

“Designers turn to power modules to save on time, complexity, size and component count, but these benefits have required a compromise on performance – until now,” said Jeff Morroni, director of power management research and development at TI’s Kilby Labs. “After nearly a decade in the making, TI’s integrated magnetic packaging technology enables power designers to meet the defining power trend that has shaped our industry – pushing more power in smaller spaces efficiently and cost-effectively.”

Pushing more power in smaller spaces

In power design, size matters. Power modules simplify power designs and save valuable board space by combining a power chip with a transformer or inductor in one package. By leveraging TI’s exclusive 3D package molding process, MagPack packaging technology maximizes the height, width and depth of the power modules to push more power in a smaller space.

The magnetic packaging technology includes an integrated power inductor with proprietary, newly engineered material. As a result, engineers can now achieve best-in-class power density and reduce temperature and radiated emissions while minimizing both board space and system power losses. These benefits are especially important in applications such as data centers, where electricity is the biggest cost factor, with some analysts predicting a 100% increase in demand for power by the end of the decade.

Available today on TI.com

  • Preproduction quantities of TI’s new power modules with MagPack packaging technology are available for purchase now on TI.com.
  • Evaluation modules are also available, starting at US$49.
  • Multiple payment, currency and shipping options are available.

 

Device Input voltage range Description MagPack package
TPSM82866A 2.4V to 5.5V Industry’s smallest 6A step-down module with integrated inductor and 13 fixed VOUT options 2.3mm by 3mm
TPSM82866C 2.4V to 5.5V Industry’s smallest 6A step-down module with integrated inductor and I2C interface 2.3mm by 3mm
TPSM828303 2.25V to 5.5V 3A step-down module with integrated inductor and noise-filtering capacitors 2.5mm by 2.6mm
TPSM82816 2.7V to 6V Industry’s smallest 6A step-down module with adjustable frequency and synchronization 2.5mm by 3mm
TPSM82813 2.75V to 6V 3A step-down module with adjustable frequency and synchronization 2.5mm by 3mm
TPSM81033 1.8V to 5.5V 5.5V, 5.5A valley current limit boost module with power good, output discharge, and pulse-frequency and pulse-width modulation control 2.5mm by 2.6mm

 

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AAEON Unveils New RISC Computing Line Powered by Texas Instruments

ELE Times - Thu, 07/18/2024 - 12:08

Compact, environmentally resilient, and incorporating Texas Instruments AM62x Sitara Processors, the PICO-AM62 & SRG-AM62 show AAEON make big moves in cost-efficient RISC-based computing.

AAEON, a leading provider of compact embedded solutions, has announced two new additions to its RISC computing line: the PICO-AM62, a single board built on the PICO-ITX form factor, and the SRG-AM62, its RISC Gateway system counterpart.

SRG-AM62_3DBack_01

 

Both the PICO-AM62 and SRG-AM62 represent a new approach from AAEON’s RISC Computing Division, powered by Texas Instruments AM62x Sitara Processors. These processors consist of a quad-core Arm Cortex-A53 CPU, single-core Arm® Cortex®-M4F MCU, and integrated GPU support.

The new product line stands out for its cost-efficiency and reliability. Both the PICO-AM62 single-board and the compact SRG-AM62 Gateway System are available in SKUs with a wide temperature tolerance of -40°C to 85°C and a power input range of 9V to 36V. The products are based on Texas Instruments processors, which are highly scalable and have a 20-year lifespan. This influenced AAEON’s vendor choice and should attract customers looking for cost-effective, durable IoT solutions. The environmental ruggedness of both the PICO-AM62 and SRG-AM62 makes them well-suited for deployment in challenging environments, such as in-vehicle digital clusters or industrial applications.

PICO-AM62_Back_01

At both board and system levels, the platform offers dual LAN ports, camera, and sensor support. These features, combined with their compact dimensions, make them strong candidates for applications such as building access monitoring. Additionally, both products host an HDMI 1.4b interface. The PICO-AM62, in particular, includes an LVDS connector for display output, which is well-suited for human-machine-interface (HMI) use.

Wireless communication, such as Wi-Fi and 4G/LTE, is also available via full and half-size mini cards. Both products also feature a multipurpose I/O connector for industrial control functions such as RS-232/422/485, CANBus, UART, GPIO, and I2C. Leveraging this versatility, it is easy to see how the products could serve as a flexible foundation for low-cost industrial automation devices. AAEON notes that the PICO-AM62 hosts additional serial configuration options. Combining its multipurpose I/O connector with two pin headers, users can pair two RS-232/422/485 interfaces with two CAN-FD, four full RS-232/422/485 by BOM, all the way to four RS-485 alongside dual UART.

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With first ASIC-based zone triggering for MXO oscilloscopes, Rohde & Schwarz breaks acquisition rate records

ELE Times - Thu, 07/18/2024 - 11:56

Rohde & Schwarz further strengthens its oscilloscope portfolio by introducing the industry’s first ASICbased zone triggering. With this new approach, the MXO series can offer the world’s fastest zone trigger update rate of up to 600.000 waveforms per second and less than 1.45 us blind time between trigger events. It is up to 10 000 faster than competitive zone triggering offerings. Thanks to the new ASICbased zone triggeringMXO oscilloscopes can precisely isolate events where traditional triggering does not provide the needed flexibility.

Rohde & Schwarz has developed the industry’s first ASICbased zone triggering, implemented in the new MXO series oscilloscopes. This new functionality enhances the oscilloscopes’ ability to precisely isolate events that are difficult or impossible to detect with traditional oscilloscope triggers. Furthermore, the MXO zone trigger implementation is the industry’s fastest, surpassing others by several orders of magnitude.

Traditional oscilloscope trigger types – such as edge triggering – are often difficult to set up and/or inadequate to visualize certain trigger events. Zone triggering, on the other hand, allows users to specify trigger conditions by drawing one or more zone areas on the instrument’s display. The oscilloscope then inspects each acquisition for these conditions and shows the acquisitions on the display for events that meet the graphical conditions. If an event does not meet the graphical conditions, the waveform is discarded and not shown. Zone triggering can be very effective for triggering on non-monotonic edges, serial bus patterns, math waveforms, events across multiple channels, and events in the frequency domain. For these use cases traditional oscilloscope triggers simply do not work. The new zone triggering from Rohde & Schwarz is the world’s first ASICbased solution that works on analog channel signals, math and spectrum.

Philip Diegmann, Vice President Oscilloscopes at Rohde & Schwarz, says: “The next-generation MXO-EP processing ASIC technology developed by Rohde & Schwarz is the foundation of the breakthrough signal visibility and user responsiveness of the MXO series. The chip design was laid out to have further hardware acceleration capabilities enabled down the road. This way we keep providing new functionalities to our oscilloscope customers never before seen in the industry. With MXO zone triggering, users obtain additional triggering capabilities without having to incur significant trigger blind times that historically have diminished the value of software-based zone triggering solutions.”

With the MXO zone triggering, users testing and debugging in the frequency domain using an oscilloscope can now draw specific zone areas. The oscilloscope will then trigger or activate when a certain tone exceeds a set power level within these zones. Or users can simply draw a zone for RF chirps or pulses. New to the industry is the MXO’s free run mode, where the oscilloscope captures as fast as possible without looking for an edge trigger event. Combining this with zone triggering can be very effective for power integrity measurements and EMI debug.

MXO zone triggering incorporates a new feature previously not found in the market: the ability to exclusively store waveforms in real time that match zone trigger criteria. This functionality enables users to exclusively focus on specific events relevant to their application.

Rohde & Schwarz offers the new ASICbased zone triggering functionality as a standard feature for all MXO 4, MXO 5, and MXO 5C series oscilloscopes, beginning with version 2.2 firmware. The firmware is available as a free download on the web. Existing MXO users can update their instruments for free.

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UK can capitalize on data-center boom, reckons CSA Catapult’s CEO

Semiconductor today - Thu, 07/18/2024 - 11:39
There is a significant opportunity for the UK to play a leading role in developing future technologies for data centers, according to Martin McHugh, CEO of the Compound Semiconductor Applications (CSA) Catapult in Newport, South Wales. ..

My first flyback high voltage generator

Reddit:Electronics - Thu, 07/18/2024 - 06:18

I recently made a 555 flyback high voltage generator. It uses a 555 timer whose output goes into a BJT to drive a mosfet which switches current to my primary coil (8 turns).

submitted by /u/irf3205
[link] [comments]

UCLA Team Creates Optical Computing Method for Processing and Encryption

AAC - Thu, 07/18/2024 - 02:00
Using multiple layers of diffracting materials, the researchers can physically maneuver light to perform permutations and enhance security.

Controlling and Preventing Core Saturation in Inductors

AAC - Wed, 07/17/2024 - 20:00
Core saturation is one of the main limitations on the design of magnetic components. In this article, we explore how different factors—particularly the number of turns—impact the core saturation of an inductor.

Hold that peak with a PIC

EDN Network - Wed, 07/17/2024 - 18:57

Capturing transient analog signals with a microcontroller normally involves adding a full-fat peak-hold circuit as an external peripheral. This novel approach minimizes that extra hardware by using a µP’s ability to switch its pins between analog and digital modes on the fly. While this DI specifically uses a PIC, the principle can be applied to any device with that capability.

Wow the engineering world with your unique design: Design Ideas Submission Guide

Figure 1 shows the basics. We may want to add some complications later.

Figure 1 The basic peak-hold circuit. The PIC pin labelled ANA samples the voltage on C1 and then resets it to ground, ready for the next sample.

A1 and D1 form an “active diode”, which rapidly charges C1 to the peak input voltage through R1 whenever A1’s non-inverting input is higher than the diode’s output voltage and hence that on the inverting input. C1 holds its charge as it has no discharge path—leakages excepted—until the PIC needs to sample it, when the ADC is assigned to the relevant input pin (marked as ANA) which starts the acquisition period, during which C1’s charge is shared with the PIC’s internal CHOLD. Once this is done, the conversion can be started, which also immediately disconnects that pin from the ADC, allowing it to be changed from analog input to digital output (active low) to discharge C1, resetting the circuit ready for the next cycle. Thus, a single processor pin performs two functions. Figure 2 shows typical code for the essentials.

Figure 2 Simplified code for capturing the voltage held on C1 and then immediately discharging it to reset the circuit ready for the next sampling cycle.

Now that we’ve got it working, it’s time to point out its shortcomings and suggest some workarounds. 

The voltage across C1 can never be higher than a diode-drop below A1’s VDD, which limits the effective measurement range. (Although a Schottky diode with its lower forward voltage could be used for D1, the higher reverse leakage will compromise accuracy.) If the input must cover the full span, it’s easiest to pot it down first, and either accept a slightly limited resolution on measurements or use a lower reference voltage (2.55 V might be ideal) for the DAC. A1’s VDD can be boosted—see later on—to allow a full positive swing. Similarly, its VSS could be pushed negative if readings needed to be taken very close to ground. Again: see later.

Any input offset in A1 will affect precision. 1 LSB is about 13 mV when using 8 bits with a 3.3 V reference, or ~800 µV with 12 bits, so the allowable offset is half that. (The MCP6021’s offset is quoted as being 500 µV at most.)

Note that while C1’s voltage will be measured with respect to the PIC’s AVSS—or perhaps its VREF- pin—it will be discharged to DVSS. (The lower pin-count devices combine AVSS and DVSS on a single ground pin.) Be cautious of any relative offset between them if accuracy is paramount at low input levels. Microcontrollers are often put to sleep during analog measurements to minimize such errors, which can vary according to how hard the device is working.

A more subtle source of errors is inherent in the ADC’s operation. Internally, it uses a small capacitor (CHOLD), anywhere from 10 pF to 120 pF depending on the device’s vintage, to hold the input for processing. The charge on the external capacitor C1 is shared with the internal one during the acquisition time, so unless the ADC is actually connected to the pin when the input pulse arrives, it will read low, scaled by C1 / (C1 + CHOLD). With C1 = 10 nF and if the DAC’s CHOLD = 10 pF, as in the more modern PICs, the error will be ~1 LSB for a 10-bit result, but negligible for 8 bits; lower values of C1 will lead to greater errors.

If that input pulse is shorter than the reset period and arrives while the pin is being held low, it will be attenuated and effectively lost. (And make sure that A1’s decoupling cap can source the inevitable power transient.) Adding an extra MOSFET (extra GPIO pin required, as shown in Figure 2, below) allows ‘instant’ resetting (or around a thousand times faster, probably within a single instruction cycle), and to a genuine ground rather than the PIC’s internal one. (The ADC’s pin would then be left in analog mode.) A cure in ultra-critical situations might be to duplicate the hold circuitry on another pin and sample each channel alternately, selecting the higher reading in code.

In my original application, which was measuring the strength of RF signal bursts, none of these points was a problem, as the input was always between 0.2 and 2.5 V and lasted for hundreds of microseconds, while the output was scaled to read from 0 to 9.

Despite these reservations, this open-loop approach can be faster than the standard configuration which wraps an op-amp round the capacitor. Because C1 is driven directly, the rise-time of the input pulse can now be as fast as you like. A1’s output may overshoot momentarily, but the glitch will be absorbed by the longer time-constant of R1C1.

For accuracy, R1 should be chosen so that the op-amp’s output drive never exceeds its current-limit value, as that would break the feedback loop, resulting in overshoot and a falsely high reading. Also, for clean operation, time-constant R1C1 should be no less than A1’s rail-to-rail slewing time. The 10n + 47R (470 ns is about the same as the measured slew) allowed for accurate measurements of 2.5 V pulses as short as ~3 µs. Experiments showed that R1 could be reduced to 27R, giving a -10% error for 1 µs / 2.5 V input pulses.

C1’s discharge time to half an LSB will be ~1.6 × (NumberOfBits + 1) × C1 × ROUT(LOW), where the latter term will typically be ~100 Ω for PICs working at 3.3 V. (That “~1.6” is of course 1 / (1 – 1 / e).) For 8 bits, 10 nF, and 100 Ω; that’s about 14 µs, which can be reduced if you don’t need to measure right down to ground. (Some PICs can struggle there, anyway, especially if they use an internal op-amp in the ADC’s input path.) Choosing to cancel the reset and re-enable the analog input as soon as the A–D conversion finished, which took ~20 µs in my implementation, was more than adequate and simplified the code.

A1 is shown as a Microchip MCP6021 (CMOS, RRIO, 2.5–5.5 V, 10 MHz GBW, <500 µV offset). The MCP6001 is cheaper but less well-specified. As an aside, the dual MCP6022 is great for 5 V experimenting and prototyping because it is available in DIP-8.

As drawn in Figure 1, A1 can be fed from a GPIO pin, allowing it to be powered down when the PIC is asleep. This obviously limits its VDD to the PIC’s supply voltage, restricting the input range as noted above. If you need the full range and a higher switched rail is available, use that; if not, a simple voltage-doubler, probably fed from a PWM output, provides a fix.

The MCP6021’s output drives low to within ~5 mV of its VSS (<1/2 LSB with 8 bits). To operate right down to ground, another voltage-doubler can provide a boosted negative feed, with a simple regulator reducing this to -0.6 V for low-voltage op-amps. Make sure that the total voltage across A1 is within its limits; an extra diode in the positive doubler—D6 in Figure 3—may be needed to guarantee this. All these add-ons are lumped together in Figure 3. PICs’ pin-protection diodes are rated at 25 mA and should be safe with the increased voltages under any fault conditions. While these simple PIC-driven voltage-doublers are only good for a few milliamps, they could help power other devices if need be.

All this raises a reality-checking question: what’s powering the upstream circuitry, and is it really delivering a rail-to-rail signal? If not, we don’t need to fuss.

Figure 3 Boosting the op-amp’s supply rails can give true rail-to-rail operation while an extra MOSFET allows “instantaneous” resetting of C1.

Another reality check: if both boosted rails are available, why not use a higher-voltage, non-RRIO op-amp? The negative regulator Q2/3, etc. then becomes unnecessary. The extra complications shown in Figure 2 probably won’t be needed here anyway but may come in handy elsewhere.

Largely because of a PIC’s limitations, the simple circuit of Figure 1 is accurate rather than absolutely precise, but has still proved reliable and useful, especially where board space was at a premium. It could also be appropriate as a front end for an external peak-sensing A–D peripheral. The underlying principle could also be used in microprocessor-based kit to clamp a signal line to ground, albeit with 100 Ω or so effectively in series, perhaps where a MOSFET would add too much capacitance.

Nick Cornford built his first crystal set at 10, and since then has designed professional audio equipment, many datacomm products, and technical security kit. He has at last retired. Mostly. Sort of.

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MACOM dedicates Lowell Campus to John Ocampo

Semiconductor today - Wed, 07/17/2024 - 18:02
MACOM Technology Solutions Inc of Lowell, MA, USA (which designs and makes RF, microwave, analog and mixed-signal and optical semiconductor technologies) has held a special dedication ceremony to inaugurate the John L. Ocampo Technology Campus, in memory of the late John Ocampo, who passed away in November 2023. The campus in Lowell is home to one of MACOM’s semiconductor wafer fabrication facilities, research and development centers, and its corporate headquarters...

Automotive processor IP complies with ISO 21434 cybersecurity

EDN Network - Wed, 07/17/2024 - 16:26

After the widespread adoption of the ISO 26262 functional safety standard in automotive designs, another standard is taking hold to protect connected vehicles from malicious cyberattacks. The ISO/SAE 21434 standard defines the engineering requirements for cybersecurity risk management to ensure that cyber risks are monitored, detected, and mitigated throughout the vehicle’s lifecycle.

Today, Synopsys announced that SGS-TṺV Saar has certified its ARC HS4xFS processor IP for ISO/SAE 21434 cybersecurity standard. This processor IP has already been certified to the ISO 26262 standard and meets ASIL D Random and ASIL D Systematic compliance for safety-critical systems.

Figure 1 The ARC HSxFS processors simplify the development of high-performance safety-critical applications and accelerate ISO 26262 safety and ISO/SAE 21434 cybersecurity certification of automotive SoCs. Source: Synopsys

The Synopsys ARC HSxFS functional safety processors—optimized for high-performance embedded applications—feature a dual-issue, 32-bit superscalar architecture with a small area footprint and low power consumption. Its compliance with cybersecurity requirements will reduce design risk and accelerate time-to-market for safe and robust systems-on-chips (SoCs).

But what’s driving the adoption of the ISO/SAE 21434 cybersecurity standard? For a start, cars are increasingly becoming software-defined while automakers add new features or functions remotely through over-the-air (OTA) software updates. Then there are other connected applications like vehicle telematics and smartphone connectivity.

So, the United Nations Economic Commission for Europe’s UN R155 regulation now mandates that automotive OEMs adopt a cybersecurity management system like ISO/SAE 21434. Automotive chip vendors are also acknowledging the critical importance of ISO 21434-certified IPs.

“As a supplier of highly reliable microcontrollers for use in automotive systems, it is critical that our products meet automotive cybersecurity standards to minimize the vulnerability to cyberattacks,” said Joerg Schepers, VP for automotive microcontrollers at Infineon.

Figure 2 Automotive vendors must adhere to tougher cybersecurity regulations amid increased hardware and software vulnerabilities in connected cars. Source: Synopsys

IP suppliers like Synopsys complying with the ISO/SAE 21434 cybersecurity standard show that the automotive industry is starting to address evolving cybersecurity threats. After the automotive industry recognized the vital need for safety, engineers are now focusing on security in chips for connected vehicles.

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Rocket Lab celebrates CHIPS Act funding preliminary agreement

Semiconductor today - Wed, 07/17/2024 - 16:25
The executive leadership of launch services and space systems provider Rocket Lab USA Inc of Long Beach, CA, USA welcomed government and community leaders (including Congressional leaders and state and local officials) at its space-grade solar cell manufacturing facility in Albuquerque, New Mexico on 15 July to celebrate its signed preliminary agreement under the US CHIPS and Science Act...

Navitas teams with Japanese sales & marketing partner J Rep at Techno-Frontier

Semiconductor today - Wed, 07/17/2024 - 12:04
Gallium nitride (GaN) power IC and silicon carbide (SiC) technology firm Navitas Semiconductor of Torrance, CA, USA is teaming up with its Japanese sales & marketing partner J Rep (which specializes in power electronics) at Japan’s largest power electronics trade show, Techno-Frontier 2024, at the Tokyo Big Sight Exhibition Center (24–26 July) to highlight solutions including a hybrid GaN-SiC AI server power supply unit (PSU), a 3-phase GaN industrial motor drive requiring no heat-sink, and a GaN-based 8K-LED TV power supply that enables the thinnest and highest-efficiency solution...

Axus wins orders for Capstone CMP system from SiC device makers

Semiconductor today - Wed, 07/17/2024 - 11:10
Axus Technology of Chandler, AZ, USA – a provider of chemical-mechanical planarization (CMP), wafer thinning and surface-processing solutions – has reported strong sales momentum for its Capstone CS200 Series of CMP processing tools. In recent months, the firm has received orders from silicon carbide (SiC) semiconductor makers in Europe, Asia and North America...

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