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This engineer could have just stuck with the Gateway 2000-branded, Altec Lansing-designed powered speaker set long plugged into his laptop’s headphone jack. But where’s the fun in that?

Having editorially teased my recent home office audio system upgrade several times now, beginning back in mid-August and repeatedly accompanied by promises to share full details “soon”, I figured I’d better get to writing “now” before I ended up with a reader riot on my hands. Let’s start with the “stack” to the right of my laptop, a photo of which I’ve shared before:

The unbalanced (i.e., single-ended) setup

At the bottom is a Schiit Modi Multibit 1 DAC, my teardown of which was published just last month:

Above it is Schiit’s first-generation Loki Mini four-band equalizer (versus the second-generation Loki Mini+ successor shown below, which looks identical from the outside save for altered verbiage on the back panel sticker). I decided to include it versus relying solely on software EQ since I intended to use the setup to listen to more than just computer-based audio sources.

Above it is a passive (unpowered) switch, the Schiit Sys, that enables me to select between two inputs prior to routing the audio to the Rekkr power amplifier set connected to the speakers:

And at the very top is a Schiit Vali 2++ (PDF) tube-based headphone amplifier, identical to the Vali 2+ precursor (introduced in 2000 and shown below) save for a supply constraint-compelled transition to a different tube family:

And the rack? It’s a stacked combo of two (to give me the necessary number of shelves) Topping Acrylic Racks, available both directly from the China-based manufacturer (mind the tariffs!) and from retailers such as Apos in the United States. A little pricey ($39 each), but it makes me smile every time I look at it, which is priceless…or at least that’s how I rationalized the purchase!

Audio sources and interconnects

As you’ve likely already noticed, this setup uses mainstream unbalanced (i.e., single-ended) RCA cabling. To detail the inter-device connections, let’s start with the device at the end of the chain, the Sys switch. I didn’t initially include it in the stack but then realized I didn’t want to have to turn on the Vali 2++ each time I wanted to listen to music over the speakers (whenever the headphone jack isn’t in use, the Vali 2++ passes input audio directly through to its back panel outputs), given that tubes have limited operating life and replacements are challenging at best to source. As such, while one Sys input set comes from the Vali 2++, the other is directly sourced from the analog “headphone jack” audio output built into my docking station, which is tethered to the laptop (an Intel-based 2020 13” Apple MacBook Pro) over a Thunderbolt 3 connection:

Headphone outputs have passably comparable power specs to the line-level outputs that would normally connect to the Sys switch inputs (and from there to an audio power amplifier’s inputs), with two key qualifiers:

• They’re intended to drive comparatively low-impedance headphones, not high-impedance audio inputs, and
• Given that they integrate a modest audio amplifier circuit, you need to be restrained in your use of the volume setting controlling that audio amplifier to avoid overdriving whatever non-headphone input set they’re connected to in this alternative case.

The only other downside is that since the Sys is at the end of the chain, audio sourced from the docking station’s headphone jack also bypasses the Loki Mini’s hardware EQ facilities, although since it’s always computer-originated in this particular situation, software-based tone controls such those built into Rogue Amoeba’s SoundSource utility for Macs or the open-source Equalizer EPO for Windows systems can provide a passable substitute.

Speaking of EQ, and working backwards in the chain, the Vali 2++ audio inputs are connected to the Loki Mini equalizer outputs, and the Loki Mini inputs are connected to the Modi Multibit 1 DAC outputs. And what of the DAC’s inputs? There are three available possibilities, one of which (optical S/PDIF) is currently unused.

It’s a shame that Apple phased out integrated optical S/PDIF output facilities after 2016; otherwise, I’d use them to tether the DAC to the 2018 Intel-based Apple Mac mini to the right of this stack. Unsurprisingly to you, likely, the USB input is also connected to the laptop, again via the Thunderbolt 3 docking station intermediary (albeit digitally this time). And what about the DAC’s coaxial (RCA) digital input? I’ll save that for part two next time.

The balanced alternative

Now, let’s look to the left of the laptop:

You’ve actually already seen one of the three members of this particular stack a couple of times before, albeit in a dustier and generally more disorganized fashion:

It’s now tidied up with an even pricier ($219) multi-shelf (and aluminum-based this time) rack, the Topping SR2 (here again are manufacturer and retail-partner links):

As before, the headphone amplifier is still the Drop + THX AAA 789:

But I’ve subsequently swapped out Topping’s D10 Balanced DAC:

for a Drop + Grace Design Standard DAC Balanced to assemble a Drop-branded duo:

The Topping D10 Balanced DAC is back in storage for now; I plan to eventually pair it with a S.M.S.L. SO200 THX AAA-888 Balanced Headphone Amplifier (yes, it really is slanted in shape):

And yes, I realize how abundantly blessed I am to have access to all this audio tech toy excess!

As you’ve likely already ascertained from the images (and if not that, the “Balanced” portion of the second product’s name), this particular setup instead leverages balanced interconnect, both XLR- and TRS-implemented. As such, I couldn’t merge another Schiit Loki Mini or Mini+ equalizer into the mix. Instead, I went with the balanced, six-band Schiit Lokius bigger sibling:

The Lokius EQ sits between the DAC and the headphone amplifier. The DAC’s USB input can connect to one of several nearby computers. On the one hand, this is convenient because the DAC is self-powered by that same USB connection. On the other, I’ve noticed that it sometimes picks up audible albeit low-level interference from the USB outputs of my Microsoft Surface Pro 7+ laptop (that said, no such similar issues exist with my Apple M2 Pro Mac Studio).

And what of the DAC’s optical S/PDIF input? Again, you’ll need to wait until next time for the reveal. Finally, in this case, the headphone amplifier doesn’t have pass-through outputs for direct connection to a stereo power amplifier (or, in this case, monoblock pair), so I’m instead (again, sparingly) leveraging its unbalanced headphone output.

The rest of the story

So far, we’ve covered the two stacks’ details. But what does each’s remaining S/PDIF DAC input connect to? And to what do they connect on the output end, and how? Stay tuned for part 2 to come next for the answers to these questions, along with other coverage topics. And until then, please share your so-far thoughts with your fellow readers and me in the comments!

—Brian Dipert is the Principal at Sierra Media and a former technical editor at EDN Magazine, where he still regularly contributes as a freelancer.

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• Audio amplifiers: How much power (and at what tradeoffs) is really required?

The post Sonic excellence: Music (and other audio sources) in the office, part 1 appeared first on EDN.

In electronic product design, the smallest components often have the biggest impact on system reliability. Tactile switches—used in control panels, wearables, medical devices, instrumentation, and industrial automation—are a prime example. These compact electromechanical devices must deliver a precise tactile response, stable contact resistance, and long service life despite millions of actuations and a wide range of operating conditions.

For design engineers, one of the most critical choices influencing tactile switch reliability is contact plating. Among available materials, gold plating offers unmatched advantages in conductivity, corrosion resistance, and mechanical stability. While its cost is higher than silver plating—and tin when used for terminal finishes—gold’s performance characteristics make it indispensable for mission-critical applications in which failure is not an option.

Understanding the role of plating in switch performance

The function of a tactile switch relies on momentary metal-to-metal contact closure. Over-repeated actuation, environmental exposure and mechanical wear can increase contact resistance or even lead to intermittent operation. Plating serves as a barrier layer, protecting the base metal (often copper, brass, or stainless steel) from corrosion and wear while also influencing the switch’s electrical behavior.

Different plating materials exhibit markedly different behaviors:

• Tin (used only for terminal plating) offers low cost and good solderability but oxidizes quickly, raising contact resistance in low-current circuits.
• Silver provides excellent conductivity, but it tarnishes in the presence of sulfur or humidity, forming insulating silver sulfide films.
• Gold, though softer and more expensive, is chemically inert and does not oxidize or tarnish. It maintains stable, low contact resistance even under micro-ampere currents where other metals fail.

This property is crucial for tactile switches used in low-level signal applications, such as microcontroller input circuits, communication modules, or medical sensors, in which switching currents may be in the microamp to milliamp range. At such levels, even a thin oxide film can impede electron flow, creating unreliable or noisy signals.

The science behind gold’s stability

Gold’s chemical stability stems from its electronic configuration: Its filled d-orbitals make it resistant to oxidation and most chemical reactions. Its noble nature prevents formation of insulating oxides or sulfides, meaning the surface remains metallic and conductive throughout the switch’s service life.

From a materials engineering standpoint, plating thickness and uniformity are key. Gold layers used in tactile switches typically range from 0.1 to 1.0 µm, depending on required durability and environmental conditions. Thicker plating layers provide greater wear resistance but increase cost. Engineers should verify that the plating process, often electrolytic or autocatalytic, ensures full coverage on complex contact geometries to avoid thin spots that could expose the base metal.

Many switch manufacturers, such as C&K Switches, use gold-over-nickel systems. The nickel layer acts as a diffusion barrier, preventing copper migration into the gold and preserving long-term contact integrity. Without this barrier, copper atoms could diffuse to the surface over time, leading to porosity and surface discoloration that undermine conductivity.

When to specify gold plating Selecting the right contact material for your tactile switch can make or break long-term reliability. Gold plating isn’t always necessary, but in the right applications, it’s indispensable. Low-level or signal circuits: When switching currents fall below 100 mA, even thin oxide films can prevent reliable conduction. Gold’s inert surface ensures clean, consistent contact resistance for microcontroller inputs, logic circuits, sensors, and communication interfaces. Mission-critical reliability: If system uptime or safety compliance is essential—such as in medical devices, aerospace, defense, or industrial safety systems—gold-plated switches prevent oxidation-related failures that could disrupt operations or endanger users. Harsh or uncontrolled environments: Designs exposed to moisture, sterilization cycles, or outdoor weathering benefit from gold’s corrosion resistance. Examples include surgical tools, outdoor telecom nodes, and HVAC or factory automation controls. Long lifecycle or high actuation counts: Gold plating resists fretting corrosion and wear, maintaining stable performance through hundreds of thousands to millions of actuations, critical in applications such as automotive HMI controls or consumer appliances with frequent use. Signal integrity and noise sensitivity: In instrumentation, medical sensing, and precision measurement, gold’s smooth, oxide-free surface minimizes contact noise and bounce, ensuring clean signal transitions and reducing the need for debouncing circuitry. Mixed-metal interfaces: Avoid combining gold with tin or silver on mating surfaces—galvanic reactions can accelerate corrosion. When other components use gold contacts, matching them with gold-plated tactile switches maintains uniform conductivity and compatibility. Choose gold-plated tactile switches when reliability, environmental resistance, or low-current signal integrity outweighs incremental cost. In these cases, gold is not a luxury; it’s engineering insurance.

Reliability in harsh and low-signal environments

Gold plating’s reliability benefits become evident under extreme environmental or electrical conditions.

Medical devices and sterilization environments

Surgical and diagnostic instruments often undergo repeated steam autoclaving or chemical sterilization cycles. Moisture and elevated temperatures accelerate corrosion in conventional materials. Gold’s nonreactive surface resists degradation, ensuring consistent actuation force and electrical performance across hundreds of sterilization cycles. This reliability directly impacts patient safety and device regulatory compliance.

Outdoor telecommunications and IoT

Field-mounted communication hardware—base stations, gateways, or outdoor routers—encounters moisture, pollution, and temperature fluctuations. In such applications, tin or silver plating can oxidize within months, leading to noisy signals or switch failure. Gold-plated tactile switches preserve contact integrity, maintaining low and stable resistance even after prolonged environmental exposure.

Industrial automation and control

Industrial environments expose components to dust, vibration, and cleaning solvents. Gold’s smooth, ductile surface resists micro-pitting and fretting corrosion, while its low coefficient of friction contributes to predictable mechanical wear. As a result, switches maintain consistent tactile feedback over millions of actuations, a vital factor in HMI panels in which operator confidence depends on feel and repeatability.

Aerospace, defense, and safety-critical systems

In avionics and safety systems, even transient failures are unacceptable. Gold’s resistance to oxidation and its stable performance across −40°C to 125°C enable designers to meet MIL-spec and IPC reliability standards. The material’s immunity to metal whisker formation, common in tin coatings, eliminates one of the most insidious causes of short-circuits in mission-critical electronics.

Automation and robotics equipment benefit from gold-plated tactile switches that deliver long electrical life and immunity to oxidation in high-cycle production environments. (Source: Shutterstock) Tackling common mechanical and electrical issues Contact bounce reduction

Mechanical contacts inherently produce bounce, a rapid, undesired make-or-break sequence that occurs as the metal contacts settle. Bounce introduces signal noise and may require software or hardware debouncing. Gold’s micro-smooth surface reduces surface asperities, shortening bounce duration and producing cleaner signal transitions. This improves response time and may simplify firmware filtering or eliminate RC snubber circuits.

Metal whisker mitigation

Tin and zinc surfaces can spontaneously grow metallic whiskers under stress, causing shorts or leakage currents. Gold plating’s crystalline structure is stable and does not support whisker growth, a key reliability advantage in fine-pitch or high-density electronics.

Thermal and mechanical stability

Gold has a low coefficient of thermal expansion mismatch with typical nickel underplates, minimizing stress during thermal cycling. It does not harden or crack under high temperatures, allowing switches to function consistently from cold-storage conditions (−55°C) to high-heat appliance environments (>125°C surface temperature).

Electrical characteristics: low-level signal switching

Many engineers underestimate how contact material impacts performance in low-current circuits. When switching below approximately 100 mA, oxide film resistance dominates contact behavior. Non-noble metals can form surface barriers that block electron tunneling, leading to contact resistance in the tens or hundreds of ohms. Gold’s stable surface keeps contact resistance in the 10- to 50-mΩ range throughout the product’s life.

Additionally, gold’s low and stable contact resistance minimizes contact noise, which can be especially important in digital logic and analog sensing circuits. For instance, in a patient monitoring device using microvolt-level signals, a transient resistance increase of just a few ohms can cause erroneous readings or false triggers. Gold plating ensures clean signal transmission even at the lowest currents.

Balancing cost and performance

It’s true that gold plating adds material and process costs. However, lifecycle analysis often reveals a compelling return on investment. In applications in which switch replacement or failure results in downtime, service calls, or warranty claims, the incremental cost of gold plating is negligible compared with the total system value.

Manufacturers help designers manage cost by offering hybrid switch portfolios. For example, C&K’s KMR, KSC, and KSR tactile switch families include both silver-plated and gold-plated versions. This allows designers to standardize on a footprint while selecting the appropriate contact material for each function: gold for logic-level or safety-critical inputs, silver for higher-current or less demanding tasks.

KSC2 Series tactile switches, available with gold-plated contacts, combine long electrical life and stable actuation in compact footprints for HVAC, security, and home automation applications. (Source: C&K Switches) Design considerations and best practices

When specifying gold-plated tactile switches, engineers should evaluate both electrical and environmental parameters to ensure the plating delivers full value:

• Current rating and load type: Gold excels in “dry circuit” switching below 100 mA. For higher currents (>200 mA), arcing can erode gold surfaces; mixed or dual plating (gold plus silver) may be more appropriate.
• Environmental sealing: Use sealed switch constructions (IP67 or higher) when exposure to fluids or contaminants is expected. This complements gold plating and extends operating life.
• Plating thickness: For harsh environments or long lifecycles (>1 million actuations), specify a thicker gold layer (≥0.5 µm). Thinner flash layers (0.1 µm) are adequate for indoor or low-stress use.
• Base metal compatibility: Always ensure the plating stack includes a nickel diffusion barrier to prevent copper migration.
• Mating surface design: Gold-to-gold contacts perform best. Avoid mixing gold with tin on the mating side, which can cause galvanic corrosion.
• Actuation force and feel: Gold’s lubricity affects tactile response slightly; designers should verify that chosen switches maintain the desired haptic feel across temperature and wear cycles.

By integrating these considerations early in the design process, engineers can prevent many reliability issues that otherwise surface late in validation or field deployment.

Lifecycle testing and qualification standards

High-reliability applications frequently require validation under standards such as:

• IEC 60512 (electromechanical component testing)
• MIL-DTL-83731F (for aerospace-grade switches)
• AEC-Q200 (automotive passive component qualification)

Gold-plated tactile switches often exceed these standards, maintaining consistent contact resistance after 105 to 106 mechanical actuations, temperature cycling, humidity exposure, and vibration. Some miniature switch series, such as the C&K KSC2 and KSC4 families, can endure as many as 5 million actuations, highlighting how material selection plays a critical role in overall system durability.

Practical benefits: From design efficiency to end-user experience

For engineers, specifying gold-plated tactile switches yields several tangible advantages:

• Reduced maintenance: Longer life and fewer field failures minimize warranty and service costs.
• Simplified circuit design: Low and stable contact resistance can eliminate the need for additional filtering or conditioning circuits.
• Enhanced system reliability: Predictable behavior across temperature, humidity, and lifecycle improves compliance with functional-safety standards such as ISO 26262 or IEC 60601.
• Improved user experience: Consistent tactile feel and reliable operation translate to higher perceived quality and brand reputation.

For the end user, these benefits manifest as confidence—buttons that always respond, equipment that lasts, and interfaces that feel precise even after years of use.

Designing for a connected, reliable future

As electronic systems become smarter, smaller, and more interconnected, tolerance for failure continues to shrink. A single faulty switch can disable a medical device, interrupt a network node, or halt an industrial process. Choosing gold-plated tactile switches is therefore not simply a materials decision; it’s a reliability strategy.

Gold’s unique combination of chemical inertness, electrical stability, and mechanical durability ensures consistent performance across millions of cycles and the harshest conditions. For design engineers striving to deliver long-lived, premium-quality products, gold plating provides both a technical safeguard and a competitive edge.

In the end, reliability begins at the contact surface—and when that surface is gold, the connection is built to last.

About the author

Michaela Schnelle is a senior associate product manager at Littelfuse, based in Bremen, Germany, covering the C&K tactile switches portfolio. She joined Littelfuse 16 years ago and works with customers and distributors worldwide to support design activities and new product introductions. She focuses on product positioning, training, and collaboration to help customers bring reliable designs to market.

The post Why gold-plated tactile switches matter for reliability appeared first on EDN.

Wi-Fi 7 enters 2026 with a crucial announcement made at the CES 2026 in Las Vegas, Nevada. The Wi-Fi Alliance is introducing the 20-MHz device category for Wi-Fi 7, aimed at addressing the needs of the broader Internet of Things (IoT) ecosystem. Add Wi-Fi 7’s multi-link IoT capability to this, and you have a more consistent, always‑connected experience for applications such as security cameras, video doorbells, alarm systems, medical devices, and HVAC systems.

The 802.11be standard, widely known as Wi-Fi 7, was drafted in 2024, and the formal standard followed in 2025. From Wi-Fi 1 to Wi-Fi 5, the focus was on increasing the connection’s data rate. But then the industry realized that a mere increase in speed wasn’t beneficial.

“The challenge shifted to managing traffic on the network as more devices were coming onto the network,” said Sivaram Trikutam, senior VP of wireless products at Infineon Technologies. “So, the focus in Wi-Fi 6 shifted toward increasing the efficiency of the network.”

The industry then took Wi-Fi 7 to the next level in terms of efficiency over the past two years, especially with the emergence of high-performance applications. The challenge shifted to how multiple devices on the network could share spectrum efficiently so they could all achieve a useful data rate.

The quest to support multiple devices, at the heart of Wi-Fi 7 design, eventually led to the Wi-Fi Alliance’s announcement that even a 20 MHz IoT device can now be certified as a Wi-Fi 7 device. The Wi-Fi 7 certification program, expanded to include 20-MHz IoT devices, could have a profound impact on this wireless technology’s future.

Figure 1 Wi-Fi 7 in access points and routers is expected to overtake Wi-Fi 6/6E in 2028. Source: Infineon

20-MHz IoT in Wi-Fi 7’s fold

Unlike notebooks and smartphones, 20-MHz devices don’t require a high data rate. IoT applications like door locks, thermostats, security cameras, and robotic vacuum cleaners need to be connected, but they don’t require gigabit data rates; they typically need 15 Mbps. What they demand is high-quality, reliable connectivity, as these devices sit at difficult locations from a wireless perspective.

At CES 2026, Infineon unveiled what it calls the industry’s first 20-MHz Wi-Fi 7 device for IoT applications. ACW741x, part of Infineon’s AIROC family of multi-protocol wireless chips, integrates a tri-radio encompassing Wi-Fi 7, Bluetooth LE 6.0 with channel sounding, and IEEE 802.15.4 Thread with Matter ecosystem support in a single device.

Figure 2 ACW741x integrates radios for Wi-Fi 7, Bluetooth LE 6.0, and IEEE 802.15.4 Thread in a single chip. Source: Infineon

The ACW741x tri-radio chip also integrates wireless sensing capabilities, adding contextual awareness to IoT devices and facilitating home automation and personalization applications. Here, Wi-Fi Channel State Information (CSI) based on the 802.11bf standard enables enhanced Wi-Fi sensing with intelligence sharing between same-network devices. Next, channel sounding delivers accurate, secure, and low-power ranging with centimeter-level accuracy.

ACW741x is optimized for a 20-MHz design to support battery-operated applications such as security cameras, door locks, and thermostats that require ultra-low Wi-Fi-connected standby power. It bolsters link reliability with adaptive band switching to mitigate congestion and interference.

Adaptive band switching without disconnecting from the network opens the door to Wi-Fi 7 multi-link for IoT devices while maintaining concurrent links across 2.4 GHz, 5 GHz, and 6 GHz frequency bands. ACW741x supports Wi-Fi 7 multi-link for IoT, enhancing robustness in congested environments.

Multi-link for IoT devices

Wi-Fi operates in three bands—2.4 GHz, 5 GHz, and 6 GHz—and when a device connects to an access point, it must choose a band. Once connected, it cannot change it, even if that band gets congested. That will change in Wi-Fi 7, which connects virtually to all three bands with a single RF chain at no extra system cost.

Wi-Fi 7 operates in the best frequency band, enhancing robustness in congestion in home networks and interference across neighboring networks. “Multi-link for IoT allows establishing connections at all bands, and a device can dynamically select which band to use at a given point via active band switching without disconnecting from the networking,” said Trikutam. “And you can move from one band to another by disconnecting and reconnecting within 7 to 10 seconds.”

That’s crucial because the number of connected devices in a home is growing rapidly, from 10 to 15 devices after pandemic to more than 50 devices in 2025 in a U.S. and European home. Add this to the introduction of 20-MHz IoT devices in Wi-Fi 7’s fold, and you have a rosy picture for this wireless technology’s future.

Figure 3 Multi-link for IoT enables wireless connections across all three frequency bands. Source: Infineon

According to the Wi-Fi Alliance, shipments of access points supporting the standard rose from 26.3 million in 2024 to a projected 66.5 million in 2025. And ABI Research projects that the transition to Wi-Fi 7 will accelerate further in 2026, with a forecast annual shipment number of Wi-Fi 7 access points at 117.9 million.

Related Content

• Broadcom delivers Wi-Fi 8 chips for AI
• CES 2026: Wi-Fi 8 silicon on the horizon with an AI touch
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• Chipsets brings Wi-Fi 7 to a broad range of wireless applications
• Europe Focuses on 6GHz Regulation, While Wi-Fi 7 Looms Beyond

The post CES 2026: Multi-link, 20-MHz IoT boost Wi-Fi 7 prospects appeared first on EDN.

Awareness of LiDAR and advanced laser technologies has grown significantly in recent years. This is in no small part due to their use in autonomous vehicles such as those from Waymo, Nuro, and Cruise, plus those from traditional brands such as Volvo, Mercedes, and Toyota. It’s also making its way into consumer applications; for example, the iPhone Pro (12 and up) includes a LiDAR scanner for time-of-flight (ToF) distance calculations.

The potential of LiDAR technologies extends beyond cars, including applications such as range-finding in golf and hunting sights. However, the nature of the technology used to power all these systems means that solutions currently on the market tend to be bulkier and more power-intensive than is ideal. Even within automotive, the cost, power consumption, and size of LiDAR modules continue to limit adoption.

Tesla, for example, has chosen to leave out LiDAR completely and rely primarily on vision cameras. Waymo does use LiDAR, but has reduced the number of sensors in its sixth-generation vehicles: from five to four.

Overcoming the known power and size limitations in LiDAR design is critical to enabling scalable, cost-effective adoption across markets. Doing so also creates the potential to develop new application sectors, such as bicycle traffic or blind-spot alerts.

In this article, we’ll examine the core technical challenges facing laser drivers that have tended to restrict wider use. We’ll also explore a new class of laser driver that is both smaller and significantly more power efficient, helping to address these issues.

Powering ToF laser drivers

The main power demand within a LiDAR module comes from the combination of the laser diode and its associated driver that together generate pulsed emissions in the visible or near-infrared spectrum. Depending on the application, the LiDAR may need to measure distances up to several hundred meters, which can require optical power of 100-200 W. Since the efficiency of the laser diodes is typically 20-30%, the peak driving power delivered to the laser must be around 1 kW.

On the other hand, the pulse duration must be short to ensure accuracy and adequate resolution, particularly for objects at close distances. In addition, since the peak optical power is high, limiting the pulse duration is critical to ensure the total energy conforms to health guidelines for eye safety. Fulfilling all these requirements typically calls for pulses of 5 ns or less.

Operating the laser thus requires the driver to switch a high current at extremely high speed. Standing in the designer’s way, the inductance associated with circuit connections, board parasitics, and bondwires of IC packages is enough to prevent the current from changing instantaneously.

These small parasitic inductances are intrinsic to the circuit and cannot be eliminated. However, by introducing a parallel capacitance, it is possible to create a resonant circuit that takes advantage of this inductance to achieve a short pulse duration. If the overall parasitic inductance is about 1 nH and the pulse duration is to be a few nanoseconds, the capacitance can be only a few nano Farads or less. With such a low value of capacitance, the applied voltage must be on the order of 100 V to achieve the desired peak power in the laser. This must be provided by boosting the available supply voltage.

Discrete laser driver

Figure 1 shows the circuit diagram for a resonant laser-diode driver, including the resonant capacitor (Csupply) and effective circuit inductance (Lbond). A boost regulator provides the high voltage needed to operate the resonant circuit.

Figure 1 Resonant gate driver and boost regulator, including the resonant capacitor (Csupply) and effective circuit inductance (Lbond). (Source: Silanna Semiconductor)

The circuit requires a boost voltage regulator, depicted as Boost voltage regulator (VR) in the diagram, to provide the high voltage needed at Csupply to deliver the required energy. The circuit as shown contains a discrete gate driver for the main switching transistor (FET), which must be controlled separately to generate the desired switching signals.

In addition, isolation resistance is needed between Cfilter and Csupply, shown in the diagram, to ensure the resonant circuit can operate properly. This is relatively inefficient, as no more than 50% of the energy is transferred from the filter side to Csupply.

Handheld equipment limitations

In smaller equipment types, such as handheld ranging devices and action cameras, the high voltage must be derived from a small battery of low nominal voltage—typically a 3-V CR2 or a 3.7-V (nominal voltage, up to 4.2 V) lithium battery—which is usually the main power source.

Figure 2 shows a comparable schematic for a laser-diode driver powered from a 3.7-V rechargeable lithium battery. Achieving the required voltage using a discrete boost VR and laser-diode driver is complex, and designers need to be very careful about efficiency.

Multiple step-up converters are often used, but efficiency drops rapidly. If two stages are used, each with an efficiency of 90%, the combined efficiency across the two stages is only 81%.

Figure 2 A laser driver operated from a rechargeable lithium battery, two stages are used for a combined efficiency of 80%. (Source: Silanna Semiconductor)

In addition, there are stringent constraints on enclosure size, and the devices are often sealed to prevent dust or water ingress. On the other hand, sealing also prevents cooling airflow, thereby making thermal management more difficult. In addition, high overall efficiency is essential to maximize battery life while ensuring the high optical power needed for long range and high accuracy.

Circuit layout and size

The high speeds and slew rates involved in making the LiDAR transmitter work call for proper consideration of circuit layout and component selection. A gallium nitride (GaN) transistor is typically preferred for its ability to support fast switching at high voltage compared to an ordinary silicon MOSFET. Careful attention to ground connections is also required to prevent voltage overshoots and ground bounce from disrupting proper transistor switching and potentially damaging the transistor.

Also, a compact module design is difficult to achieve due to efficiency limitations and thermal management challenges. The inefficiencies in the discrete circuit implementation mean operating at high power produces high losses and increased self-heating that can cause the operating temperature to rise. However, while short pulses can reduce the average thermal load, current slew rates must be extremely high. If this cannot be maintained consistently, extra losses, more heat, and degraded performance can result.

A heatsink is the preferred thermal management solution, although a large heatsink can be needed, leading to a larger overall module size and increased bill of materials cost. In addition, ensuring eye safety calls for a fast shutdown in the event of a circuit fault.

Bringing the boost stage, isolation, GaN FET driver, and control logic into a single compact IC (see Figure 3) achieves greater functional integration and offers a route to higher efficiency, smaller form factors, and enhanced safety through nanosecond-level fault response.

Figure 3 An integrated driver designed for resonant capacitor charging combines short pulse width with high power and efficiency. This circuit was implemented with Silanna SL2001 dual-output driver. (Source: Silanna Semiconductor)

While leveraging resonant-capacitor charging to achieve short, tightly controlled pulse duration, this integration avoids the energy losses incurred in the capacitor-to-capacitor transfer circuitry. The fault sensing and reporting can be brought on-chip, alongside these timing and control features.

This approach is seen in LiDAR driver ICs like the Silanna FirePower family, which integrate all the functions needed for charging and firing edge-emitting laser (EEL) or vertical-cavity surface-emitting laser (VCSEL) resonant-mode laser diodes at sub-3-ns pulse width. Figure 4 shows how an experimental setup produced a 400-W pulse of 2.94 ns, operating with a capacitor voltage boosted to 120 V with a resonant capacitor value of 2.48 nF.

Figure 4 Test pulse produced using integrated driver and circuit configuration as in Figure 3. (Source: Silanna Semiconductor)

The driver maintains control of the resonant capacitor energy and eliminates any effects of input voltage fluctuations, while on-chip logic sets the output power and performs fault monitoring to ensure eye safety. The combined effects of advanced integration and accurate logic-based control can save 90% of charging power losses compared to a discrete implementation and realize an overall charging efficiency of 85%. The control logic and fault monitoring are configured through an I2C connection.

Of the two devices in this family, the SL2001 works with a supply voltage from 3 V to 24 V and provides a dual GaN/MOS drive that enables peak laser power greater than 1000 W with a pulse-repetition frequency up to several MHz. The second device, the SL2002, is a single-channel driver targeted for lower power applications and is optimized for low input voltage (3 V-6 V) operation. Working off a low supply voltage, this driver’s 80-V laser diode voltage and 1 MHz repetition rate are suited to handheld applications such as rangefinders and 3D mapping devices. Figure 5 shows how the SL2002 can simplify the driving circuit for a battery-operated ranging device powered from a 3.7 V lithium battery.

Figure 5 Simplified circuit diagram for low-voltage battery-operated ranging. (Source: Silanna Semiconductor)

Shrinking LiDAR modules

LiDAR has been a key component in the success of automated driving, working in conjunction with other sensors, including radar, cameras, and ultrasonic detectors, to complete the vehicle’s perception system. However, LiDAR modules must become smaller and more energy-efficient to earn their place in future vehicle generations and fulfil opportunities beyond the automotive sphere.

Focusing innovation on the laser-driving circuitry unlocks the path to next-generation LiDAR that is smaller, faster, and more energy-efficient than before. New, single-chip drivers that deliver high optical output power with tightly controlled, nanosecond pulse width enable LiDAR to address tomorrow’s cars as well as handheld devices such as rangefinders.

Ahsan Zaman is Director of Marketing at Silanna Semiconductor, Inc. for the FirePowerTM Laser Drivers line of products. He joined the company in 2018 through the acquisition of Appulse Power, a Toronto, Canada-based Startup company for AC-DC power supplies, where he was a co-founder and VP of Engineering. Prior to that, Ahsan received his B.A.Sc., M.A.Sc., and Ph.D. degrees in Electrical Engineering from the University of Toronto, Canada, in 2009, 2012, and 2015, respectively. He has more than a decade of experience in power converter architectures, mixed-signal IC design, low-volume and high-efficiency power management solutions for portable electronic devices, and advanced control methods for high-frequency switch-mode power supplies. Ahsan has previously collaborated with industry-leading semiconductor companies such as Qualcomm, TI, NXP, EXAR etc., and co-authored more than 20 IEEE conference and journal publications, and holds several patents in this field

Related Content

• What is automotive LIDAR and how does it work
• LiDAR’s second wind
• FMCW LiDAR sensor addresses accuracy and cost

The post LiDAR’s power and size problem appeared first on EDN.

While Wi-Fi 7 adoption is accelerating among enterprises, Wi-Fi 8 routers and mesh systems could arrive as early as summer 2026. It’s important to note that the IEEE 802.11bn standard, widely known as Wi-Fi 8, is expected to be ratified in 2028. So, the gap between Wi-Fi 7’s launch and the potential availability of Wi-Fi 8 products in mid-2026 could shorten the typical cycle between Wi-Fi generations.

At CES 2026 in Las Vegas, Nevada, wireless chip vendors like Broadcom and MediaTek are unveiling their Wi-Fi silicon offerings. ASUS is also conducting real-world throughput tests of its Wi-Fi 8 concept routers at CES 2026.

Figure 1 Wi-Fi 8 aims to deliver a system-wide upgrade across speed, capacity, reach, and reliability. Source: Broadcom

Wi-Fi 8—aimed at boosting reliability and reducing latency in dense, interference-prone environments—marks a shift in Wi-Fi evolution. While Wi-Fi 8 maintains the same theoretical maximum data rate as Wi-Fi 7, it aims to improve effective throughput, reduce packet loss, and decrease latency for time-sensitive applications.

Another notable feature of Wi-Fi 8 designs is the incorporation of AI ingredients. Below is a short profile of an AI accelerator chip that claims to facilitate real-time agentic applications for residential consumers.

AI accelerator for Wi-Fi 8

Wi-Fi 8 proponents are quick to point out that it connects the wireless world with the AI future through highly reliable connectivity and low-latency responsiveness. Real-time, latency-sensitive applications are increasingly seeking to employ agentic AI, and for that, Wi-Fi 8 aims to prioritize consistent performance under challenging conditions.

Broadcom’s new accelerated processing unit (APU), unveiled at CES 2026, combines compute and networking ingredients with AI acceleration in a single silicon device. BCM4918—a system-on-chip (SoC) device blending compute acceleration, advanced networking, and security—aims to deliver high throughput, low latency, and intelligent optimization needed for the emerging AI-driven connected ecosystem.

The new AI accelerator for Wi-Fi 8 integrates a neural engine for on-device AI/ML inference and acceleration. It also incorporates networking engines to offload both wired and wireless data paths, enabling complete CPU bypass of all networking traffic. For built-in security, cryptographic protocol acceleration ensures end-to-end data protection without performance compromise.

“Our new BCM4918 APU, along with our full portfolio of Wi-Fi 8 chipsets, form the foundation of an AI-ready platform that not only enables immersive, intelligent user experiences but also does so with efficiency, security, and sustainability at its core,” said Mark Gonikberg, senior VP and GM of Broadcom’s Wireless and Broadband Communications Division.

Figure 2 When paired with BCM6714 and BCM6719 dual-band radios, BCM4918 APU allows designers to develop a unified compute-and-connectivity architecture. Source: Broadcom

AI compute plus connectivity

The BCM4918 APU is paired with two new dual-band Wi-Fi 8 radio devices: BCM6714 and BCM6719. While combining 2.4 GHz and 5 GHz operation into a single piece of silicon, these Wi-Fi 8 radios also feature on-chip 2.4-GHz power amplifiers, reducing external components and improving RF efficiency.

These dual-band radios, when paired with the BCM4918 APU, allow design engineers to quickly develop a unified compute-and-connectivity architecture that enables edge-AI processing, real-time optimization, and adaptive intelligence. The APU and dual-band radios for Wi-Fi 8 are now available to early access customers and partners.

Broadcom’s Gonikberg says that Wi-Fi 8 represents a turning point where broadband, connectivity, compute, and intelligence truly converge. The fact that it’s arriving ahead of schedule is a testament to its convergence merits, and that it’s more than a speed upgrade and could transform connection stability and responsiveness.

Related Content

• Broadcom delivers Wi-Fi 8 chips for AI
• Exploring the superior capabilities of Wi-Fi 7 over Wi-Fi 6
• Understanding the Differences Between Wi-Fi HaLow and Wi-Fi
• Chipsets brings Wi-Fi 7 to a broad range of wireless applications
• Europe Focuses on 6GHz Regulation, While Wi-Fi 7 Looms Beyond

The post CES 2026: Wi-Fi 8 silicon on the horizon with an AI touch appeared first on EDN.

Ages ago, humankind crawled out of the primordial analog ooze and began to do digital. They soon noticed and quantified a fundamental need to interconnect their new quantized numerical novelties with the classic continuum of the ancestral engineer’s world. Thus arose the ADC.

Of course, there were (and are) an abundance of ADC schemes and schematics. One of the earliest and simplest of these was the single-slope type.

Single slope ADCs come in two savory flavors. In one, a linear analog voltage ramp is generated and compared to the input signal. The time required for the ramp to rise from zero (or near) to equality with the input is proportional to the input’s amplitude and taken as its digital conversion. 

We recently saw an example contributed by Dr. Jordan Dimitrov to our own friendly Design Idea (DI) corner in “Voltage-to-period converter offers high linearity and fast operation.”

In a different cultivar of the single sloper, a capacitor is charged to the input voltage, then linearly ramped down to zero. The time required to do that is proportional to Vin and counts (pun!) as the conversion result. An (extremely!) simple and cheap example of this type was published here about two and a half years ago in “A “free” ADC.”

Wow the engineering world with your unique design: Design Ideas Submission Guide

While simple and cheap are undeniably good things, too much of a good thing is sometimes not such a good thing. The circuit in Figure 1 adds a few refinements (and a bit more cost) to that basic design in pursuit of an order of magnitude (or two) better accuracy and perhaps a bit more speed.

Figure 1 Simple speedy single-slope (SSSS) ADC biphasic conversion cycle.

Here’s how it works:

1. (CONVERT = 1) switch U1 charges C1 to Vin
2. (CONVERT = 0) C1 is linearly discharged by 100 µA current sourced by Z1Q1

Note: Z1, C1, and R2 should be precision types.

Conversion occurs in two phases, selected by one GPIO bit configured for output (CONVERT/ACQUIRE).

During the ACQUIRE (1) interval SPDT switch U1 connects integrator capacitor C1 to the input source, charging it to Vin. The acquisition time constant of the charging is:

C1(R sZ1+ U1 Ron, + Q2’s input impedance) = ~10 µs

To complete the charge to ½-lsb-precision at 12-bit resolution, this needs an ACQUIRE interval of:

10µs*loge(2(12+1)) = 90µs

The controlling microcontroller can then return CONVERT to zero, which switches the input side of C1 to ground, driving the base of the comparator transistor negative for a voltage step of –Vin, plus a “smidgen” (~12 mV).

This last is contributed by C2 to compensate for the zero offset that would otherwise accrue from Q2’s finite voltage gain and storage time.

Q1’s emergence from saturation drives INTEGRATE positive. Here it remains until the discharge of C1 is complete and Q1 turns back ON. This interval is:

Vin*C1 / 100µA = 200µs/v = 1-ms maximum

If the connected counter/peripheral runs at 20 MHz, then the max-count accumulation and conversion resolution will be 4000, or 11.97 bits.

This 1-ms, or ~12-bit, conversion cycle is sketched in Figure 2.  Note that good integral nonlinearity (INL) and differential nonlinearity (DNL) are inherent.

Figure 2 The SSSS ADC waveshapes. The ACQUIRE duration (12 bits) is 90 µs. The INTEGRATE duration is 1ms max (Vin C1 / Iq1 = 200 µs/V). Amplitude is 5 Vpp.

 Of course, not all signal sources will gracefully tolerate the loading imposed by this conversion sequence, and not all applications will find the tolerance of available LM4041 references and R1C1 adequately precise.

Figure 3 shows fixes for both of these limitations. A typical RRIO CMOS amplifier for A1 eliminates the input loading problem, and the R5 trim provides a convenient means for improving conversion calibration.

Figure 3 A1 input buffer unloads Vin, and R5 calibration trim improves accuracy.

Stephen Woodward’s relationship with EDN’s DI column goes back quite a long way. Over 100 submissions have been accepted since his first contribution back in 1974.

Related Content

• Voltage-to-period converter offers high linearity and fast operation
• A “free” ADC
• Another weird 555 ADC
• 15-bit voltage-to-time ADC for “Proper Function” anemometer linearization

The post Simple speedy single-slope ADC appeared first on EDN.

Amazon wisely doesn’t want naïve consumers poking around inside its high-voltage AC-switching devices. This engineer was also thwarted in his exploratory efforts…initially, at least.

Early last month, within a post detailing my forced-by-phaseout transition from Belkin’s Wemo smart plugs to TP-Link’s Kasa and Tapo devices, I mentioned that I’d originally considered a different successor:

Amazon was the first name that came to mind, but although its branded Smart Plug is highly rated, it’s only controllable via Alexa. I was looking for an ecosystem that, like Wemo, could be broadly managed, not only by the hardware supplier’s own app and cloud services but also by other smart home standards…

A curiosity-satisfying return-on-(minimal) investment

Even though I ended up going elsewhere, I still had a model #HD34BX Amazon Smart Plug sitting on my shelf. I’d bought it back in late November 2020 on sale for $4.99, 80% off the usual $24.99 price (and in response to, I’m guessing, per the purchase date, a Black Friday promotion). Regular readers already know what comes next: it’s teardown time!

Let’s start with some outer box shots, as usual (as with subsequent images), accompanied by a 0.75″ (19.1 mm) diameter U.S. penny for size comparison purposes:

Note that, per my prior writeup’s “specific hardware requirement that needed to be addressed,” it supports (or at least claims to) up to 15A of current:

• Input: 100-120V, 60 Hz, 15A Max
• Output:
  • 120V, 60 Hz, 15A, resistive load
  • 120V, 60 Hz, 10A, inductive load
  • 120V, 60 Hz, 1/2 HP, motor load
  • 120V, 60 Hz, TV-5, incandescent
• Operating Temperature: 0-35°C
• IP Rating: IP30

thereby being capable of power-controlling not only low-wattage lamps but also coffee makers, curling irons, and the like:

See that translucent strip of tape at the upper right?

Wave buh-bye to it; it’s time to look inside:

Nifty cardboard-based device-retention mechanism left over at the bottom:

The bottom left literature snippet is the usual warranty, regulatory and other gobbledygook:

The one at right is a wisp of a quick-start guide:

But neither of them, trust me I already realize, is the fundamental motivation for why you’re here today. Instead, it’s our dissection subject (why was I having flashbacks to the recently viewed and greatly enjoyed 2025 version of Frankenstein as I wrote those prior words?):

Underneath the hole at far left is an activity-and-status LED. And rotating the smart plug 90°:

there’s the companion switch, which not only allows for manual power control of whatever’s plugged into it but also initiates a factory reset when pressed and held for an extended period.

Around back are specs-and-such, including the always-insightful FCC ID (2ALBG-2017), along with the line (“hot”) and neutral source blades and ground pin (Type B NEMA 5-15 in this case):

In contrast to its left-side sibling, the right side is comparatively bland (i.e., to clarify, there’s nothing under the penny):

as are the bottom:

and the top, for that matter, unless you’re into faintly embossed Amazon logos:

Tenuous adhesive

My first (few…seeming few dozen…) attempts to get inside via the visible seam around the backside edges, trying out various implements of destruction in the process, were for naught:

Though the efforts weren’t completely wasted, as they motivated me to finally break out the Dremel set that had been sitting around unused and collecting dust since…yikes…mid-2005, my Amazon order history just informed me:

and which delivered ugly but effective results (albeit leaving the smart plug headed for nowhere but the landfill afterwards):

First step: unscrew and disconnect the wire going from the front panel socket’s load (“hot”) slot to the PCB (where it’s soldered):

Like I said before…ugly but effective:

At the top (in this photo, to the left when originally assembled) are the light pipe that routes the LED (yet to be seen but presumably on the PCB) output to the front panel, along with the mechanical assembly for the left-side switch:

You’ve already seen one top view of the insides, three photos ago. Here’s another, this time standalone and rotated:

And here are four of the five other perspectives; the back view will come later. Front:

Left side, showing the PCB-mounted portion of the switch assembly:

Right behind the switch is the outward-pointing LED whose location I’d just prognosticated:

Right side:

And bottom:

Electron routing and switching

Onward. The ground pin from the back panel routes directly to the front panel socket’s ground slot, not interacting with any intermediary circuitry en route:

You’ve probably already noticed that the “PCB” is actually a three-PCB assembly: smaller ones at top and bottom, both 90°-connected to the main one at the back. To detach the latter from the back chassis panel requires removal of another screw:

Houston, we have liftoff:

This is interesting, at least to me. The neutral wire is attached to its corresponding back-panel blade with a screw, albeit also to the PCB at other end with solder:

but the line (“hot”) wire is soldered at both ends:

This seemingly inconsistent approach likely makes complete sense to those of you more versed in power electronics than me; please share your thoughts in the comments. For now…snip:

Assuming, per my earlier comments, that you’ve already noticed the three-PCB assembly, you might have also noticed some white tape on both sides of the mini-PCB located at the bottom. Wondering what’s underneath it? Me too:

The answer: not much of anything!

What’s the frequency, Kenneth?

(At least) one more mystery to go. We’ve already seen plenty of predictable AC switching and AC-to-DC conversion circuitry, but where’s all the digital and RF stuff that controls the AC switching, along with wirelessly communicating with the outside world? For the answer, I’ll direct your attention to the mini-PCB at the top, which you may recall initially glimpsing earlier:

What you’re looking at on the other side is the WCBN4520R, a Wi-Fi-plus-Bluetooth Low Energy module discussed in-depth in an informative Home Assistant forum thread I found.

Forum participants had identified the PCB containing the module as the WN4520L from LITE-ON Technology, with Realtek’s RTL8821CSH single-chip wireless controller and Rockchip Electronics’ RKNanoD dual Arm Cortex-M3 microcontroller supposedly inside the module. But a different teardown I found right before finalizing this piece instead shows MediaTek’s MT7697N:

A highly integrated single chip offering an application processor, low power 1T1R 802.11 b/g/n Wi‑Fi, Bluetooth subsystem and power management unit. The application processor subsystem contains an ARM Cortex‑M4 with floating point unit. It also supports a range of interfaces including UART, I2C, SPI, I2S, PWM, IrDA, and auxiliary ADC. Plus, it includes embedded SRAM/ROM.

as the main IC inside the module, accompanied by a Macronix 25L3233F (PDF) 32 Mbit serial flash memory. I’m going with the latter chip inventory take. Regardless, to the left of the module is a visible silhouette of the PCB-embedded antenna, and there’s also a SMA connector on the board for tethering to an optional external antenna, not used in this particular design.

And there you have it! As always, sound off with your thoughts in the comments, please!

—Brian Dipert is the Principal at Sierra Media and a former technical editor at EDN Magazine, where he still regularly contributes as a freelancer.

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• Limping Into the 21st Century with Smart Technology
• Teardown: A Wi-Fi smart plug for home automation

The post Amazon’s Smart Plug: Getting inside requires more than just a tug appeared first on EDN.

Researchers in Japan have developed ultrathin ferroelectric capacitors that maintain strong polarization at a stack thickness of just 30 nm, including top and bottom electrodes. Using scandium-doped aluminum nitride films sandwiched between platinum electrodes, the team achieved high remanent polarization, demonstrating the potential for high-density, energy-efficient memory in compact electronic devices.

The work, led by Professor Hiroshi Funakubo of Science Tokyo in collaboration with Canon ANELVA, marks a departure from previous approaches that only thinned the ferroelectric layer. By optimizing the full capacitor stack—5-nm platinum bottom electrode, 20-nm (Al0.9Sc0.1)N ferroelectric layer, and 5-nm platinum top electrode—the researchers maintained robust ferroelectric performance while drastically reducing device size.

Key to the success was a post-heat treatment of the bottom platinum electrode at 840°C, which improved its crystal orientation and enhanced polarization switching in the ultrathin films. This process ensures that the scaled-down capacitors remain compatible with semiconductor integration, enabling on-chip embedding alongside logic circuits.

The breakthrough lays the groundwork for compact ferroelectric memories, such as FeRAM and ferroelectric tunnel junctions, for future IoT and mobile electronics. By further exploring alternative electrode materials and processing techniques, the team aims to create even more durable, energy-efficient, and miniaturized on-chip memory devices.

Full details on the research are available here.

Institute of Science Tokyo 

The post Researchers shrink ferroelectric memory stacks appeared first on EDN.

Inturai Ventures, in partnership with cybersecurity firm PQStation, has unveiled quantum-safe encryption for connected devices across the defense, aged care, and home security sectors. Under the agreement, Inturai holds exclusive rights to deploy PQStation’s technology in these markets. The collaboration focused on securing MQTT traffic using post-quantum cryptography (PQC) on the ESP32 platform. Billions of devices worldwide run on the ESP32, a dual-core microcontroller SoC with integrated Wi-Fi and Bluetooth.

Example ESP-32 device that can now run Post Quantum Secure. (CNW Group/Inturai Ventures Corp.)

The encryption was tested in two configurations: one using only post-quantum cryptography and another combining PQC with conventional security. Both approaches maintained strong performance, with low latency and minimal power impact, demonstrating that even small, low-power devices can operate securely against future quantum threats.

Governments across the United States, Canada, Australia, and the European Union are requiring post-quantum security upgrades to begin by 2026. In some jurisdictions, including Australia and the EU, critical sectors such as defense and healthcare must complete the transition as early as 2028.

This joint development with PQStation is central to Inturai’s mission to protect critical data in real-time sensor networks and positions the company to deploy quantum-safe protocols across critical sectors worldwide. Inturai expects significant benefits across its healthcare, drone, and military pipeline from this breakthrough, as the global ESP32 module market is projected to reach $4.6 billion by 2032 (Dataintelo).

Inturai Ventures  

PQStation

The post Inturai launches quantum-safe ESP32 security appeared first on EDN.

Other World Computing (OWC) offers a fully certified 2-meter Thunderbolt 5 (USB-C) cable for both Macs and PCs. Engineered with signal amplification, precision shielding, and end-to-end signal integrity, the cable delivers a long-length solution for workflows that require maximum speed, display performance, and power delivery—along with the full capabilities of Thunderbolt 5.

This extended-length cable joins the company’s lineup of 0.3-meter, 0.8-meter, and 1-meter Thunderbolt 5 cables. It is Thunderbolt-certified and validated by multiple independent testing labs to meet the complete Thunderbolt 5 specification, including:

• Up to 80-Gbps bidirectional data throughput
• Up to 120-Gbps video bandwidth for multi-display, high-performance workflows
• Up to 240-W power delivery
• Supports up to three 8K displays
• Fully compatible with Thunderbolt 5, 4, and 3, as well as USB4 and USB-C devices—universal for virtually any USB-C host or power/charging connection

The 2-meter Thunderbolt 5 cable costs $79.99 and is now available for pre-order, with delivery expected in early January 2026.

Other World Computing 

The post OWC rolls out 2-meter Thunderbolt 5 cable appeared first on EDN.

Pico Technology has released a major upgrade to its PicoScope software, improving waveform capture, analysis, and measurement. Version 7.2 adds built-in features like waveform overlays and advanced serial filtering, enabling faster, clearer, and more efficient control of PicoScope PC-based instruments.

Waveform Overlays is a visualization tool that displays multiple waveform captures stacked in a single view. This feature makes it easier to spot intermittent glitches, jitter, and anomalies often missed in single-shot captures.

New serial decoding filters make it easy to pinpoint specific packets, data types, or date ranges without combing through long serial captures. These advanced filters work seamlessly across all 40 serial protocols supported by PicoScope 7.

To learn more about what’s new in PicoScope 7.2, click here. It is available as a free update for all existing and new PicoScope users on Windows, Mac, and Linux operating systems.

Pico Technology

The post PicoScope 7.2 enables smarter waveform analysis appeared first on EDN.

Based on Qualcomm’s Dragonwing IQ-X platform, Advantech’s three edge AI compute boards deliver up to 45 TOPS of AI acceleration for industrial applications. The AOM-6731 AI module, AIMB-293 mini-ITX motherboard, and SOM-6820 COM Express Type 6 module offer powerful processing alongside robust 5G and Wi-Fi 7 connectivity.

Leveraging Oryon CPUs with up to 12 cores running as fast as 3.4 GHz, Dragonwing IQ-X enables rapid data handling and seamless multitasking while consuming up to three times less power than competing solutions. Single- and multithreaded compute performance is further enhanced by on-device Hexagon NPUs, bolstering AI capabilities. Integrated Adreno VPUs and GPUs support multimedia-intensive applications.

Onboard LPDDR5x memory achieves a 1.3× speed boost—from 6,400 MT/s to 8,533 MT/s—while reducing power consumption by 20% versus standard LPDDR5. UFS 3.1 Gear 4 storage increases data transfer speeds from 1,000 Mbps (PCIe Gen3 NVMe) to 16,000 Mbps. UFS 4.0 is also available for optimal performance in harsh industrial environments. 

Samples of the AOM-6731 AI module and SOM-6820 COM Express module are now available, while the AIMB-293 motherboard will be offered for engineering evaluations starting March 2026.

Advantech

The post Compute modules are built for industrial AI appeared first on EDN.

Older table-top AC-DC radios used a classic line-up of tubes. Think 12SA7, 12SK7,12SQ7, 35Z5GT, and 50L6GT. As I grew into my teens, I got interested in how these radios worked and soon discovered that their vacuum tubes could get very hot, especially the last two, the half-wave rectifier (35Z5GT) and the beam power tetrode audio output stage (50L6GT).

One day, I carelessly allowed a window curtain to brush against a hot 50L6GT, and the fabric of that curtain actually melted. Mom was not thrilled.

With that history still fresh in mind, I later came across another vacuum tube called the 117L7/M7GT whose data sheet looked much like this:

Figure 1 A datasheet for the 117L7/M7GT with the two hottest tube functions from previously studied radios in a single unit. 

This thing was scary!

The two hottest tube functions from the radios I’d been studying were combined into one device. Both functions were placed within a single glass envelope vacuum tube.

Take a look at these guys:

Figure 2 Two 117L7/M7GT tubes combining the heat of the beam power tube and the rectifier tube within a single glass envelope.

Imagine the combined heat of the beam power tube and the rectifier tube within a single glass envelope. If the one tube that damaged Mom’s window curtain was thermally dangerous, I cringe to think how hot these tubes could get and what damage they might be capable of causing.

I still shudder at the thought.

John Dunn is an electronics consultant and a graduate of The Polytechnic Institute of Brooklyn (BSEE) and of New York University (MSEE).

Related Content

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• Vacuum tube technology resurrected
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• Is There Still a Vacuum Tube in Your Future?

The post An intimidating vacuum tube appeared first on EDN.

A year back, this engineer titled his 2024 retrospective “interconnected themes galore”. That said, both new and expanded connections can sometimes lead to chaotic results, yes?

As any of you who’ve already seen my precursor “2026 Look Ahead” piece may remember, we’ve intentionally flipped the ordering of my two end-of-year writeups once again this year. This time, I’ll be looking back over 2025: for historical perspective, here are my prior retrospectives for 2019, 2021, 2022, 2023, and 2024 (we skipped 2020).

As I’ve done in past years, I thought I’d start by scoring the key topics I wrote about a year ago in forecasting the year to come:

• The 2024 United States election (outcome, that is)
• Ongoing unpredictable geopolitical tensions, and
• AI: Will transformation counteract diminishing ROI?

Maybe I’m just biased, but in retrospect, I think I nailed ‘em all as being particularly impactful. In the sections that follow, I’m going to elaborate on several of the above themes, as well as discuss other topics that didn’t make my year-ago forecast but ended up being particularly notable (IMHO, of course).

Tariffs, constrained shipments, and government investments

A significant portion of the initial “2024 United States election outcome” section in my year-back look-ahead piece was devoted to the likely potential for rapidly-announced significant tariffs by the new U.S. administration against various other countries, both import- and export-based in nature, and both “blanket” and product-specific, as well as for predictable reactive tariffs and shipment constraints by those other countries in response.

And indeed this all came to pass, most notably with the “Liberation Day” Executive Order-packaged suite of import duties issued on April 2, 2025, many of which were subsequently amended (multiple times in a number of cases) in the subsequent months in response to other countries’ tit-for-tat reactions, trade agreements, and other détente cooling-off measures, and the like.

My point in bringing this all up, echoing what I wrote a year back (as well as both the month and the year before that), is not to be political. As I’ve written several times before:

I have not (and will not) reveal personal opinions on any of this.

and I will again “stay the course” this time. Whether or not tariffs are wise or, for that matter, were even legally issued as-is are decisions for the Supreme Court (near term) and the voters (eventually) to decide. So then why do I mention it at all? Another requote:

Americans are accused of inappropriately acting as if their country and its citizens are the “center of the world”. That said, the United States’ policies, economy, events, and trends inarguably do notably affect those of its allies, foes and other countries and entities, as well as the world at large, which is why I’m including this particular entry in my list.

This time, I’m going to focus on a couple of different angles on the topic. Maybe your company sells its products and/or services only within the country in which it’s headquartered. Or maybe, on the opposite end of the spectrum, it’s a multinational corporation with divisions scattered around the world. Or any point in between these spectrum extremes.

Regardless (and regardless too of whether or not it’s a U.S.-headquartered company), both the tariff and shipment-restriction policies of the U.S. and other countries will undoubtedly and notably affect your business strategies.

Unfortunately, though, while such tariff and restriction policies can be issued, amended, and rescinded “on a dime”, your company’s strategies inherently can’t be even close to as nimble, no matter how you aspire to both proactively and reactively structure your organization and its associated supply chains.

As I write these words I’m reminded, for example, of a segment I saw in a PBS NewsHour episode last weekend that discussed (among other things) Christmas goods suppliers’ financial results impacts of tariffs, along with the just-in-case speculative stockpiling they began doing a year ago in preparation (conceptually echoing my own “Chi-Fi” pre-tariff purchases at the beginning of 2025):

The other angle on the issue that I’d like to highlight involves the increasingly prevalent direct government involvement in companies’ financial fortunes.

Back in August, for example, just two weeks after initially demanding that Intel’s new CEO resign due to the perception of improper conflicts involving Chinese companies, the Trump administration announced that it was instead converting prior approved CHIPS Act funding for Intel into stock purchases, effectively transforming the U.S. into a ~10% Intel shareholder.

More recently, NVIDIA was once again approved to ship its prior-generation H200 AI accelerators into China…in exchange for the U.S. getting a 25% share of the resultant sales revenue, and following up on broader 15%-revenue-share agreements made by both AMD and NVIDIA back in August in exchange for securing China-export licenses.

And President Trump has already publicly stated that such equity and revenue-sharing arrangements, potentially broadening to also include other U.S. companies, will increasingly be the norm versus the exception in the future. Again, wise or not? I’ll keep my own opinions to myself and rely on time to answer that one. For now, I’ll just say…different.

Robotaxis

Waymo is on a roll. The Google-sibling Alphabet subsidiary now blankets not only San Francisco, California (where its usage by customers is increasingly the norm versus a novelty exception) but large chunks of the broader Silicon Valley region, now including freeways and airports.

It’s also currently offering full service in Los Angeles, Phoenix (AZ), and Austin (TX) as I write these words in late December 2025, with active testing underway in roughly a dozen more U.S. municipalities, plus Japan and the UK, and with already-announced near-term service plans in around a dozen more. As Wikipedia notes:

As of November 2025, Waymo has 2,500 robotaxis in service. As of December 2025, Waymo is offering 450,000 paid rides per week. By the end of 2026, Waymo aims towards increasing this to 1 million taxi rides a week and are laying the groundwork to expand to over 20 cities, including London and Tokyo, up from the current six.

And this is key: these are fully autonomous vehicles, with no human operators inside (albeit still with remote human monitors who can, as needed, take over manual control):

Problem-free? Not exactly. Just in the few weeks prior to my writing these words, several animals have been hit, a Waymo car has wandered into an active police-presence scene, and they more generally haven’t seemingly figured out yet how to appropriately respond to school buses signaling they’re in the process of actively picking up and/or dropping off passengers.

So not perfect: those are the absolute statistics. But what about relative metrics?

Again and again, in data published both by Waymo (therefore understandably suspect) and independent observers and agencies, autonomous vehicles are seen as notably safer, both for occupants and the environment around them, than those piloted by humans…and the disparity is only growing in self-driving vehicles’ favor over time. And in China, for example, the robotaxi programs are, if anything, even more aggressive from both testing and active deployment standpoints.

To that last point, I’ll conclude this section with another note on this topic. In fairness, I feel compelled to give Tesla rare but justified kudos for finally kicking off the rollout of its own robotaxi service mid-year in Austin, after multiple yearly iterations of promises followed by delays.

Just a few days ago, as I write this, in fact, the company began testing without human monitors in the front seats (not that they were effective anyway, in at least one instance).

Agentic AI

In the subhead for my late-May Microsoft Build 2025 conference coverage, I sarcastically noted:

What is “agentic AI”? This engineer says: “I dunno, either.”

Snark aside, I truthfully already had at least some idea of what the “agentic web”, noted in the body text of that same writeup as an example of the trendy lingo that our industry is prone to exuberantly (albeit only impermanently) spew, meant. And I’ve certainly learned much more about it in the intervening months. Here’s what Wikipedia says about AI agents in its topic intro:

In the context of generative artificial intelligence, AI agents (also referred to as compound AI systems or agentic AI) are a class of intelligent agents distinguished by their ability to operate autonomously in complex environments. Agentic AI tools prioritize decision-making over content creation and do not require human prompts or continuous oversight.

And what about the aforementioned broader category of intelligent agents, of which AI agents are a subset? Glad you asked:

In artificial intelligence, an intelligent agent is an entity that perceives its environment, takes actions autonomously to achieve goals, and may improve its performance through machine learning or by acquiring knowledge. AI textbooks define artificial intelligence as the “study and design of intelligent agents,” emphasizing that goal-directed behavior is central to intelligence. A specialized subset of intelligent agents, agentic AI (also known as an AI agent or simply agent), expands this concept by proactively pursuing goals, making decisions, and taking actions over extended periods.

A recent post on Google’s Cloud Blog included, I thought, I concise summary of the aspiration:

“Agentic workflows” represent the next logical step in AI, where models don’t just respond to a single prompt but execute complex, multi-step tasks. An AI agent might be asked to “plan a trip to Paris,” requiring it to perform dozens of interconnected operations: browsing for flights, checking hotel availability, comparing reviews, and mapping locations. Each of these steps is an inference operation, creating a cascade of requests that must be orchestrated across different systems.

Key to the “interconnected operations” that are “orchestrated across different systems” is MCP, the open-source Model Context Protocol, which I highlighted in my late-May coverage. Originally created by two developers at Anthropic and subsequently announced by the company in late 2024, it’s now regularly referred to as “USB-C for AI” and has been broadly embraced and adopted by numerous organizations and their technologies and products.

Long-term trend aside, my decision to include agentic AI in my year-end list was notably influenced by the fact that agents (specifically) and AI chatbots (more generally) are already being widely implemented by developers as well as, notably, adopted by the masses. OpenAI recently added an AI holiday shopping research feature to its ChatGPT chatbot, for example, hot on the heels of competitor Google’s own encouragement to “Let AI do the hard parts of your holiday shopping”. And what of Amazon’s own Rufus AI service? Here’s TechCrunch’s beginning-of-December take on Amazon’s just-announced results:

On Black Friday, Amazon sessions that resulted in a sale were up 100% in the U.S. when the AI chatbot Rufus was used. They only increased by 20% when Rufus wasn’t used. 

Trust a hallucination- and bias-prone deep learning model to pick out presents for myself and others? Not me. But I’m guessing that both to some degree now, and increasingly in the future, I’ll be in the minority.

Humanoid Robots

By now, I’m sure that many of you have already auditioned at least one (and if you’re like me, countless examples) of the entertaining and awe-inspiring videos published by Boston Dynamics over the years (and by the way, if you’ve ever wondered why the company was subsequently acquired by Hyundai, this excellent recent IEEE Spectrum coverage of the company’s increasingly robotics-dominated vehicle manufacturing plant in Georgia is a highly recommended read). While early showcased examples such as Spot were, as its name reflects, reminiscent of dogs and other animals (assuming they had structural relevance to anything at all, that is…hold that thought), the company’s newer Atlas, along with examples from a growing list of other companies, is distinctly humanoid-reminiscent. Quoting from Wikipedia:

A humanoid robot is a robot resembling the human body in shape. The design may be for functional purposes, such as interacting with human tools and environments and working alongside humans, for experimental purposes, such as the study of bipedal locomotion, or for other purposes. In general, humanoid robots have a torso, a head, two arms, and two legs, though some humanoid robots may replicate only part of the body. Androids are humanoid robots built to more closely resemble the human physique. (The term Gynoid is sometimes used for those that resemble women.)

As Wikipedia notes, part of the motivation for this trend is the fact that the modern world has been constructed with the human body in mind, and it’s therefore more straightforward from a robotics-inclusion standpoint to create automotons that mimic their human creators (and forebears?) than to adapt the environment to more optimally suit other robot form factors. Plus, I’m sure that at least some developers are rationalizing that robots that resemble humans are more likely to be accepted alongside humans, both in the workplace and in the home.

Still, I wonder how much sub-optimization of the overall robotic implementation potential is occurring in pursuit of this seeming single-minded human mimicking aspiration. I wonder, too, how much influence early robot examples in entertainment, such as Rosie (or Rosey) from The Jetsons or Gort from The Day the Earth Stood Still, have had in shaping the early thinking of children destined to be engineers when they grew up. And from a practical financial standpoint, given the large number of humanoid robot examples coming from China alone, I can’t help but wonder just how many “androids” (the robot, not the operating system) the world really needs, and how massive the looming corporate weeding-out may be as a result.

Unforeseen acquisitions

This last one might not have been seismically impactful from a broad industry standpoint…or then again, it may end up being so, both for Qualcomm and its competitors. Regardless, I’m including it because it personally rocked me back on my heels when I heard the news. In early October, Qualcomm announced its intention to acquire Arduino. For those of you not already familiar with Arduino, here’s Wikipedia’s intro:

Arduino is an Italian open-source hardware and software company…that designs and manufactures single-board microcontrollers and microcontroller kits for building digital devices. Its hardware products are licensed under a CC BY-SA license, while the software is licensed under the GNU Lesser General Public License (LGPL) or the GNU General Public License (GPL), permitting the manufacture of Arduino boards and software distribution by anyone.

First fruits of the merger are the UNO Q, a “next-generation single board computer featuring a “dual brain” architecture—a Linux Debian-capable microprocessor and a real-time microcontroller—to bridge high-performance computing with real-time control” and “powered by the Qualcomm Dragonwing QRB2210 processor running a full Linux environment”, and the Arduino App Lab, an “integrated development environment built to unify the Arduino development journey across Real-time OS, Linux, Python and AI flows.”

So, what’s the background to my surprise? This excerpt from IEEE Spectrum’s as-usual thorough coverage sums it up nicely: “Even so, the acquisition seems odd at first glance. Qualcomm sells expensive, high-performance SoC designs meant for flagship smartphones and PCs. Arduino sells microcontroller boards that often cost less than a large cheese pizza.”

Not to mention that Qualcomm’s historical customer base is comparatively small in number, large in per-customer volume, and rapid in each customer’s generational-uptake silicon churn, the exact opposite of Arduino’s typical customer profile (or that of Raspberry Pi, for that matter, who’s undoubtedly also “curious” about the acquisition and its outcome).

Auld Lang Syne (again)

I’m writing this in late December 2025. You’ll presumably be reading it sometime in January 2026, given that I’m targeting New Year’s Day publication for it. I’ll split the difference and, as I did last year, wrap up by first wishing you all a Happy New Year!

As usual, I originally planned to cover a number of additional topics in this piece. But (also) as usual, I ended up with more things that I wanted to write about than I had a reasonable wordcount budget to do so. Having just passed through 2,700 words, I’m going to restrain myself and wrap up, saving the additional topics (as well as updates on the ones I’ve explored here) for dedicated blog posts to come in the coming year(s). Let me know your thoughts on my top-topic selections, as well as what your list would have looked like, in the comments!

—Brian Dipert is the Principal at Sierra Media and a former technical editor at EDN Magazine, where he still regularly contributes as a freelancer.

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The post 2025: A year in which chaos seemingly thrived appeared first on EDN.

Recently, frequent Design Idea (DI) author Christopher Paul showcased an innovative and high performance true-two-wire current source using a depletion mode MOSFET as the pass device in “A precision, voltage-compliant current source.”

In subsequent comments the question arose whether similar performance is possible using a bipolar junction transistor instead of Christopher’s FET in a similar (looking) topology?

Wow the engineering world with your unique design: Design Ideas Submission Guide

It posed an intriguing design problem for which I offer here a possible (if implausible) solution. Bizarrely, it’s (roughly) based on the classic discrete transistor model of an SCR, shown in Figure 1.

Figure 1 SCR positive feedback loop suggests an unlikely basis for a BJT current source.

Figure 2 shows the nonlinear positive feedback loop of the thyristor morphing into a linear current source.

Figure 2 Q1 and Q3 current mirror, regulator Z1, and BJT Q1 comprise precision 2-wire current source. The source current is 1.05 * 1.24/R1, or 1.30/R1. * = 0.1% precision resistor

Shunt regulator Z1 and pass transistor Q2 form a very familiar precision current source circuit. In fact, it looks a lot like the one Christopher Paul uses in his MOSFET-based design. Negative feedback from current sense resistor R1 makes shunt regulator Z1 force Q2 to maintain a constant emitter current of 1.24v/R1.

Also, similar (looking) to Christopher Paul’s topology, bias for Z1 and Q2 is provided by a PNP current mirror. However, unlike the symmetrical mirror in Christopher Paul’s design, this one is made asymmetrical to accommodate Z1’s max recommended current rating.

Significant emitter degeneration (~2.5 volts) is employed to encourage accurate current ratios and keep positive feedback loop gain manageable so Z1 can ride herd on it.

Startup resistor R3 is needed because the bias for the transistors and regulator is provided by the SCR-ish regenerative positive feedback loop. R3 provides a trickle of current, a few hundred nanoamps, sufficient to jumpstart (trigger?) the loop when power is first applied.

To program the source for a chosen output current (Io).

 If Io > 5 mA, then:
R1 = 1.30/Io
R2 = 49.9/Io
R4 = 2.40/Io

 If Io < 5 mA, then:
R1 = 1.55/Io
R2 = 8/Io
R4 = 2/Io

Minimum accurate Io = 500 µA.  Maximum = 200 mA.

And for a finishing touch, frequent commentator Ashutosh points out that it’s good practice to protect loads against erroneous and possibly destructive fault currents. Figure 3 suggests a flexible and highly reliable insurance policy. Wire one of these gems in series with Figure 2 and fault current concerns will vanish.

Figure 3 Accurate, robust, fast acting, self-resetting, fault current limiter where Ilimit = 1.25/R1.

In closing, I leave it to you, the reader, to decide whether Figure 2’s resemblance to Christopher Paul’s design is merely superficial, truly meaningful, outright plagiaristic, or just weird.

Stephen Woodward’s relationship with EDN’s DI column goes back quite a long way. Over 100 submissions have been accepted since his first contribution back in 1974.

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The post SCR topology transmogrifies into BJT two-wire precision current source appeared first on EDN.

Have you ever had a duty-cycle resolution issue in your digitally controlled power supply?

In a digital pulse width modulation (DPWM)-controlled power supply, the duty-cycle adjustment is not continuous, but has a minimum step. This is one significant difference between digital control and analog control.

In order to really understand the resolution issue, let’s look at the exaggerated DPWM waveform in Figure 1.

Figure 1 An exaggerated DPWM waveform where the DPWM is acting as the output by comparing its clock counter with a preset comparison value. Source: Texas Instruments

DPWM is acting as the output by comparing its clock counter with a preset comparison value; when the counter equals the comparison value, it will generate a trigger signal, and flip the PWM outputs. When you adjust the comparison to different values, the flipping edge will act earlier or later. Because the counter value can be the only integer, the minimum adjustment step of the duty cycle is expressed by Equation 1:

Oscillation caused by low duty-cycle resolution

The duty-cycle resolution of DPWM brings a disturbance to power-supply control. If the duty-cycle resolution is too low, it may bring limit cycle oscillations (LCOs) to the control loop and cause output voltage ripple. This problem is more serious in high-switching-frequency systems.

Let’s take a 48-V to 5-V synchronous buck converter as an example, as shown in Figure 2.

Figure 2 A 48-V to 5-V synchronous buck converter example. Source: Texas Instruments

Assuming a 500-kHz switching frequency when using 120-MHz PWM frequency, recalling Equation 1, the minimum duty-cycle step is . The minimum duty-cycle adjustment brings the voltage difference with , which means 4% voltage ripples of the output, shown in Figure 3. This is obviously unacceptable.

Figure 3 A low-resolution duty cycle causes output voltage ripple. Source: Texas Instruments

Increase duty-cycle resolution

The most direct way to resolve this duty-cycle resolution issue is to use high-resolution PWM (HRPWM). HRPWM is a powerful peripheral that can reduce the adjustment step significantly—to the 10ps level—but it is typically only available in high-performance MCUs, which may be too powerful or expensive for the design.

Is there a simple method to resolve the duty-cycle resolution issue without extra cost? Can you increase the duty-cycle resolution by using software, or an algorithm?

Looking again at the DPWM waveform, the duty cycle is generated by two variables: the comparison value and the period value, which Equation 2 calculates as:

The common method of adjusting the duty cycle is changing the comparison value and keeping the ‘Period’ value in constant; in other words, the buck converter is operating in fixed switching frequency. What happens if you adjust the duty-cycle by varying the switching frequency? Mostly, a small variation of the switching frequency is not harmful but helpful to power converters, it will reduce the electromagnetic interference and help to pass the EMI regulations.

If you keep the comparison value unchanged, but adjust one count to the period value, how much is the duty-cycle variation? Is it larger or smaller than adjusting the comparison value? Please look into the Equation 3:

Keeping in mind that, the duty-cycle variation by adjusting the comparison value is , because D is always smaller than 1, and  is nearly equal to , you can see that  will be always smaller than .

Which means, adjusting the period value will generate smaller variation to the duty-cycle than adjusting the comparison value.  The improvement is more significant when the duty cycle is much smaller than 1. If you point out the duty-cycle values on one numerical axis with varying the period value, you will clearly see that, when you adding the period value with fixed comparison value, the duty cycle will reduce with a smaller step, as shown in Figure 4.

Figure 4 Duty-cycle values when varying both period and comparison. Source: Texas Instruments

Varying the frequency

Based on the analysis above, it is possible to generate a higher resolution by adjusting the period value. But, in power converter, the switching frequency generally can’t vary much, otherwise the magnetic component design will become very challenge. So, the next question is, how to generate the expected duty cycle with the combination of these two variables?

The method is, first, decided the comparison value with a preset period value, and then, finetune the period value to get the closed duty cycle. The fine tune process either can by increasing the period value with the larger the comparison value, or by reducing the period value with the smaller the comparison value. Figure 5 shows the flowchart of the software by increasing the period value with the larger comparison value, the decreasing method will be similar to this, just need reverse the calculate direction.

Figure 5 Software flowchart for adjusting both the comparison and period values simultaneously. Source: Texas Instruments

At last, I need to figure out that, this software method is principally independent of HRPWM hardware technology, such as a micro-edge positioner. So it is applicable to a digital control loop with HRPWM peripherals same.

Improvement results

Let’s return to the example of the 48-V to 5-V synchronous buck converter in Figure 2. After adopting this software method, it’s possible to reduce the duty-cycle resolution too; the output voltage ripple drops tremendously to <40 mV, as shown in Figure 6. This is acceptable to most of the electrical appliance.

Figure 6 Improved output voltage ripple using the software method. Source: Texas Instruments

This method doesn’t need to use HRPWM to solve the duty-cycle resolution problem, but slightly increasing the duty-cycle resolution with a software algorithm can make your product more competitive by enabling the use of a low-end MCU.

Furthermore, this method is a purely mathematical algorithm; in other words, it is not limited to low-resolution PWM only but also works for HRPWM. So it can be used in some extremely high requirement conditions to further increase the duty-cycle resolution with HRPWM.

Desheng Guo is a system engineer at Texas Instruments, where he is responsible for developing power solutions as part of the power delivery industrial segment. He created multiple reference designs and is familiar with AC-DC power supply, digital control, and GaN products. He received a master’s degree from the Harbin Institute of Technology in power electronics in 2007, and previously worked for Huawei Technology and Delta Electronics.

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The post Power Tips #148: A simple software method to increase the duty-cycle resolution in DPWM appeared first on EDN.

From ancient compasses to modern smartphones, magnetometers have quietly shaped how we sense and navigate the world. Let us explore the fundamentals behind these field-detecting devices.

Magnetic fields are all around us, yet invisible to the eye. Magnetometers turn those hidden forces into measurable signals, guiding everything from navigation systems to consumer electronics. Well, let us dive into the principles that allow a simple sensor to translate invisible forces into actionable data.

A magnetometer is a device that measures magnetism: the direction, strength, or relative change of a magnetic field at a given location. Measuring the magnetization of a magnetic material, such as a ferromagnet, is one example. A compass is a simple magnetometer: it detects the direction of the ambient magnetic field, in this case the Earth’s.

The Earth’s magnetic field can be approximated as a dipole, offset by about 440 kilometers from the planet’s center and inclined roughly 11 degrees to its rotational axis. At the surface, its strength averages around 0.4 to 0.5 gauss, about 40–50 microtesla, which is quite small compared to laboratory magnetic fields.

Only a few types of magnetometers are sensitive enough to detect such weak fields, including mechanical compasses, fluxgate sensors, Hall-effect devices, magnetoelastic instruments, and magneto resistive sensors.

One of the landmark magnetoresistive sensors from the 1990s was KMZ51 from Philips. Released in 1996, it offered high sensitivity by exploiting the magnetoresistive effect of thin-film permalloy. At its core, the device integrated a Wheatstone bridge structure, which converted changes in magnetic resistance into measurable signals.

To enhance stability and usability, Philips added built-in compensation and set/reset coils: the compensation coil provided feedback to counter drift, while the set/reset coil re-aligned the sensor’s magnetic domains to maintain accuracy. These design features made KMZ51 particularly effective for electronic compasses, current sensing, and detecting the Earth’s weak magnetic field—applications where precision and reliability were essential. KMZ51 remains a classic example of how clever sensor design can make the invisible measurable.

Figure 1 Simplified circuit diagram of KMZ51 illustrates its Wheatstone bridge and integrated compensation and set/reset coils. Source: Philips

On a related side note, deflection, compass, and fluxgate magnetometers represent three distinct stages in the evolution of magnetic sensing. The deflection magnetometer, essentially a large compass box with a pivoted needle, measures the Earth’s horizontal field by observing how an external magnet deflects the needle under the tangent law. The familiar compass magnetometer, in its simplest form, aligns a magnetic needle with the ambient field to indicate direction, a principle that has been carried forward into modern electronic compasses.

Fluxgate magnetometers, by contrast, employ a soft magnetic core driven into alternating saturation; the resulting signal in a sense coil reveals both the magnitude and direction of the external field with far greater sensitivity. Together, these instruments illustrate the progression from basic mechanical deflection to precise electronic detection, each expanding the engineer’s ability to measure and interpret the invisible lines of magnetism.

Tangent law and Tan B position in compass deflection magnetometers

In the Tan B position, the bar magnet is oriented so that the magnetic field along its equatorial line is perpendicular to the Earth’s horizontal magnetic field component. Under this arrangement, the suspended magnetic needle deflects through an angle β, and the tangent law applies:

Tanβ= B/BH

B is the magnetic field produced at the location of the needle by the bar magnet.

BH is the horizontal component of the Earth’s magnetic field, which tends to align the needle along the geographic north–south direction.

This relationship shows that the deflection angle β depends on the ratio of the magnet’s equatorial field to the Earth’s horizontal field. This simple geometric relationship makes the Tan B position a fundamental method for determining unknown magnetic field strengths, bridging classroom demonstrations with practical magnetic measurements.

Figure 2 The image illustrates magnetometer architectures—from pivoted needle to fluxgate core—across design generations. Source: Author

Quick take: Magnetometers on the workbench

Magnetometers range from fluxgate arrays orbiting in satellites to quantum sensors probing in research labs—but this session is just a quick take. The spotlight here leans toward today’s DIY enthusiasts and benchtop builders, where Hall-effect sensors and MEMS modules serve as practical entry points. Think of it as a wake-up call, sprinkled with a few lively detours, all pointing toward the components that make magnetometers accessible for everyday projects.

Hall-effect sensors remain the most approachable entry point, translating magnetic fields into voltage shifts that DIY-ers can easily measure with a scope or microcontroller. MEMS magnetometers push things further, offering compact three-axis sensing in modules that drop straight into maker projects or wearables.

These devices not only simplify experimentation but also highlight how magnetic sensing has become democratized—no longer confined to aerospace or geophysics labs but are available in breakout boards and low-cost modules.

For the benchtop builder, this means magnetometers can be explored alongside other familiar sensors, integrated into Arduino or Raspberry Pi projects, or used to probe the invisible magnetic environment around everyday circuits. In short, the practical face of magnetometers today is accessible, modular, and ready to be wired into experiments without demanding a physics lab.

Getting started with magnetometers is straightforward, thanks to readily available pre-wired modules. Popular options often incorporate ICs such as the HMC5883L, LIS3MDL, and TLV493D, among others.

Although not for the faint-hearted, it’s indeed possible to build fluxgate magnetometers from scratch. The process, however, demands precision winding of coils, careful core selection, stable drive electronics, and meticulous calibration—all of which can be daunting for DIY enthusiasts. These difficulties often make home-built designs prone to noise, drift, and inconsistent sensitivity.

For those who want reliable results without the engineering overhead, ready-made fluxgate magnetometer modules are a practical choice, offering calibrated performance and ease of integration straight out of the box. A good example is the FG-3+ fluxgate magnetic field sensor from FG Sensors, which provides compact and sensitive measurement capabilities for hobbyist and applied projects.

FG-3+ is a high-sensitivity fluxgate magnetic field sensor capable of measuring Earth’s magnetic field with up to 1,000-fold greater precision than conventional integrated IC solutions. Its output is a stable 5-volt rectangular pulse, with the pulse period directly proportional to the magnetic field strength.

Figure 3 The FG-3+ fluxgate magnetic field sensor integrates seamlessly into both experimental and applied projects. Source: FG Sensors

Closing thoughts

This marks the end of this quick-take post on magnetometers, presented in a deliberately unconventional style. We have only scratched the surface; the field is rich with subtleties and deflections that deserve deeper exploration. If this overview piqued your interest, I encourage you to experiment with sensor modules, study fluxgate designs, and share your findings with the engineering community.

And while magnetometers probably will not help you track UFOs, at least not yet, they remain a fascinating gateway into sensing the invisible forces all around us. The more we build, test, and exchange ideas, the stronger our collective understanding becomes. Onward to the next signal.

T. K. Hareendran is a self-taught electronics enthusiast with a strong passion for innovative circuit design and hands-on technology. He develops both experimental and practical electronic projects, documenting and sharing his work to support fellow tinkerers and learners. Beyond the workbench, he dedicates time to technical writing and hardware evaluations to contribute meaningfully to the maker community.

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The post Magnetometers: Sensing the invisible fields appeared first on EDN.

Co-packaged optics (CPO) technology, a key enabler for next-generation data center architectures, promises unprecedented bandwidth density and power efficiency by tightly integrating optical engines with switch silicon. But after nearly a decade of existence, where does this next-generation optical interconnect technology stand in terms of broad commercial realization?

But before we delve into CPO’s technology roadmap and its future deployment prospects, here is a brief introduction to this silicon photonics architecture and how it empowers artificial intelligence (AI), high-performance computing (HPC), and high-speed networking applications where electrical signaling over copper wires is reaching its limits.

Figure 1 CPO integrates optical transceivers directly with switch ASICs or processors to enable low-power, high-bandwidth links. Source: Broadcom

CPO, which integrates optical components directly into a single package, minimizes the electrical path length, significantly reducing signal loss, enhancing high-speed signal integrity, and containing latency. In other words, CPO enhances data throughput by leveraging high-bandwidth optical engines that deliver higher data transfer rates and are less susceptible to electromagnetic interference (EMI) than traditional copper connections.

Moreover, this silicon-photonics integration improves power efficiency by reducing the need for high-power electrical drivers, repeaters, and retimers. Case in point: by shortening the copper trace, CPO could improve the link budget enough to remove digital signal processor (DSP) or retimer functionality. That significantly reduces the overall power per bit, a key metric in AI data center management.

Below is a sneak peek at major CPO activities during 2025; it offers a glimpse of product launches and the actual readiness of CPO’s basic building blocks.

CPO’s 2025 progress report

In January 2025, Marvell announced advances in its custom XPU architecture integrated with CPO technology. The company showcased how its custom AI accelerator architecture combines XPU compute silicon, HBM, and other chiplets with its 3D SiPho engines on the same substrate using high-speed SerDes, die-to-die interfaces, and advanced packaging technologies.

That eliminates the need for electrical signals to leave the XPU package into copper cables or across a PCB. Furthermore, connections between XPUs can achieve faster data transfer rates and distances that are 100x longer than electrical cabling. Marvell’s 3D SiPho engine supports 200 Gbps electrical and optical interfaces.

Figure 2 XPU with integrated CPO enhances AI server performance by increasing XPU density from tens within a rack to hundreds across multiple racks. Source: Marvell

“AI scale-up servers require connectivity with higher signaling speeds and longer distances to support unprecedented XPU cluster sizes,” said Nick Kucharewski, senior VP and GM of the Network Switching Business Unit at Marvell. “Integrating co-packaged optics into custom XPUs is the logical next step to scale performance with higher interconnect bandwidths and longer reach.”

Four months later, in May 2025, Broadcom offered a glimpse of its third-generation 200G per lane CPO technology. The company’s CPO journey began in 2021 with the Tomahawk 4-Humboldt chipset, and the second-generation Tomahawk 5-Bailly chipset became the industry’s first volume-production CPO solution.

“Broadcom has spent years perfecting our CPO platform solutions, as evidenced by the maturity of our second-generation 100G/lane products and the ecosystem readiness,” said Near Margalit, VP and GM of the Optical Systems Division at Broadcom. The company also claims that, in addition to edge switch ASICs and optical-engine technology, it offers a comprehensive ecosystem of passive optical components, interconnects, and system solutions partners.

Figure 3 CPO offers a sustainable path forward by addressing the power constraints and physical limitations of traditional pluggable optics. Source: Broadcom

In October 2025, Broadcom claimed that Meta has tested its CPO solutions for one million link hours without a single link flap in a high-temperature lab characterization environment. A link flap is a brief connectivity disruption; it’s a critical reliability metric in high-performance data center networks.

Besides CPO heavyweights like Broadcom and Marvell, there are notable startups in the silicon photonics realm, striving to overcome electrical I/O bottlenecks. For instance, Ayar Labs, a supplier of optical interconnect solutions, has incorporated its TeraPHY optical engines into ASIC design services of Global Unichip Corp. (GUC), a Hsinchu, Taiwan-based chip developer.

In November 2025, Ayar Labs announced that it has integrated its optical engines into GUC’s advanced packaging and ASIC workflow, a critical step toward future CPO deployment. The joint design effort helps address key challenges of CPO integration: architectural, power and signal integrity, mechanical, and thermal.

Figure 4 In this CPO, two TeraPHY optical engine chiplets (left) are shown with a customer FPGA (center) within the same SoC package. Source: Ayar Labs

“The future of AI and data center scale-up will not be possible without optics to overcome the electrical I/O bottleneck,” said Vladimir Stojanovic, CTO and co-founder of Ayar Labs. “Working with GUC on advanced packaging and silicon technologies is an important step in demonstrating how our optical engines can accelerate the implementation of co-packaged optics for hyperscalers and AI scale-up.”

CPO in 2026 and beyond

While CPO proponents are eager to claim that the CPO revolution is at our doorstep, industry watchers like Yole Group see large-scale deployments between 2028 and 2030. Meanwhile, pluggable modules—inserted into the front panel of a switch sitting at the edge of the PCB—will remain competitive.

Market research firm LightCounting also predicts that optical modules will continue to account for the majority of optical links in data centers throughout the decade. At the same time, however, optical transceiver technology will continue to steadily shift toward placing the optics closer to the ASIC.

That’s because traditional pluggable optical modules are increasingly constrained by signal loss, power consumption, and latency due to long electrical traces between the switch ASIC and the optical engine. CPO overcomes these limitations by placing the optical engine much closer to the switching silicon.

The migration of the optical engine closer to the switch ASIC shortens the length of copper trace used for electrical signalling, thereby improving electrical performance. However, the seamless attachment of optical engines to switch ASICs or XPUs requires a range of packaging approaches, including 2.5D interposers, through-silicon vias (TSVs), fan-out wafer-level packaging, and 3D integration enabled by hybrid bonding.

These advanced packaging technologies are steadily evolving, and so is CPO deployment. IDTechEx projects that the CPO market will exceed $20 billion by 2036, growing at a robust CAGR of 37% from 2026 to 2036.

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• AI Performance Now Depends on Optics (and CPO is the Front Line)

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The first hits from a Google search of the term “guard circuit” produce a series of references to the National Guard on some security circuit. Deep in the list is a printed circuit board company that touts that they design guard rings on critical circuits. So just what are they?

Wow the engineering world with your unique design: Design Ideas Submission Guide

Guard circuit

Analog Devices references guard shields around their op amps as well as the printed circuit traces [1]. These traces are called guard rings; they circle and shield critical circuits. Another well-known reference on electromagnetic interference (EMI) discusses guard shields in the early edition [2]. The use of op amp shields, together with shielded pairs, and grounded so as to eliminate differential input noise. This is accomplished by connecting the cable shield to the op amp shield. Another section discusses guarded meters.

In this example, the recommended connection should be made so as not to cause current flow through any measuring leads. The term “guard shield” is missing from the author’s subsequent book on the same topic [3].

High-power active devices can use guard shields, in the form of a thin conductive strip placed between two electrical insulating yet thermal conductive gaskets, used to mount the device to a heat sink [4]. The guard shield is returned to the circuit common. This results in lower leakage capacitance between the device case and the heat sink, and lower parasitic currents.

Active circuit guard wiring techniques

Guarding can be done using active circuit devices such as an operational amplifier, as shown in Figure 1. The amplifier is wired as a coupler or isolator; the feedback is between the output and the positive input. The coaxial shield is connected to that output, which is the active shield, a low impedance source equal to the input voltage. A large leakage resistor is shown to complete the Spice simulation. The center wire is connected to the measured devices or circuit.

Figure 1 An active circuit guarding with op amps wired as a coupler or isolator and the feedback is between the output and positive input. 

Guard circuit applications

Another possible application for the guard technique is interfacing a pulse signal. A pulse signal’s Fourier transform has a fundamental and odd harmonics. For high-frequency signal transmission, twisted pairs such as Cat 5 are frequently used. The source and load impedance should be equal to prevent reflections. But what if this is not the case? If a guarded circuit is used, the source is connected to the operational amplifier input, which has a high input impedance, and the wire is guarded from the return path.

An example where this circuit could be employed is interfacing industrial or process fluid flow meters. A variety of meters, such as positive displacement, which uses oval gears, and a pickup circuit to count revolutions. This includes turbine meters, which have blades internal to the meter and rotate proportionally to the flow rate.

The vortex flow meter is based on the Von Karman effect. As the fluid flows around a fixed body or blunt object, vorticity is shed alternately. The frequency of this vortex shedding is proportional to the fluid velocity. This signal can be sensed in several ways and is a pulse signal.

The Coriolis mass flow meters make use of two vibrating tubes. Flow through the tubes causes Coriolis forces to twist the tubes, resulting in a phase shift. The time difference between the waves is measured and is directly proportional to the mass flow rate.

All these meters have a calibration factor or K, which is a constant relating to the calibration, for example, K= 800 pulses per gallon. The pulses, electrical circuits, and internal resistances can vary depending on the meter. There are a variety of signal levels as well as input and output resistances between these meters and the input circuit cards.

A frequent application for these meters is to charge a known fluid volume in a tank. An accurate method is to count up or down pulses in an industrial controller. It is more accurate to measure the signal as a pulse, adding interface circuitry such as an analog flow rate signal, and integrating that signal will be subject to circuit inaccuracies and, assuming the operation is done in an industrial controller, be subject to scan sampling errors.

Figure 2 Active circuit guarding, pulse interface circuit based on 200 feet RG-58 coax cable with distributed capacitance and resistance.

Test circuit

This proposed circuit was tested based on a pulse waveform based on a typical meter as discussed. The pulse assumed is 1-ms wide with a 3-ms period. The pulse is generated by a LMC555 wired in astable operation with a 1-kΩ pull up load to a 5-V supply.

The isolation operational amplifier is 1/4 LM324 wired such that the output is a non inverting unity amplifier. The guard circuit is a 40 foot RG-58 coaxial cable. The amplifier is powered by its own 9-V battery. The only connection between both supplies is the single conductor wire parallel to the coax.

The results are shown in Figure 3, the circuit was able to provide an output the same as the input, and able to interface with any input impedance.

Figure 3 Pulse waveforms where yellow is the output and green is the input.

These waveforms agreed with the Spice simulation. The output closely followed the input.

Note the output waveform when expanded time scale when rising. The rapid increase followed by a ramp to the steady state is because the op amp has a very high gain, and is charging based on its supply voltage. However when the outer coax is charged to a point below the steady state output, the RC equivalent circuit is still charging expecting that the steady state at supply voltage. However when input difference is zero, the ramp ceases.

Figure 4 The pulse waveforms where yellow is the output and green is the input. The time scale 1/100 the previous figure (Figure 3).

Because almost all these flow signal transmitters have isolated electronics, the third wire, signal common, may be the same wire as the power supply return. This supply power is typically supplied from the pulse sensing electronics.

If so, that conductive path or reference is already available, usually in the same pair as the supply wire, in the form of a twisted, shielded cable. This provides magnetic and electric field EMI protection. The user only needs to provide the coaxial cable to the flow meter.

More than a shield

A guard shield is more than just a shield, either a solid conductive surface or braided cylinder, it is in concert with thoughtful wiring techniques to both active and passive components that result in mitigating EMI.

Related Content

• Power Supply Guard Circuit
• Telephone Guard Circuit
• Understanding grounding, shielding, and guarding in high-impedance applications
• Analog layout: Why wells, taps, and guard rings are crucial

References

1. Sheingold, Daniel H., Transducer Interfacing Handbook, Analog Devices, Inc., Norwood, MA., 1980.
2. Ott, H. W., Noise Reduction Techniques in Electronic Systems, John Wiley & Sons, New York, New York, 1988.
3. Ott, H. W., Electromagnetic Compatibility Engineering, John Wiley & Sons, New York, New York, 2009.
4. Morrison, R., Grounding and Shielding Circuits and Interference, fifth edition, IEEE Press, John Wiley & Sons, New York, New York, 2007.

Bob Heider worked as an electrical and controls engineer for a large chemical company for over 30 years. This was followed by several years in academic and research roles with Washington University, St. Louis, MO. He is continuing to work part-time as well as mentor some student groups.

The post Guard circuit provides impedance matching appeared first on EDN.

Read on for our intrepid engineer’s latest set of predictions for the year(s) to come.

As has been the case the last couple of years, we’re once again flip-flopping what might otherwise seemingly be the logical ordering of this and its companion 2025 look-back piece. I’m writing this 2026 look-ahead for December publication, with the 2025 revisit to follow, targeting a January 2026 EDN unveil. While a lot can happen between now and the end of 2025, potentially affecting my 2026 forecasting in the process, this reordering also means that my 2025 retrospective will be more comprehensive than might otherwise be the case.

Without any further ado, and as usual, ordered solely in the cadence in which they initially came out of my cranium…

AI-based engineering

Likely unsurprisingly, as will also be the case with the subsequent 2025 retrospective-to-come, AI-related topics dominate my forecast of the year(s) to come. Take “vibe coding”, which entered the engineering and broader public vernacular only in February and quickly caught fire. Here’s Wikipedia’s introduction to the associated article on the subject:

Vibe coding is an artificial intelligence-assisted software development technique popularized by Andrej Karpathy in February 2025. The term was listed on the Merriam-Webster website the following month as a “slang & trending” term. It was named Collins Dictionary‘s Word of the Year for 2025.

Vibe coding describes a chatbot-based approach to creating software where the developer describes a project or task to a large language model (LLM), which generates code based on the prompt. The developer does not review or edit the code, but solely uses tools and execution results to evaluate it and asks the LLM for improvements. Unlike traditional AI-assisted coding or pair programming, the human developer avoids examination of the code, accepts AI-suggested completions without human review, and focuses more on iterative experimentation than code correctness or structure.

Sounds great, at least in theory, right? Just tell the vibe coding service and underlying AI model what you need your software project to do; it’ll as-needed pull together the necessary code snippets from both open-source and company-proprietary repositories all by itself. If you’re already a software engineer, it enables you to crank out more code even quicker and easier than before.

And if you’re a software or higher-level corporate manager, you might even be able to lay off (or at least pay grade-downscale) some of those engineers in the process. Therein explaining the rapid rollout of vibe coding capabilities from both startups and established AI companies, along with evaluations and initial deployments that’ll undoubtedly expand dramatically in the coming year (and beyond). What could go wrong? Well…

Advocates of vibe coding say that it allows even amateur programmers to produce software without the extensive training and skills required for software engineering. Critics point out a lack of accountability, maintainability, and the increased risk of introducing security vulnerabilities in the resulting software.

Specifically, a growing number of companies are reportedly discovering that any upfront time-to-results benefits incurred by AI-generated code end up being counterbalanced by the need to then reactively weed out resulting bugs, such as those generated by hallucinated routines when the vibe coding service can’t find relevant pre-existing examples (assuming the platform hasn’t just flat-out deleted its work, that is).

To that point, I’ll note that vibe coding, wherein not reviewing the resultant software line-by-line is celebrated, is an extreme variant of the more general AI-assisted programming technology category.

But even if a human being combs through the resultant code instead of just compiling and running it to see what comes out the other end, there’s still no guarantee that the coding-assistance service won’t have tapped into buggy, out-of-date software repositories, for example. And there’s always also the inevitable edge and corner cases that won’t be comprehended upfront by programmers relying on AI engines instead of their own noggins.

That all said, AI-based programming is already having a negative impact on both the job prospects for university students in the computer science curriculum and the degree-selection and pursuit aspirations of those preparing to go to college, not to mention (as already alluded to) the ongoing employment fortunes of programmers already in the job market.

And for those of you who are instead focused on hardware, whether that be chip- or board-level design, don’t be smug. There’s a fundamental reason, after all, why a few hours before I started writing this section, NVIDIA announced a $2B investment in EDA toolset and IP provider Synopsys.

Leveraging AI to generate optimized routing layouts for the chips on a PCB or the functional blocks on an IC is one thing; conventional algorithms have already been handling this for a long time. But relying on AI to do the whole design? Call me cynical…but only cautiously so.

Memory (and associated system) supply and prices

Speaking of timely announcements, within minutes prior to starting to write this section (which, to be clear, was also already planned), I saw news that Micron Technology was phasing out its nearly 30-year old Crucial consumer memory brand so that it could redirect its not-unlimited fabrication capacity toward more lucrative HBM (high bandwidth memory) devices for “cloud” AI applications.

And just yesterday (again, as I’m writing these words), a piece at Gizmodo recommended to readers: “Don’t Build a PC Right Now. Just Don’t”. What’s going on?

Capacity constraints, that’s what. Remember a few years back, when the world went into a COVID-19 lockdown, and everyone suddenly needed to equip a home office, not to mention play computer games during off-hours?

Device sales, with many of them based on DRAM, mass storage (HDDs and/or SSDs), and GPUs, shot through the roof, and these system building blocks also then went into supply constraints, all of which led to high prices and availability limits.

Well, here we go again. Only this time, the root cause isn’t a pandemic; it’s AI. In the last few years’ worth of coverage on Apple, Google, and others’ device announcements, I’ve intentionally highlighted how much DRAM each smartphone, tablet, and computer contains, because it’s a key determinant of whether (and if so, how well) it can run on-device inference. 

Now translate that analogy to a cloud server (the more common inference nexus) and multiply both the required amount and performance of memory by multiple orders of magnitude to estimate the demand here. See the issue? And see why, given the choice to prioritize either edge or datacenter customers, memory suppliers will understandably choose the latter due to the much higher revenues and profits for a given capacity of HBM versus conventional-interface DRAM?

Likely unsurprising to my readers, nonvolatile memory demand increases are pacing those of their volatile memory counterparts. Here again, speed is key, so flash memory is preferable, although to the degree that the average mass storage access profile can be organized as sequential versus random, the performance differential between SSDs and lower cost-per-bit HHDs (which, mind you, are also increasingly supply-constrained by ramping demand) can be minimized.

Another traditional workaround involves beefing up the amount of DRAM—acting as a fast cache—between the mass storage and processing subsystems, although per the prior paragraph it’s a particularly unappealing option this time around.

I’ve still got spare DRAM DIMMs and M.2 SSD modules, along with motherboards, cases, PSUs, CPUs, and graphics cards, and the like sitting around, left over from my last PC-build binge.

Beginning over the upcoming holidays, I plan to fire up my iFixit toolkits and start assembling ‘em again, because the various local charities I regularly work with are clearly going to be even more desperate than usual for hardware donations.

The same goes for smartphones and the like, and not just for fiscally downtrodden folks…brace yourselves to stick with the devices you’ve already got for the next few years. I suspect this particular constraint portion of the long-standing semiconductor boom-and-bust cadence will be with us even longer than usual.

Electricity rates and environmental impacts

Not a day seemingly goes by without me hearing about at least one (and usually multiple) new planned datacenter(s) for one of the big names in tech, either being built directly by that company or in partnership with others, and financed at least in part by tax breaks and other incentives from the municipalities in which they’ll be located (here’s one recent example).

And inevitably that very same day, I’ll also see public statements of worry coming from various local, state, and national government groups, along with public advocacy organizations, all concerned about the environmental and other degrading impacts of the substantial power and water needs demanded by this and other planned “cloud” facilities (ditto, ditto, and ditto).

Truth be told, I don’t entirely “get” the municipal appeal of having a massive AI server farm in one’s own back yard (and I’m not alone). Granted, there may be a short-duration uptick in local employment from construction activity.

The long-term increase in tax revenues coming from large, wealthy tech corporations is an equally enticing Siren’s Song (albeit counterbalanced by the aforementioned subsidies). And what politician can’t resist proudly touting the outcome of his or her efforts to bring Alphabet (Google)/Amazon/Apple/ Meta/Microsoft/[insert your favorite buzzy company name here] to his or her district?

Regarding environmental impacts, however, I’ll “showcase” (for lack of a better word) one particularly egregious example: Elon Musk’s xAI Colossus 1 and 2 data centers in Memphis, Tennessee.

The former, a repurposed Electrolux facility, went online in September 2024, only 122 days after construction began. The latter, for which construction started this March, is forecasted, when fully equipped, to be the “First Gigawatt Datacenter In The World”. Sounds impressive, right? Well, there’s also this, quoting from Wikipedia:

At the site of Colossus in South Memphis, the grid connection was only 8 MW, so xAI applied to temporarily set up more than a dozen gas turbines (Voltagrid’s 2.5 MW units and Solar Turbines’ 16 MW SMT-130s) which would steadily burn methane gas from a 16-inch natural gas main. However, according to advocacy groups, aerial imagery in April 2025 showed 35 gas turbines had been set up at a combined 422 MW. These turbines have been estimated to generate about “72 megawatts, which is approximately 3% of the (TVA) power grid”. According to the Southern Environmental Law Center (SELC), the higher number of gas turbines and the subsequent emissions requires xAI to have a ‘major source permit’, however, the emissions from the turbines are similar to the nearby large gas-powered utility plants.

In Memphis, xAI was able to sidestep some environmental rules in the construction of Colossus, such as operating without permits for the on-site methane gas turbines because they are “portable”. The Shelby County Health department told NPR that “it only regulates gas-burning generators if they’re in the same location for more than 364 days. In the neighborhood of South Memphis, poor air quality has given residents elevated asthma rates and lower life expectancy. A ProPublica report found that the cancer risk for those living in this area already have four times the risk of cancer than what the Environmental Protection Agency (EPA) considers to be an acceptable risk. In November 2024, the grid connection was upgraded to 150 MW, and some turbines were removed.

Along with high electricity needs, the expected water demand is over five million gallons of water per day in “… an area where arsenic pollution threatens the drinking water supply.” This is reported by the non-profit Protect Our Aquifer, a community organization founded to protect the drinking water in Memphis. While xAI has stated they plan to work with MLGW on a wastewater treatment facility and the installation of 50 megawatts of large battery storage facilities, there are currently no concrete plans in place aside from a one-page factsheet shared by MLGW.

Geothermal power

Speaking of the environment, the other night I watched a reality-calibrating episode of The Daily Show, wherein John Stewart interviewed Elizabeth Kolbert, Pulitzer Prize-winning author and staff writer at The New Yorker:

I say “calibrating” because it forced me to confront some uncomfortable realities regarding global warming. As regular readers may already realize, either to their encouragement or chagrin, I’m an unabashed believer in the following:

1. Global warming is real, already here, and further worsening over time
2. Its presence and trends are directly connected to human activity, and
3. Those trends won’t automatically (or even quickly) stop, far from reversing course, even if that causational human activity ceases.

What I was compelled to accept after watching Stewart and Kolbert’s conversation, augmenting my existing opinion that human beings are notoriously short-sighted in their perspectives, frequently to their detriment (both near- and long-term), were conclusions such as the following:

1. Expecting humans to willingly lower (or even flatline, versus constantly striving to upgrade) their existing standards of living for the long-term good of their species and the planet they inhabit is fruitless
2. And given that the United States (where I live, therefore the innate perspective) is currently the world’s largest supplier of fossil fuel—specifically, petroleum and natural gas—energy sources, powerful lobbyists and other political forces will preclude serious consideration of and responses to global warming concerns, at least in the near term.

In one sense, those in the U.S. are not alone with their heads-in-the-sand stance. Ironically, albeit intentionally, the photo I included at the beginning of the prior section was of a coal-burning power plant in China.

That said, at the same time, China is also a renewable energy leader, rapidly becoming the world’s largest implementer of both wind and solar cell technology, both of which are now cheaper than fossil fuels for new power plant builds, even after factoring out subsidies. China also manufactures the bulk of the world’s lithium-based batteries, which enable energy storage for later use whenever the sun’s not shining and the wind’s not blowing.

To that latter point, though, while solar, wind, and many other renewable energy sources, such as tidal power, have various “green” attributes both in an absolute sense and versus carbon-based alternatives, they’re inconsistent in output over time. But there’s another renewable option, geothermal power, that doesn’t suffer from this impermanence, especially in its emerging “enhanced” variety. Traditional geothermal techniques were only limited-location relevant, with consequent challenges for broader transmission of any power generated, as Wikipedia explains:

The Earth’s heat content is about 1×1019 TJ (2.8×1015 TWh). This heat naturally flows to the surface by conduction at a rate of 44.2 TW and is replenished by radioactive decay at a rate of 30 TW. These power rates are more than double humanity’s current energy consumption from primary sources, but most of this power is too diffuse (approximately 0.1 W/m2 on average) to be recoverable. The Earth’s crust effectively acts as a thick insulating blanket which must be pierced by fluid conduits (of magma, water or other) to release the heat underneath.

Electricity generation requires high-temperature resources that can only come from deep underground. The heat must be carried to the surface by fluid circulation, either through magma conduits, hot springs, hydrothermal circulation, oil wells, drilled water wells, or a combination of these. This circulation sometimes exists naturally where the crust is thin: magma conduits bring heat close to the surface, and hot springs bring the heat to the surface.

To bolster the identification of such naturally geothermal-friendly locations (the photo at the beginning of this section was taken in Iceland, for example), companies such as Zanskar are (cue irony) using AI to locate previously unknown hidden sources. I’m admittedly also pleasantly surprised that the U.S. Department of Energy just announced geothermal development funding.

And, to even more broadly deploy the technology, other startups like Fervo Energy and Quaise Energy are prototyping ultra-deep drilling techniques first pioneered with (again, cue irony) fracking to pierce the crust and get to the constant-temperature, effectively unlimited energy below it, versus relying on the aforementioned natural conduit fractures. That it can be done doesn’t necessarily mean that it can be done cost-effectively, mind you, but I for one won’t ever underestimate the power of human ingenuity.

World models (and other LLM successors)

While the prior section focused on accepting the reality of ongoing AI technology adoption and evolution, suggesting one option (of several; don’t forget about nuclear fusion) for powering it in an efficient and environmentally responsible manner, this concluding chapter is in some sense a counterpoint. Each significant breakthrough to date in deep learning implementations, while on the one hand making notable improvements in accuracy and broader capabilities, has also demanded ever-beefier compute, memory, and other system resources to accomplish its objectives…all of which require more energy to power them, along with more water to remove the heat byproduct of this energy consumption. The AI breakthrough introduced in this section is no exception.

Yann LeCun, one of the “godfathers” of AI whom I’ve mentioned here at EDN numerous times before (including just one year ago), has publicly for several years now been highly critical of what he sees as the inherent AGI (artificial general intelligence) and other limitations of LLMs (large language models) and their transformer network foundations.

A recent interview with LeCun published in the Wall Street Journal echoed many of these longstanding criticisms, adding a specific call-out for world models as their likely successor. Here’s how NVIDIA defines world models, building on my earlier description of multimodel AI:

World models are neural networks that understand the dynamics of the real world, including physics and spatial properties. They can use input data, including text, image, video, and movement, to generate videos that simulate realistic physical environments. Physical AI developers use world models to generate custom synthetic data or downstream AI models for training robots and autonomous vehicles.

Granted, LeCun has no shortage of detractors, although much of the criticism I’ve seen is directed not at his ideas in and of themselves but at his claimed tendency to overemphasize his role in coming up with and developing them at the expense of other colleagues’ contributions.

And granted, too, he’s planning on departing Meta, where he’s managed Facebook’s Artificial Intelligence Research (FAIR) unit for more than a decade, for a world model-focused startup. That said, I’ll forever remember witnessing his decade-plus back live demonstration of early CNN (convolutional neural network)-based object recognition running on his presentation laptop and accelerated on a now-archaic NVIDIA graphics subsystem:

He was right then. And I’m personally betting on him again.

Happy holidays to all, and to all a good night

I wrote the following words a couple of years ago and, as was also the case last year, couldn’t think of anything better (or even different) to say this year, given my apparent constancy of emotion, thought, and resultant output. So, once agai,n with upfront apologies for the repetition, a reflection of my ongoing sentiment, not laziness:

I’ll close with a thank-you to all of you for your encouragement, candid feedback and other manifestations of support again this year, which have enabled me to once again derive an honest income from one of the most enjoyable hobbies I could imagine: playing with and writing about various tech “toys” and the foundation technologies on which they’re based. I hope that the end of 2025 finds you and yours in good health and happiness, and I wish you even more abundance in all its myriad forms in the year to come. Let there be Peace on Earth.

p.s…let me (and your fellow readers) know in the comments not only what you think of my prognostications but also what you expect to see in 2026 and beyond!

—Brian Dipert is the Principal at Sierra Media and a former technical editor at EDN Magazine, where he still regularly contributes as a freelancer.

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