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Starlab Space LLC of Webster, TX, USA — which is developing an AI-enabled commercial space station, expanding access to low Earth orbit (LEO) research and manufacturing — has announced a payload reservation from Elethron, an advanced materials and process engineering company developing high-performance crystalline materials for semiconductor applications...

An SO-101 robot arm, originally a desktop toy, now picks and places rubber ducks by reasoning with a vision-language-action model. Dmitry Maslov’s project swaps the original brain for an Arduino VENTUNO Q board, which runs Hugging Face’s SmolVLA model locally. The result shows that robotics tasks combining vision and language, once confined to costly labs, now fit on a 299-dollar board.

Hardware: two processors on one board

The Arduino VENTUNO Q board has a dual nature. On one side sits an SBC system with a Qualcomm Dragonwing IQ8 processor, equipped with an Adreno 623 GPU and a Hexagon Tensor NPU, built for AI processing. On the other side is an STM32H5F5 microcontroller with an Arm Cortex-M33 core running at 250 MHz, which handles real-time servo control. The board offers 16 GB of LPDDR5 RAM and 64 GB of integrated eMMC storage.

The original SO-101 arm carries gearmotors on every joint and two cameras: one fixed overhead and one on the gripper. The images and joint position data go to the Dragonwing IQ8 processor, where the SmolVLA model interprets them. The model was trained with 50 demonstrations of the task of grabbing and moving the rubber ducks.

The SmolVLA model and the system’s numbers

SmolVLA is an open source vision-language-action model from Hugging Face. It processes the camera images and joint data, then produces the commands for the servo motors. All the processing happens locally on the VENTUNO Q board, with no connection to external services. The board costs 299 dollars, against 399 dollars for the Jetson Orin Nano Super Developer Kit, cited as a competitor.

Dmitry Maslov’s system points the way to accessible robotics. What’s more, the fact that the model runs on a commercial board costing less than 300 dollars opens up new scenarios for makers. For anyone who wants to see the project in action, Dmitry Maslov’s video shows the arm grabbing and moving the rubber ducks.

• Arduino VENTUNO Q board with Qualcomm Dragonwing IQ8 processor and STM32H5F5
• Hugging Face SmolVLA model running locally
• 50 demonstrations to train the pick-and-place task
• Two cameras: one overhead and one on the gripper
• 16 GB of LPDDR5 RAM and 64 GB of eMMC storage

For anyone wanting to rebuild the project, the trickiest part is the integration between the SBC side and the microcontroller side of the board. The Dragonwing IQ8 processor runs the model, while the STM32H5F5 controls the servos. Communication between the two sides is essential to synchronise vision with movement.

Source: https://youtu.be/T0frBNASr3M?si=Wf1VPI8SoJ6tr18p

The post SO-101 Robot Arm Meets Arduino VENTUNO Q: Local-AI Pick-and-Place appeared first on Open Electronics.

Infineon Technologies on 1st of October, 2026 officially inaugurated its new backend manufacturing site in Bangkok, Samut Prakan in collaboration with Prime Minister of Thailand, Anutin Charnvirakul and Chief Operations Officer of Infineon Technologies, Alexander Gorski. The purpose of building new site is to strengthens and expanding the company’s global manufacturing footprint while adding capacity for future growth. The new site is located in the heart of Southeast Asia reinforcing Infineon’s ability to server customers worldwide at a time when long-term semiconductor demand continues to grow because of digitalisation, electrification and the energy transition.

Built for future growth, the facility can scale up to five modules, giving Bangkok the potential to become one of Infineon’s largest backend manufacturing sites over time. As a strategic addition to Infineon’s globally diversified manufacturing network, the site complements the ongoing expansion of Infineon’s frontend manufacturing capacities.

“What makes Bangkok such an important addition to our global manufacturing footprint is its unique combination of location and growth potential,” says Alexander Gorski, Chief Operations Officer of Infineon Technologies. “We are establishing a new hub in the heart of Southeast Asia, surrounded by a fast-growing ecosystem and with excellent access to global logistics. This helps us further diversify our manufacturing network across regions and serve our customers with resilient capacity and great flexibility. We have built the Bangkok site with the future in mind. Starting with Module A, the site can grow to up to five modules over time, giving us unique scalability to support future growth.”

“Infineon’s new backend manufacturing site in Bangkok, Samut Prakan, is a strong vote of confidence in Thailand’s future as a leading semiconductor location,” says Anutin Charnvirakul, Prime Minister of Thailand. “Together, we are advancing Thailand’s semiconductor ecosystem, strengthening our role in the global value chain and creating new opportunities and highly skilled jobs for future generations. We welcome Infineon’s long-term engagement and look forward to deepening our cooperation.”

A long-term investment in Thailand’s semiconductor ecosystem

Thailand’s commitment to building a strong semiconductor ecosystem, guided by its national technology strategy, is creating new momentum for advanced manufacturing and technology-driven growth in the region. Thailand offers excellent connections throughout Southeast Asia, proximity to key customer markets and a long-standing semiconductor manufacturing heritage. The Bangkok site builds on local expertise, established partnerships and a highly skilled workforce while contributing to the further development of Thailand’s flourishing semiconductor ecosystem.

The site currently employs around 350 people and is expected to grow to approximately 1,000 employees as the first building (Module A) ramps up. Beyond manufacturing, Infineon supports talent development through collaborations with universities, educational institutions and industry partners.

Expanding capabilities for complex, high-value semiconductor solutions

The Bangkok site combines advanced automation, scalable design and a digital manufacturing backbone to support efficient, stable and high-quality production at scale. Built as a greenfield site, the facility leverages proven expertise from Infineon’s established backend manufacturing locations while providing the flexibility to adapt to evolving customer requirements, new technologies and large production volumes.

Equipped with advanced cleanroom, assembly and test capabilities, all supported by a high level of automation, the Bangkok site covers the full spectrum of semiconductor backend processes as well as wafer test. This unique combination strengthens its role within Infineon’s manufacturing network and enables increasingly complex, high-value semiconductor solutions for applications across the automotive, industrial and energy infrastructure, contributing directly to technologies that drive electrification, energy efficiency and digitalization worldwide.

Sustainability built in from the ground up

The Bangkok site runs on 100 percent green electricity, incorporates water recycling and rainwater collection systems and is equipped with solar modules that generate renewable energy on site. Together, these measures support resource-efficient manufacturing and contribute to Infineon’s strategic priority of continuously reducing its carbon footprint across the entire value chain.

The post Infineon Opens New Bangkok Backend Manufacturing Hub to Expand Semiconductor Capacity appeared first on ELE Times.

Space Forge Inc (which, as a branch of Space Forge Ltd of Cardiff, Wales, UK, operates from Florida’s Space Coast) says that its ‘Microgravity Semiconductor Manufacturing: Enabling Extreme Performance Electronics’ solution has achieved ‘Awardable’ status through the US Defense Advanced Research Projects Agency (DARPA) Expedited Research Innovation System (ERIS) Marketplace...

​Moving to advance technology in electric vehicle, Delta Electronics and NVIDIA Hyperion have partnered to accelerate the development of next-generation autonomous-driving systems. The collaboration was announced on September 29, 2026, via a press release in Fremont, California, USA by Delta Electronics. The partnership aims to deliver more advanced, safer, and efficient next-generation Level 4 autonomous vehicles and robotaxis.

The company did not announce any commercial products to be launched. However, the collaboration focuses on introducing integrated automotive solutions by embedding Delta’s core hardware technologies directly into the NVIDIA Hyperion architecture.

Delta Electronics will contribute electronics hardware and integration expertise covering automotive energy management, xEV powertrain systems, power electronics, system integration, and in-vehicle high-performance computing (HPC). These technologies are crucial for autonomous vehicles because advanced systems depend not only on AI-based perception and decision-making but also on a reliable power supply, vehicle computing, and the integration of multiple electronic components.

To provide reference sensor and computing platform, NVIDIA Hyperion is d​eveloped and introduced as a modular architecture and end-to-end platform that integrate computer hardware, multimodal sensor and safety software into a single unit for autonomous vehicles.

The specific roles of this platform include integrating dual NVIDIA DRIVE AGX Thor centralised computers for handling level 4 autonomous driving tasks, a standardised sensor architecture for achieving full 360-degree environmental perception, and the NVIDIA Halos safety system, which offers safety mechanisms that satisfy automotive safety standards, including ISO 26262 ASIL-D requirements.

The collaboration highlights the efforts toward​s advancing AI-driven autonomous-driving solutions and expanding opportunities in smart mobility. It demonstrates the further steps towards merging AI, high-performance in-vehicle computing, automotive power electronics, sensor system, and functional safety in the development of level 4 autonomous vehicle.

The post Delta Electronics and NVIDIA Hyperion to Jointly Advance Level 4 Autonomous Driving appeared first on ELE Times.

The open source ExpressLRS receivers from OpenDrone-hw take FPV drone telemetry to the next level. Bastian2001’s project offers four variants that share the ESP32-C3 core and unified ExpressLRS firmware. The differences lie in the radio, band, RF front-end, and antenna. The result is a complete family for every flight need.

ExpressLRS’s Chirp Spread Spectrum (CSS) modulation encodes data in the starting frequency of a chirp, a radio tone with a linear rise. The receiver multiplies the incoming signal with an inverse chirp and applies a Fast Fourier Transform (FFT) to reveal the starting frequency. This process provides an equivalent gain of 24 dB. As a result, the system decodes signals even below the receiver’s noise floor.

Simple hardware, extreme performance

The hardware is relatively simple: an ESP32 microcontroller, an SX1281 radio chip, and a few peripherals. One variant uses a via to connect the antenna, an unconventional choice. Thanks to nearby ground plane vias, this solution does not significantly degrade performance. The PCB is 6-layer with 1.0 mm thickness, a detail that matters for signal quality.

Dimensions vary between versions: 10.0 x 11.5 mm for Lite and Lite-UFL, 10.0 x 17.3 mm for Mono, and 17.0 x 15.7 mm for Gemini. Telemetry reaches 13 dBm (20 mW) for Lite and Lite-UFL, while Mono and Gemini achieve 22 dBm (158 mW). In a test with a forest blocking the signal, the connection remained stable beyond 5 km. A remarkable result for such a compact receiver.

Unified firmware and configuration

The firmware is the unified ExpressLRS firmware, flashed via Betaflight passthrough or Wi-Fi. This choice simplifies receiver management, because a single firmware image supports all variants. Configuration also uses the same tools as the ExpressLRS community. For those wanting to experiment with the chip used in this project, an ESP32-C3 module is a good starting point for initial firmware tests.

The 2.4 GHz band for Lite and Lite-UFL covers most FPV uses. The Mono and Gemini versions are dual band, offering more flexibility in environments with interference. The LR1121 chip handles the dual band without complicating the design. The OpenRX GitHub repository documents every detail for reproduction.

ExpressLRS’s CSS modulation shows that extreme range is achievable with simple, open source hardware. The 24 dB gain from demodulation changes the game. The choice of a via for the antenna also challenges RF design conventions. This project is a concrete example of how open source can innovate in the drone sector.

The open source ExpressLRS receivers in this project take a different approach from classic point-to-point LoRa modules, based on CSS modulation and FFT for decoding. The complete documentation allows you to replicate the project and understand every technical choice. Finally, the ExpressLRS community ensures continuous updates and support.

The four variants cover different needs: Lite for those seeking minimal footprint, Gemini for those wanting maximum power. The 22 dBm telemetry is among the highest in its category. The 5 km forest test demonstrates reliability in difficult conditions. A project that deserves attention from every FPV maker.

• CSS modulation with 24 dB equivalent gain
• Telemetry up to 22 dBm (158 mW) for Mono and Gemini
• Compact dimensions: 10.0 x 11.5 mm for Lite
• 6-layer PCB with 1.0 mm thickness
• Unified ExpressLRS firmware via Betaflight passthrough or Wi-Fi

Source: https://github.com/OpenDrone-hw/OpenRX

The post Open Source ExpressLRS Receivers: Extreme Range with ESP32-C3 appeared first on Open Electronics.

​To deepen domestic manufacturing, scale-up its own supply chain, less dependent on import, and increasing the number of homegrown smartphones, India announced Rs 62,500 crore Mobile Phone Manufacturing Scheme (MPMS). The scheme’s time period covers five years, from FY 2026-27 to FY 2030-31 and it was approved by the Union Cabinet. The scheme is designed to strengthen mobile-phone manufacturing beyond large-scale assembly while supporting the Indian brand and technology development.

The new scheme enters the development phase just after the completion of the Production Linked Incentive (PLI) Scheme whose tenure ended in March 2026. Under this scheme, the manufacturers will receive incentives depending on their eligible selling products with rates ranging from 2.5% to 5%. Companies can also receive an additional incentive of up to 1.5% for domestic sourcing of key components and sub-assemblies. For Indian brand, the scheme provides 5% incentive, along with additional 3% incentive linked to product design and R&D. These steps were taken to encourage deeper localisation of the mobile-phone supply chain.​

Through this scheme, the government targets a production value of Rs 39 lakh crore in mobile phones over the five-year tenure and aims to create around 60,000 direct opportunities. The scheme also aims to promote Indian brands and intellectual property by offering target-based incentives for domestic research, design, and component ownership.

The existing Indian market already consumes 99.2% of the mobile phones manufactured or assembled in the country and India is the world’s second-largest mobile-phone manufacturer in the​ global market. Exporting mobile phones is also increasing in India, thus supporting its integration into global value chains.

The new scheme is aimed at strengthening domestic manufacturing and deepening India’s electronics manufacturing capabilities through component sourcing, research and development (R&D), and support for Indian-owned brands. Along with the development of manufacturing, the mobile phone manufacturing scheme (MPMS) is also intended to strengthen India’s position in global value chains in electronics manufacturing.

The post India’s Rs 62,500 Crore Mobile Manufacturing Scheme Targets Next Phase of Electronics Growth appeared first on ELE Times.

Keysight Technologies on 1st of October, 2026, announced the new 20 gigahertz (GHz) PSG XG7-class analog signal generator, which combines two fully independent channels in a single 2U chassis. Its low noise and calibrated output power help engineers evaluate device performance more clearly, while its compact dual-channel design increases test capacity without requiring additional rack space.

In challenging testing scenarios, such as aerospace and defence, advanced wireless and high-speed digital applications, the noise from the signal source can hide the behaviour engineers need to measure. Engineering teams also need to increase test capacity, while working within limited rack space and without costly modifications to existing test systems. The new PSG meets these needs with low phase noise, low amplitude modulation noise, low broadband noise floor, calibrated output power and two independent channels in a compact 2U chassis.

Key benefits of the new XG7-class include:

• Enhanced measurement visibility: Ultra-low noise helps engineers evaluate device performance without the signal source masking critical behavior.
• Expanded test capacity: Two fully independent channels in a compact 2U chassis enable teams to run more tests without increasing rack space.
• Improved performance in lossy test setups: Clean, calibrated output power up to +22 decibel-milliwatt (dBm) helps maintain the required signal level at the device under test, including through lossy cables and test fixtures.
• Faster technology refresh: Standard Commands for Programmable Instruments (SCPI) compatibility, familiar rear-panel connections and settings aligned with previous-generation instruments help teams reuse existing automation and test procedures.

The PSG provides phase noise of -135 dBc/Hz and amplitude modulation noise of -150 dBc/Hz, measured at 10 GHz with a 10 kHz offset, together with a broadband noise floor of -166 dBc/Hz at 10 GHz. Its hybrid architecture uses software mode switching to optimize performance across different applications, while calibrated output power up to +22 dBm helps compensate for losses in cables and test fixtures.

Jun Chie, Vice President, Keysight Core Product Management, said: “For decades, engineers have relied on Keysight’s PSG signal generators for trusted performance in the most demanding measurement environments. This new analog signal generator builds on that legacy with the purity, power, and productivity customers need to reveal true device performance and modernize test environments with confidence.”

The post Keysight Introduces 20 GHz Dual-Channel Analog Signal Generator for Advanced Device Testing appeared first on ELE Times.

DigiKey, the global distribution leader in electronic components and automation products, has announced the launch of Season 6 of Factory Tomorrow, a video series highlighting how manufacturers and technology suppliers are building the foundation for the next generation of industrial production.

This three-episode season of Factory Tomorrow explores how industry leaders such as Phoenix Contact and Belden are helping manufacturers build more connected and intelligent factories. The series covers AI-enabled data centres supporting Industry 4.0, as well as industrial networks that move power and data across the factory floor.

As factories evolve into highly connected, software-defined environments, the sixth season examines the technologies enabling real-time visibility, autonomous operations and resilient industrial systems. As manufacturers increase AI adoption and invest in digital transformation initiatives, demand for industrial networking, edge connectivity, data infrastructure and intelligent automation continues to grow.

“Factory Tomorrow continues to bring together industry experts to discuss the technologies shaping the future of manufacturing, including the growing impact of AI on industrial operations and data infrastructure,” said Connor Doherty, director, industrial automation for DigiKey. “This season examines the networks, connectivity and computing infrastructure required to support smarter, more connected factories.”

Season 6 Highlights

• AI-ready data centres supporting industrial operations
• Industrial networking for connected factories
• Copper, fiber and optical connectivity infrastructure
• Real-time visibility and operational intelligence
• Smart manufacturing and Industry 4.0 applications
• Expert perspectives from DigiKey, Phoenix Contact and Belden

In the first video, Phoenix Contact highlights how its connectivity and industrial networking solutions support both AI-ready data centres and smart factory environments.

“Today’s digital factories need to collect, secure, transport, analyze and act on data,” said Greg Jerrehian, vice president of channel management at Phoenix Contact USA. “As a manufacturer, Phoenix Contact understands these challenges firsthand. We’re excited to share our expertise in networking, automation and connectivity to help the industry improve efficiency and optimize operations. Through our partnership with DigiKey, we’re accelerating access to new technologies and helping customers achieve success faster.”

The second video focuses on how Belden’s customized and scalable networking solutions spanning advanced copper and fiber, multi-lane optics and high-density optical frames enable data centres to adapt to rapidly changing technology demands.

“It was a pleasure to work with DigiKey to discuss how AI is changing the landscape of factories of all kinds and how data centres are enabling that change, regardless of whether they are on-prem, using hyperscale data centres, cloud services, or somewhere in between,” said Brian Kennedy, global vertical leader – data centres, for Belden.

In the final video, experts look ahead to the future of smart manufacturing where AI, autonomous systems and sustainable industrial design converge. This episode brings together connectivity, data and intelligence into a cohesive vision for the factory of tomorrow, examining how manufacturers can build flexible, energy-efficient and resilient systems capable of evolving alongside emerging technologies.

The post DigiKey Launches Factory Tomorrow Season 6 on AI Infrastructure and Industrial Connectivity appeared first on ELE Times.

Industrial Ethernet is becoming the foundation of modern automation. From connected production lines and robotics to machine vision, edge computing and AI-driven systems, Ethernet is the communication backbone that enables industrial organizations to collect data, make decisions faster, and increase operational efficiency.

At the same time, the demands placed on industrial networks have never been greater. Industrial Ethernet is no longer just about connecting devices. It has become a strategic enabler of digital transformation in the era of “Industry 4.0” and intelligent manufacturing.

From connectivity to operational intelligence

Over the past decade, industrial Ethernet has evolved dramatically. What began as a replacement for proprietary industrial communication systems has become the foundation for smart factories, industrial IoT, predictive maintenance, and real-time analytics.

Today’s industrial networks no longer connect only controllers and sensors. They enable communication across machines, robotics systems, vision systems, edge computing platforms, cloud applications, and enterprise systems. Consequently, as organizations pursue greater automation and insight, communication infrastructure has become mission critical to business success.

Figure 1 The role of industrial Ethernet continues to expand as manufacturers seek greater efficiency, higher productivity, and more operational intelligence. Source: Microchip

Five forces reshaping industrial Ethernet

1. Deterministic networking is becoming essential

Modern industrial applications increasingly depend on precise timing and predictable communication. Robotics, motion control systems, multi-axis machinery, and synchronized production equipment all require predictable or deterministic network behavior to ensure repeatable performance.

As networks grow in size and complexity, maintaining accurate synchronization across distributed systems becomes more significant. So, industrial designers are increasingly looking for networking solutions capable of supporting precise timing and low latency while maintaining interoperability across diverse systems.

2. AI and machine vision are driving bandwidth requirements

Machine vision, AI-enabled inspection, and real-time analytics are introducing new connectivity demands across industrial environments. High-resolution cameras, intelligent edge devices, and data-intensive applications generate substantially more traffic than traditional industrial control systems.

Figure 2 AI-enabled inspection and real-time analytics are introducing new connectivity demands across industrial environments. Source: Microchip

As these applications become more prevalent, network infrastructures must support higher throughput while continuing to meet real-time communication requirements. The challenge is no longer simply moving data. It’s moving more data faster and more reliably than ever before.

3. Legacy infrastructure must coexist with new technologies

Most industrial facilities cannot replace their entire network infrastructure overnight. As a result, engineers are frequently tasked with integrating next-generation communication technologies while maintaining compatibility with existing equipment and architectures.

The coexistence of legacy systems and modern networking technologies introduces complexity, interoperability concerns, and deployment risk. Many organizations are looking for migration strategies that enable modernization without disrupting operational continuity.

4. Reliability is a business requirement

Industrial Ethernet systems operate in some of the world’s most demanding environments. Exposure to temperature extremes, electrical noise, vibration, and continuous operation can place significant stress on communication infrastructure.

Network disruptions are no longer viewed as simple technical issues. Communication failures can impact production, reduce productivity, and contribute to costly downtime. As automation systems become increasingly connected, reliability is becoming a critical operational requirement rather than simply a design consideration.

5. Security is now part of the communication challenge

The convergence of information technology (IT) and operational technology (OT) is increasing connectivity throughout industrial environments. While this creates opportunities for greater visibility and efficiency, it also expands potential security exposure.

Industrial organizations must now balance connectivity, accessibility, and operational efficiency with the need to protect critical systems and maintain operational continuity. Secure and resilient communications are no longer optional. They are fundamental requirements of modern industrial infrastructure.

Figure 3 Secure and resilient communications are no longer optional. Source: Microchip

The hidden challenge: Complexity

While each of these trends presents unique technical requirements, many industrial organizations are facing a larger challenge: complexity. Industrial networks today must support more devices, more data, more protocols, more security considerations, and tighter timing requirements than ever before. Engineers are expected to integrate legacy and modern systems, support future networking requirements, shorten development cycles, and reduce deployment risk, often with limited resources and aggressive project timelines.

So, industrial Ethernet now faces the combined challenge of supporting greater bandwidth, deterministic performance, legacy-system integration, reliability and security; all while managing increasing network complexity.

Figure 4 Complexity is intertwined with industrial Ethernet challenges such as greater bandwidth, deterministic performance, legacy-system integration, reliability, and security. Source: Microchip

As a result, network complexity is emerging as the primary barrier to faster innovation, system scalability, and operational agility. This challenge is increasingly visible as manufacturers expand automation initiatives and invest in smart factory infrastructure.

What industrial designers need next

As industrial networking continues to evolve, the criteria for selecting Ethernet solutions are changing. Industrial designers need technologies that help them:

• Simplify network design and integration
• Accelerate development and deployment cycles
• Enable deterministic real-time communications
• Support scalable architectures from edge devices to factory infrastructure
• Deliver reliable operation in harsh industrial environments
• Maintain secure and resilient communications
• Prepare for future networking requirements and evolving standards

The focus is shifting from individual components to complete connectivity platforms that help reduce engineering complexity while supporting long-term business and technology objectives.

The next generation of industrial automation will place even greater demands on communication infrastructure. Deterministic networking, intelligent machines, AI-enabled systems, advanced machine vision, and increasingly connected operations will continue to drive new requirements across industrial environments.

Success will depend not only on network performance, but also on the ability to simplify deployment, scale architectures efficiently, and maintain reliable, secure operation throughout the system lifecycle. Organizations that reduce communication complexity will be better positioned to accelerate innovation and adapt to future industrial requirements.

Nervous system of modern automation

Industrial Ethernet is becoming the nervous system of modern automation. Yet as industrial systems become more capable, connected and intelligent, the underlying communication infrastructure is becoming increasingly challenging.

The challenge facing industrial organizations is no longer whether to connect systems. The challenge is how to do so efficiently, reliably, and securely while meeting the growing demands of modern automation.

The future of industrial Ethernet will belong to solutions that help simplify integration, accelerate development, improve reliability, and support scalable industrial networking architectures. As the industry enters its next chapter, reducing complexity may become one of the most important competitive advantages an organization can achieve.

Matthias Karcher is associate director of Microchip Technology’s networking and connectivity business unit.

Related Content

• Industrial Ethernet–The basics
• Picking the right flavor of Industrial Ethernet
• Single-Pair Ethernet: The End of the Industrial RJ45?
• Physical layer design applications for industrial Ethernet
• Exploring Wired Networks for Smart Pathways in Factories

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For coverage of all the key business and technology developments in compound semiconductors and advanced silicon materials and devices over the last month, subscribe to Semiconductor Today magazine...

Efinix offers the Sapphire RV64, a configurable 64-bit RISC-V soft SoC optimized for the company’s Trion and Titanium FPGAs. The SoC incorporates a cached RISC-V processor core and optionally includes a DDR DRAM controller interface. It also supports a range of peripherals. 

Sapphire RV64 is designed for embedded and edge AI applications that require more addressable memory, cache, and I/O capability than 32-bit cores can provide while still demanding the small footprint and low power of an FPGA-based solution. It extends the architecture of the 32-bit Sapphire RV32 SoC in several key areas:

• Seven-stage pipeline implementing the RISC-V64IM ISA, with optional A, F, D, C, Zba, Zbb, Zbs, and Zicbom extensions.
• Configurable memory hierarchy with 4 to 512 KB of on-chip RAM, multi-way L1 instruction and data caches, and optional L2 cache, branch predictor, and hardware and software prefetchers.
• Linux support with an optional SV39 memory management unit.
• Memory performance and flexibility for AI workloads, with an optional controller supporting DDR3, HyperRAM, and LPDDR4x at up to 3,200 Mbps.
• Debug capabilities with extensive debug support and native FPGA co-debug.

Sapphire SoCs are configured through the IP Manager and supported by the Efinity IDE and Eclipse-based RISC-V Embedded Software IDE.

Sapphire RV64 product page 

Efinix

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AgentEngineer domain-specific, long-horizon agents from Synopsys accelerate engineering across silicon-to-system design. Built on the Autopilot open platform for autonomous engineering, the agents apply AI to workflows spanning verification, implementation, analog, manufacturing, simulation, and analysis in a single unified environment.

Long-horizon agents can reason, plan, and execute complete engineering workflows, allowing teams to achieve faster closure across critical tasks while optimizing token efficiency and reducing latency. Task-level agents apply Synopsys engineering expertise to targeted execution across areas such as autonomous coverage closure, software bring-up and validation, multi-die 3DIC assembly, PPA closure, and analog layout synthesis and design migration.

According to Synopsys, engagements with leading companies have demonstrated up to 50× faster verification closure, 20% higher coverage, and a 30% productivity increase. More than 50 engagements are underway using Synopsys AgentEngineer solutions and the Autopilot Platform, with general availability planned for the end of 2026.

AgentEngineer product page 

Synopsys

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Advanced Energy’s DF150 160-W AC/DC power supply is built for extreme environments in defense and industrial applications. The first entry in the Defiant Future (DF) series of ruggedized, high-reliability power supplies, the DF150 is certified to MIL-STD-810H, withstanding shock, vibration, altitude variations, and temperature extremes. It also provides enhanced EMC performance and complies with MIL-STD-461G requirements.

According to Advanced Energy, the DF150 combines the performance and MIL-STD certifications often associated with custom-designed solutions with the availability and lead-time advantages of a standard commercial product. With its IP67 rating, the unit can withstand submersion in up to 1 m of water for 30 minutes and exceeds MIL-STD ingress protection requirements for dust and liquids.

The DF150 delivers a nominal output of 27 VDC at 6 A (160 W) over an extended operating temperature range of -46°C to +60°C. Fanless operation supports both conduction and convection cooling options for long-term reliability in challenging operating conditions. Full-load efficiency is up to 91%. The power supply operates with no minimum load and leakage current of 275 µA at 230 VAC.

DF150 product page 

Advanced Energy Industries 

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Diodes’ automotive Field-Plated Super Barrier Rectifiers (SBRFP) provide low forward voltage and low reverse leakage current. The 2-A SBRFP2M60P1Q and SBRFP2M60SAFQ, 3-A SBRFP3M60SAFQ, and 8-A SBRFP8A60P5Q are drop-in replacements for comparable Schottky and PN junction diodes. Based on a MOS manufacturing process, Diodes’ SBRFP technology overcomes the limitations of conventional Schottky and PN junction technologies.

The SBRFP8A60P5Q has a maximum forward voltage (VF) of 0.55 V at 8 A, helping reduce conduction losses in high-current applications. The SBRFP2M60P1Q and SBRFP3M60SAFQ offer low reverse leakage currents (IR), with maximum currents of 12 µA and 7 µA, respectively, at 25°C. These characteristics can contribute to improved efficiency and reduced thermal stress under high-temperature operating conditions.

Avalanche energy ratings reach up to 145 mJ, depending on the device, providing additional capability for handling surge events, load dumps, and other transient conditions in automotive electrical systems. The devices operate across a -55°C to +175°C junction temperature range for demanding automotive applications.

Prices for the SBRFP family range from $0.08 to $0.26 each in 1000-piece quantities.

SBRFP2M60P1Q product page

SBRFP2M60SAFQ product page

SBRFP3M60SAFQ product page

SBRFP8A60P5Q product page

Diodes Inc.

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At just 1.155×1.155 mm, the Renesas GreenPAK SLG46801 configurable mixed-signal IC is small enough for use in smart rings and watches. Its 9-ball WLCSP makes it the smallest device in the GreenPAK family, combining an ultra-compact footprint with multi-time programmability (MTP). The SLG46801 integrates commonly used functions that complement an MCU or replace multiple discrete components in analog signal-processing applications.

Along with two high-speed analog comparators, the SLG46801 integrates configurable lookup tables, two oscillators (10 kHz and 25 MHz), and counters/delays. MTP non-volatile memory is programmed in-system via an I2C serial interface, allowing bug fixes and updates. The device supports operation and programming across a supply range of 1.71 V to 5.5 V for low-cost sensing, control, and glue-logic functions.

In addition to the WLCSP, the SLG46801 is available in a 12-lead, 1.6×1.6-mm STQFN package. The WLCSP provides seven GPIO pins, one of which is voltage-tolerant. The STQFN provides 10 GPIO pins, two of which are voltage-tolerant. GPIO pins used for the I2C interface can also be reconfigured, maximizing flexibility in designs with limited pin availability.

The SLG46801 is sampling now in the STQFN package, with mass production of the WLCSP package planned for November 2026. Renesas Go Configure Software Hub is available for programming, emulation, and simulation.

SLG46801 product page 

Renesas Electronics 

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As 5G networks expand in scale, complexity, and societal importance, the underlying timing infrastructure that keeps them synchronized has become a strategic technology domain. While radio access innovations—massive multiple‑input multiple‑output (MIMO), beamforming, millimeter‑wave deployments—often dominate public discussion, the stability and accuracy of network timing are just as critical. Without precise timing, 5G’s most advanced features simply cannot function.

At the center of this timing ecosystem are cesium atomic clocks, technology that has existed for decades but is now more relevant than ever. These devices, long used in national laboratories and scientific institutions, are increasingly essential for ensuring the reliability, resilience, and performance of modern 5G networks.

This article explores why cesium clocks matter, how they fit into 5G timing architectures, and why their role is expanding as operators confront new challenges in synchronization, global navigation satellite system (GNSS) dependence, and critical‑infrastructure reliability.

Figure 1: Next-generation networks link devices and data around the world. (Source: Adobe Stock) The timing imperative in 5G networks

5G networks rely on extremely tight synchronization across thousands of distributed radios. This is especially true for time-division duplex (TDD) systems, which alternate between uplink and downlink transmissions in precisely defined time slots. If radios fall out of alignment, interference increases, throughput drops, and, in severe cases, entire sectors can fail.

The tolerance for timing error in 5G TDD is typically about ±130 ns. Maintaining this level of precision across a geographically distributed network is no small feat.

Critical requirements for precision timing include:

• A stable and accurate frequency reference
• A precise phase reference
• A reliable time‑of‑day reference
• A distribution mechanism that preserves these qualities across fiber, microwave, and radio backhaul

Historically, operators have relied heavily on GNSSes such as GPS, Galileo, or BeiDou to provide the primary timing source. GNSS signals offer global coverage and excellent accuracy, making them a natural fit for telecom synchronization. However, GNSS dependence introduces vulnerabilities.

Figure 2: A satellite in low Earth orbit supports GNSS signals, enabling precise positioning, navigation, and timing for critical systems on the ground. (Source: Adobe Stock) The GNSS challenge: reliability, security, and availability

GNSS signals are extraordinarily weak by the time they reach Earth’s surface. This makes them susceptible to disruptions and even outages from events, including:

• Jamming, both accidental and intentional
• Spoofing, in which false signals mimic legitimate ones
• Environmental blockage, especially in dense urban areas
• Indoor limitations, affecting small cells and private networks
• Regulatory or geopolitical disruptions, which can affect availability

As 5G is integrated into critical infrastructure from transportation to energy and emergency services, the consequences of GNSS disruption become more serious. A timing outage in a 5G network can cascade into failures in dependent systems.

This has led operators and governments to seek GNSS‑independent timing anchors that can maintain network synchronization even when satellite signals are degraded or unavailable. That’s precisely why cesium atomic clocks play a pivotal role.

Cesium atomic clocks: a stable, autonomous timing source

Cesium clocks are among the most stable and accurate timing devices. Their operation is based on the natural resonance frequency of cesium atoms, which is extraordinarily consistent over time. This stability allows cesium clocks to maintain precise timing for months without an external reference.

Some standout characteristics include exceptional long‑term frequency stability, minimal drift over time, deterministic behavior under environmental changes, and autonomous operation without GNSS.

In telecom networks, cesium clocks serve as primary reference sources (PRS) or as part of enhanced primary reference time clock systems. Their role is to provide a stable, traceable timing foundation that other network elements, such as grandmasters, boundary clocks, and radio units, can rely on.

Holdover: the critical advantage of cesium

One of the most important contributions of cesium clocks to 5G is holdover performance. Holdover refers to a clock’s ability to maintain accurate timing when its external reference, typically GNSS, is lost.

High‑quality cesium clocks can maintain frequency accuracy within extremely tight tolerances, phase alignment within 100 ns, and traceability to UTC for extended periods. This can last weeks or even months, depending on the clock design and environmental conditions.

For 5G networks, this means TDD radios remain synchronized, massive MIMO and beamforming continue to function, high‑order modulation schemes remain viable, and network stability is preserved during GNSS outages. In an era where GNSS interference is increasingly common, this capability is not merely beneficial; it is essential.

Cesium in modern 5G timing architectures

Cesium clocks are typically deployed in centralized timing hubs within the operator’s core network. These hubs serve as the authoritative source of time and frequency for the entire network.

The key elements of a typical 5G architecture include:

• PRS: Cesium clocks provide baseline frequency and time reference with outputs of 10 MHz and 1 pps, which feed into timing distribution systems.
• GNSS receivers: GNSS is still used when available, providing traceability to global time standards. Cesium clocks blend GNSS input with their own stability to create a composite reference.
• Grandmaster clocks: Grandmasters distribute timing using IEEE 1588 Precision Time Protocol (PTP), often following telecom profiles such as G.8275.1 or G.8275.2.
• Boundary clocks and transparent clocks: These devices propagate timing deeper into the network while compensating for delays and jitter.
• Radio units: At the edge, radios rely on distributed timing to maintain TDD alignment and support advanced radio features.

In this model, cesium clocks act as the anchor that ensures stability even when GNSS is compromised.

The rise of virtualized timing

As networks evolve toward cloud‑native architectures, timing distribution is also becoming more virtualized. Virtualized primary reference time clock (vPRTC) systems allow operators to centralize timing sources and distribute them over fiber using PTP.

Cesium clocks remain essential in these architectures because they provide the long‑term stability required to maintain traceability and resilience.

vPRTC offers several advantages:

• Centralized GNSS reception in secure locations
• Reduced exposure to spoofing and jamming
• Simplified timing distribution
• Improved control over timing quality
• Enhanced resilience through redundant cesium sources

This approach is increasingly adopted in national telecom networks and critical‑infrastructure deployments.

Figure 3: A stylized cesium atom symbolizes the atomic transitions that form the foundation of ultra-stable timekeeping used in modern synchronization systems. (Source: Adobe Stock) Why cesium matters for advanced 5G features

Several of 5G’s most important capabilities depend directly on precise timing. Techniques such as massive MIMO and beamforming rely on tightly phase‑aligned transmissions across large antenna arrays, where even minor timing deviations can weaken beamforming accuracy and reduce overall spectral efficiency. High‑order modulation schemes such as 256‑QAM and 1,024‑QAM similarly require exceptionally clean, well‑synchronized signals to maintain their performance advantages. Network slicing depends on deterministic latency and predictable behavior across shared infrastructure, both of which are achievable only when timing remains stable throughout the network.

Ultra‑reliable low‑latency communications applications—including industrial automation, robotics, and autonomous systems—push these requirements even further, demanding precise, low‑jitter timing to ensure consistent and safe operation. Together, these capabilities illustrate how deeply 5G’s most advanced functions depend on robust synchronization.

The strategic importance of cesium in national infrastructure

As 5G becomes intertwined with national critical infrastructure, timing resilience becomes a matter of public safety and national security. Governments and standards bodies increasingly emphasize the need for GNSS‑independent timing sources.

Cesium clocks are well-suited for supporting resilient 5G timing because they deliver stable, autonomous operation without relying on external signals, maintain predictable long‑term performance, and remain resistant to interference that can disrupt satellite‑based timing. Their ability to stay aligned with international time standards while continuing to function accurately during GNSS outages makes them a dependable foundation for critical network synchronization.

In many countries, cesium clocks form part of national timing centers that support telecom networks, power grids, transportation systems, and scientific institutions.

A technology whose importance is growing

Cesium atomic clocks have been part of the scientific landscape for decades, but their role in modern telecommunications is expanding rapidly. As 5G networks become more complex and more critical to society, the need for stable, resilient, GNSS‑independent timing grows accordingly.

Cesium clocks deliver long‑term stability, exceptional holdover, deterministic performance, and independence from GNSS vulnerabilities, making them a highly resilient foundation for precise network timing. They are not a replacement for GNSS but instead a complement forming the backbone of timing architectures that must remain operational under all conditions.

In the broader story of 5G, cesium clocks may not be the most visible technology, but they are one of the most essential: Their quiet precision ensures that the world’s most advanced wireless networks remain synchronized, resilient, and ready for the demands of the future.

The post Cesium atomic clocks: The backbone of precise 5G timing appeared first on EDN.

Виробництво ортезів і навчання, як спосіб повернути ветеранів до повного життя KPI4U-2 ср, 09/30/2026 - 16:30

Salim Benbouziyane has built a cyberdeck that fits inside an Altoids tin. The pocket computer has a physical keyboard, an LCD screen, and runs Doom. The project combines the nostalgia of the mints with the challenge of miniaturizing an entire working PC.

The key to the project is the Raspberry Pi Compute Module Zero. This compact board replaces a traditional SBC and frees up precious space.

Four PCBs for a compact cyberdeck

The project uses four PCBs in total. The first is a custom two-layer carrier board that handles connections and support for the hardware. The second PCB connects the LCD screen with a ribbon cable, allowing the box to open like a hinge.

In addition, a third empty PCB acts as a spacer between components. The fourth contains the dome switches for the keyboard. Each layer has a precise role, and the vertical arrangement uses every millimeter of the tin.

3D-printed covers and front panels protect the PCBs. These pieces also form the screen bezel and the keyboard keys. The Creality Ender-3 V3 SE 3D printer is a suitable choice for anyone wanting to recreate the project, thanks to its 22x22x25 cm print volume.

How the mini PC in a tin works

The Raspberry Pi Compute Module Zero plugs into the carrier PCB, which routes all connections to the screen and keyboard. The ribbon cable passes through the hinge of the tin, so the lid opens without disconnecting components. The system boots Doom directly from the module.

The dome keyboard uses physical switches, giving precise tactile feedback. The 3D-printed keys mount on top of the domes, and the tin acts as a rigid shell. The result is a sturdy, portable device that fits in a pocket.

For the screen, the project uses an LCD compatible with the module. An SPI 256×64 OLED display can be an interesting alternative for those who want to experiment, thanks to its high contrast and low power consumption. The choice of display depends on the space and resolution desired.

Salim Benbouziyane’s project is an example of extreme engineering in minimal space. The challenge is not just running Doom, but integrating keyboard, screen, and board into a mint tin. Every component is chosen to reduce bulk without sacrificing functionality.

The combination of custom PCBs and 3D printing makes the project replicable. The project video documents the main steps, and anyone with KiCad experience can adapt the design. The cyberdeck is a tribute to maker culture and retrogaming.

• Raspberry Pi Compute Module Zero for maximum compactness
• Two-layer carrier PCB for connections
• Four PCBs for screen, keyboard, and spacers
• 3D printing for bezel and keys
• Tin box as the shell

For those who want to try it, SMD soldering and PCB design skills are needed. The project requires patience, but the result is a unique computer that runs Doom. The nostalgia of tin boxes meets modern technology, and the cyberdeck becomes a collector’s piece.

Source: https://youtu.be/Ajft97gAxV8?si=fmr4b5Vugi0B8wXn

The post Cyberdeck in a Tin Box: Doom on Raspberry Pi appeared first on Open Electronics.

A curious connection of control buttons makes a simpler-is-better digital potentiometer interface possible.

Two recent submissions to the Design Ideas kitchen (see Related Content) have shown different basic step-per-push pushbutton interfaces for up/down digital potentiometers. Since they have the same purpose and perform the same function, they mostly can only meaningfully differ in their respective part counts. Which they did.

Wow the engineering world with your unique design: Design Ideas Submission Guide

But we engineers generally agree that, keeping other factors equal, simpler yet is even better yet. Therefore Figure 1, with only two resistors, one capacitor, and one logic gate, is offered as a small, but still noticeable, further improvement in the breed.

Figure 1 NC (normally closed) push-to-open momentary pushbutton switches connected in series are the basis for an unusually simple digital pot interface.

Here’s how it works.

Figure 1’s series connection of control switches lets them share a single pullup resistor. Pushing either the DOWN or UP button releases R1, pulls up R2, and begins charging C1. The resulting ~5ms low-pass bounce-filter connection to Schmitt inverter U1’s pin 1, generates a debounced, clean, and sharp pot clock edge on U1 pin 2. This will either increment or decrement the pot setting.

Which action actually happens depends, of course, on which button got pushed. Pushing UP pulls up and asserts U2’s U/-D pin 2, making the clock pulse increment the pot’s setting. Pushing DOWN leaves it low and the pot therefore decrements. The R2C1 debounce delay gives any initial pin 2 switch bounce adequate time to rattle around, settle down, set up, and stabilize before the clock drops and U2 samples it.

Releasing the button discharges C1. The associated R2C1 debounce timeconstant and Schmidt trigger action keep the discharge ramp and clock pin transition as clean and snappy as was the charge side. This is of course necessary if we’re going to avoid generating spurious trailing clock transitions that would corrupt the pot setting. Which we would never allow.

And that’s it. Which might just possibly be as simple as it can get. But I wouldn’t bet on it.

Stephen Woodward‘s relationship with EDN’s DI column goes back quite a long way. Over 200 submissions have been accepted since his first contribution back in 1974.  They have included best Design Idea of the year in 1974 and 2001.

Related Content

• DPOT push up/down
• Push to increase, decrease a digital potentiometer
• Extend monolithic programmable-resistor-adjustment range with active negative resistance
• Op-amp wipes out DPOT wiper resistance
• Dpot pseudolog + log lookup table = actual logarithmic gain

The post Wire pushbuttons in series to simplify DPOT up/down circuit appeared first on EDN.