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Efficient digitally regulated bipolar voltage rail booster

EDN Network - 5 hours 39 min ago

The challenge of improving analog/digital accuracy by preventing amplifier saturation in systems supplied with only a single logic-level power rail has been receiving a lot of activity and design creativity recently. Voltage inverters generating negative rails for keeping RRIO amplifier output circuitry “live” at zero have received most of the attention. But frequent and ingenious contributor Christopher Paul points out that precision rail-to-rail analog signals need similar extension of the positive side for exactly the same reason. He presents several interesting and innovative circuits to achieve this in his design idea “Parsing PWM (DAC) performance: Part 2—Rail-to-rail outputs”.

Wow the engineering world with your unique design: Design Ideas Submission Guide

The design idea presented here addresses the same topic but offers a variation on the theme. It regulates inverter output through momentary (on the order of tens of microseconds) digital shutdown of the capacitive current pumps instead of post-pump linear regulation of pump output. This yields a very low quiescent, no-load current draw (<50 µA) and achieves good current efficiency  (~95% at 1 mA load current, 99% at 5 mA)

Figure 1 shows how it works.

Figure 1 Direct charge pump control yields efficient generation and regulation of bipolar beyond-the-rails voltages.

Schmidt trigger oscillator U1a provides a continuous ~100 kHz clock signal to charge pump drivers U1b (positive rail pump) and U1c (negative rail). When enabled, these drivers can supply up to 24 mA of output current via the corresponding capacitor-diode charge pumps and associated filters: C4 + C5 for the positive rail, C7 + C8 for the negative. Peak-to-peak output ripple is ~10 mV.

Output regulation is provided by the charge pump control from the temperature compensated discrete transistor comparator Q1:Q2 for U1c on the negative rail and Q3:Q4 for U1b on the positive. Average current draw of each comparator is ~4 µA, which helps achieve those low power consumption figures mentioned earlier. Comparator voltage gain is ~40 dB = 100:1.

The comparators set beyond-the-rails voltage setpoint s in ratio to +5 V of:

= -5 V*R4/R5 for the negative rail = -250 mV for values shown
+ = 5 V*R2/R5 for the positive = +250 mV for values shown

Note that the output of the Q1:Q2 comparator is opposite to the logic polarity required for correct U1c control. Said problem being fixed by handy inverter U1d.

Stephen Woodward’s relationship with EDN’s DI column goes back quite a long way. Over 100 submissions have been accepted since his first contribution back in 1974.

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How Intelligent Power Modules Are Making Heat Pumps Smarter

ELE Times - 6 hours 59 min ago

The demand for more efficient power semiconductors is on the rise as businesses adapt to a low-carbon future. Minimizing the overall cost and footprint of the system while enhancing efficiency is a crucial objective that needs to be considered while developing power semiconductor solutions. Intelligent power modules (IPMs) are one such solution that has gained significant attention in the heat pump market. These compact and highly integrated modules provide high power density and advanced control and monitoring capabilities, making them an ideal choice for heat pumps.

The Importance of Heat Pumps

According to Eurostat data, about 50% of all energy consumed in the European Union (EU) is used for heating and cooling, and more than 70% still comes from fossil fuels (mostly natural gas). In the residential sector, around 80% of the final energy consumption is used for space and water heating.

Heat pumps (Figure 1) can deliver heating, cooling, and dehumidification needs and are a proven and sustainable solution for heating powered by electricity. They are an environmentally friendly option for your home and office, helping us move away from fossil fuels to more renewable energy technologies. With global concerns about energy security and climate commitments, heat pumps are emerging as the primary tool for decarbonization in space and water heating systems.

The number of heat pumps installations globally will rise from 180 million in 2020 to around 600 million in 2030, according to the International Energy Association (IEA). At least three times more efficient than traditional fossil fuel boilers, heat pumps are preferred and its installation in individual buildings is forecasted to rise from 1.5 million per month currently to around 5 million by 2030 (Source: IEA). In the U.S., the Inflation Reduction Act includes tax credits and rebates that can cover up to 100% of the costs, depending on household eligibility.

  How Heat Pumps WorkFigure 1: How Heat Pumps Work The Role of IPMs in Heat Pump Efficiency

Intelligent power modules (IPMs) are crucial in controlling the power flow to inverter compressors and fans in heat pump systems. (Figure 2) These modules adjust the frequency and voltage of power supplied to three-phase motors and contribute to achieving higher energy efficiency standards for compressors and pumps. For example, coolers using IPMs for their inverter systems reduce power by 30% compared to non-inverter systems.

IPMs are prevalent in various applications and systems. Owing to their high level of integration, whether in the power stage, drivers, or protections, IPMs allow for shorter development phases.

 Three Phase Heat Pump Block DiagramFigure 2: Three Phase Heat Pump Block Diagram

onsemi has recently unveiled a new family of 1200 V SPM31 IPMs, setting a new standard for three-phase inverter applications. This groundbreaking technology not only addresses the growing need for energy efficiency but also focuses on reducing system costs and improving overall performance. With new and improved features, the SPM31 IPMs are a game-changer in the heat pump market.

  1200 V SPM 31 IPMsFigure 3: 1200 V SPM 31 IPMs Enhanced Efficiency and Power Density

The SPM31 IPMs incorporate the latest 7th generation of IGBT Field Stop (FS7) technology, making them highly efficient and robust. The well-optimized active cell design and buffer profile, coupled with narrow electrical parameter distribution, eliminates short circuit oscillation in both single and parallel device operations. This technology uses a submicron trench gate cell pitch that increases channel density to reduce the conduction losses. The gate capacitance is optimized for smooth switching waveforms and low switching losses. On the emitter side, multiple FS layers enhance blocking capability and reduce drift layer thickness, resulting in lower conduction and switching energy losses. The FS7 IGBT development focuses on optimizing both Vcesat and Eoff to achieve state-of-the-art device performance.

This technology results in minimized EMI, up to 10% a remarkable reduction in power losses, up to 9% increase in power density, and a 20% size reduction in IGBT chip die size compared to previous generation products. As a result of the improved power density, designers can use a simplified layout to free up valuable space in the heat pump system while improving efficiency. The SPM31 IPMs are available in multiple current rating line-ups ranging from 15 to 35 Amps (A).

 SPM 31 IPMs SizeFigure 4: SPM 31 IPMs Size Advanced Features for Reliable Operation

onsemi’s SPM31 IPMs come equipped with an array of advanced features to ensure reliable operation. The modules include gate driver ICs and various on-module protection features, such as:

  • Under-Voltage Lockouts: The SPM31 IPMs protect against low voltage conditions that can cause unpredictable operation or even damage to the system.
  • Over-Current Shutdown: This feature provides protection against excessive current flow, which can cause permanent damage to the system.
  • Thermal Monitoring: The SPM31 IPMs can accurately sense temperature, allowing for proper thermal management and preventing overheating.
  • Fault Reporting: The modules can detect and report various faults to the system, providing early warning signs for potential issues.

Additionally, the SPM31 IPMs use a direct bond copper substrate (Figure 5), providing superior thermal performance. These features enhance the robustness of the modules and contribute to their suitability for a wide range of applications. The versatility of the SPM31 IPMs makes them an ideal choice for various inverter drive applications including HVAC, heat pumps, variable frequency drives (VFD), industrial pumps and fans, and servo motors.

 SPM 31 IPM Cross SectionFigure 5: SPM 31 IPM Cross Section

Alongside the SPM31, onsemi has a versatile IPM product portfolio. (Figure 6)

 IPM ApplicationsFigure 6: IPM Applications

The adaptability of these modules showcases their potential to revolutionize multiple industries by providing efficient and compact solutions.

A Leap Forward for Heat Pump Applications

The SPM31 IPMs are a significant advancement for heat pumps. The IPMs provide a compact, high-performance solution that helps engineers design more efficient, reliable, and cost-efficient systems for industrial applications.

The post How Intelligent Power Modules Are Making Heat Pumps Smarter appeared first on ELE Times.

EU-funded Chips JU selects four new pilot lines to be implemented in Europe

Semiconductor today - 9 hours 42 min ago
Chips Joint Undertaking (Chips JU) has announced the successful evaluation of the submitted semiconductor pilot line proposals and has started negotiations with four consortia, targeting the signing of corresponding agreements later this year. The step aims to catalyse innovation in the region and reinforce Europe’s technological leadership on the global stage...

Vishay launches 440mcd blue and 2300mcd true green surface-mount LEDs in MiniLED package

Semiconductor today - 10 hours 32 min ago
Vishay Intertechnology Inc of Malvern, PA, USA has introduced new blue and true green surface-mount LEDs in the ultra-compact MiniLED package. Measuring 2.2mm x 1.3mm x 1.4mm, the Vishay Semiconductors VLMB2332T1U2-08 blue and VLMTG2332ABCA-08 true green LEDs utilize the latest ultra-bright indium gallium nitride (InGaN)-on-sapphire chip technology to achieve typical luminous intensities at 20mA of 440mcd and 2300mcd, respectively, which is up to four times higher than previous-generation solutions in PLCC-2 packages...

Singulus develops TIMARIS STM coating system for micro-LED production

Semiconductor today - 10 hours 56 min ago
Singulus Technologies AG of Kahl am Main, Germany (which makes production equipment for the optical disc and solar sectors) has introduced the TIMARIS STM modular high-vacuum sputtering system, which is said to offer significant progress in micro-LED manufacturing. The first TIMARIS STM system has already been sold and delivered...

EPR spectrometer and its AWG and digitizer building blocks

EDN Network - 13 hours 45 min ago

A new electron paramagnetic resonance (EPR) spectrometer aims to open the technology to a larger pool of scientists by making it cheaper, lighter, and easier to use without needing an experienced operator. Its control software—designed to be intuitive with several automated features—makes the set-up straightforward and doesn’t require an expert in EPR spectroscopy to obtain results.

EPR or electron spin resonance (ESR) spectroscopy, while quite similar to nuclear magnetic resonance (NMR) spectroscopy, examines the nature of unpaired electrons instead of nuclei such as protons. It’s commonly used in chemistry, biology, material science, and physics to study the electronic structure of metal complexes or organic radicals.

Figure 1 The new EPR spectrometer is modular in design and is smaller, lighter, and cheaper than traditional solutions. Source: Spectrum Instrumentation

However, EPR spectrometers are commonly built around massive electromagnets, so they can weigh over a ton and are usually placed in basements. Bridge12, a startup located near Boston, Massachusetts, claims to have produced an EPR spectrometer that is about half the cost of current instruments and a tenth of the size and weight so that it can be placed on any floor of a building (Figure 1).

The new EPR spectrometer is built around two basic building blocks: an arbitrary waveform generator (AWG) to generate the pulses and a digitizer to capture the returning signal. These building blocks are implemented as cards supplied by German firm Spectrum Instrumentation, making the design modular and flexible for end users.

First, an AWG generates 10 to 100-ns long pulses in the 200 to 500 MHz range as required by the experiment, which are then first up-converted to 10-GHz X band range using an RF I/Q mixer and then up-converted to the Q band range. The microwave pulses are then fed into a 100-W solid-state amplifier before being sent to the EPR resonator.

Next, the reflected signal is down-converted to an IF frequency in the 200 to 500 MHz range and sent to the digitizer. Unlike the traditional EPR spectroscopy, where the signal is down-converted to DC, this new approach drastically reduces noise and artifacts.

Figure 2 shows an example of AWG-generated pulses used in an EPR experiment. See WURST (Wideband, Uniform Rate, Smooth Truncation) pulses, which are broadband microwave pulses with an excitation bandwidth and profile that exceeds that of a simple rectangular pulse by far. These pulses facilitate broadband excitation in EPR spectroscopy while heavily relying on the performance of the AWG.

Figure 2 The AWG-generated WURST pulses are displayed in an EPR spectroscopy experiment. Source: Spectrum Instrumentation

The modular design of this EPR spectrometer built around AWG and digitizer cards is integrated into Netboxes, which can be connected to a PC through Ethernet. So, a compact PC can replace a system that is big enough to insert cards, which inevitably leads to a bulky rack solution. As a result, it’s much easier to service EPR spectrometer and replace components in the field.

Another noteworthy design feature of this new EPR spectrometer relates to the much smaller, super-conducting magnet to produce the required magnetic field strength. EPR spectrometers usually use huge, heavy electromagnets to generate intense magnetic fields in the order of 1 to 1.5 Tesla.

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TriEye and Vertilas demo 1.3µm VCSEL-driven SWIR sensing solutions

Semiconductor today - Wed, 04/17/2024 - 19:51
A collaboration between TriEye Ltd of Tel Aviv, Israel and Vertilas GmbH of Garching bei München, Germany has led to the development of a joint technology demonstrator that integrates TriEye’s Raven short-wave infrared (SWIR) image sensor with Vertilas’ indium phosphide (InP) vertical-cavity surface-emitting laser (VCSEL) technology. Adopting high-volume, scalable manufacturing strategies, the technologies are said to provide cost-effective solutions for both consumer and industrial markets...

Practical tips for automotive ethernet physical layer debug

EDN Network - Wed, 04/17/2024 - 17:36

Automotive ethernet is increasingly utilized for in-vehicle electronics to transmit high speed serial data between interconnected devices and components. Due to the relatively fast data rates, and the complexity and variation of the networked devices, signal integrity issues can often arise. This article outlines several real-world challenges and provides insight into how to identify and debug automotive ethernet physical layer signal integrity problems using an oscilloscope. The following is a case study of automotive ethernet debugging performed at Inspectron, a company that designs and manufactures borescopes, embedded Linux systems, and camera inspection tools.

Automotive ethernet hardware debug configuration

The automotive ethernet signal path is bi-directional (full duplex on a single twisted pair), so hardware transceivers must be able to discern incoming data by subtracting their own outbound data contributions from the composite signal. If one were to directly probe an automotive ethernet data line, a jumbled superposition resembling a bus collision would be acquired. To make sense of the individual signals being sent, bi-directional couplers can be used.

Figure 1 shows the hardware configuration used to debug an automotive ethernet setup. The two automotive ethernet devices under test (DUTs) are a ROCAM mini-HD display and a Raspberry Pi (with a 100Base-TX to 100Base-T1 bridge). The Raspberry Pi is used to simulate an ethernet camera. The twisted pairs from the DUTs are attached to adapter boards which break out the single 100 Ω differential pair into two 50 Ω single-ended SMA connectors. Each DUT has its pair of SMA cables connected to a calibrated active breakout fixture (Teledyne LeCroy TF-AUTO-ENET). The breakout fixture maintains an uninterrupted communication link, while two calibrated and software-enhanced hardware directional couplers tap off the traffic from each direction into separate streams which isolate the automotive ethernet traffic from each direction for analysis on the oscilloscope.

Figure 1 (a) The hardware configuration used to debug an automotive ethernet setup involves two DUTs, passive fixtures to adapt from automotive ethernet to SMA, and a calibrated active breakout fixture with bi-directional couplers to isolate traffic from each direction. The oscilloscope will analyze both upstream and downstream traffic. (b) The block diagram of the test setup. Source: Teledyne LeCroy

Identifying where signal loss occurs

Intermittent signal loss occurred between the ROCAM mini-HD display and the Raspberry Pi. One method to capture an intermittent loss of data transmission is a hardware Dropout trigger. In Figure 2, a Dropout trigger is armed to trigger the oscilloscope if no signal edge crosses the threshold voltage within 200 nanoseconds (ns). The two Zoom traces scaled at 200 ns/div show the trigger point one division to the right of the previous automotive ethernet edge. A loss of signal occurred for approximately 800 ns before data transmission recommenced. Note that since automotive ethernet 100Base-T1 is a three-intensity level (+1, 0, -1) PAM3 signal, the eye pattern with over 192,000 bits in the eye still shows good signal integrity (data dropout blends in with “0” symbols), but the Zoom traces at the Dropout trigger location reveal the location of signal loss.

Figure 2 The eye pattern shows a clean automotive ethernet 100Base-T1 signal, while the Dropout trigger identifies and locates a signal loss event. Source: Teledyne LeCroy

Amplitude modulation of serial data

Anomalous amplitude modulation or baseline wander issues can often be caught by triggering at a high threshold, slightly above the logic +1 voltage level (for the non-inverting input from the split differential signal). Intermittent anomalous amplitude modulation occurred on the automotive ethernet signal, and an instance was captured with the edge trigger set slightly above the highest expected voltage level, shown in Figure 3. The red histogram with three peaks, taken from a vertical slice through the eye diagram in the center of the symbol slot, show an asymmetry in the statistical distribution of the lowest and highest of the three voltage levels; this is due to the intermittent anomalous amplitude modulation of the signal. There is also an asymmetry of the eye width between the upper and lower eyes, identified in the eye measurement parameter table below the waveforms.

Figure 3 The three red histograms in the lower right grid show an asymmetry in the eye pattern due to intermittent anomalous amplitude modulation. The edge trigger raised to a high voltage threshold, catches an instance of the anomalous amplitude modulation. Source: Teledyne LeCroy

Intermittent amplitude reduction of signal

During the debug process, a malfunction was detected in which the amplitude of the signal would drop to 50% of the expected level. This problem was initially detected with the eye pattern, in which there was a collapse of the eye. In order to detect the location in time where the problem occurred, a dropout trigger was set with a threshold level at approximately 80% of the amplitude of the automotive ethernet signal. When the signal dropped to half amplitude, the Dropout trigger caught the event, showing the amplitude reduction at the point of occurrence. Zoom traces superimposed over the original waveform captures shows poor signal integrity in the time domain traces, which is also indicated in the collapsed eye.

Figure 4 The location of occurrence of the automotive ethernet amplitude reduction is caught using the Dropout trigger with a threshold set to approximately 80% of the waveform amplitude. The poor signal integrity of the reduced amplitude signal is shown in both the eye pattern and in the time synchronized Zoom traces. Source: Teledyne LeCroy

Addressing real-world automotive ethernet scenarios

Physical layer problems in automotive ethernet designs can be elusive and difficult to detect. This article outlined several real-world scenarios which occurred during the implementation of an automotive ethernet network with specific techniques used to identify each type of problem and where in time it occurred. This was accomplished using a combination of triggering, Zooms, eye patterns, statistical distributions, and measurement parameters.

Dave Van Kainen is a Founding Partner of Superior Measurement Solutions and holds a BSEE from Lawrence Tech.

Mike Hertz is a Field Applications Engineer at Teledyne LeCroy and holds a BSEE from Iowa State and an MSEE from Univ. Arizona.

Patrick Caputo is Chief Product Architect at Inspectron, Inc., and holds dual BSs in EE and Physics and an MS in ECE from Georgia Tech.

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Infineon provides Shanghai-based FOXESS with power semiconductors

Semiconductor today - Wed, 04/17/2024 - 16:39
Infineon Technologies AG of Munich, Germany is supplying its power semiconductor devices to inverter and energy storage system maker FOXESS of Shanghai, China (founded in 2019). Specifically, Infineon will provide CoolSiC MOSFETs 1200V, which will be used with EiceDRIVER gate drivers for industrial energy storage applications. At the same time, FOXESS’ string photovoltaic (PV) inverters will use Infineon’s IGBT7 H7 1200V power semiconductor devices...

Thank you for the comments on my first circuit! Got a little carried away today. Astable, monostable and bistable circuits with a switch and some gates!

Reddit:Electronics - Wed, 04/17/2024 - 12:11
Thank you for the comments on my first circuit! Got a little carried away today. Astable, monostable and bistable circuits with a switch and some gates!

Next I want to look into making some registers, and maybe solder some cable with pins to act as a bus. Also want to buy smaller resistors, they are HUGE

submitted by /u/josufh
[link] [comments]

Challenges in designing automotive radar systems

EDN Network - Wed, 04/17/2024 - 04:39

Radar is cropping up everywhere in new car designs: sensing around the car to detect hazards and feed into decision making for braking, steering, and parking and in the cabin for driver and occupancy monitoring systems. Effective under all weather conditions, now high-definition radar can front-end AI-based object detection, complementing other sensor channels to further enhance accuracy and safety.

There’s plenty of potential for builders of high value embedded radar systems. However, competitively exploiting that potential can be challenging. Here we explore some of those challenges.

Full system challenges

Automotive OEMs aren’t simply adding more electronic features to new vehicles; they are driving unified system architectures for their product lines to manage cost, simplify software development and maintenance, and enhance safety and security.

So, more compute and intelligence are moving into consolidated zonal controllers, communicating on one side between relatively small sensor units and processors within a small zone of the car, and on the other side, between zonal controllers and a central controller, managing overall decision making.

Suppliers aiming at automotive radar system markets must track their solution architectures with these changes, providing scalability between relatively simple processing for edge functions and more extensive capability for zonal or central controllers, while being flexible to adapt to different OEM partitioning choices.

One important implication is that however a solution might be partitioned, it must allow for significant amounts of data to be exchanged between edge, zonal, and central compute. Which raises the importance of data compression during transmission to manage latency and power.

In addition to performance, power and cost constraints, automotive systems must also factor in longevity and reliability. The full lifetime of a car may be 10, 20 or more years during which time software and AI model upgrades may be required to fix detected problems or to meet changing regulatory requirements.

Those constraints dictate a careful balance in radar system design between the performance/low power of hardware and the flexibility of software to adapt to changes. Nothing new there, but radar pipelines present some unique demands when compared to vision pipelines.

Pipeline challenges

A full radar system flow is shown in the figure below, from transmit and receive antennae all the way to target tracking and classification. Antennae configurations may run from 4×4 (Tx/Rx) for low-end detection up to 48×64 for high-definition radars. In the system pipeline following the radar front-end are FFTs for computing first range information and then Doppler information. Next is a digital beamforming stage to manage digital streams from multiple radar antennae.

A complete radar system pipeline spans from transmit/receive antennae all the way to target tracking and classification. Source: Ceva

Up to this point, data is still somewhat a “raw signal”. A constant false alarm rate (CFAR) stage is the first step in separating real targets from noise. Angle of Arrival (AoA) calculations complete positioning a target in 3D space, with Doppler velocity calculation adding a 4th dimension. The pipeline rounds out with target tracking, using for example an Extended Kalman Filter (EKF), and object classification typically using an OEM-defined AI model.

OK, that’s a lot of steps, but what makes these complex? First, the radar system must support significant parallelism in the front-end to handle large antennae arrays pushing multiple image streams simultaneously through the pipeline while delivering throughput of between 25 and 50 frames per second.

Data volumes aren’t just governed by the number of antennae. These feed multiple FFTs, each of which can be quite large, up to 1K bins. Those conversions stream data ultimately to a point cloud, and the point cloud itself can easily run to half a megabyte.

Clever memory management is critical to maximizing throughput. Take the range and Doppler FFT stages. Data written to memory from the range FFT is 1-dimensional, written row-wise. The Doppler FFT needs to access this data column-wise; without special support, the address jumps implied by column accesses require many burst-reads per column, dramatically dropping feasible frame rates.

CFAR is another challenge. There are multiple algorithms for CFAR, some easier to implement than others. The state-of-the-art option today is OS-CFAR—or ordered statistics CFAR—which is especially strong when there are multiple targets (common for auto radar applications). Unfortunately, OS-CFAR is also the most difficult algorithm to implement, requiring statistics analysis in addition to linear analysis. Nevertheless, a truly competitive radar system today should be using OS-CFAR.

In the tracking stage, both location and velocity are important. Each of these is 3-dimensional (X,Y,Z for location and Vx,Vy,Vz for velocity). Some EKF algorithms drop a dimension, typically elevation, to simplify the problem; this is known as 4D EKF. In contrast, a high-quality algorithm will use all 6 dimensions (6D EKF). A major consideration for any EKF algorithm is how many targets it can track.

While aircraft may only need to track a few targets, high-end automotive radars are now able to track thousands of targets. That’s worth remembering when considering architectures for high-end and (somewhat scaled down) mid-range radar systems.

Any challenges in the classification stage are AI-model centric, so not in range of this radar system discussion. These AI models will typically run on a dedicated NPU.

Implementation challenges

An obvious question is what kind of platform will best serve all these radar system needs? It must be very strong at signal processing and must meet throughput goals (25-50 fps) at low power, while also being software programmable for adaptability over a long lifetime. That argues for a DSP.

However, it also must handle many simultaneous input streams, arguing for a high degree of parallelism. Some DSP architectures support parallel cores, but the number of cores needed may be overkill for many of the signal processing functions (FFTs for example), where hardware accelerators may be more appropriate.

At the same time, the solution must be scalable across zonal car architectures: a low-end system for edge applications, feeding a higher end system in zonal or central applications. It should provide a common product architecture for each application and common software stack, while being simply scalable to fit each level from the edge to the central controller.

Tomer Yablonka is director of cellular technology at Ceva’s mobile broadband business unit.

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PhotonVentures’ second fundraising round of €15m raises total to €75m

Semiconductor today - Tue, 04/16/2024 - 19:39
Independent deep-tech venture capital fund PhotonVentures says that its second fundraising round of over €15m has been completed, bringing the fund’s total to the targeted €75m, following the first €60m round led by PhotonDelta and private investors...

Measuring pulsed RF signals with an oscilloscope

EDN Network - Tue, 04/16/2024 - 16:10

RF signals historically are measured using spectrum analyzers, at least that was before oscilloscopes offered sufficient bandwidth for those measurements. With oscilloscope bandwidths over 100 GHz, RF measurements are no longer the exclusive domain of the spectrum analyzer; this is especially true for pulsed RF measurements, where the time domain measurements of an oscilloscope have several advantages. This article will focus on the time measurements of pulsed RF signals.

Many devices use pulsed RF signals. The obvious ones are echo-ranging systems like radar. Additionally, nuclear magnetic resonance (NMR) spectrometers and magnetic resonance imaging (MRI) systems use pulsed RF. Even automotive keyless entry systems use pulse-modulated RF signals. 

Pulsed RF signals

Pulsed RF signals are created by gating a continuous wave (CW) RF source, as shown in Figure 1.

Figure 1 Pulsed RF signals can be generated by gating a CW RF source using a switch controlled by a gate signal pulse train. Source: Arthur Pini

The carrier source is a continuous wave oscillator. It is gated by a switch driven by the gating signal pulse train. This is a multiplication operation with the carrier multiplied by the gate signal. When the gating signal is high, the switch outputs RF; when low, the output is zero. The 350 MHz carrier is shown in the upper left grid. A horizontally expanded zoom view (left center grid) shows the details of the carrier waveform. The gating signal (lower left grid) is a logic signal with a zero state at 0 volts and a 1 state of 1 volt. The gate output (upper right grid) shows the RF bursts at periodic intervals related to the gate signal state. A zoom view of one burst (center right grid) provides greater detail of a single burst. Another view with a greater zoom magnification (lower right grid) shows the turn-on details of the pulsed RF signal.

Measurement parameters, just under the display grids, read the frequency (P1) and amplitude (P2) of the carrier as well as the frequency (P3) and pulse width (P4) of the gating signal.

The frequency spectra of pulsed RF signals

Looking at the carrier, gate signal, and gated carrier in the frequency domain provides insight into the modulation process. Oscilloscopes view the frequency domain using the fast Fourier transform (FFT) providing tools similar to a traditional spectrum analyzer. The signals and the FFTs of the three signals are shown in Figure 2.

Figure 2 The three component signals carrier, gating pulse train, and pulse RF output and their FFTs provide insights into the modulation process. Source: Arthur Pini

The carrier (upper left grid), being a sine wave, has an FFT (upper right grid) consisting of a single spectral line at the frequency of 350 MHz. The gate signal (center left grid) is a train of rectangular pulses. The FFT of the gate signal takes the form of a sin(x)/s spectrum. The maximum amplitude occurs at zero Hz making this a baseband spectrum anchored at 0 Hz or DC. The peaks in the spectrum are spaced at the pulse repetition frequency (PRF) of 50 kHz, measured using the relative cursors on the FFT of the gate signal. The cursor readout, under the Timebase annotation box, reads the absolute cursor positions and the frequency difference of 50 kHz. The sin(x)/x response has a periodic lobe pattern where the nulls of the lobes occur at intervals equal to the reciprocal of the gate pulse positive width. Since the positive width of the gate pulse is 3.52 ms, the nulls occur every 283 kHz. These nulls are a little harder to measure with cursors as the spectral peaks every 50 kHz, which does not have 283 kHz as an integral multiple, tend to obscure the nulls.

The gated RF carrier results from multiplying the carrier by the gate signal.  The state of the gate signal determines the output of the gated RF carrier signal. When the gate signal is one, the carrier appears at the gated carrier output. Multiplication in the time domain has a corresponding mathematical operation of convolution in the frequency domain. The result of the convolution operation on the spectra of the carrier and gate signal is shown in the FFT of the gated carrier. The baseband sin(x)/x function of the gate signal is mirrored above and below the carrier spectrum as the upper and lower sidebands of the carrier frequency.

Pulsed RF timing measurements

The timing measurement of pulsed RF signals begins with the pulse bursts. In most of the applications cited, the PRF, pulse width, and duty cycle are of interest. The characteristics of the burst envelope, including the rise time, overshoot, and flatness, may also be desired. These measurements can’t be made directly on the pulse RF signal. To make measurements on the gated carrier, the signal has to be demodulated to extract the modulation envelope and remove the carrier. The demodulation process varies from oscilloscope to oscilloscope, depending on the math processes available. This example used a Teledyne LeCroy oscilloscope which offers three ways to demodulate the gated carrier signal. The first method is to create a peak detector using the absolute value math function and a low pass filter. The second method is to use the optional demodulation function. This math function provides demodulation of AM, FM, and PM signals. The final technique is to use the oscilloscope’s ability to embed a MATLAB script into the math processing chain and use one of the MATLAB demodulation tools. This is also an optional feature in the oscilloscope.

Comparing demodulation processes

Comparing the results for these three methods is interesting. Since the first method can commonly be done with most oscilloscopes that offer an absolute value math function and low pass filtering. The peak detector method was used in this example and the results are shown in Figure 3.

Figure 3 Comparison of the amplitude demodulated signal of the gated carrier and the gated carrier, with measurements of the demodulated envelope from the peak detector based on the absolute math function. Source: Arthur Pini

Using the dual math function, the absolute value of the gated carrier was calculated. The second math function is a low pass filter. The low pass filter cutoff frequency has to be less than the 350 MHz carrier frequency signal, and the filter roll-off has to be sharp enough to suppress the carrier. In this example, a 6th-order Butterworth low pass filter with a cutoff frequency of 125 MHz and a transition width of 100 kHz was used. This oscilloscope has low pass filters available as enhanced resolution (ERES) used for noise suppression as well as a digital filter option. Either low pass filter source can be used. The goal of this operation is to have the demodulated envelope track the peaks of the gated carrier.

The detected envelope of the RF pulse is shown as trace F3 in the lower left grid. Horizontal zoom displays in the upper and lower right grids show the match of the demodulated envelope (blue trace) to the RF burst at two different horizontal scales. The overlaid traces in the lower right grid provide the best view for evaluating the performance of the demodulator. Adjust the low pass filter cutoff to obtain the best fit.

Measurement parameters P6 through P10 read the PRF, width, duty cycle, positive overshoot, and rise time of the demodulated envelope.

The same measurement made using the oscilloscope’s demodulation function is shown in Figure 4.

Figure 4 Measurement of the pulsed RF modulation envelope using the oscilloscope’s optional demodulation math function and comparison with the pulsed RF signal. Source: Arthur Pini

The demodulation function was set up for AM demodulation. The carrier frequency and measurement bandwidth have to be entered. The result shown here is for a bandwidth of 100 MHz. 

The same measurements are performed with very good agreement with the peak detector method. Vertical scales differ due to the different processing operations. Since the parameters being measured use relative amplitude measurements, no effort has been made to rescale the vertical data to a common scale. 

The third method mentioned was the use of a MATLAB script in the oscilloscope’s signal path to demodulate the RF pulse signal. This is shown in Figure 5.

Figure 5 Example of using a MATLAB script to demodulate the Pulsed RF signal.  The MATLAB script used is shown in the popup. Source: Arthur Pini

The MATLAB demod function, available in the MATLAB signal processing toolbox, is used to demodulate the pulsed RF. It is a very simple two-line script requiring the entry of the carrier frequency and oscilloscope sampling rate. The results are consistent with the other methods where the primary difference occurs in the rise time measurement is due to the different filters used in each of the different processes. Comparing the rise time measurements of the demodulated envelope to the rise time of the gate signal, the maximum variation is about 1 % from the rise time of the gate signal. The variation among the three demodulation methods is about 0.2 ns of the nominal 22.67 ns rise time. These three available demodulation methods produce nearly identical results in reading the timing parameters of a pulse RF signal. 

Characterizing pulsed RF signals

The oscilloscope is well matched to the task of characterizing pulsed RF signals. It can render the signals in either the time or frequency domain permitting analysis in both domains. The ability to accurately demodulate the pulsed RF signals enables measurement of the timing characteristics of the pulsed RF signals.

Arthur Pini is a technical support specialist and electrical engineer with over 50 years of experience in electronics test and measurement.

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The post Measuring pulsed RF signals with an oscilloscope appeared first on EDN.

How to Select a Timer on PIC MCUs

ELE Times - Tue, 04/16/2024 - 15:05

Timers are a common peripheral in microcontrollers (MCUs), including PIC MCUs. With so many possible choices, how do you select the right one to use in your application?

Exploring the Versatile World of Microcontroller (MCU) Timers: Applications and Selection Guide

Timers are a ubiquitous peripheral in MCUs. It should come as no surprise that there are a lot of timers, each with their own use case that they excel at. Some timers are designed to be used as part of waveform generation, while others are ideal for pulse counting. In many cases, there is no wrong choice—instead, it will depend on the requirements and resources available. For more information about the timers, please see the linked peripheral pages in the table below.

2*Hardware limit refers to the ability to rollover at an arbitrary value, rather than the maximum count possible. (E.g.: 0x1000 versus 0xFFFF for a 16-bit timer)

Timer 0 (TMR0)

TMR0 can function in 8-bit or 16-bit mode. When in 8-bit mode, the high and low byte of the timer are independent of each other. The timer rolls over when the value set in the high byte matches the low byte. 16-bit mode is a free running timer, where the timer will rollover when it reaches the value 0xFFFF. To prevent data corruption during read/writes, the register is buffered, and only latched on the low byte.

Timer 1/3/5/… (TMR1)

TMR1 is a 16-bit gated timer with support for both synchronous and asynchronous clock signals. When TMR1 is in asynchronous mode, the timer functions in sleep and can generate an interrupt to wake the microcontroller. The timer also contains a gating function which can be used to hold the current value.  To prevent corruption when reading/writing the 16-bit value, the timer can be configured to buffer the counter. The data will be latched on the low byte.

Timer 2/4/6/… (TMR2)

TMR2 is an 8-bit timer that supports one-shot and monostable modes of operation. One-shot mode triggers the timer, then clears the ON bit after reaching the hardware limit. Monostable functions identically to the one-shot mode, except that the ON bit remains set and the timer can be retriggered. TMR2 can be reset or triggered by an external signal.

Signal Measurement Timer (SMT)

The SMT is a large 24-bit timer that supports the following modes:

  • (Windowed/Gated) Counter
  • Capture
  • Time of Flight
  • (Gated) Window Measurement
  • High and Low Measurement
  • Period and Duty Cycle Measurement
  • (Gated) Timer

Note: Values in parentheses are other modes available, e.g.: Windowed Counter, Gated Counter and Counter are all valid modes.

To support these operating modes, the SMT contains four 24-bit registers. The exact behavior of the registers depends on the mode.

Universal Timer (UTMR)

The UTMR is composed of two timer modules that can operate independently of each other, or as one larger timer. The size of the UTMR may vary by device; currently on the PIC18-Q71 family, it is 16-bit per module, or 32-bits if chained together. This timer was designed to contain the functionalities of all legacy timers (TMR0, TMR1 and TMR2).

The UTMR supports both synchronous and non-synchronous clock sources and allows for reading the current count without stopping the timer, even with non-synchronous sources. To control the timer, there are three configurable events: Start, Reset and Stop.

Start events define what starts the timer. The reset event defines what resets the count back to zero. And there is a stop event, which defines what will stop the timer completely. These events can be always enabled, triggered from an input signal or disabled entirely. This enables features like monostable triggering, hardware limits and one-shot operation.

Numerically Controlled Oscillator (NCO)

Note: The size of the NCO (16-bits or 20-bits) may vary, depending on device family.

The NCO is designed to generate a periodic waveform by adding a programmable increment to an accumulated total. When the total overflows, the overflow is kept, and a pulse is generated. The pulse can be a fixed number of input clock cycles in width, or it can be 50% output at the cost of halving the output frequency. While the NCO isn’t designed for measurement, it can be used if the NCO is stopped, read and then restarted.

Capture/Compare/PWM (CCP)

The CCP has three modes—Capture, Compare or Pulse Width Modulation (PWM). The Capture/Compare modes utilize TMR1 while PWM utilizes TMR2.

The Capture mode stores the value in TMR1 when a rising or falling event occurs (depending on operating mode). The Compare mode generates an output when the value in TMR1 matches the set value in the CCP. For PWM mode, TMR2 is 8-bit, but the CCP extends it to 10-bit using the internal oscillator’s prescaler bits.


Note: For PWM that depends on TMR2, see the CCP section.

The 16-bit PWM peripheral is fully standalone—meaning that it does not utilize another system timer, unlike CCP (which depends on TMR2). There are five operating modes for generating PWM:

  • Left Aligned
  • Right Aligned
  • Center-Aligned
  • Variable Aligned
  • Compare

These modes change how the count is used to generate the output. Inside of each instance are slices, each containing two outputs. The outputs share a common frequency but have their own duty cycle registers. Additionally, the peripheral is double buffered for smooth output changes and can be synchronized with other PWM instances.

Watchdog Timer (WDT)/Windowed Watchdog Timer (WWDT)

The WWDT is a special timer designed to detect a deadlock in the microcontroller. A WWDT is a timer that runs the background. Periodically, software must clear it through a special sequence, or it will reset the microcontroller. WDT and WWDT differ only in that the WWDT has a “Window” feature. The “Window” feature can require the clearing sequence to be performed within a certain time window, rather than any time before the timer rolls over. This prevents a deadlock from being undetected by clearing the timer continuously.

Selecting the Timer and Learning More

After understanding the timer peripherals, select which timer closest matches the features needed in the application. In many cases, there are multiple possible timers that can perform the task. In this case, select the simplest timer—this leaves timers with more capabilities available for future use. The device datasheet, application notes and technical briefs go into more detail on how all of these timers operate and the registers associated with them. Code examples that use a specific timer can be found by searching MPLAB Discover.

The post How to Select a Timer on PIC MCUs appeared first on ELE Times.


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