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That’s a Wrap! Thank You for a Successful Industry Tech Days 2021

AAC - Fri, 09/17/2021 - 21:30
ITD 2021 concludes with a bang—and one lucky Digi-Key Electronics Grand Prize Giveaway winner.

Crystal controlled ramp generator

EDN Network - Fri, 09/17/2021 - 21:23

This project originated from the need to produce a linear crystal-controlled ramp signal for an HP 8620C RF sweep oscillator. It is inspired by a previously published ramp generator design [1]. That design though suffered from two issues: it used a non-standard 16.384 MHz crystal oscillator and the fall/return/blanking time of the ramp was zero.

To address the first issue, the ramp generator described here uses a standard 10 MHz clock allowing it to be integrated into an existing test setup. Secondly, most equipment requires a finite time to return to its initial state before starting a new sweep. The design presented in Figures 1 and 2 (see below), overcame these issues. The ramp generator section will be described first as its requirements drove the design of the clock generator.

Ramp Generator

The heart of the ramp generator is a 12-bit digital-to-analogue converter (DAC) driven by binary counters. The DAC is a discrete R-2R type as at the time of development a suitable IC DAC was not available. This is driven by a bank of AND gates (three 74HC08), which are in turn driver by two 74HC393 dual 4-bit binary counters—one half of one is not used. 12 bits gives a maximum possible count of 4096 states. A simplified schematic of the ramp generator is shown in Figure 1.

Figure 1 Ramp generator schematic.

To define the blanking time, the DAC only outputs a ramp for the first 4,000 states. For the remaining 96 its output is held at 0 V, which is sufficient time for the HP 8620C to return to the start frequency and settle. During the ramping phase the AND gates pass the counter outputs to the DAC. During the blanking phase the AND gates are driven low, pulling the inputs to the DAC low and its output to 0 V. A two-input OR gate (two 1N4148 diodes and a resistor) and a five-input NAND gate (74HC30 with three of its input tied together) monitor the output of the counter and drive the common input of the AND gates during blanking. There is also an inverter formed from a NOR gate (74HC02) to produce a positive going blanking pulse which can be used to modulate the Z-input of an oscilloscope.

Wow the engineering world with your unique design: Design Ideas Submission Guide

A resistor-diode switch on the output of the DAC is also enabled during the blanking phase to pull the DAC’s output to 0 V. During the ramping phase, the DAC’s output is amplified by an op-amp to provide the 10 V signal required by the HP 8620C.

The ramp generator can be switched between free-running and external trigger—it is shown in external trigger mode in Figure 1. In trigger mode, a set-reset latch composed of two NOR gates detects the rising edge of the blanking output to reset the 12-bit counter. Only when an external trigger arrives does the set-reset latch reset so that the 12-bit counter can start counting again.

Clock Generator

An internal or external 10 MHz crystal reference is divided down to 12 separate frequencies and selected by a 12-way rotary switch for feeding to the ramp generator. Since the ramp generator only produces a ramp output for the first 4,000 states instead of 4,096, the standard 2, 5, and 10 division ratios of a 74HC390 dual decade counter can be used as shown in Figure 2. The 74HC390 is composed of two separate divide-by-2 and divide-by-5 counters, which are configured as shown. The clock frequency at each output is indicated along with its corresponding sweep time in brackets.

Figure 2 Clock generator schematic.

An exception to the above explanation is the 1 ms sweep time, which requires a 4 MHz clock. The first divider stage is therefore a divide-by-2.5. This is achieved by tapping off the least-significant bit of a divide-by-5 counter. For every five input pulses it produces two output pulses: 000, 001, 010, 011, 100, 000, 001, 010, 011 etc. The duty cycle of this 4 MHz clock will vary cycle-to-cycle leading to minor jitter at 1 ms sweep time, but this will only manifest itself on the least significant bit of the ramp generator counter so is not significant. Alternative divide-by-2.5s are available that have a fixed 50% duty cycle, but are more complex [2]

Results

The measured output waveforms are shown in Figure 3 for the ramp and blanking outputs, where they can be seen to have an exact period of 100 ms and the ramp has a high linearity.

Figure 3 Measured waveforms: ramp output in yellow, blanking pulse in green.

The complete ramp generator was built on stripboard and housed in an equipment case with integrated power supply to form a useful piece of laboratory equipment.

[1] Neil Johnson, “Ramp Generator”, Everyday and Practical Electronics, July 1995, pp. 546-550.

[2] Yongping Xia, “Divide by 2.5”, Electronics World + Wireless World, December 1991, pp. 1051.

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Maximize the accuracy of your oscilloscope measurements

EDN Network - Fri, 09/17/2021 - 19:32

Getting the most out of the accuracy of your oscilloscope is not hard but it takes some attention to detail.  This article looks into a number of ways to improve your measurements.

Use multiple display grids to maintain dynamic range

Consider a common practice that throws away one-quarter of the oscilloscope’s dynamic range, attenuating signals to make them fit on a single common screen as in Figure 1.

Figure 1 If you attenuate acquired signals to make them fit on a single display grid you are throwing away dynamic range.

Digital oscilloscopes are set up to map the full range of their analog to digital converter’s (ADC) to the full or almost full display grid.  If you attenuate the signals from each channel to make them fit in one-quarter of the grid you have thrown away two digital bits of dynamic range. Additionally, offset has to be added to display the trace within the selected two divisions.  There is an offset accuracy specification which adds an additional error source to the readings.

What you should do is use a multiple grid display and place each channel in its own grid.  No attenuation or voltage offset is required, and the signals are displayed at full dynamic range as shown in Figure 2 where a quadrature display shows four grids each at full dynamic range.

Compare the top traces in each figure; notice the lower noise on each signal in Figure 2.  Attenuating the input signal by acquiring it at a higher vertical scale reading reduces the signals vertical displacement but it does not reduce the internal noise in the oscilloscope channel. 

Figure 2 A four grid display with a single channel in each grid displays the waveforms at full dynamic range.

The result is a lower signal to noise ratio.  Look at an overlaid comparison of the signal on channel 1 shown in Figure 3.

Figure 3 Overlaying a signal acquired at 50 mV/division (green trace) with one acquired at 200mV/division (yellow trace).  The yellow trace is broader, less well defined, and noisier.

The trace which was attenuated by a factor of four was acquired at 200 mV/division.  When it is displayed at 50 MV/division it appears with more noise and less resolution.  The unattenuated trace, in green, shows a small perturbation riding on the sine wave that is not visible in the attenuated signal that is due to improved dynamic range.

Not only does the display exhibit this loss of amplitude resolution but the loss affects other measurements as well. The peak-to-peak measurement is very sensitive to noise.  Note that the peak-to-peak reading of the attenuated signal is reading that higher noise level and is 44 mV higher than the signal acquired a 50 mV/division.  The rms levels are very close.  This is because the rms process integrates the signal reducing the measured noise level. 

The higher noise level of the attenuated signal also affects the measurement of its frequency.  Note that the measured uncertainty, as expressed by the standard deviation of the measurement, is twice as great for the attenuated signal. 

Just say no to attenuating signals to fit them on a single grid—use multiple grids display and show each signal at full dynamic range.

More accurate cursor reading

There are three measurement tools available in an oscilloscope: the screen graticule, cursors, and measurement parameters.  Cursors are markers that can be moved over a displayed waveform and record the cursor’s location in time and the amplitude of the waveform at the intersection with the cursor. The accuracy of cursor measurement depends on the user’s ability to place the cursors accurately on the desired point of the waveform.

You can improve the accuracy of cursor placement with several simple tricks.  First is the stop the acquisition while placing the cursors.  The waveform varies from acquisition to acquisition, and you will find it easier to place the cursors if the waveform isn’t changing all the time.  The second, and more important hint is to turn on a zoom trace or traces.  Cursors track in the zoom region and the larger display makes it easier to place the cursors as shown in Figure 4

Figure 4 Cursors track in the zoom traces, use zoom traces, which show an expanded view of the waveform, for more accurate cursor placement.

Not only does the expanded display in the zoom make it easier to see the fine details on the waveform but the rate of change of cursor movement is reduced when the cursor enters the zoomed area.  The slower rate of change provides greater control in placing the cursors.

In the example shown the cursors are to be placed at the zero crossings of the sine wave.  Two zoom views are displayed, one for each crossing.  Cursors are placed manually while monitoring the cursor amplitude in the channel annotation box until the cursor amplitude reads 0 V. 

Note that the measurement parameter P1 measures the mean period of the sine wave as 99.9999 ns compared with the cursor value DX = 100.04 ns.  The measurement parameter has a much higher resolution because it applies dual interpolation operations to the determination of the period. In general, the measurement parameters provide the most accurate measurement results.  Cursors, however, offer a more general measurement capability, there is not a measurement parameter for every measurement event.  Where a measurement parameter exists, it will produce a more accurate result than cursors.

Selective measurements for parameters

Figure 5 shows an example of a waveform that is hard for a standard measurement parameter to make without a little help. The waveform is the gated clock for an I2C serial interface.  The two waveforms are identical, and the frequency parameter will be used to measure the clock frequency using different measurement setups.

Parameter P1 is measuring the frequency of the top trace.  It sees 162 cycles and measures frequencies from 68.518 kHz to 100.298 kHz.  This is not surprising because the waveform’s timing is not uniform.  The value reading of P1 is the frequency of the of the last acquired cycle in the waveform and shows a frequency of 73.281 kHz. Looking at the last cycle in the M2 waveform (green trace) you can see that it is longer than most of the other cycles which accounts for the lower frequency.

Figure 5 The use of measurement gates to selectively measure the frequency of the gated clock waveform.

To solve this issue there are several techniques available in the parameter setup.  The first is gating, as the name implies it allows measurements to be made only between user positioned gates.  Some oscilloscopes use the measurement cursors to gate the parameters measurements.  This Teledyne LeCroy oscilloscope uses a separate set of gate markers shown as dashed lines on the lower (yellow) trace.  The gates are set about the first clock burst and measure the frequency over the eight complete cycles contained.  The frequency parameter, in this case, reads from 99.914 to 100.109 kHz.  The use of measurement gates has successfully limited the range of measurements to just those of the clock and ignored the gaps.  Gating makes the measurement parameters a bit more flexible.

The second measurement tool is acceptance criteria.  This tool allows the parameter to measure all the values but only displays those within a user entered range as shown in Figure 6:

Figure 6 Using parameter acceptance criteria to post only frequency values that are between 99 and 101 kHz.

Acceptance criteria is set up to display only measured frequency values between 99 and 101 kHz in parameter P2.  The number of measurements within the range is 144 compared to the 162 listed in P1 which shows all the measured values. The frequency parameter measures starting with the first positive going edge so there are eighteen gaps in the clock waveform that are included in the measurement which is equal to the difference between the total measured values and the accepted values. It is valid to ask how you know the range of values to use as the acceptance criteria, the next section shows how you can do that.

Track and histograms

A track is a mathematical function, available in some oscilloscopes, which plots parameter values versus time.  In this example it is useful to see what parts of the waveform are associated with the different waveform events.  Figure 7 shows a track based on the frequency parameter.

Figure 7 Examples of the track (F2) and histogram (F1) functions based on the measured frequency parameters.

The track of the frequency parameter appears in trace F2 (red).  The vertical scale of the track is in hertz, units of frequency versus time.  This trace is time synchronous with the source waveform the I2C clock. It shows a pulse waveform with top values of 100.3 kHz and base values of 68.52 kHz.  The top values are uniform in values but the base shows slightly greater values at each end of the track corresponding to the beginning and end of the source waveform.  The track shows where the variation in frequency occurs.  Note that the width of the 100 kHz segments is wider than the width corresponding to the 70 kHz and under sections.  There are more clock pulses in the 100 kHz group.

The trace F1 is a histogram of the frequency parameter.  Histograms are graphical plots showing the number of occurrences within a small range of measured data values plotted against the data value.  It is an estimate of the probability of a measured value occurring. The data values used in the histogram can be acquired sample amplitudes, timing values, or measured parameters.  The histogram of the P1 frequency measurements from the previous section is shown as trace F1 (yellow) in Figure 7

The histogram is in the bottom grid.  The horizontal axis is the measured value, in this case the frequency.  The vertical axis is the number of measured values within a small bin.  The bin size is users selectable.  In this example the horizontal axis is broken into 1000 bins.  So, for the roughly 100 kHz range the bin size is about 100 Hz.  The histogram shows two obvious peaks and two much smaller peaks.  The largest peak is at 100 kHz representing the clock the peak count in the 100 kHz bin is 34 with smaller counts in the adjacent bins, all together the count will be 144.  The one furthest to the left is at 68.6 kHz, this is the frequency of the cycles which include the gaps.  Two smaller peaks are also gap frequencies with values of about 72-73 kHz, which are associated with the parameter measurements at either end of the clock signal.

The structure of the histogram and track, with the bulk of the readings about 100 kHz, provides the information necessary to chose and set the acceptance limits in the parameter measurement. Values below 100 kHz are associated with the gaps in clock bursts and should be excluded from the measurement of the clock frequency.

The track and histogram functions offer tremendous insight into your measurements showing where the measured values original and how the values are distributed by value.

Conclusion

This article has shown several techniques to help improve measurements made on your oscilloscope including maximizing display resolution, cursor placement, and measurement parameters.  For those who are interested, the oscilloscope used was a Teledyne LeCroy LabMaster.  Other oscilloscopes have similar capabilities, but you will have to consult your user’s manual to find the corresponding features.  Track and histogram are most often associated with jitter measurement tools.

Arthur Pini is a technical support specialist and electrical engineer with over 50 years experience in electronics test and measurement.

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Bluetooth audio glasses

Open Electronics - Fri, 09/17/2021 - 19:00

In this project we will see how to build a pair of glasses in which the circuits for Bluetooth headsets are inserted in the frame. Therefore you can listen to music wirelessly while wearing. The circuit consists of three main parts: audio amplifier circuit, bluetooth module and charging module. The TP4056 acts as a charging […]

The post Bluetooth audio glasses appeared first on Open Electronics. The author is Bianchi Gabriele

How to choose reliable capacitors for automotive applications

EDN Network - Fri, 09/17/2021 - 17:52

Choosing a capacitor for reliable performance in today’s automotive electronics requires an examination of several parameters. The performance characteristics of the various capacitor technologies must be understood first. Following this, the automotive environment and specific application must be considered in order to determine the most cost-effective and reliable solution.

This article will look at the characteristics of the four major capacitor dielectric types: tantalum electrolytics, aluminum electrolytics, poly-films, and ceramics. In addition, the automotive environment will be described, and the general categories for automotive applications will be listed.

Figure 1 shows the typical capacitance and voltage ranges for some of the more popular types of capacitor dielectrics. It’s interesting to note that for applications requiring capacitance values from about 0.1 μF to 100 μF, and voltages of less than 50 V, there are several overlapping choices. To further understand the performance characteristics of these various capacitor types, we will need to cover a few of the capacitor basics.

Figure 1 Capacitor technology comparisons highlight overlapping choices with voltage and capacitance value ranges. Source: Vishay

Figure 2 shows the typical dielectric constant (K) and dielectric strength values for the four basic capacitor types. A combination of low K and low dielectric breakdown strength—such as the case with poly-film capacitors—results in low volumetric efficiency. However, physical size is only one characteristic of a given capacitor type. For example, although film capacitors are rather large in size, they offer extremely high efficiency and stable electrical characteristics.

Figure 2 Capacitor dielectric characteristics are critical in making the right design choice. Source: Vishay

The equivalent circuit for any capacitor is shown in Figure 3. The equivalent series resistance (ESR) is the real part of the impedance and represents losses in the capacitor. The ESR value varies with temperature, frequency, and dielectric type. The insulation resistance (IR) determines the amount of DC leakage current that the capacitor passes for a given applied voltage. The leakage current is typically much lower for film and ceramic (electrostatic) capacitors than for tantalum and aluminum (electrolytic) types. DC leakage varies with temperature and the magnitude of applied voltage.

Figure 3 The capacitor equivalent circuit highlights the roles of ESR and IR. Source: Vishay

The formulas provided in Figure 4 mark important capacitor relationships: capacitive reactance, dissipation factor, inductive reactance, and impedance. It’s important to note that the resistor used to model IR is a very high value resistor, so it’s neglected for simplicity in the derivation of overall impedance (Z).

Figure 4 Formulas shown above embody important capacitor relationships. Source: Vishay

Z is important in determining how the capacitor affects incoming signals. During charge/discharge cycles, low ESR is critical for achieving high efficiency, low heating loss, and reliability. Capacitive reactance (XC ) and inductive reactance (XL) tell us something about the energy storage capacity and inductive field generation of the device. Note that when XC and XL are equal, the resonant frequency of the device is achieved. It’s important when choosing a decoupling capacitor to remove AC components/noise from a DC signal. To efficiently remove AC signal components from a DC power rail, select a capacitor with a resonant frequency near the frequency of the unwanted AC noise for minimum impedance and maximum decoupling to ground.

Automotive applications for electronic components can be categorized into six general areas:

  1. Powertrain control: electronic engine, transmission, and emission control. Today’s push toward electric vehicles adds many new opportunities for power conversion and control electronics.
  2. Vehicle control: antilock brakes, active suspension, traction control, power and 4WD steering
  3. Safety, comfort, and convenience: air bag actuators, collision avoidance, climate control, cruise control, and anti-theft
  4. In-car entertainment
  5. Driver information displays and audio warning systems
  6. Diagnostics and repair

Some automotive environmental conditions are more demanding than others. Figure 5 characterizes under-the-hood and passenger compartment conditions.

Figure 5 A sneak peek of the automotive environment highlights under-the-hood conditions. Source: Vishay

Having described the primary automotive environments and applications, we will now look at the four major capacitor technologies and describe the characteristics that will affect circuit performance and long-term reliability.

In the most general of classifications, most capacitors fall into one of two basic categories of construction: electrostatics (poly-films and ceramics) and electrolytics (tantalums and aluminums). Electrostatic capacitors are non-polarized devices that typically exhibit very low ESR and impedance. Electrolytics generally offer higher capacitance values, but are polarized.

Tantalum electrolytics

  • Rated voltage from 2.5 VDC to 63 VDC SMD and 125 V axial leaded. Note: for best reliability, derate the application voltage to 50% of the rated voltage for solid tantalum, and 80% for tantalum polymer and wet slug axial tantalum.
  • Very stable electrical characteristics over time and temperature
  • Capacitance values up to 2,200 μF for SMD and 10,000 μF for axial wet tantalum
  • Surge test/screen and larger SMD case sizes (low ESR and high capacitance)
  • Typical failure rates from 5 FIT to 15 FIT (failures per billion hours) with normal voltage derating

Aluminum electrolytics

  • Rated voltage from 6.3 VDC to 450 VDC for SMD devices and higher voltages for large can styles
  • Available in 85°C, 105°C or 120°C temperature ratings
  • SMD capacitance up to 10 mF
  • No need to surge current screen
  • Aluminum electrolytics have a natural wear-out mechanism that could limit their useful life to 5,000 hours under full-rated voltage and maximum temperature conditions. For 2x longer life, derate to 80% of rated voltage.

Ceramic electrostatics

  • Rated voltage from 6.3 VDC to 5,000 VDC (most usage is 100 V or less); no voltage derating is necessary, but the voltage coefficient of capacitance must be considered. MLCCs may lose up to 40% of their effective capacitance value when operated at or near rated voltage.
  • Operating temperatures may exceed 150°C
  • Non-polar (may be bulk fed for high-speed insertion)
  • Very low ESR and DC leakage
  • Typical failure rates under 1 FIT; typical failure mode is short or parametric shift

Poly-film electrostatics

  • Rated voltage from 16 VDC to 2,000 VDC; no voltage derating necessary.
  • Operating temperatures up to 105°C for most types (125°C for PPS)
  • Ultra-low ESR and DC leakage
  • Typical failure rates under 5 FIT; typically fail open or parametric shift.
  • Surface-mount offerings limited

General selection guidelines

The characteristics listed above will help design engineers make general decisions regarding the choice of a capacitor. Cost, size, and manufacturability are also important factors.

It’s not always easy to determine which capacitor type will best suit a given application. A few general guidelines are offered below for the primary types of circuit applications found in automotive and other electronic circuits.

  1. Power filtering: High capacitance, low ESR, and high-temperature capability—tantalum, aluminum and some ceramics and poly-films
  2. Bulk energy storage: High capacitance, low ESR for quick discharge and pulse applications—tantalum, aluminum and some poly-film
  3. Tuning and timing: Stable capacitance values across temperature and frequency and repeatable under thermal cycle—ceramics (NP0 type) and poly-films
  4. Decoupling and bypass: Very low ESR and good Z characteristics—ceramics and poly-films

Choosing a capacitor is a multidimensional problem; each capacitor type has its own set of characteristics that may make it the most logical choice for a given application. A capacitor’s cost, size, packaging type, and end of life reliability issues are important considerations. With many choices available, it is essential to reference each manufacturer’s specifications for the right capacitor.

Andrew Wilson is senior manager of product marketing at Vishay’s Tantalum Capacitor Division.

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Odyssey announces CEO transition and appointment of John Edmunds as chairman

Semiconductor today - Fri, 09/17/2021 - 17:48
Odyssey Semiconductor Technologies Inc of Ithaca, NY, USA, which is developing high-voltage power switching components based on proprietary gallium nitride (GaN) processing technology, says that co-founder, chief technology officer & board member Rick Brown has been appointed as interim CEO, effective 22 September. He replaces Alex Behfar, who has resigned as CEO, chairman & board member. The firm has initiated a search for a permanent CEO to succeed Behfar...

Infineon Opens High-Tech Chip Factory for Power Electronics on 300-Millimeter Thin Wafers

ELE Times - Fri, 09/17/2021 - 14:56

Infineon Technologies AG today officially opened its high-tech chip factory for power electronics on 300-millimeter thin wafers at its Villach site in Austria under the motto “Ready for Mission Future.” At 1.6 billion euros, the investment made by the semiconductor group represents one of the largest such projects in the microelectronics sector in Europe. The Villach site is one of the world’s most modern fabs and was opened by Infineon CEO Reinhard Ploss, Infineon Austria CEO Sabine Herlitschka along with EU Commissioner Thierry Breton and Austrian Chancellor Sebastian Kurz.

Infineon set the stage for long-term, profitable growth based on energy efficiency and CO2 reduction at an early stage and announced the construction of the chip factory for power electronics (“energy-saving chips”) in 2018. “The new fab is a milestone for Infineon, and its opening is very good news for our customers,” Ploss said. “The timing to create new capacity in Europe could not be better, given the growing global demand for power semiconductors. The last few months have clearly shown how essential microelectronics are in virtually every area of life.

Given the accelerated pace of digitalization and electrification, we expect demand for power semiconductors to continue to grow in the coming years. The additional capacities will help us serve our customers worldwide even better, including long term.”

The global chip-market situation clearly shows how important investments in innovative technologies are for the future. Today, microelectronics is the dominant technology on which all other developments, systems, and technologies in the area of digitalization are based. With the expansion of its production facilities, Infineon is setting an industrial policy milestone in terms of supply security for both European industry and the global market.

First products are currently being shipped

After three years of preparation and construction, the factory was commissioned at the beginning of August, three months ahead of schedule. The first wafers will leave the Villach plant this week. In the first stage of expansion, the chips will primarily be used to meet demand from the automotive industry, data centers, and renewable energy generation of solar and wind power. On the group level, the new factory will give Infineon additional sales potential of around two billion euros per year.

The semiconductors produced in Villach will be used in numerous applications. As a result, the new factory will enable Infineon to serve the growing market for power semiconductors in electric cars, data centers as well as solar and wind energy.

Arithmetically speaking, the annual capacity planned for industrial semiconductors is sufficient to equip solar systems producing a total of around 1,500 TWh of electricity – roughly three times the annual power consumption in Germany.

At the opening, Kurz underscored the new chip factory’s significance, including to his own country. “The Infineon site in Villach is an absolute success story,” he said. “The new chip factory is an economic and technological lighthouse project for all of Austria. I would like to thank all of those responsible for their commitment to our country, which will create an additional 400 jobs. The immense investment of 1.6 billion euros shows that Austria, as a business and technology location, offers excellent framework conditions and the employee know-how that is needed to make them happen. We in the federal government want to continue to invest massively in digitization in order to position ourselves in the best possible way in global competition.”

Sabine Herlitschka, the CEO of Infineon Technologies Austria AG, said: “With this investment, Infineon has demonstrated that it is also possible to build attractive production sites in Europe in the highly competitive microelectronics sector. We are setting new standards with this investment. The energy-saving chips from Villach will become important core elements for the energy transition. We are thus making a relevant contribution to the European Green Deal and beyond. We are ‘Ready for Mission Future.’”

Energy-saving chips for ‘green’ products

Infineon’s products have been contributing to higher energy efficiency and thus to climate protection for years. Infineon’s Villach site plays a crucial role in these solutions as it serves as the global center of expertise for power electronics. These energy-saving chips switch electricity intelligently and minimize the carbon footprint of numerous applications. They reduce energy consumption in household appliances, LED lighting and mobile devices. For example, modern semiconductors can reduce the energy consumption of refrigerators by 40 percent. The energy consumption of lighting in buildings is reduced by 25 percent. With the products manufactured in the new production facility, more than 13 million tons of CO2 can be avoided – thanks to the product mix in Villach. This equals the amount of CO2 that is produced by more than 20 million people living in Europe.

Energy-efficient factory

During the construction of the factory, the company paid particular attention to ways that could further improve its energy balance sheet: 80 percent of the site’s heating requirements will be covered by intelligently recycling the waste heat of the cooling systems, and around 20,000 tons of CO2 will be avoided each year. The extensive use of exhaust air purification systems will cut direct emissions to virtually zero.

Another milestone in terms of sustainable production and circular economy is the production and recycling of green hydrogen. The hydrogen required as a process gas in production will be produced directly on-site in Villach from renewable energy sources starting at the beginning of 2022. This will eliminate CO2 emissions during the original production and transport. This green hydrogen will be recycled after use in chip production and used to fuel public transportation buses. This project of dual-use of green hydrogen is unique in Europe. With the help of these and other measures, the site will make enable the Infineon Group to take a huge stride forward in its effort to become carbon neutral by 2030.

Ultra-modern chip factory links two sites in Europe to form a mega-factory The new chip factory has about 60,000 m² of gross floor space. Production will be gradually ramped up over the next four to five years. More than two-thirds of the 400 additional highly qualified specialists needed to operate the factory have already been hired.

The chip factory is one of the most modern in the world and relies on full automation and digitization. As a “learning factory,” artificial intelligence solutions will be used primarily in the area of predictive maintenance. Networked plants will know at an early stage when they need maintenance thanks to a multitude of data and simulations.

Infineon is going one step farther. Jochen Hanebeck, a member of the Management Board and Chief Operations Officer of Infineon, said: “Infineon now has two large power semiconductor manufacturing sites for 300-millimeter thin wafers, one in Dresden and one in Villach. Both sites are based on the same standardized production and digitization concepts. This allows us to control the manufacturing operations at the two sites as if they were one factory. We increase productivity and create additional flexibility for our customers. This is because we can quickly move production volumes for different products between the sites and thus respond even faster to their needs. With the virtual megafactory, Infineon is setting a new benchmark in 300-millimeter manufacturing. This makes further increases in resource and energy efficiency possible, as well as optimization of the environmental footprint.”

Global pioneer in 300-millimeter thin-wafer technology, power electronics The chips are manufactured on 300-millimeter thin wafers, which at 40 micrometers are thinner than a human hair. Villach is the Group’s center of expertise for power semiconductors and has long been an important innovation site in Infineon’s manufacturing network. It was here that the production of power semiconductors on 300-millimeter thin wafers was developed about 10 years ago. This was then expanded to fully automated volume production at the Dresden site in recent years. The use of this technology brings significant productivity advantages due to the larger wafer diameter and reduces capital expenditure.

The post Infineon Opens High-Tech Chip Factory for Power Electronics on 300-Millimeter Thin Wafers appeared first on ELE Times.

OPTIMUS by Nicomatic Modular Connector Series is Fully EN4165 Compliant for Aerospace and Defence Applications

ELE Times - Fri, 09/17/2021 - 14:14

Nicomatic, the leading manufacturer of high-performance interconnect systems, announces full EN 4165 qualification and certification for its new OPTIMUS by Nicomatic™ modular interconnect series, optimised for PCB and panel connection in harsh-environment, weight and space-constrained aerospace applications.  Fully sealed and offering EMI protection, OPTIMUS connectors are also resistant to high vibration and shock, making them suitable for multiple further applications, including military vehicles, defence avionics and robotics.

Highly versatile, OPTIMUS is a rectangular, modular connector series, available in full standard and full custom layouts, standardised to address increasingly harsh environments.  Designed to meet the requirements of the EN4165 and Arinc 809 standards, OPTIMUS is according to AS/EN 9100 quality management standards. OPTIMUS connectors are fully intermateable and interchangeable with existing EN 4165 solutions.

OPTIMUS interconnects save space when compared to circular connectors, thanks to their slim fit and high density and are also stackable to save space.  PCB adapted, offering efficient PCB fixing, they can be connected directly at the board level.  Robust blind mating and re-alignment in rack and panel saves assembly and maintenance time and maintenance is further simplified as both contacts and modules are removable.

The OPTIMUS ready-to-plug module is the heart of OPTIMUS connector solutions – in a single component, it encompasses several high-level functions for optimal performance in harsh environments.  Industry-leading sealing is achieved in a single operation to perform three main functions: the interfacial seal ensures complete sealing between mated modules and reduces arcing; the peripheral seal ensures sealing between the modules and its shell cavity; the rear grommet compresses around the wires and protects against the ingress of liquid.  OPTIMUS modules feature moulded thermoplastic clips to ensure contact retention and a module retention clip which enables the module to fit in any adapted cavity, either a standard OPTIMUS shell or directly in the application equipment structure itself.

The almost infinite flexibility of OPTIMUS modules is demonstrated by for example, with modules and contacts incorporating size 8 through to size 22 M39029 and EN3155 contacts. Shells are two and four cavity, available in either aluminium 6061 or composite.  Adapted surface treatments to provide salt spray protection are either black nickel (96 hours spray protection) or olive green cadmium (500 hours).

David Carman, Global Business Manager for Nicomatic’s outside of box interconnect products for hi-rel applications in the aerospace and defence markets, comments: “The launch of the EN4165 Optimus range of connectors is an exciting development which will enable expansion into new markets and offer customers the world-class levels of service that Nicomatic is known for. The OPTIMUS range brings Nicomatic’s renowned highly modular approach to customers with challenging aerospace and defence applications that require an EN 4165 solution yet are highly space and weight constrained.”

The post OPTIMUS by Nicomatic Modular Connector Series is Fully EN4165 Compliant for Aerospace and Defence Applications appeared first on ELE Times.

Mouser Electronics Examines Impact of 5G and Edge Computing on Intelligent Transportation Systems in Newest EIT Episode

ELE Times - Fri, 09/17/2021 - 13:22

Mouser Electronics Inc. today releases the fifth installment of the 2021 Empowering Innovation Together (EIT) program. The latest installment offers deeper insight into the trends surrounding intelligent transportation systems through a featured blog, infographic, video, and more.

In the latest podcast episode, Raymond Yin, Mouser’s Director of Technical Content, speaks with Dr. Maxime Flament, CTO of the 5G Automotive Association, about the emergence of industry safety standards. They explore the capabilities of implementing 5G networks into transportation systems and the effects of edge computing in the automotive industry.

“Worldwide, we’re seeing rapidly increasing needs for safe, secure, and intelligent transportation systems,” states Glenn Smith, President, and CEO of Mouser Electronics. “With new developments enabled by technologies like 5G, ultra-wide bandgap, next-gen wireless connectivity, and more, we’re in an era of smart transportation solutions that will change the industry and impact our communities, cities, travel, and more.”

The 2021 EIT series includes four byte-sized videos, Then, Now and Next, as well as articles, blogs, infographics, and other content, with conversations led by Mouser, thought leaders, and other experts. Future tech topics following intelligent transportation solutions will review the latest in product technologies such as RF and wireless. The program showcases multiple new product developments and unveils the technical developments required to stay timely with new trends in the marketplace.

The fifth installment of the 2021 EIT program is sponsored by Mouser’s valued partners Amphenol ICC, Amphenol RF, Digi International, Intel®, KEMET, Microchip Technology, Molex, STMicroelectronics, TDK, and TE Connectivity.

Established in 2015, Mouser’s Empowering Innovation Together program is one of the industry’s most recognized electronic component programs.

As a global authorized distributor, Mouser offers the world’s widest selection of the newest semiconductors and electronic components — in stock and ready to ship. Mouser’s customers can expect 100% certified, genuine products that are fully traceable from each of its manufacturer partners. To help speed customers’ designs, Mouser’s website hosts an extensive library of technical resources, including a Technical Resource Center, along with product data sheets, supplier-specific reference designs, application notes, technical design information, engineering tools, and other helpful information.

Engineers can stay abreast of today’s exciting product, technology, and application news through Mouser’s complimentary e-newsletter. Mouser’s email news and reference subscriptions are customizable to the unique and changing project needs of customers and subscribers. No other distributor gives engineers this much customization and control over the information they receive.

For more information, visit www.mouser.com 

The post Mouser Electronics Examines Impact of 5G and Edge Computing on Intelligent Transportation Systems in Newest EIT Episode appeared first on ELE Times.

Spirent and MultiLane Join Forces to Enable 800G Ecosystem

ELE Times - Fri, 09/17/2021 - 13:07

Spirent Communications plc, the leading provider of test, assurance, and analytics solutions for next-generation devices and networks, today announced that it has partnered with MultiLane, a global leader in data center interconnects, to offer vendor-neutral testing solutions supporting the 800G ecosystem. This milestone is a result of the two companies’ joint mission to enable 800G infrastructure development and adoption, and help the industry resolve testing challenges, no matter the interconnect strategy.

QSFP-DD800 is one of the first port standards that uses individual electrical 100G lanes. The design, optimization, and fabrication of these 100G lanes presents a significant challenge for host and pluggable developers alike. The partnership facilitates the test and verification of QSFP-DD hardware, including transceivers, switches that use these transceivers, and hyperscaler use cases.

“Successful 100G electrical lane design requires novel techniques and robust test procedures,” said Kees Propstra, Vice President of Marketing at MultiLane. “Our joint effort with Spirent to tackle these challenges facilitates the transition to the 800G node, the next frontier in data center interconnects.”

Spirent offers 800G validation solutions for the entire ecosystem, offering interconnect, network equipment manufacturers (NEMs), and hyperscalers multiple options to help implement their 800G solutions, with support for various speed modes including 1x800G, 2x400G, 4x200G and 8x100G. The company helps its customers qualify equipment so they can determine which supplier will best meet their requirements. For partners, Spirent provides a neutral test solution to validate their vendors.

“Spirent has developed a comprehensive, end-to-end 800G testing suite that leverages our decades of experience in Ethernet testing,” said Aniket Khosla, VP of Product Management, Cloud and IP at Spirent Communications. “Our partnership with MultiLane will assure successful deployments of this complex new technology while helping customers improve product quality and ensure reliable, high-quality user experiences.”

With its high-value test solutions like QSFPDD-800 thermal load loopbacks, module/host compliance boards and noise injection Bit Error Rate Testers (BERTs), MultiLane continues to support the rapid development of 800G technologies. In addition, as the pre-eminent Signal Integrity expert, performing extensive research and simulations in the domain of routing and footprint optimization, MultiLane is offering design and consultancy services, of which the partnership with Spirent is a proof point.

While 400G technology is still relatively new, customers are already looking to Spirent and MultiLane for new 800G test solutions to validate high-density, higher-power-consuming applications, as the ecosystem looks to deliver even faster capabilities that can maximize capacity of existing space-limited physical locations.

The post Spirent and MultiLane Join Forces to Enable 800G Ecosystem appeared first on ELE Times.

“Maker Faire Rome – The European edition” returns to the Gazometro Ostiense

Open Electronics - Fri, 09/17/2021 - 12:37

Innovation and the general public in contact again! Thanks to the constant progress of the vaccination campaign, “Maker Faire Rome – The European Edition“, the biggest European event dedicated to innovation, promoted and organised by the Chamber of Commerce of Rome, is back on time again this year, but with the great novelty of reopening […]

The post “Maker Faire Rome – The European edition” returns to the Gazometro Ostiense appeared first on Open Electronics. The author is Boris Landoni

pSemi opens Taiwan branch office

Semiconductor today - Fri, 09/17/2021 - 11:56
Murata company pSemi Corp of San Diego, CA, USA – a fabless provider of radio-frequency integrated circuits (RFICs) based on silicon-on-insulator (SOI) – has announced the opening of a branch office in Taipei City, Taiwan. Building on its existing worldwide supply chain relationships, the Taiwan office joins other pSemi APAC locations in India, Korea, China and Japan. pSemi is actively hiring at locations worldwide...

VIAVI and Capgemini Collaborate on 5G and O-RAN Validation

ELE Times - Fri, 09/17/2021 - 11:55

Viavi Solutions Inc. today announced that Capgemini, a global leader in business and technology transformation, has collaborated with the company through Capgemini Engineering in Portugal to deliver an industry-leading 5G and O-RAN lab test capability, powered by VIAVI’s O-RAN Lab as a Service (LaaS).

The success of 5G open networks depends on both end-to-end performance and core testing. Open networks need to provide the same performance or better than traditional networks for operators to reap the benefits of reduced infrastructure costs, with the added pressure to deliver new functionality faster than ever. Compounding these challenges is the rise of many new entrants in the supply chain, as open networks depend on a diversity of radio types and manufacturers.

To address the burgeoning demand for 5G and O-RAN validation, Capgemini and VIAVI have collaborated to ensure successful network integration in 5G open environments. The VIAVI portfolio of test tools enables comprehensive measurements for the entire network lifecycle, providing functional, system integration and performance testing of gNBs, core networks, core network components and O-RAN subsystems, delivering true end-user QoE visibility.

“Capgemini is at the forefront of 5G and O-RAN innovation, where testing and maintaining the resilience and performance of an entire network chain is crucial. With an ecosystem of both technology and telecom partners and focus on end-to-end solutions for industries, Capgemini is committed to support our clients to take advantage of the 5G and Edge revolution, driving their data-driven transformation towards Intelligent Industry,” said Shamik Mishra, Chief Technology Officer Connectivity, Capgemini Engineering. “We chose to team up with VIAVI to ensure we continue to deliver the best service to our clients, augmenting our 5G Lab As A Service capability in Portugal to reduce time to market and mitigate technical and business risks significantly.”

“VIAVI not only delivers comprehensive 5G and O-RAN test solutions to our diverse customer base, we partner to deliver solutions tailored to their needs. Our leading position in testing new open RAN architectures has been achieved thanks to our history and expertise working with manufacturers and operators and in defining benchmarks for how high-performance networks must operate,” said Ian Langley, Vice President and General Manager, Wireless Business Unit, VIAVI. “We’re delighted to work alongside Capgemini to validate end-to-end network performance, providing test solutions from RAN to Core.”

The post VIAVI and Capgemini Collaborate on 5G and O-RAN Validation appeared first on ELE Times.

Acies and IIM Calcutta Innovation Park Partner to Help Develop the Start-Up Ecosystem

ELE Times - Fri, 09/17/2021 - 11:09

Acies Consulting Pte Ltd and IIM Calcutta Innovation Park (‘IIMCIP’) have agreed to work together to help develop the start-up ecosystem. Under this agreement, Acies and IIMCIP will collaborate to support a vibrant ecosystem to foster entrepreneurship in the social enterprises space. Acies will, through its Ventures-Revolutio program, support start-ups incubated by IIMCIP by providing them access to cutting-edge technology and funding. Acies’ no-code platform Revolutio will help entrepreneurs rapidly build and deploy software and solutions to scale social enterprise.

Through this collaboration, Acies will provide a sandbox for entrepreneurs and start-ups to test, build and scale technology solutions using Revolution. The collaboration will also enable start-ups incubated by IIMCIP to access learning content from Acies LightHouse and receive ongoing support for building applications on Revolution. Start-ups achieving scale will also be get priority for funding by Acies Ventures.

Speaking about this collaboration, Abhinava Bajpai, Head – Acies TechWorks remarked, “We are excited to explore new prospects and new possibilities for enhancement in social enterprise using Revolution. Revolution brings a plethora of opportunities for young entrepreneurs seeking to pursue their dreams and making a positive impact on their communities and society.”

Mr HK Borah, Chief Investment Officer at IIMCIP adds, “At IIMCIP, we always seek to bring forth the best opportunities for our entrepreneurs as they endeavour to build and scale social enterprises. This collaboration with Acies will help our entrepreneurs rapidly scale from idea to enterprise.”

The post Acies and IIM Calcutta Innovation Park Partner to Help Develop the Start-Up Ecosystem appeared first on ELE Times.

World’s First LoRa SoC from STMicroelectronics is Making Farming Smarter

ELE Times - Fri, 09/17/2021 - 10:42

STMicroelectronics, a global semiconductor leader serving customers across the spectrum of electronics applications, has announced a design win for STM32WLE5*, the world’s first LoRa System-on-Chip (SoC). The customer application, developed by automated rubber-tapping specialist CIHEVEA, uses low-power networking to revolutionize the automation of extracting latex from rubber trees. CIHEVEA has equipped more than 200,000 rubber trees within its Hainan rubber-tree plantation with its innovative solution to improve rubber-tapping productivity and output capacity.

The ST LoRa SoC acts as a highly efficient, low-power communication hub and control center for the Rubber Tapping Robot from CIHEVEA. The robot also includes two precision motors and a series of environmental sensors that monitor weather conditions, including temperature, air pressure, and humidity. Clamped to the tree, the STM32WLE5 transmits the sensors’ data to a mesh gateway via a dedicated LoRa application network server, where the server can monitor, test and debug, and coordinate the robots in the field. Once all pre-set conditions are met, the SoC triggers the rubber tapping motors to perform autonomous cutting, which usually happens very early in the morning.

Leveraging the cost-effective, high-efficiency STM32WLE5 and LoRa networking, CIHEVEA’s novel solution increases latex yield by 2-3x while minimizing damage to trees, prolonging the trees’ productive lifespan. In addition to improving yields and extending asset lifetimes, the rubber-tapping robot also resolves chronic labor challenges, as tree tapping can be difficult and dangerous for human workers.

The STM32WLE5 is an ultra-low power multi-modulation wireless SoC microcontroller that combines an Arm Cortex‐M4 core running at 48 MHz, a sub-GHz radio allowing long range connectivity, and a proven collection of ST-designed peripherals. Delivering high-performance while operating from a package as small as 5mm x 5mm (UFBGA), the STM32WLE5 is both cost-effective and meets the robustness and performance requirements of the agriculture industry. The STM32WLEx microcontroller is also an open platform supporting LoRa, (G)FSK, (G)MSK, and BPSK modulations.

“The fully-automatic, intelligent, rubber-tapping system is a revolution for the rubber industry. With the increased use of platform technology and the ability to communicate via the low-power LoRa network technology provided by the STM32WLE5, the smart rubber-plantation platform system is creating a new rubber-plantation ecosystem, moving away from traditional high-intensity, heavy-pollution, inefficient, production methods and is ushering in a new era of green environmental-protection, high-efficiency, digital transformation,” said XU Zhen Kun, Vice Chairman of CIHEVEA.

“While rubber trees are a sustainable source of an important material widely used in industrial, transport, and agriculture sectors, improving rubber-tapping efficiency, and increasing latex yield has long been a goal of rubber producers and using the STM32WL5 and its LoRa networking is a natural fit,” said Arnaud Julienne, Vice President, Microcontrollers and Digital ICs Group, AI/ IoT competence center and Digital Marketing, Asia Pacific Region, STMicroelectronics. “Moreover, our unique and broad portfolio of products and solutions in connectivity, sensing, and large portfolio of power-management and motor-control solutions is well suited to the full range of smart farming domains, including tracking, irrigation systems, tractors, and livestock position and health monitoring.

For more information, visit www.st.com 

The post World’s First LoRa SoC from STMicroelectronics is Making Farming Smarter appeared first on ELE Times.

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