Microelectronics world news

Company will be primary provider of fully optimized power system solution based on onsemi’s latest generation EliteSiC M3e platform

• onsemi and Volkswagen Group sign multi-year deal to supply solution for vehicle lineup across several brands
• onsemi will provide a full stack of silicon carbide technologies as part of an integrated module solution that can scale across all power platforms
• Volkswagen Group will benefit from onsemi’s plans to expand manufacturing in Europe would establish an end-to-end production facility for the traction inverter system

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According to the wisdom of French philosopher Jean-Baptiste Alphonse Karr, “Plus ça change, plus c’est la même chose,” or “The more things change, the more they stay the same.” This adage holds significant relevance in the fast-paced world of the semiconductor industry. Currently, the industry is undergoing a profound technological shift fueled by diverse applications that mandate intricate custom chip designs.

Ground-breaking technologies such as artificial intelligence (AI), autonomous vehicles, edge processing and chiplets are triggering an avalanche of advancements in the semiconductor market. Pioneering technologies are paving the way for high-growth markets, maintaining a competitive edge for products and driving the demand for increasingly sophisticated systems-on-chips (SoCs) to power burgeoning applications.

As a result of design complexity and market competition, innovative chip development strategies have become essential for expedited market entry and revenue growth. Tapping into these technological advances is a strategic imperative to secure market leadership.

The established hybrid design landscape

Over the past two decades, OEMs, Tier 1 suppliers and system designers have embraced a hybrid chip design model, predominantly operating independently. These companies frequently resort to customer-owned tooling (COT) for chip design, subsequently engaging with back-end services companies and wafer production management teams.

The COT model necessitates the recruitment of specialized semiconductor engineers from various disciplines for SoC development—a challenging feat due to the scarcity and steep cost of engineers. To address this need, companies often outsource talent to help manage temporary workload peaks and meet specific skillset demands. However, this workaround may not lead to forming a permanent, skilled team.

Large enterprises and startup companies alike must pay closer attention to the severe financial implications of design errors, which can sabotage budgets and delay market entry. In a recent study, a leading EDA firm reveals that over 60% of all first-time designs require a silicon re-spin. With millions of dollars of NRE on the line each time, plus the cost of delayed time to market, the rising complexity in chip design significantly amplifies the risk of errors, making any mistake potentially career-ending.

Figure 1 A 2020 functional verification study conducted by Siemens EDA and Wilson Research Group shows only 32% of 2020’s designs claimed first-silicon success.

Against this backdrop, the tech landscape continues to experience growth from venture capital-backed startups, particularly in the AI realm. These agile companies often utilize the COT model but face similar hurdles in designing distinctive, complex chips for their products. The technical expertise required to create sophisticated SoCs often exceeds their core competencies.

This underscores the need for experienced partners’ guidance throughout the chip design journey. Also, they frequently cannot source wafers directly from the industry’s leading foundry, TSMC, and instead are routed to a Value Chain Alliance (VCA) partner for mask creation and wafer production management.

These trends are driving a resurgence of ASIC design companies that now focus on “design and supply” services, offering a broad spectrum of technologies for customers to choose from. These firms possess the technical skills to guide customers in making informed selections of third-party IP and comprehend chiplet interconnect requirements, sophisticated SoC power management, 3D packaging, and more.

In short, this minimizes risk with new chip implementations and corresponding financial impacts. So, a new generation of ASIC companies with broad experience and stable engineering teams is emerging, capable of providing solid technology recommendations.

The imperative for a revamped model

Companies can preempt potential setbacks by collaborating with the new generation of ASIC design and supply firms that can manage the entire silicon development process. This necessity is spurring a reevaluation of chip design strategies. The quest for unique differentiation and shorter development cycles is moving companies toward a collaborative relationship with their ASIC design partners.

This shift signals the demand for a new paradigm where companies are seeking alternatives capable of supporting the complete chip ecosystem, from inception to delivery. Adopting an integrated ASIC design and supply model offers significant advantages over traditional ASIC houses and reduces the investment associated with COT models.

An integrated ASIC design and supply model involves cross-functional teams collaborating closely with customers to define the entire semiconductor development and manufacturing process, including packaging, final testing and product lifecycle management.

Today’s SoCs are intricate, multi-billion-transistor devices custom-built for specific applications. The cost of developing such high-end chips can easily exceed $50 million, with the photomask set alone at advanced process nodes ranging from $10 million to $20 million. A collaboration with a technologically advanced, single-source ASIC design house can expedite chip development and help ensure first-time silicon success.

Figure 2 A single-source ASIC design house can expedite chip development and help ensure first-time silicon success. Source: Sondrel

Rich Wawrzyniak, principal analyst for The SHD Group, emphasizes the growing importance of ASIC-class services by stating, “In today’s complex technological landscape, ASIC-class services have become an essential part of the equation for handling advanced semiconductor design implementations.”

In the face of rapidly evolving technologies and the pressure to accelerate time to market, partnering with a single-source ASIC design and supply company appears increasingly beneficial. With its specialization in managing the entire chip development process, such a company can help chip designers architect their future and secure a competitive advantage.

Ian Walsh, Sondrel’s regional VP for America, is based in the company’s U.S. office in Santa Clara, California.

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• It’s Just a Jump to the Left, Right? Shift Left in IC Design Enablement

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Disclosure of Transactions in Own Shares – Period from Jul 15, 2024 to Jul 19, 2024

STMicroelectronics, a global semiconductor leader serving customers across the spectrum of electronics applications, announces full details of its common share repurchase program (the “Program”) disclosed via a press release dated June 21, 2024. The Program was approved by a shareholder resolution dated May 22, 2024 and by the supervisory board.

STMicroelectronics N.V. (registered with the trade register under number 33194537) (LEI: 213800Z8NOHIKRI42W10) announces the repurchase (by a broker acting for the Company) on the regulated market of Euronext Paris, in the period between Jul 15, 2024 to Jul 19, 2024 (the “Period”), of 254,850 ordinary shares (equal to 0.03% of its issued share capital) at the weighted average purchase price per share of EUR 38.2047 and for an overall price of EUR 9,736,472.80.

The purpose of these transactions under article 5(2) of Regulation (EU) 596/2014 (the Market Abuse Regulation) was to meet obligations arising from share option programmes, or other allocations of shares, to employees or to members of the administrative, management or supervisory bodies of the issuer or of an associate company.

The shares may be held in treasury prior to being used for such purpose and, to the extent that they are not ultimately needed for such purpose, they may be used for any other lawful purpose under article 5(2) of the Market Abuse Regulation.

Below is a summary of the repurchase transactions made in the course of the Period in relation to the ordinary shares of STMicroelectronics (ISIN: NL0000226223), in detailed form. 

Transactions in Period

Following the share buybacks detailed above, the Company holds in total 8,767,667 treasury shares, which represents approximately 1.0% of the Company’s issued share capital.

In accordance with Article 5(1)(b) of the Market Abuse Regulation and Article 2(3) of Commission Delegated Regulation (EU) 2016/1052, a full breakdown of the individual trades in the Program are disclosed on the ST website (https://investors.st.com/stock-and-bond-information/share-buyback).

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I’ve been intending for a while now to share my experiences with the first-generation Google Pixel Watch. And, with the second-generation successor already eight months old as I write these words in mid-June 2024, along with rumors of the third-generation offering already beginning to circulate, I figured it was now or never to actualize that aspiration! The two generations are fairly similar; I’ll point out relevant differences in the paragraphs that follow.

The first-gen Pixel Watch (black frame and black rubberized “active” band version shown above; other color combinations also offered, along with accessory bands made from other materials) was unveiled at the 2022 Google I/O conference and entered production that same October. Its development was predated by several key business moves by the company. In January 2019, smartwatch manufacturer (and Google partner) Fossil sold some of its IP to Google as well as transferring part of its R&D team to the acquiring company, all for $40 million. And that same November, Google announced that it planned to spend $2.1 billion to purchase Fitbit, an acquisition that finally closed in January 2021 after a lengthy U.S. Justice Department evaluation of potential antitrust concerns.

Next up, some personal history. As regular readers may remember, I’ve long been an admittedly oft-frustrated user of smartwatches from Google’s various partners (Huawei, LG and Motorola, to be precise), all based on a common Wear OS or precursor-branding Android Wear software foundation. I eventually bailed on them, instead relying on my long-running, Android smartphone-compatible (in contrast to Apple Watches, for example) Garmin and Withings smartwatches. But in doing so I’d foregone any hands-on testing of the newer Wear OS 3 (currently at v4, with v5 enroute) which blended in design elements of the legacy Tizen O/S from Google’s new smartwatch partner, Samsung, along with any personal evaluations of newer smartwatch SoCs from Qualcomm and Samsung.

The Wear OS drought ended when, last September, I saw that not only had Google dropped the price tag of the LTE-enhanced version of the Pixel Watch by $60, to $339.99, it was also tossing in two years of free Google Fi-supplied cellular data service:

After using cellular data for ~9 months now, it’s nice to have but not essential, at least for me. Were I regularly wearing the watch while exercising away from my smartphone, for example, I might feel differently. But given that my Pixel 7s are regularly in close proximity, direct Internet connectivity from the smartwatch isn’t a necessity, plus it incrementally impacts battery life whenever the watch is untethered from the phone and not on a known Wi-Fi network.

About that battery life…when I started using the smartwatch, I struggled to squeeze a full day of between-charges wear out of it. Now, thanks to both Google-supplied software updates and my fine-tuning of the power management settings, I can often go for 30 hours or more. And if I were to disable the twist-wrist-to-turn-on-backlight, relying solely on manual watch face taps to wake up the display, I’d likely be able to stretch the battery life even further.

That said, my Garmin watch only loses ~10% of its battery capacity per day; it’ll run for well beyond a week between charges as long as I’m not activating its GPS subsystem (of course).

And my Withings watch? I intentionally took it instead of the Pixel Watch with me to California last month so that I didn’t need to bother packing a charger; its svelte body is also easier than the alternative long-lasting Garmin to tuck underneath a buttoned-down dress shirt sleeve. Upon my return to Colorado five days later, its stored battery charge still reported 100% full.

By the way, you might have noticed something about the Pixel Watch in the more recent (earlier today, in fact) two on-wrist pictures I took of it. I switched from the default “active” band, which quickly started exhibiting visible usage evidence from being removed from and then reattached to my wrist 1x per day (for recharging), to a stretchable Spigen Lite Fit band. Also, although one of the standard watch faces (the cool-looking, IMHO, Concentric) is shown, I sometimes instead toggle to the third-party Pixel Minimal one I purchased, which (in spite of its seemingly contrary name) lets me squeeze even more info into the display: daily step count, heart rate, date, weather, and battery charge. For obvious reasons I’ve already noted, that last one’s important.

A bit more on the battery. The first-generation Pixel Watch leverages wireless charging, akin to that used by Apple’s various Watch models and generations:

This approach is admittedly convenient. But it’s also slow; it takes ~2 hours to fully charge the watch from a drained state, a not-insignificant percentage of the subsequent wear-before-charge-again time. To wit, the Pixel Watch 2 moved to a more traditional, Fitbit-like multi-pin-based connector, notably (from reviews I’ve seen) boosting charging speed in the process.

And the upcoming Pixel Watch 3, per leaked images, will not only be thicker but also come in a larger-face variant. One benefit of the form factor increase is room inside for a larger, higher capacity battery. Plus, as my wife, now with a Christmas-present Apple Watch Ultra replacement for her soon-obsoleted Series 4 (a pending demise I’d forecasted back when I bought the successor for her) says, “go big or go home” (translation: she likes her watches “chunky”).

Another notably difference between the two Pixel Watch generations is that whereas my first-gen model runs on a Samsung Exynos 9110 dual-core processor, the Pixel Watch 2 switches to a quad-core Qualcomm SW5100 SoC. That said, the performance of mine is perfectly acceptable (that said, I haven’t comparatively tried its successor yet!). Other enhancements with the second-generation model:

• A switch from a stainless steel to lighter aluminum body
• An enhanced-function cardiac sensor suite, and
• New skin temperature and electrodermal activity (EDA) stress sensors

similarly don’t provide sufficient upgrade motivation, at least for me.

In closing, two other oddities of note. For some unknown reason, the Pixel Watch isn’t compatible with the Wear O/S app that comes with Android. Instead, as part of the initial pairing process:

a dedicated Watch app gets installed.

Also, I can’t for the life of me get native Google Wallet support working with the watch:

Again, at worst a minor nuisance, since I usually also have a phone with me. Still…

What are your thoughts on Google’s branded Wear OS smartwatches, both in comparison to alternatives from other Wear OS licensees and those based on other smartwatch operating systems (including Fitbit’s)? Sound off in the comments!

—Brian Dipert is the Editor-in-Chief of the Edge AI and Vision Alliance, and a Senior Analyst at BDTI and Editor-in-Chief of InsideDSP, the company’s online newsletter.

Related Content

• Moto 360 smartwatch lacks backwards compatibility
• Wearable wars: Garmin smartwatch hands-on review
• Withings’ long-running smart watch: Just don’t call it a swatch
• Teardown: Smartwatch embeds dual power sources
• Teardown: A smartwatch with an athletic tradition
• Apple Watch: Smart but not smart enough
• Wearable trends: a personal perspective

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Surf-Tech Manufacturing Corp., a multi-faceted provider of contract manufacturing services, is pleased to announce the expansion of its advanced conformal coating services. By continuously investing in advanced technology and expanding its capabilities, Surf-Tech ensures that clients receive the best possible quality solutions for their manufacturing needs.

Surf-Tech’s advanced conformal coating services are designed to support a wide range of applications, from selective conformal coating and potting to bead and meter-mix dispensing. The company’s expertise in these areas allows for precise, efficient and reliable protection of electronic assemblies, ensuring optimal performance and durability.

With state-of-the-art conformal coating technology, Surf-Tech delivers superior protection for printed circuit boards (PCBs) across diverse industries. The company is dedicated to providing high-value, reliable manufacturing solutions, and its conformal coating process ensures the longevity and reliability of electronic components, even in the most demanding conditions.

“Our goal is to offer safeguard our client’s PCBs while maintaining the highest standards of quality and efficiency,” said Stephen Eggart, President of Surf-Tech Manufacturing. “By investing in industry-leading conformal coating technology, we can provide tailored solutions that meet the unique needs of each customer, from startups to Fortune 500 companies.”

In addition to its conformal coating services, Surf-Tech offers a suite of manufacturing solutions, including SMT, through-hole soldering, mechanical assembly and higher-level assembly (HLA). With turnkey capability, materials management expertise, and quick-turn prototype services, they provide comprehensive solutions tailored to their clients’ specific requirements.

The company boasts state-of-the-art automated equipment and full-service capabilities, catering to all phases of electronic manufacturing and assembly work. Whether it’s prototype design or end customer webstore fulfillment, Surf-Tech delivers high-quality solutions with precision and efficiency.

Surf-Tech’s commitment to quality is reflected in its ISO 9001 certification, IPC, and ITAR registrations. Personnel are certified to various applicable standards, including IPC-A-610 (Acceptability of Electronic Assemblies) and J-STD-001 (Requirements for Soldered Electrical and Electronic Assemblies).

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