Новини світу мікро- та наноелектроніки

Working in a power electronics lab has exposed me to some of the most ridiculously oversized passive components out there. Sometimes it feels like I’m in those early electrical experiment demonstrations in the 18th-19th century with how big the parts can get. Anyone else work around this sort of gear? submitted by /u/squonktearz [link] [comments]

For decades, polyethylene naphthalate (PEN) held a small but critical place in high-performance capacitors. It was never the volume material that biaxially oriented polypropylene (BOPP) is, since cost and production capacity kept it niche. But capacitor engineers reached for PEN when BOPP ran out of room: when temperatures climbed, when packages had to shrink, or when a higher dielectric constant was the only way to hit the energy target.

Now capacitor-grade PEN is disappearing. Major suppliers are signaling PEN end-of-life, and capacitor manufacturers serving aerospace, defense, power grids, transportation, and industrial power electronics are asking what comes next.

It’s tempting to treat this as a sourcing problem. In other words, find a comparable dielectric, drop it into the existing capacitor, qualify it, and move on. But that instinct is wrong.

The product you build to replace a PEN capacitor should not be a like-for-like copy with a different dielectric inside. It should be a better capacitor, because major applications are pushing every power electronic component beyond legacy use, and capacitors desperately need to keep up.

Component under the most pressure

AI compute, data center buildout, and electrified transport have driven the most disruptive shift in power demand in generations. Forecasts are rewritten quarterly, interconnection queues are stacking up, and hyperscalers are standing up their own power generation to avoid the wait.

These trends converge on a single component. Capacitors are being asked to handle higher voltages, cycle faster, and survive more thermal stress for decades without drifting out of spec. When program teams walk through where a design holds up or starts to compromise, the conversation lands on the capacitor, its energy density, its footprint and mass, its thermal behavior, and how long it survives the duty cycle.

That conversation is happening earlier in the design cycle than it used to. The capacitor manufacturers responding to these demands earliest are the ones getting designed in.

What PEN capacitor actually did

PEN is at the end-of-life stage, and the capacitors that depend on it can’t just swap in a substitute film and move on. It did two different jobs, and they belong to two different capacitors.

In aerospace pulse power, hardened defense systems, and directed-energy applications, PEN was a high-voltage, energy-dense enabler for rapid discharge. It let designers pack more energy into a smaller capacitor at a given voltage rating.

In EV power electronics, grid subsystems, and rail traction, PEN was chosen not for peak energy density, but for its ability to sustain intense duty cycles and thermal stress, often with a DC bias. A capacitor that functions without derating under all use-scenarios is invaluable to final product design.

Treating those as one problem is what makes PEN replacement feel impossible. It attempts to solve two separate capacitor-design problems, energy density under pulse and thermal stability under load, which should lead to separate design answers.

HDC: Rebuilding the energy-dense capacitor

The first job, exemplified by uses in aerospace, pulse power, hardened defense systems, and fusion, gets picked up by a different class of material entirely. Where PEN was used to shrink a capacitor and push its energy density, the successor is a high dielectric constant (HDC) material, which changes what the capacitor can do, not just what is wound inside it.

Film developers have begun introducing nanolayered metamaterial dielectrics, built from hundreds to thousands of alternating polymer layers, with dielectric constants in the 3.7 to 4.7 range, well above BOPP and many PEN grades, and breakdown strengths of 790 to 820 V/µm. In a finished part, that can mean up to 4× the energy storage in as little as half the footprint of a conventional film capacitor, with improved thermal stability and longer operational life. For a pulse module, a Marx bank, or a grid capacitor competing for volume and mass, is a smaller, lighter, more robust component, not just a spec-sheet footnote.

The trade-off is real and worth stating plainly to a design audience: HDC carries a higher dissipation factor than the lowest-loss dielectrics, so more energy shows up as heat. That constrains how fast and how often the capacitor can be cycled, which is why HDC belongs in energy-density and pulse-duty capacitors—defense pulse modules, mass-constrained aerospace systems, fusion driver banks, and intermittent-duty transportation electronics—rather than continuous switching.

LDF: A lower loss and faster switching capacitor

For the other PEN job—continuous cycling at high repetition rate over decades—the answer is a low dissipation factor (LDF) dielectric, which trades some energy density for very low loss and long thermal endurance in grid inverters, FACTS devices, and industrial drives. This lower dissipation factor means there is less self-heating, greater efficiency of energy transfer, and less stress on components, leading to more reliable and longer lifetimes.

PEN also functions at environmental temperatures above traditional BOPP but below far more expensive alternatives. Due to nanolayering, LDF can incorporate stabilizing layers, which ensure enhanced functionality rivaling PEN, while reducing thermal expansion and device derating. This results in finished capacitors that can be used in hotter or high energy environments without massively increasing component cost.

What capacitor manufacturers should do

PEN’s disappearance marks an inflection point. The capacitor architecture chosen now gets locked in for the life of the platform—30 years or more on the grid and in aerospace. Four moves separate the winners.

1. Stop hunting for a one-to-one PEN part

There is no universal replacement capacitor. Segment the installed PEN base by what each capacitor was actually doing—energy density and volume route to HDC, lifetime and efficiency route to LDF—and qualify against that. The segmentation work up-front is what accelerates qualification.

2. Design the capacitor for the duty cycle, not the datasheet

AI data centers, EV powertrains, fusion supplies, and grid assets load capacitors differently. A manufacturer who can build to more than one duty cycle expands its addressable market; one who can serve only a single profile gets squeezed.

3. Treat heat as a capacitor-and-system problem

HDC trades efficiency for energy density, and that only works if the surrounding power electronics remove the heat. Pair capacitor selection with explicit thermal models and validated test data, and qualifications go faster with fewer field failures.

4. Make provenance part of the product

More than 70% of conventional capacitor film originates in China. Buyers hardening the grid, defense platforms, and AI infrastructure are increasingly unwilling to carry that concentration risk. A documented U.S. or allied-nation supply chain is a procurement advantage, and it drops into standard metallizing and winding lines, so qualifying it does not require retooling.

First to qualify, first to win

Those four moves take time to execute, and time is the one input nobody can manufacture more of. Capacitor qualification takes 12 to 24 months. The clock is already running. The manufacturers who commit now to the right capacitor, not the cheapest lookalike, get designed into a decade of rising power demand. Those who requalify a copy of the PEN part will spend that decade watching competitors take the design wins.

Alec Laws is senior product manager for dielectric films at Peak Nano.

Related Content

• Trends in capacitors
• Capacitor matchmaker
• Getting Familiar with Capacitors
• Selecting and Applying Film Capacitors
• Film capacitors: Characteristics and uses in power applications

The post With PEN nearing end-of-life, capacitors built on it must change appeared first on EDN.

DOOM runs on an ESP32-P4 embedded board, and an artificial intelligence plays it by watching the screen, just as a person would. Andrea Ricci’s project uses the SCINTIX P4 board, with a 7-inch MIPI-DSI display and an ESP32-C6 wireless coprocessor. The Claude Sonnet language model controls the game through an MCP interface, without ever accessing the engine’s internal state. The AI only sees what a human player sees: a fan of 51 depth rays, enemies in line of sight, and an ASCII map of already-discovered walls.

The result is an AI gaming experience much closer to a human one. The model doesn’t know the position of demons behind walls, doesn’t know what’s in the next room. It has to explore, remember, and make mistakes. This unusual approach to AI is the heart of the project, and all the source code is in Andrea Ricci’s repository.

Rendering and scaling with the PPA

DOOM runs entirely on the board, with software rendering at 320×200. The ESP32-P4’s Pixel Processing Accelerator (PPA) does hardware scaling up to 1024×600, the display’s resolution. Scaling time per frame drops from about 24.5 ms with the CPU to about 9 ms with the PPA. DOOM’s software renderer takes about 25 ms per frame, and the game tick runs at 35 Hz (TICRATE). The game maintains about 30 FPS.

The board has 32 MB of PSRAM and 32 MB of flash, with a SPIFFS storage partition of about 12 MB. The 7-inch display is connected via MIPI-DSI, driven by the ST7701S controller. Sound effects audio goes through the ES8311 codec over I2S, with clock derived from SCLK and amplifier disabled via the PI4IOE5V6408 I/O expander.

The MCP server and lockstep

The game is exposed through a ‘lockstep’ WebSocket server. The model sends an action, the game advances a few ticks and returns a structured JSON observation. Then it stops and waits for the next action. An MCP server (tools/doom_mcp_server.py) wraps the WebSocket and registers the game as tools for MCP-compatible clients like Claude Code.

The available tools are: observe, move, shoot, open, select weapon, and map. The observation given to the model is limited to what a player sees: the 51 depth rays, enemies in line of sight (never through walls), the ASCII map, and hints about doors and blocks. Audio is played through the ES8311 codec, with I2C address 0x18, and the I/O expander has address 0x43.

Input and Wi-Fi configuration

The board supports USB input, both keyboard and gamepad. On first power-up, it configures via Wi-Fi with a captive portal. The software uses ESP-IDF v5.5.x, doomgeneric, esp_hosted, and the PPA APIs. The ESP32-C6 coprocessor handles wireless connectivity, while the ESP32-P4 does everything else.

For those who want to get closer to this world, a development board like the ESP32 board with Wi-Fi and Bluetooth can be a first step to experiment with embedded projects. Also, those starting from scratch can use the ESP32-C6-Zero kit to learn the basics of wireless connectivity, before tackling a complex system like this one.

Source: https://github.com/relocsrl/scintix-p4-playing-doom

The post DOOM on ESP32-P4: AI plays like a human appeared first on Open Electronics.

This versatile Design Idea survives and reports open- and short-circuits, not to mention multiplying efficiencies.

Generally accepted tech folklore says that after you drive relays and solenoids into full actuation, only half as much coil voltage and current—and therefore only a fourth as much power—is needed to hold them there. Consequently, driver designs that continuously apply full voltage burn four times the power and heat the coil four times hotter than the job really requires.

Wow the engineering world with your unique design: Design Ideas Submission Guide

Figure 1’s driver circuit employs pulse width modulation (PWM) to dramatically diminish post-pull-in power waste. As an extra added bonus, it also survives and reports open- and short-circuit faults on the GPI status bit.

Figure 1 In this circuit, driver transistor Q2’s PWM duty cycle varies from 100% at actuation to a power saving 50% sustain. It can accommodate load currents up to half an amp. R5 protects current limiter Q3’s base-emitter junction from destruction by over-current events. And Q1 detects coil opens and shorts.

Here’s how it works.

The PWM signal on the general-purpose output (GPO) bit sets Q2’s conduction duty cycle from 0% to 100% to ~50%, from off to full voltage pull-in to quarter-power sustain. Q3 protects Q1 from over-current resulting from shorted coil faults. And Q1 utilizes relay/solenoid coil L1’s inductive “kickback” to detect correct driver operation and report it as a logic “1” on the general purpose input (GPI) pin…or, if kickback is absent (meaning the coil is open or shorted), its logical opposite, “0”.

Figure 2 not-to-scale sketches the driver timing.

Figure 2 In this timing diagram, T1 = timeout to first fault check = L1/R timeconstant = ~500us. T2 = ~100% PWM duty cycle to power initial actuation = ~10ms. T3 = ~50% sustain duty cycle for as long as application requires. And T4 = PWM sustain cycle = ~100us = 10kHz.

In summary, Figure 1’s circuit neither squanders power nor requires changing component values to accommodate different supply voltages. And it’s simple. Along with, dare I say, beautiful? I guess I just did!

Stephen Woodward‘s relationship with EDN’s DI column goes back quite a long way. Over 200 submissions have been accepted since his first contribution back in 1974.  They have included best Design Idea of the year in 1974 and 2001.

Related Content

• Booster circuit enables reliable solenoid operation
• The overcurrent limiting transistor fails before anything else!
• Three discretes suffice to interface PWM to switching regulators
• Automotive low side output switch architecture suitable for 8 to 48 volt buses and beyond

The post 8 to 48 volt PWM relay/solenoid driver finds fault, pinches power appeared first on EDN.