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Renesas Brings the High Performance of Arm Cortex-M85 Processor to Cost-Sensitive Applications with New RA8 Entry-Line MCU Groups
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Infineon to co-develop power architecture for Stellantis’ EVs
Investigating a vape device
The ever-increasing prevalence of lithium-based batteries in various shapes, sizes and capacities is creating a so-called “virtuous circle”, leading to lower unit costs and higher unit volumes which encourage increasing usage (both in brand new applications and existing ones, the latter as a replacement for precursor battery technologies), translating into even lower unit costs and higher unit volumes that…round and round it goes. Conceptually similarly, usage of e-cigarettes, aka so-called “vape” devices, is rapidly growing, both by new and existing users of cigarettes, cigars, pipes and chewing tobacco. The latter are often striving to wean themselves off these conventional “nicotine delivery platforms” and away from their well-documented health risks but aren’t yet able or ready to completely “kick the habit” due to nicotine’s potent addictive characteristics (“vaping” risks aren’t necessarily nonexistent, of course; being newer, however, they’re to date less thoroughly studied and documented).
What’s this all got to do with electronics? “Vapes” are powered by batteries, predominantly lithium-based ones nowadays. Originally, the devices were disposable, with discard-and-replacement tied to when they ran out of oft (but not always) nicotine-laced, oft-flavored “juice” (which is heated, converting it into an inhalable aerosol) and translating into lots of perfectly good lithium batteries ending up in landfills (unless, that is, the hardware hacker community succeeds in intercepting and resurrecting them for reuse elsewhere first). Plus, the non-replaceable and inherently charge-“leaky” batteries were a retail shelf life issue, too.
More recent higher-end “vape” devices’ batteries are capable of being user-recharged, at least. This characteristic, in combination with higher capacity “juice” tanks, allows each device to be used longer than was possible previously. But ultimately, specifically in the absence of a different sort of hardware hacking which I’ll further explore in the coming paragraphs, they’re destined for discard too…which is how I obtained today’s teardown victim (a conventional non-rechargeable “vape” device is also on my teardown pile, if I can figure out how to safely crack it open). Behold the Geek Bar Pulse, as usual accompanied by a 0.75″ (19.1 mm) diameter U.S. penny for size comparison purposes:
One side is bland:
The other is also seemingly so:
at least until you flip the “on” switch at the bottom, at which time it turns into something reminiscent of an arcade video game (thankfully not accompanied by sounds):
The two-digit number at the top indicates that the battery is still a bit more than halfway charged. Its two-digit counterpart at the bottom however, reports that its “juice” tank is empty, therefore explaining why it was discarded and how it subsequently ended up in my hands (not exactly the result of “dumpster diving” on my part, but I did intercept it en route to the trash). To that latter point, and in one of those “in retrospect I shouldn’t have been surprised” moments, when researching the product prior to beginning my dissection, I came across numerous web pages, discussion group threads and videos about both it and alternatives:
with instructions on how to partially disassemble rechargeable “vape” devices, specifically to refill their “juice” tanks with comparatively inexpensive fluid and extend their usable life. Turns out, in fact, that this device’s manufacturer has even implemented a software “kill switch” to prevent such shenanigans, which the community has figured out how to circumvent by activating a hidden hardware switch.
Anyhoo, let’s conclude our series of overview shots with the top, containing the mouthpiece nozzle from which the “vape” aerosol emits:
and the bottom, encompassing the aforementioned power switch, along with the USB-C recharging connector:
That switch, you may have already noticed, is three-position. At one end is “off”. In the middle is normal “on” mode, indicated in part by a briefly visible green ring around the display:
And at the other end is “pulse” mode, which emits more aerosol at the tradeoffs of more quickly draining the battery and “juice” tank, and is differentiated by both a “rocket” symbol in the middle of the display and a briefly illuminated red ring around it:
By the way, the power-off display sequence is entertaining, too:
And now, let’s get inside this thing. No exposed screws, of course, but that transparent side panel seems to be a likely access candidate:
It wasn’t as easy as I thought, but thanks to a suggestion within the first video shown earlier, to pop off the switch cover so that the entire internal assembly could then move forward:
I finally got it off, complete with case scratches (and yes, a few minor curses) along the way:
Quick check: yep, still works!
Now to get those insides out. Again, my progress was initially stymied:
until I got the bright (?) idea of popping the mouthpiece off (again, kudos to the creator of that first video shown earlier for the to-do guidance):
That’s better (the tank is starting to come into view)…
Success!
Front view of the insides, which you’ve basically already seen:
Left side, with our first unobstructed view of the tank:
Back (and no, it wasn’t me who did that symbol scribble):
Right side:
Top, showing the aerosol exit port:
And bottom, again reminiscent of a prior perspective photo:
Next, let’s get that tank off:
One of those contacts is obviously, from the color, ground. I’m guessing that one of the others feeds the heating element (although it’s referred to on the manufacturer’s website as being a “dual mesh coil” design, I suspect that “pulse” mode just amps—pun intended—up the output versus actually switching on a second element) and the third routes to a moisture or other sensor to assess how “full” the “tank” is.
To clarify (or maybe not), let’s take the “tank” apart a bit more:
More (left, then right) side views of the remainder of the device, absent the tank:
And now let’s take a closer look at that rubber “foot”, complete with a sponge similar to the one earlier seen with the mouthpiece, that the tank formerly mated with:
Partway through, another check…does it still work?
Yep! Now continuing…
Next, let’s again use the metal “spudger”, this time to unclip the display cover from the chassis:
Note the ring of multicolor LEDs around the circumference of the display (which I’m guessing is OLED-fabricated: thoughts, readers?):
And now let’s strive to get the “guts” completely out of the chassis:
Still working?
Amazing! Let’s next remove the rest of the plastic covering for the three-position switch:
Bending back the little plastic tab at the bottom of each side was essential for further progress:
Mission accomplished!
A few perspectives on the no-longer-captive standalone “guts”:
It couldn’t still be working, after all this abuse, could it?
It could! Last, but not least, let’s get that taped-down battery out the way and see if there’s anything interesting behind it:
That IC at the top of the PCB that does double-duty as the back of the display is the Arm Cortex-M0+- and flash memory-based Puya F030K28. I found a great writeup on the chip, which I commend to your attention, with the following title and subtitle:
The cheapest flash microcontroller you can buy is actually an Arm Cortex-M0+
Puya’s 10-cent PY32 series is complicating the RISC-V narrative and has me doubting I’ll ever reach for an 8-bit part again.
“Clickbait” headlines are often annoying. This one, conversely, is both spot-on and entertaining. And given the ~$20 retail price point and ultimately disposable fate for the device that the SoC powers, $0.10 in volume is a profitability necessity! That said, one nitpick: I’m not sure where Geek Bar came up with the “dual core” claim on its website (not to mention I’m amazed that a “vape” device supplier even promotes its product’s semiconductor attributes at all!).
And with that, one final check; does it still work?
This is one rugged design! Over to you for your thoughts in the comments!
—Brian Dipert is the Editor-in-Chief of the Edge AI and Vision Alliance, and a Senior Analyst at BDTI and Editor-in-Chief of InsideDSP, the company’s online newsletter.
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Test solutions to confront silent data corruption in ICs
While semiconductor design engineers become more aware of silent data corruption (SDC) or silent data errors (SDE) caused by aging, environmental factors, and other issues, embedded test solutions are emerging to address this subtle but critical challenge. One such solution applies embedded deterministic test patterns in-system via industry-standard APB or AXI bus interfaces.
Siemens EDA’s in-system test controller—designed specifically to work with the company’s Tessent Streaming Scan Network (SSN) software—performs deterministic testing throughout the silicon lifecycle. Tessent In-System Test is built on the success of Siemens’ Tessent MissionMode technology and Tessent SSN software.
Figure 1 The Tessent In-System Test software with embedded on-chip in-system test controller (ISTC) enables the test and diagnosis of semiconductor chips throughout the silicon lifecycle. Source: Siemens EDA
Tessent In-System Test enables seamless integration of deterministic test patterns generated with Siemens’ Tessent TestKompress software. That allows chip designers to apply embedded deterministic test patterns generated using Tessent TestKompress with Tessent SSN directly to the in-system test controller.
The resulting deterministic test patterns are applied in-system to provide the highest test quality level within a pre-defined test window. They also offer the ability to change test content as devices mature or age through the silicon lifecycle.
Figure 2 Tessent In-System Test applies high-quality deterministic test patterns for in-system/in-field testing during the lifecycle of a chip. Source: Siemens EDA
These in-system tests with embedded deterministic patterns also support the reuse of existing test infrastructure. They allow IC designers to reuse existing IJTAG- and SSN-based patterns for in-system applications while improving overall chip planning and reducing test time.
“Tessent In-System Test technology allows us to reuse our extensive test infrastructure and patterns already utilized in our manufacturing tests for our data center fleet,” said Dan Trock, senior DFT manager at Amazon Web Services (AWS). “This enables high-quality in-field testing of our data centers. Continuous monitoring of silicon devices throughout their lifecycle helps to ensure AWS customers benefit from infrastructure and services of the highest quality and reliability.”
The availability of solutions like the Tessent In-System Test shows that silent data corruption in ICs is now on designers’ radar and that more solutions are likely to emerge to counter this issue caused by aging and environmental factors.
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- Test Compression
- Design for test boot camp
- Uncovering Silent Data Errors with AI
- Test patterns are supposed to stress you out
- Understanding and combating silent data corruption
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MACOM acquires fabless semiconductor firm ENGIN-IC
New high-performance microcontroller: Infineon launches AURIX TC4Dx
Infineon Technologies AG has announced the launch of the AURIX TC4Dx microcontroller (MCU), the first member of the latest AURIX TC4x family. Based on 28nm technology, the AURIX TC4Dx offers increased performance and high-speed connectivity. It combines power and performance enhancements with the latest trends in virtualization, Artificial Intelligence, functional safety, cybersecurity, and networking functions paving the way for new Electric/Electronical (E/E) architectures as well as the next generation of software-defined vehicles. MCUs like the AURIX TC4Dx are crucial to control and monitor a wide variety of systems in the automobile such as vehicle motion control, Advanced Driver Assistance Systems (ADAS) and chassis.
“Microcontrollers like our new AURIX TC4Dx are the backbone of software-defined vehicles. They are essential to further improve vehicle performance, safety and comfort.” said Thomas Boehm, Senior Vice President for Microcontrollers at Infineon. “The AURIX TC4Dx will contribute to secured processing performance and efficiency, and our customers will benefit from faster time-to-market and lower total system cost.”
The AURIX TC4Dx features an advanced multi-core architecture with the new 500MHz TriCore with six cores, all with lock-steps for highest functional safety performance. With its Parallel Processing Unit (PPU), the MCU provides an innovative platform for developing embedded AI-based use cases such as motor control, battery management systems or vehicle motion control. The MCU is supported by a strong software ecosystem and includes networking accelerators to boost Ethernet and CAN communication, as well as the latest interfaces such as 5 Gbit/s Ethernet, PCIe, 10Base-T1S and CAN-XL. This increased networking throughput and connectivity gives customers the performance and flexibility needed to implement E/E architectures. Its holistic approach to functional safety meets the highest functional safety requirements according to ISO26262 ASIL-D. The AURIX TC4Dx also fulfills latest cyber security standards according to ISO/SAE21434 including post-quantum cryptography support.
Infineon at electronica 2024
At this year’s electronica in Munich, Infineon presents innovative solutions that are helping to shape an all-electric society. Visitors can explore sustainable technologies that are transforming the mobility and automotive landscape, enabling sustainable buildings and smarter living, and promoting the growth of artificial intelligence with minimal environmental impact. The company will present intelligent and energy-efficient solutions for tomorrow’s connected world from November 12 to 15 in Hall C3, Booth 502 under the motto “Driving Decarbonization and Digitalization.
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ST Foundation: bridging the digital divide with the Digital Unify Program
At STMicroelectronics, we are committed to positively impacting expertise, and delivering comprehensive educational programs globally through the ST Foundation. The mission is to develop, coordinate, and sponsor projects that use modern sciences and technology to promote human progress.
One of the flagship initiatives is the Digital Unify Program, an extensive educational effort active across Europe, Asia, and Africa. Since its launch in 2003, this program has trained over one million individuals across 29 countries, adapting the methods to meet the needs of various groups, including children, adults, individuals with disabilities, and the elderly.
The impact of the Digital Unify Program Pietro Fox, board member of ST Foundation The ST Foundation’s impact is not only measurable by the number of individuals trained but by the stories of transformation that come from the heart of these communities. Every course offered through the Digital Unify Program becomes a stepping stone for change, enabling people to harness the power of technology for a better tomorrow.
The Digital Unify Program (DU) sets up computer training centers (DU Labs) in collaboration with local partners such as schools, NGOs, local administrations, and government agencies. Currently, the program offers four free courses:
- Informatics and Computer Basics (ICB): a 20-hour computer literacy course focusing on essential skills like searching topics online, sending emails, and using word processors and spreadsheets. Shereen’s story is just one of the many examples of empowerment through education.
- Tablet for Kids (T4K): a course for children aged 9 to 13, aimed at providing an intuitive understanding of ICTs for problem-solving and personal development. Read more about what we are doing to help kids in Murshidabad, one of the most underdeveloped areas in West Bengal (India).
- Introduction to Computer Basics for Visually Impaired People (ICB4VI): created in collaboration with the University of Milan, this course makes digital skills accessible to visually impaired learners. It offers over 50 hours of training on key topics such as keyboard navigation, Microsoft Word document creation, Excel data management, email handling, and Internet navigation.
- Tablet for Seniors Course (T4S): This course has a standard duration of 20 hours, during which the beneficiaries have the chance to learn basic skills like how to use the Internet, email accounts, take pictures, and more advanced tasks that can help them lead a more active and e-connected life. Read the story of Remedios in the Philippines to know more about how this course can change people’s lives.
In addition to these fundamental courses, the program remains attentive to the evolving needs of the communities it serves. The ST Foundation is always ready to develop new courses and adapt our offerings to ensure everyone has access to the digital tools they need to meet future challenges.
Creating a better future with DU local communitiesThe Local Communities (LC) project is a key initiative of the ST Foundation. It supports the creation of DU Labs and encourages volunteering among ST employees. The goal is to provide every citizen with the knowledge to overcome social, economic, and technological inequalities, achieving human progress and a dignified life for everyone. If you want to know more about how to connect with the ST Foundation to benefit your local community, click here.
Pietro Palella, President of the ST Foundation Our commitment to bridging the digital divide is unwavering. At the ST Foundation, we believe that access to technology is not just a privilege but a fundamental right. With the Digital Unify Program, we are reaching out to communities worldwide, providing them with the tools and skills necessary for personal and collective growth. Expanding our reachThe ST Foundation continues to expand its reach in countries where there is a significant need to overcome social, economic, and technological inequalities.
Session one T4K course – IndiaIn 2023, the Foundation signed a strategic collaboration agreement with the International Telecommunication Union (ITU) – a specialized agency of the United Nations responsible for issues related to information and communication technologies (ICTs) – strengthening the commitment to reducing the digital divide. This collaboration focuses on empowering marginalized communities, particularly women and youth, through digital skills development. This partnership with ITU aligns with the mission to foster digital inclusion and promote sustainable development across various regions.
In Senegal, the Foundation launched training programs for young girls and visually impaired individuals, ensuring more inclusive access to technology and education. Additionally, they conducted a Training of Trainers (ToT) program in Ghana to equip the first teachers in the country to deliver our ICB4VI course, enhancing accessibility for visually impaired learners.
ICBVI Train the Trainers course in GhanaIn India, the efforts included expanding the T4S senior citizen program, empowering women with digital literacy, and introducing the Digital Unify program in prisons, aiding rehabilitation and reintegration. The summer camps in Morocco reached 9,502 children across 29 locations, providing quality education and fostering unity among underprivileged children.
Patrick Dureault, Board Member managing France, donating PCs
In France, the Foundation donated nearly 1,000 computers and formed partnerships with major entities.
In Italy, they successfully promoted coding in education with a new initiative together with ACRA, encouraged digital careers, and trained volunteers to engage with students. The initiative reached schools, trained teachers, and involved volunteers, focusing on inclusion and reducing inequality.
The collaboration with Vittascience ST volunteer experimenting how to use Vittascience starting kitsThe Foundation has made significant additional strides in 2023, focusing on reducing digital education disparity and enhancing program efficacy. Key projects include developing a new computational thinking and coding course using resources from Vittascience, an educational platform offering innovative teaching tools. The course aims to reinforce existing programs and pay special attention to digital education for older people
Shireen’s and Barthelemy’s journeys and the many active projects in 14 countries are just some of many recent inspiring stories highlighting the importance of providing educational opportunities to less privileged communities. These stories show how access to modern sciences and technology can promote human progress and
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Negative time-constant and PWM program a versatile ADC front end
A variety of analog front-end functions typically assist ADCs to do their jobs. These include instrumentation amplifiers (INA), digitally programmable gain (DPG), and sample and holds (S&H). The circuit in Figure 1 is a bit atypical in merging all three of these functions into a single topology controlled by the timing from a single (PWM) logic signal.
Figure 1 Two generic chips and five passives make a versatile and unconventional ADC front end
Wow the engineering world with your unique design: Design Ideas Submission Guide
Figure 1’s differential INA style input starts off conventionally, consisting of tera-ohm impedance and picoamp bias CMOS followers U1a and U1b. The 916x family op-amps are pretty good RRIO devices for this job, with sub-mV input offset, 110 dB CMR, 11 MHz gain-bandwidth, 33 V/µs slew rate, and sub-microsecond setting time. They’re also inexpensive. Turning this into a high CMR differential input, however, is where the circuit starts to get unconventional. The ploy in play is the “flying capacitor”.
During the logic-0 interval of the PWM, through switches U2a and U2b both ends of capacitor C are driven by the unity-gain follower amplifiers with CMR limited only by the amplifier’s 110 dB = 300,000:1. Unlike a typical precision differential INA input, no critical resistor matching is involved. A minimum duration interval of a microsecond or two is adequate to accurately capture and settle to the input signal. When the PWM input transitions to logic-1, one end of C is grounded (via U2b) while the other becomes the now single-ended input to U1c (via U2a). Then things get even less conventional.
The connection established from U1c’s output to C through U1c and R1 creates positive feedback that causes the voltage captured on C to multiply exponentially with a (negative) time-constant of:
Tc = (R1 + (U2 on resistance)) C
= (14.3 kΩ + 130) 0.001 µF = 14.43 µs
= 10 µs / ln(2)
Due to A1c’s gain = R3 / R2 + 1 = 2 the current through R1 from Vc:
IR1 = (Vc – 2Vc) / R1
= Vc / -R1
Thus, R1 is made effectively negative which makes R1C negative and for any time T after the 0-1 transition of PWM the familiar exponential decay of:
V(T) = V(0) e-(T/RC)
becomes with a negative R1:
= V(0) e-(T/-R1C) = Vc(0) e– -(T / 14.43 µs) = Vc(0) e(T / 14.43 µs)
= Vc(0) 2(T / 10 µs )
Therefore, taking U1c’s gain of 2.00:
Vout = Vc(0) 2((T / 10 µs) + 1)
For example, if a 7-bit 1 MHz PWM is used, then each 1µs increment in the duration of the logic-1 period will equate to a gain increment of 20.1 = 1.072 = 0.60 dB. So, a 100 PWM 1-count would create a gain of 2((T / 10 µs) + 1) = 66.2 dB = 2048. Having 100 available programmable gain settings is a useful and unusual feature.
Note that R1 and C should be precision with low-tempco types like metal film and C0G so that the gain/time relationship will be accurate and stable. The 14.43 µs = 11 kHz roll-off of R1C interacts with the 11 MHz gain bandwidth of U1c to provide ~60 dB of closed loop gain. This is adequate for 10-bit acquisition accuracy.
During this PWM = 1 exponential gain phase, the U2c switch causes the output capacitor and U1d to track Vc, which is captured and held for input to the connected ADC during the subsequent PWM = 0 phase. While the front end of the circuit is acquiring the next sample.
Stephen Woodward’s relationship with EDN’s DI column goes back quite a long way. Over 100 submissions have been accepted since his first contribution back in 1974.
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Vishay Intertechnology High Energy Inrush Current Limiting PTC Thermistors Increase Performance in Active Charge and Discharge Circuits
Reducing Component Counts, Self-Protecting Devices Combine Energy Handling to 340 J With R25 Values to 1.5 kΩ and High Voltages to 1200 VDC
Vishay Intertechnology, Inc. has introduced a new series of inrush current limiting positive temperature coefficient (PTC) thermistors. Designed to increase performance in active charge and discharge circuits for automotive and industrial applications, Vishay BCcomponents PTCEL High Energy series devices combine maximum energy handling to 340 J — five times higher than competing devices at high ambient temperatures — with a wide range of resistance at 25 °C (R25) values and high voltage capabilities.
Featuring R25 values from 150 Ω to 1.5 k Ω, the thermistors released today enable increased efficiency and high maximum voltages of 1200 VDC. The devices offer high energy handling capabilities at higher ambient temperatures — 180 J at 85 °C and 130 J at 105 °C — allowing designers to save space and lower costs by utilizing fewer components in their circuits. With their high switching temperature and operation to +105 °C, the PTCEL High Energy series offers a heat capacity to 2.6 J/K for all resistance values.
AEC-Q200 qualified and self-protecting — with no risk of over-heating — the thermistors provide current limitation and overload protection in AC/DC and DC/DC converters; DC-Link, battery management, and emergency discharge circuits; on-board chargers; home energy storage systems; heat pumps; motor drives; and welding equipment. For these applications, the devices withstand > 100 000 inrush power cycles and are highly resilient against non-switching peak power up to 25 kW.
The PTCEL High Energy series barium titanate thermistors consist of a ceramic pellet soldered between two tinned CCS wires and coated with a UL 94 V-0 compliant high temperature silicone lacquer. The devices are available in tape on reel packaging and can be automatically handled by pick and place equipment for lower placement costs. The thermistors offer a standard leadwire pitch of 10 mm, with leadwire pitches of 5.0 mm and 7.5 mm also available. SPICE and 3D models for the RoHS-compliant devices are available.
Device Specification Table:
Part number |
PTCEL67R |
R25 (W) |
150 to 1500 |
R25 tolerance (%) |
30 |
Max. AC voltage (VRMS) |
460 to 800 |
Max. DC voltage (VDC) |
650 to 1200 |
Maximum energy (J) @ 25 °C |
340 |
Heat capacity (J/K) |
2.6 |
Lead pitch (mm) |
5.0, 7.5, 10.0 |
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STPOWER Studio: 3 new topologies for accurate electro-thermal simulation on STPOWER devices
STPOWER Studio 4.0 just became available and now supports three new topologies (1-phase full bridge, 1-phase half-bridge, and 3-phase 3-level T-NPC) to cover significantly more applications. Previously, the online simulation tool only offered a 3-phase 2-level topology for motor drivers and photovoltaic inverters, which are some of the most popular use cases. Thanks to the robustness of the underlying architecture that ST recently updated and brought to the web, we are now able to build on top of the existing platform to make STPOWER Studio more versatile and assist more engineers in designing a more comprehensive range of power stages.
What is STPOWER Studio? A unique simulator STPOWER Studio delivers extensive analyses quickly and easiilySTPOWER Studio, a component of eDesignSuite, specializes in thermo-electrical simulations. As eDesignSuite transitioned to HTML5 to enhance its user interface, STPOWER Studio benefited from the same underlying architecture, enabling more powerful simulations. It stands out in the industry as one of the few simulators capable of adjusting power losses according to the junction temperature at the moment of the simulation, providing a more accurate representation of real-world usage. Some competitors traditionally use a fixed value for the junction temperature, leading to over- or underestimated losses. Thanks to our dynamic junction temperature, users get more accurate results.
STPOWER Studio can simulate up to hundreds of seconds per step with Steady State off, which gives engineers enough time to see how their power stage would ramp up and stabilize. They can also run simulations with or without heat sinks, which will help them anticipate form factor and heat dissipation requirements. Users simply select the ST family of devices (ACEPACK or SLLIMM) and the component they will use in their design. Under Setting, designers can tweak the gate resistor values and some thermal properties. Finally, under I/O, users can adjust their mission profile by defining various steps with values such as the output power or the current level, among other things.
A design assistantLet’s take the example of an engineer designing a large motor driver for industrial applications, an inverter for a photovoltaic converter, or an HVAC system. In our example, the motor would use a DC Link voltage of 650 V and an RMS Phase Current of 10 A. For a quick simulation, users can use Steady State ON to analyze performances after reaching a thermal steady state. Then, by choosing Steady State OFF, users can set the duration of the simulation step for a more detailed analysis. Obviously, it will require more computing power on the server and take longer to generate. However, ST reduced rendering times by a factor of 10 over the last releases of STPOWER Studio.
What’s new in STPOWER Studio 4.0? 1-phase full bridge STPOWER Studio supports heatsink sizing and monitoring data on non-testable parametersThe new version of STPOWER Studio features three new topologies. The 1-phase full bridge will fit single-phase photovoltaic converters or uninterruptible power supplies. As more residential homes and buildings increasingly rely on renewable energy, the ability to store solar energy in batteries is increasingly in demand. Hence, we wanted to ensure that engineers could more rapidly test their designs and reduce their time to market. Similarly, engineers working on an uninterruptible power supply can very quickly anticipate what their design will look like if they adopt an STPOWER device.
1 phase half bridgeSince STPOWER Studio supports a one-phase full bridge topology, it made sense to offer a one-phase half-bridge. This structure is common in DC-AC conversion for smaller solar inverters or motor drivers. Engineers also combine single-phase half-bridge topologies when designing a one-phase to three-phase converter. In fact, while the current version of the simulator focuses solely on DC-AC systems, we are evaluating the addition of DC-DC applications and will update this blog post with more information as they become available.
3-phase 3-level T-NPC Extensive analyses in STPOWER StudioFinally, the 3-phase 3-level T-NPC (T-type Neutral Point Clamped) is increasingly popular because it improves overall efficiency by reducing switching losses thanks to a mechanism that clamps the input voltage at its halfway point. Consequently, only half of the input voltage is applied to each switch, which reduces switching losses. This creative approach greatly benefits high-power systems, such as photovoltaic inverters, power factor inverters, or motor drivers, while ensuring the overall design remains relatively small.
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Infineon launches new generation of GaN power discretes with superior efficiency and power density
Infineon Technologies AG has announced the launch of a new family of high-voltage discretes, the CoolGaN Transistors 650 V G5, further strengthening its Gallium Nitride (GaN) portfolio. Target applications for this new product family range from consumer and industrial switched-mode power supply (SMPS) such as USB-C adapters and chargers, lighting, TV, data center, and telecom rectifiers to renewable energy and motor drives in home appliances.
The latest CoolGaN generation is designed as a drop-in replacement for the CoolGaN Transistors 600 V G1, enabling rapid redesign of existing platforms. The new devices provide improved figures of merit to ensure competitive switching performance in focus applications. Compared to key competitors and previous product families from Infineon, the CoolGaN Transistors 650 V G5 offer up to 50 percent lower energy stored in the output capacitance (Eoss), up to 60 percent improved drain-source charge (Qoss) and up to 60 percent lower gate charge (Qg). Combined, these features result in excellent efficiencies in both hard- and soft-switching applications. This leads to a significant reduction in power loss compared to traditional silicon technology, ranging from 20 to 60 percent depending on the specific use case.
These benefits allow the devices to operate at high frequencies with minimal power loss, resulting in superior power density. The CoolGaN Transitors 650 V G5 enable SMPS applications to be smaller and lighter or to increase the output power range in a given form factor.
The new high-voltage transistor product family offers a wide range of RDS(on) package combinations. Ten RDS(on) classes are available in various SMD packages, such as ThinPAK 5×6, DFN 8×8 , TOLL and TOLT. All products are manufactured on high-performance 8-inch production lines in Villach (Austria) and Kulim (Malaysia). In the future, CoolGaN will transition to 12-inch production. This will enable Infineon to further expand its CoolGaN capacity and ensure a robust supply chain in the GaN power market, which is expected to reach $2 billion by 2029, according to Yole Group.
A demo featuring the CoolGaN Transistors 650 V G5 will be showcased at electronica 2024 in Munich from November 12 to 15 (hall C3, booth 502).
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I just published a page summarizing different ways of creating digital/analogue delays, covering RC/Schmitt based designs, 555 timers, long pieces of wire, chains of inverter gates, bucket brigade IC and MCUs. All content free and open source.
submitted by /u/gbmhunter [link] [comments] |
My first own designed PCB a Led Chaser with a 2x 555 + 74hc595 for Halloween prop. I Converted a old alarm system to this.
submitted by /u/Dear-Beautiful2243 [link] [comments] |
My first 8-bit CPU on FPGA: FliPGA01 (details in comments)
submitted by /u/Training_Impact_5767 [link] [comments] |