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The 2025 CES: Safety, Longevity and Interoperability Remain a Mess
Once again this year, I’m thankfully reporting on CES (formerly also known by its de-acronym’d “Consumer Electronics Show” moniker, although the longer-winded version is apparently no more) from the remote comfort of my home office. There are admittedly worse places to visit than Las Vegas, especially given its newfound coolness courtesy of the Sphere (which I sadly have yet to experience personally):
That said, given the option to remain here, I’ll take it any day, realizing as I say this that it precludes on-camera cameos…which, come to think of it, is a plus for both viewers and myself!
(great job, Aalyia!)
Anyhoo, I could spend the next few thousand words (I’m currently guesstimating, based on repeated past experience, which in some years even necessitated a multi-part writeup series), telling you about all the new and not-new-but-maturing products and technologies showcased at the show. I’ll still do some of that, in part as case study examples of bigger-picture themes. But, to the title of this writeup, this year I wanted to start by stepping back and discussing three overriding themes that tainted (at least in my mind) all the announcements.
Safety
(Who among you is, like me, old enough to recognize this image’s source without cheating by clicking through first?)
A decade-plus ago, I told you the tale of my remote residence-located Linksys router that had become malware-infected:
Ever since then, I’ve made it a point to collect news tidbits on vulnerabilities and the attack vectors that subsequently exploit them, along with manufacturers’ subpar compromise responses. It likely won’t surprise you to learn that the rate of stories I’ve accumulated has only accelerated over time, as well as broadened beyond routers to encompass other LAN and WAN-connected products. I showcased some of them in two-part coverage published five years ago, for example, and disassembled another (a “cloud”-connected NAS) just a few months back.
The insecure-software situation has become so rampant, in fact, that the U.S. Federal Communications Committee (FCC) just unveiled a new program and associated label, the U.S. Cyber Trust Mark, intended to (as TechCrunch describes it) “help consumers make more informed decisions about the cybersecurity of the internet-connected products they bring into their homes.” Here’s more, from Slashdot’s pickup of the news, specifically referencing BleepingComputer’s analysis:
It’s designed for consumer smart devices, such as home security cameras, TVs, internet-connected appliances, fitness trackers, climate control systems, and baby monitors, and it signals that the internet-connected device comes with a set of security features approved by the National Institute of Standards and Technology (NIST). Vendors will label their products with the Cyber Trust Mark logo if they meet NIST cybersecurity criteria. These criteria include using unique and strong default passwords, software updates, data protection, and incident detection capabilities. Consumers can scan the QR code included next to the Cyber Trust Mark labels for additional security information, such as instructions on changing the default password, steps for securely configuring the device, details on automatic updates (including how to access them if they are not automatic), the product’s minimum support period, and a notification if the manufacturer does not offer updates for the device.
Candidly, I’m skeptical that this program will be successful, even if it survives the upcoming Presidential administration transition (speaking of which: looming trade war fears weighed heavily on folks’ minds at the show) and in spite of my admiration for its honorable intention. As reader “Thinking_J” pointed out in response to my recent teardown of a Bluetooth receiver that has undergone at least one mid-life internal-circuits switcheroo, the FCC essentially operates on the “honor system” in this and similar regards after manufacturers gain initial certification.
One of the root causes of such vulnerabilities, IMHO, is any reliance on open-source code, no matter that doing so may ironically also improve initial software quality. Requoting myself:
Open-source software has some compelling selling points. For one thing, it’s free, and the many thousands of developer eyeballs peering over it generally result in robust code. When a vulnerability is discovered, those same developers quickly fix it. But among those thousands of eyeballs are sets with more nefarious objectives in mind, and access to source code enables them to develop exploits for unpatched, easily identified software builds.
I also suspect that at least some amount of laissez-faire tends to creep into the software-development process when you adopt someone else’s code versus developing your own, especially if you subsequently “forget” to make proper attribution and take other appropriate action regarding that adoption. The result is a tendency to overlook the need to maintain that portion of the codebase as exploits and broader bugs in it are discovered and dealt with by the developer community or, more often than note, the one-and-only developer.
Sometimes, though, code-update neglect is intentional:
Consumer electronics manufacturers as a rule make scant (if any) profit on each unit sold, especially after subtracting the “percentage” taken by retailer intermediaries. Revenue tangibly accrues only as a function of unit volume, not from per-unit profit margin. Initial-sale revenue is sometimes supplemented by after-sale firmware-unlocked feature set updates, services, and other add-ons. But more often than not, a manufacturer’s path to ongoing fiscal stability involves straightforwardly selling you a brand-new replacement/upgrade unit down the road; cue obsolescence by design for the unit currently in your possession.
Which leads to my next topic…
Longevity
One of the products “showcased” in my August 2020 writeup didn’t meet its premature demise due to intentionally unfixed software bugs (as was the case for a conceptually similar product in Belkin’s Wemo line, several examples of which I owned when the exploit was announced). Instead, its early expiration was the result of an intentional termination of the associated “cloud” service done by its retail supplier, Best Buy (Connect WiFi Smart Plug shown above).
More recently, I told you about a similar situation (subsequently resolved positively via corporate buyout and resurrection, I’m happy to note) involving SmartLabs’ various Insteon-branded powerline networking products. Then there was the Spotify Car Thing, which I tore down in early 2023. And right before this year’s CES opened its doors to the masses, ironically, came yet another case study example of the ongoing disappointing trend: the $800 (nope, no refunds) Moxie “emotional support” robot, although open source (which, yes, I know I just critiqued earlier here) may yet come to the rescue for the target 5-10 year old demographic:
Government oversight to the rescue, again (?). Here’s a summary, from Slashdot’s highlight:
Nearly 89% of smart device manufacturers fail to disclose how long they will provide software updates for their products, a Federal Trade Commission staff study found this week. The review of 184 connected devices, including hearing aids, security cameras and door locks, revealed that 161 products lacked clear information about software support duration on their websites.
Basic internet searches failed to uncover this information for two-thirds of the devices. “Consumers stand to lose a lot of money if their smart products stop delivering the features they want,” said Samuel Levine, Director of the FTC’s Bureau of Consumer Protection. The agency warned that manufacturers’ failure to provide software update information for warranted products costing over $15 may violate the Magnuson Moss Warranty Act. The FTC also cautioned that companies could violate the FTC Act if they misrepresent product usability periods. The study excluded laptops, personal computers, tablets and automobiles from its review.
Repeating what I said earlier, I’m skeptical that this effort will be successful, despite my admiration for its honorable intentions. In no small part, my pessimism stems from recent US election results, given that Republicans have (historically, at least) been disproportionally pro-business to the detriment of consumer rights. That said, were the manufacturer phase-out to instead be the result of something other than the shutdown of a proprietary “cloud” service, such as (for example) a no-longer-maintained-therefore-viable (or at-all available, for that matter) proprietary application, the hardware might still be usable if it could alternatively be configured and controlled using industry-standard command and communications protocols.
Which leads to my next topic…
Interoperability
Those of you who read to the bitter end of my recently published “2024 look-back” tome might have noticed a bullet list of topics there that I’d originally also hoped to cover but eventually decided to save for later. The first topic on the list, “Matter and Thread’s misfires and lingering aspirations,” I held back not just because I was approaching truly ridiculous wordcount territory but also because I suspected I’d have another crack at it a short time later, at CES to be precise.
I was right; that time is now. Matter, for those of you not already aware, is:
…a freely available connectivity standard for smart home and IoT (Internet of Things) devices. It aims to improve interoperability and compatibility between different manufacturers and security, always allowing local control as an option.
And Thread? I thought you’d never ask. It’s:
…an IPv6-based, low-power mesh networking technology for Internet of things (IoT) products…
Often used as a transport for Matter (the combination being known as Matter over Thread), the protocol has seen increased use for connecting low-power and battery-operated smart-home devices.
Here’s what I wrote about Matter and Thread a year ago, in my 2024 CES discourse:
The Matter smart home communication standard, built on the foundation of the Thread (based on Zigbee) wireless protocol, had no shortage of associated press releases and product demos in Las Vegas this week. But to date, its implementation has been underwhelming (leading to a scathing but spot-on recent diatribe from The Verge, among other pieces), both in comparison to its backers’ rosy projections and its true potential.
Not that any of this was a surprise to me, alas. Consider that the fundamental premise of Matter and Thread was to unite the now-fragmented smart home device ecosystem exemplified by, for example, the various Belkin Wemo devices currently residing in my abode. If you’re an up-and-coming startup in the space, you love industry standards, because they lower your market-entry barriers versus larger, more established competitors. Conversely, if you’re one of those larger, more established suppliers, you love barriers to entry for your competitors.
Therefore the lukewarm-at-best (and more frequently, nonexistent or flat-out broken) embrace of Matter and Thread by legacy smart home technology and product suppliers (for which, to be precise, and as my earlier Blink example exemplifies, conventional web browser access, vs a proprietary app, is even a bridge too far)…Suffice it to say that I’m skeptical about Matter and Thread’s long-term prospects, albeit only cautiously so. I just don’t know what it might take to break the logjam that understandably prevents competitors from working together, in spite of the reality that a rising tide often does end up lifting all boats…or if you prefer, it’s often better to get a slice of a large pie versus the entirety of a much smaller pie.
A year later, is the situation better? Not really, candidly. For a more in-depth supplier-sourced perspective, I encourage you to read Aalyia’s coverage of her time spent last week in Silicon Labs’ product suite, including an interview with Daniel Cooley, CTO of the company. Cooley is spot-on when he notes that “it is not unusual for standards adoption to progress slower than desired.” I’ve seen this same scenario play out plenty of times in the past, and Matter and Thread (assuming they eventually achieve widespread success) won’t be the last. I’m reminded, for example, of a quote attributed to Bill Gates, that “We always overestimate the change that will occur in the next two years and underestimate the change that will occur in the next 10.”
Cooley is also spot-on when he notes that Matter and Thread don’t necessarily need to go together; the Matter connectivity standard can alternatively use Ethernet (either wireless, aka Wi-Fi, or wired) for transport, along with Bluetooth Low Energy for initial device setup purposes (and speaking of wireless smart home network protocols, by the way, a quick aside: check out Z-Wave’s just-announced long range enhancements). And granted, there has been at least progress with both Matter (in particular) and Thread over the past year.
Version 1.4 of the Matter specification, announced last November, promises (quoting from Ars Technica’s coverage) “more device types, improvements for working across ecosystems [editor note: a concept called “Enhanced Multi-Admin”], and tools for managing battery backups, solar panels, and heat pumps”, for example. And at CES, the Connectivity Standards Alliance (CSA), which runs Matter, announced that Apple, Google, and Samsung will accept its certification results for their various “Works With” programs, too. That said, Amazon is notably absent from the CSA’s fast-track certification list. And more generally, Ars Technica was spot-on with the title of its writeup, “Matter 1.4 has some solid ideas for the future home—now let’s see the support.” See you back here this same time next year?
The Rest of the Story
(no, I don’t know what ballet has to do with smart rings, either)
Speaking of “approaching truly ridiculous wordcount territory”, I passed through 2,000 words a couple of paragraphs back, so I’m going to strive to make the rest of this piece more concise. Looking again at the list of potential coverage technology and product topics I scribbled down a few days ago, partway through CES, and after subtracting out the “Matter and Thread” entry I just discussed, I find…16 candidates left. Let’s divide that in two, shall we? Without further ado, and in no particular order save for how they initially streamed out of my noggin:
- Smart glasses: Ray-Ban and Meta’s jointly developed second-generation smart glasses were one of the breakout consumer electronics hits of 2024, with good (initial experience, at least) reason. Their constantly evolving AI-driven capabilities are truly remarkable, on top of the first-generation’s foundational still and video image capture and audio playback support. Unsurprisingly, therefore, a diversity of smart glasses implementations in various function and price-point options, from numerous suppliers and in both nonfunctional mockup, prototype and already-in-production forms, populated 2025 CES public booths and private meeting rooms alike in abundance. I actually almost bought a pair of Ray-Ban Meta glasses during Amazon’s Black Friday…err…week-plus promotion to play around with for myself (and subsequently cover here at EDN, of course). But I decided to hold off for the inevitable barely-used (if at all) eBay-posting markdowns to come. Why? Well, the recent “publicity” stemming from the New Orleans tragedy didn’t help (and here I thought “glassholes” were bad). Even though Meta Ray-Ban offers product options with clear lenses, not just sunglasses, most folks don’t (and won’t) wear glasses all the time, not to mention that battery life limitations currently preclude doing so anyway (and don’t get me started on the embedded batteries’ inherent obsolescence by design). And when folks do wear them, they’re fashion statements. Multiple pairs for various outfits, moods, styles (invariably going in and out of fashion quickly) and the like are preferable, something that’s not fiscally feasible for the masses when the glasses cost several hundred dollars apiece.
- Smart rings: This wearable health product category is admittedly intriguing because unlike glasses (or watches, for that matter), rings are less obvious to others, therefore it’s less critical (IMHO, at least) for the wearer to perfectly match them with the rest of the ensemble…plus you have 10 options of where to wear one (that said, does anyone put a ring on their thumb?). There were quite a few smart rings at CES this year, and next year there’ll probably be more. Do me a favor; before you go further, please go read (but come back afterwards!) The Verge’s coverage of Ultrahuman’s Rare ring family (promo videos at the beginning of this section). The snark is priceless; it was the funniest piece of 2025 CES coverage I saw!
- HDMI: Version 2.2 is enroute, with higher bandwidth (96 Gbps) now supportive of 16K resolution displays (along with 4K displays at head-splitting 480 fps), among other enhancements. And there’s a new associated “Ultra96” cable, too. At first, I was a bit bummed when I heard this, due to the additional infrastructure investment that consumers will need to shoulder. But then I thought back to all the times I’d grabbed a random legacy cable out of my box o’HDMI goodies only to discover that, for example, it only supported 1080p resolution, not 4K…even though the next one I pulled out of the box, which looked just like its predecessor down to the exact same length, did 4K without breaking a sweat. And I decided that maybe making a break from HDMI’s imperfect-implementation past history wasn’t such a bad idea, after all…
- 3D spatial audio: Up to this point, Dolby’s pretty much had the 3D spatial audio (which expands—bad pun intended—beyond conventional surround sound to also encompass height) stage all to itself with Atmos, but on the eve of CES, Samsung unveiled the latest fruits of its partnership with Google to promulgate an open source alternative called IAMF, for Immersive Audio Model and Formats, now also known by its marketing moniker, “Eclipsa Audio”. In retrospect, this isn’t a terrible surprise; for high-end video, Samsung has already settled on HDR10+ versus Dolby Vision. But I have questions, specifically as to whether Google and Samsung are really going to be able to deliver something credible that doesn’t also collide with Dolby’s formidable patent portfolio. And I also gotta say that the fact that nobody at Samsung’s booth was able to answer one reporter’s questions doesn’t leave me with a great deal of early-days confidence.
- TVs: Speaking of video, I mentioned more than a decade ago that Chinese display manufacturers were beginning to “make serious hay” at South Korea competitors’ expense, much as those same South Korea-based companies had previously done to their Japanese competitors (that said, it sure was nice to see Panasonic’s displays back at CES!). To wit, TCS has become a particularly formidable presence in the TV market. While it and its competitors are increasingly using viewer-customized ads (logging and uniquely responding to the specific content you’re streaming at the time) and other smart TV “platform” revenue enhancements to counterbalance oft-unprofitable initial hardware prices, TCS takes it to the next level with remarkably bad AI-generated drivel shown on its own “free” (translation: advertising-rife) channel. No thanks, I’ll stick with reruns of The Office. That said, the on-the-fly auto-translation capabilities built into Samsung’s newest displays (along with several manufacturers’ earbuds and glasses) were way
- Qi: Good news/bad news on the wireless charging Bad news first: the Qi Consortium recently added the “Qi Ready” category to its Qi2 specification suite. What this means, simply stated, is that device manufacturers (notably, at least at the moment, of Android smartphones) no longer need to embed orientation-optimization magnets in the devices themselves. Instead, as I’m already doing with my Pixel phones, they can alternatively rely on magnets embedded in accompanying cases. On the one hand, as Apple’s MagSafe ecosystem already shows, if you put a case on a phone it needs to have magnets anyway, because the ones in the phone aren’t strong enough to work through the added intermediary case material. And—I dunno—maybe the magnets add notable bill-of-materials cost? Or they interfere with the phone’s speakers, microphones and the like? Or…more likely (cynically, at least), the phone manufacturers see branded cases-with-magnets as a lucrative upside revenue streams? Thoughts, readers? Now for the good news: auto-movable coils to optimize device orientation! How cool is that?
- Lithium battery-based storage systems: Leading suppliers are aggressively expanding beyond portable devices into full-blown home backup systems. EcoFlow’s monitoring and management software looks quite compelling, for example, although I think I’ll skip the solar cell-inclusive hat. And Jackery’s now also selling solar cell-augmented roof tiles.
- Last but not least: (the) RadioShack (licensed brand name, to be precise) is back, baby!
And, now well past 3,000 words, I’m putting this one to bed, saving discussions on robots, Wi-Fi standards evolutions, full-body scanning mirrors with cameras (!!), the latest chips, inevitable “AI” crap and the like for another day. I’ll close with iFixit’s annual “worst of show” coverage:
And with that, I look forward to your thoughts on the things I discussed, saved for later and overlooked alike in the comments!
—Brian Dipert is the Editor-in-Chief of the Edge AI and Vision Alliance, and a Senior Analyst at BDTI and Editor-in-Chief of InsideDSP, the company’s online newsletter.
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The post The 2025 CES: Safety, Longevity and Interoperability Remain a Mess appeared first on EDN.
Automotive insights from CES 2025
OEMs are shifting from installing black box solutions that specialized functions in the more conventional domain architecture to a zone architecture and a function-agnostic processing backbone where each node handles location-specific data. Along with this trend, there is a push towards optimizing sensor functions, fusing multimodal input data with ML for contextual awareness. Sensors no longer serve one function, instead they can be leveraged in a series of automotive systems from driver monitoring systems (DMSs) to smart door access. As a result, camera/sensor count is minimized and power consumption maximized. A tour of several booths at CES 2025 showed some of the automotive-oriented solutions.
Automotive lightingMicrochip’s intelligent smart embedded LED (ISELED), ISELED light and sensor network (ILaS), and Macroblock lighting solutions can be seen in Figure 1. The ISELED protocol was developed to overcome the issue of requiring an external IC per LED to control the color/brightness of individual LEDs. Instead, Microchip has integrated an intelligent ASIC into each LED where the entire system can be controlled with a simple 16-bit MCU. The solution allows for more styling control for aesthetics with additional use cases such as broadcasting the status of a car via text that appears on display-based matrix lighting.
Figure 1: Microchip ISELED lighting solution where all of these LEDS are individually addressable allowing designers to change color/brightness levels of each LED.
ADI’s 10BASE-T1S ethernet to edge bus (E2B) tech has been used as a body control and automotive lighting connectivity solution. And, while this solution is not directly related to LED control, it can be used to update OEM automotive lighting systems that leverage the 10BASE-T1S automotive bus.
In-cabin sensing systemsOne of the more pervasive themes were child presence detection (CPD) and occupancy monitoring system (OMS) products, with many companies showing off their ultra-wide band (UWB) detection and/or ranging tech and 60-GHz radar chips. The inspiration here comes from the incessant pressure on OEMs to meet stringent safety regulations. For instance, The Euro NCAP advanced program will only offer rewards to OEMs for direct sensing systems for CPD. For UWB sensing, the typical setup involved 4 UWB anchors placed outside of the vehicles and two on the inside to detect a phone equipped with UWB. The NXP booth’s automotive UWB demo can be seen in Figure 2. As shown in the image, the UWB radar will be able to identify the distance of the phone from the UWB anchor and unlock the car from the outside using the UWB ranging feature with time of flight (ToF) measurements. The very same principles can be applied for smart door locks and train stations, allowing passengers with pre-purchased train tickets to pass the turnstile from outside of the station to the inside of it.
Figure 2: The NXP automotive UWB radar smart car access solution.
Qorvo also showed their UWB solution, Figure 3 shows one UWB anchor on a toy car for demonstration purposes. The image also highlights another ADAS application of radar (UWB or 60 GHz): respiration and heartbeat detection.
An engineer at NXP granted a basic explanation of the process: the technology measures signal reflections from occupants to detect, for instance, how often the chest is expanding/contracting to measure breathing. This allows for direct-sensing of occupants with algorithms that can discern whether or not a child is present in the vehicle, offering a CPD, OMS, intrusion & proximity alert, and a host of other functions with the established sensor infrastructure. It is apparent that there is no clear answer on the number of wireless chips but there is more of a clear requirement that sensors are becoming more intelligent to minimize part-count—a single radar chip could eliminate five in-seat weight sensors.
Figure 4: Qorvo’s UWB keyless entry and vitals monitoring solutions in partnership with other companies.
TI’s CPD, OMS, and driver monitoring system (DMS) can be seen in Figure 5 with a combination of their 60-GHz radar chip and a camera. Naturally, the shorter wavelength 60-GHz radar offers much more range resolution so this system would likely be more accurate in CPD applications potentially offering less false positives. However, possibly the most obvious benefit of utilizing 60 GHz radar is the fact that a single module replaces the 6 UWB modules for CPD, OMS, intrusion detection, gesture detection, etc. This however, does not entirely sidestep UWB technology; the ranging aspect of UWB allows for accurate smart door access and this is something that may be impractical for 60-GHz technology, especially considering the atmospheric absorption at that particular frequency.
Figure 5: TI’s CPD, OMS, and driver monitoring system (DMS) CES demo.
AD and surround view systemsAutomotive surround view cameras for AD and ADAS functions were also presented in a number of booths. Microchip’s can be seen in Figure 6 where their serializers are used in three cameras that can transmit up to 8 Gbps. The Microchip deserializers are configured to receive the video data and aggregate it via the Automotive SerDes Alliance Motion Link (ASA-ML) standard to the central compute, or high-performance computer (HPC), mimicking a zonal architecture.
Figure 6: Microchip’s ASA-ML standard 360o surround view solution.
ADI also used a serializer/deserializer (SerDes) solution with a gigabit multimedia serial link (GMSL) demo. GMSL’s claim to fame is its lightweight nature, the single-strand solution transports up to 12 Gbps over a single bidirectional cable, shaving weight.
Figure 7: ADI GMSL demo aggregating feeds from six cameras into a deserializer board and going into a single MIPI port on the Jetson HPC-platform.
Using VLMs for ADAmbarella, a company that specializes in AI vision processors showed a particularly interesting AD demo that integrated LLM in the stack. This technology was originally developed by Vislab, an Italian startup that is now an R&D automotive center under Ambarella. The system consisted of 6 cameras, 5 radars, and Ambarella’s CV3 automotive domain controller for L2+ to L4 autonomy. The use of the vision language model (VLM) LLaVA-OneVision allowed for more context-aware decision making.
Founder of Vislab, Alberto Broggi hosted the demo and explained the benefits of leveraging an LLM in this particular use case, “Suppose you have the best perception in the world, so you can perceive everything; you can understand the position of cars, locate pedestrians, and so on. You will still have problems, because there are situations that are ambiguous.” He continued by describing a few of these situations, “If you have a car in front of you in your lane, you don’t really know whether or not you can overtake because it depends on the situation. If its a broken down vehicle, you can obviously overtake it. If it’s a vehicle that is waiting for a red light, you can’t. So you really need some higher level description and context.”
Figure 8 and the video below shows one such example of contextual-awareness that a VLM can offer.
Figure 8: Ambarella VLM AD demo with use case offering some contextual-awareness and suggestions.
Aalyia Shaukat, associate editor at EDN, has worked in the design publishing industry for six years. She holds a Bachelor’s degree in electrical engineering from Rochester Institute of Technology, and has published works in major EE journals as well as trade publications.
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The post Automotive insights from CES 2025 appeared first on EDN.
CES 2025 coverage
Editors from EDN and our AspenCore sister publications are covering the Consumer Electronics Show (CES). Scroll down to see coverage of this year’s CES!
CES 2025: Day 2 Wrap and Interview with EdgeCortix’s CEO A constant theme at CES 2025 this week has been around the deployment of AI in all kinds of applications, how to drive as much intelligence as possible to the edge, sensor fusion and making everything smart. We saw many large and small companies developing technologies and products to optimize this process, aiming to get more “smarts” or performance with less effort and power. |
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CES 2025: Approaches towards hardware acceleration It is clear that support for some kind of hardware acceleration has become paramount for success in breaking into the intelligent embedded edge. Company approaches to the problem run the full gamut from hardware accelerated MCUs with abundant software support and reference code, to an embedded NPU. |
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CES 2025: It’s All About Digital Coexistence, and AI is Real CES 2025 commenced in Las Vegas, Nev., on Sunday at the Mandalay Bay Convention Center for the trade media with the Consumer Technology Association’s annual tech trends survey and forecast. Plus, there was a sneak preview provided to some of the exhibiting companies at the CES Unveiled event. |
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Integration of AI in sensors prominent at CES 2025 Miniaturization and power efficiency have long defined sensor designs. Enter artificial intelligence (AI) and software algorithms to dramatically improve sensing performance and enable a new breed of features and capabilities. This trend has been apparent at this year’s CES in Las Vegas, Nevada. |
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Software-defined vehicle (SDV): A technology to watch in 2025 Software-defined vehicle (SDV) technology has been a prominent highlight in the quickly evolving automotive industry. But how much of it is hype, and where is the real and tangible value? CES 2025 in Las Vegas will be an important venue to gauge the actual progress this technology has made with a motto of bringing code on the road. |
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CES 2025: Wirelessly upgrading SDVs SDVs rethink underlying vehicle architecture so that cars are broken into zones that will directly service the vehicle subsystems that surround it locally, cutting down wiring, latency, and weight. Another major benefit of this is over-the-air (OTA) updates using Wi-Fi or cellular to update cloud-connected cars; however, bringing Ethernet to the automotive edge comes with its complexities. |
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CES 2025: Moving toward software-defined vehicles TI’s automotive innovations are currently focused in powertrain systems; ADAS; in-vehicle infotainment (IVI); and body electronics and lighting. The recent announcements fall into the ADAS with the AWRL6844 radar sensor as well as IVI with the AM275 and AM62D processors and the class-D audio amplifier. |
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CES 2025: Day 1 Recap with Synaptics, Ceva EE Times and AspenCore staff are on-site at CES 2025, providing expert coverage on the latest and greatest developments at one of the largest tech events in the world. |
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CES 2025: A Chat with Siemens EDA CEO Mike Ellow Siemens showcased its latest PAVE360 digital twin solution this year at CES 2025, lowering the barrier between design efforts that are typically siloed. EE Times had an opportunity to chat with Siemens EDA CEO Mike Ellow about how this approach to design is relevant for the semiconductor industry—especially considering the recent uptick in using AI tools at every level of a system to dynamically assess the trickle up/down effects of design adjustments. |
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CES 2025: An interview with Si Labs’ Daniel Cooley At the forefront of many of the CES wireless solutions is WiFi’s newest iteration (WiFi 6), BLE and BLE audio for their already-established place in consumer devices. A chat with Silicon Labs CTO Daniel Cooley illuminated the company’s presence and future in IoT and the intelligent edge. |
The post CES 2025 coverage appeared first on EDN.
Integration of AI in sensors prominent at CES 2025
Miniaturization and power efficiency have long defined sensor designs. Enter artificial intelligence (AI) and software algorithms to dramatically improve sensing performance and enable a new breed of features and capabilities. This trend has been apparent at this year’s CES in Las Vegas, Nevada.
See full story at EDN’s sister publication, Planet Analog.
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The post Integration of AI in sensors prominent at CES 2025 appeared first on EDN.
CES 2025: Approaches towards hardware acceleration
Edge computing has naturally been a hot topic at CES with companies highlighting a myriad of use cases where the pre-trained edge device runs inference locally to produce the desired output, never once interacting with the cloud. The complexity of these nodes has grown to not only include multimodal support with the fusion and collaboration between sensors for context-aware devices but also multiple cores to ratchet up the compute power.
Naturally, any hardware acceleration has become desirable with embedded engineers craving solutions that ease the design and development burden. The solutions vary where many veer towards developing applications with servers in the cloud that are then virtualized or containerized to run at the edge. Ultimately, there is no one-size-fits-all solution for any edge compute application.
It is clear that support for some kind of hardware acceleration has become paramount for success in breaking into the intelligent embedded edge. Company approaches to the problem run the full gamut from hardware accelerated MCUs with abundant software support and reference code, to an embedded NPU.
Table 1 highlights this with a list of a few companies and their hardware acceleration support.
Company |
Hardware acceleration |
Implemented in |
Throughput |
Software |
NXP |
eIQ Neutron NPU |
select MCX, i.MX RT crossover MCUs, and i.MX applications processors |
32 Ops/cycle to over 10,000 Ops/cycle |
eIQ Toolkit, eIQ Time Series Studio |
STMicroelectronics |
Neural-ART Accelerator NPU |
STM32N6 |
up to 600 GOPS |
ST Edge AI Suite |
Renesas |
DRP-AI |
RZ/V2MA, RZ/V2L, RZ/V2M |
– |
DRP-AI Translator, DRP-AI TVM |
Silicon Labs |
Matrix Vector Processor, AI/ML co-processor |
BG24 and MG24 |
– |
MVP Math Library API, partnership with Edge Impulse |
TI |
NPU |
TMS320F28P55x, F29H85x, C2000 and more |
Up to 1200 MOPS (on 4bWx8bD) Up to 600 MOPS (on 8bWx8bD) |
Model Composer GUI or Tiny ML Modelmaker |
Synaptics |
NPU |
Astra (SL1640, SL1680) |
1.6 to 7.9 TOPS |
Open software with complete GitHub project |
Infineon |
Arm Ethos-U55 micro-NPU processor |
PSOC Edge MCU series, E81, E83 and E84 |
– |
ModusToolbox |
Microchip |
AI-accelerated MCU, MPU, DSC, or FPGA |
8-, 16- and 32-bit MCUs, MPUs, dsPIC33 DSCs, and FPGAs |
– |
MPLAB Machine Learning Development Suite, VectorBlox Accelerator Software Development (for FPGAs) |
Qualcomm |
Hexagon NPU |
Oryon CPU, Adreno GPU |
45 TOPS |
Qualcomm Hexagon SDK |
Table 1: Various company’s approaches for hardware acceleration.
Synaptics, for instance, has their Astra platform that is beginning to incorporate Google’s multi-level intermediate representation (MLIR) framework. “The core itself is supposed to take in models and operate in a general-purpose sense. It’s sort of like an open RISC-V core based system but we’re adding an engine alongside it, so the compiler decides whether it goes to the engine or whether it works in a general-purpose sense.” said Vikram Gupta, senior VP and general manager of IoT processors and chief product officer, “We made a conscious choice that we wanted to go with open frameworks. So,whether it’s a Pytorch model or a TFLite model, it doesn’t matter. You can compile it to the MLIR representation, and then from there go to the back end of the engine.” One of their CES demos can be seen in Figure 1.
Figure 1: A smart camera solution showing the Grinn SoM that uses the Astra SL1680 and software from Arcturus to provide both identification and tracking. New faces are assigned an ID and an associated confidence interval that will adjust according to the distance from the camera itself.
TI showcased its TMS320F28P55x C2000 real-time controller (RTC) MCU series with an integrated NPU with an arc fault detection solution for solar inverter applications. The system performs power conversion while at the same time doing real-time arc fault detection using AI. The solution follows the standard process of obtaining data, labeling, and training the arc fault models that are then deployed onto the C2000 device (Figure 2).
Figure 2: TI’s solar arc fault detection edge AI solution
One of Microchip’s edge demos detected true touches in the presence water using its mTouch algorithm in combination with their PIC16LF1559 MCU (Figure 3). Another solution highlighted was in partnership with Edge Impulse and used the FOMO ML architecture to perform object detection in a truck loading bay. Other companies, such as Nordic Semiconductor, have also partnered with Edge Impulse to ease the process of labeling, training, and deploying AI to their hardware. The company has also eased the process of leveraging NVIDIA TAO models to adapt well-established AI models to a specific end-application on any Edge-Impulse-supported target hardware.
Figure 3: Some of Microchip’s edge AI solutions at CES 2025. Truck loading bay augmented by AI in partnership with Edge Impulse (left) and a custom-tailored Microchip solution using their mTouch algorithm to differentiate between touch and water (right).
Aalyia Shaukat, associate editor at EDN, has worked in the design publishing industry for six years. She holds a Bachelor’s degree in electrical engineering from Rochester Institute of Technology, and has published works in major EE journals as well as trade publications.
Related Content- CES 2025: A Chat with Siemens EDA CEO Mike Ellow
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- ADI’s efforts for a wirelessly upgraded software-defined vehicle
- CES 2025: Moving toward software-defined vehicles
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Dev kit uses backscatter Wi-Fi for low-power connectivity
HaiLa Technologies has introduced the EVAL2000 development board, featuring its BSC2000 passive backscatter Wi-Fi chip and ST’s STM32U0 MCU. The platform empowers developers and researchers to create ultra-low-power connected sensor applications over Wi-Fi.
The BSC2000 is a monolithic chip that combines analog front-end and digital baseband components to implement HaiLa’s backscatter protocol for 802.11 1-Mbps Direct Sequence Spread Spectrum (DSSS) over Wi-Fi. By using backscattering, it enables low-power communication by reflecting existing Wi-Fi signals instead of generating its own. This allows devices to transmit data with minimal energy consumption. Leveraging readily available, standard Wi-Fi infrastructure, the BSC2000 backscatter Wi-Fi chip collects and transmits sensor data with power efficiency that extends the life of battery-operated sensors.
The EVAL2000 development board accelerates prototyping with GPIO, I2C, and SPI sensor interfaces. Sensor integration is handled through firmware on the MCU. The kit also includes an onboard temperature/humidity sensor.
The BSC2000 EVAL2000 development kit is available for preorder, with shipping anticipated for Q1 2025. For more information on the backscatter Wi-Fi chip and development kit, click here.
Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.
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SoC supports multiple wireless protocols
The Talaria 6 family of SoCs from InnoPhase provides Wi-Fi 6, Bluetooth 6.0, Thread, and Zigbee connectivity, along with PSA Level 2 and Level 3 security. Powered by an Arm Cortex-M33 processor and a rich peripheral suite, the SoCs offer the computational performance needed for real-time, on-chip edge AI tasks, including predictive maintenance, sensor analytics, and smart power management.
Talaria 6 wireless SoCs support Wi-Fi 6 (802.11ax) and are Wi-Fi 7 (802.11be) ready, achieving ultra-low power and high-performance connectivity. Integrated digital CMOS radio technology ensures robust throughput in noisy, high-density environments, making them well-suited for smart thermostats, video cameras, and sensors.
Single and dual-band options (2.4 GHz/5 GHz) offer flexible band selection based on use case and network conditions. IEEE 802.11be extensions and multi-link operation improve throughput, lower latency, and increase reliability in congested environments.
Additionally, the SoCs support Bluetooth 6.0, Bluetooth Classic, Thread, and Zigbee mesh networks, enabling seamless integration with a wide range of IoT devices. To protect against cybersecurity threats, Talaria 6 devices feature hardware-based encryption, secure boot, and tamper resistance, safeguarding sensitive data and meeting PSA Level 2 and Level 3 security standards.
The INP6120 2.4-GHz Wi-Fi 6 SoC is expected to sample in Q2 2025, with production starting in Q4 2025. The INP6220 dual-band 2.4/5-GHz Wi-Fi 6 SoC will sample in the second half of 2025, with production beginning in the first half of 2026.
Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.
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Synaptics partners with Google to advance edge AI
Synaptics is pairing Google’s ML core with its Astra AI-native hardware and open-source software to simplify context-aware IoT device development. The MLIR-compliant core on Astra hardware accelerates AI processing for vision, image, voice, sound, and other modalities. This combination enables intuitive interaction in wearables, appliances, entertainment systems, embedded hubs, monitoring, and control across consumer, automotive, enterprise, and industrial applications.
The Astra AI-native compute platform for IoT integrates scalable, low-power edge compute silicon with open-source, user-friendly software, robust tools, a strong partner ecosystem, and wireless connectivity. Built on Synaptics’ expertise in neural networks, proven AI hardware, and compiler design for IoT, the platform also supports a wide range of modalities with refined in-house solutions. Google’s ML core, a highly efficient open-source machine learning core, is MLIR-compliant, enhancing compatibility with modern compilers.
For more information about Synaptics’ Astra embedded processors for AI-native IoT, click here.
Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.
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Mitsubishi samples high-voltage IGBT modules
Mitsubishi announced that it has begun shipping samples of two new S1-Series high-voltage IGBT modules rated at 1.7 kV. These two components are useful for large industrial equipment, such as railcars and DC power transmitters. With proprietary IGBT devices and advanced insulation structures, the S1-Series modules enhance reliability, minimize power loss, and reduce thermal resistance, supporting more reliable and efficient operation of inverters in large industrial equipment.
The S1-Series incorporates Mitsubishi’s Relaxed Field of Cathode (RFC) diode, increasing the Reverse Recovery Safe Operating Area (RRSOA) by 2.2 times over previous models, improving inverter reliability. Additionally, an IGBT element with a Carrier Stored Trench Gate Bipolar Transistor (CSTBT) structure reduces power loss and thermal resistance, enabling more efficient inverter operation. The upgraded insulation structure boosts insulation voltage resistance to 6.0 kVRMS—1.5 times higher than earlier products—allowing more flexible insulation designs for compatibility with a broader range of inverter types.
Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.
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ADI’s efforts for a wirelessly upgraded software-defined vehicle
In-vehicle systems have massively grown in complexity with more installed speakers, microphones, cameras, displays, and compute burden to process the necessary information and provide the proper, often time-sensitive output. The unfortunate side effect of this complexity is the massive increase in ECUs and subsequent cabling to and from its allocated subsystem (e.g., engine, powertrain, braking, etc.). The lack of practicality with this approach has become apparent where more OEMs are shifting away from these domain-based architectures and subsequently traditional automotive buses such as local interconnect network (LIN), controlled area network (CAN) for ECU communications, FlexRay for x-by-wire systems, and media oriented transport (MOST) for audio and video systems. SDVs rethink underlying vehicle architecture so that cars are broken into zones that will directly service the vehicle subsystems that surround it locally, cutting down wiring, latency, and weight. Another major benefit of this are over-the-air (OTA) updates using Wi-Fi or cellular to update cloud-connected cars, however bringing ethernet to the automotive edge comes with its complexities.
ADI’s approach to zonal architecturesThis year at CES, EDN spoke with Yasmine King, VP of automotive cabin experience at Analog Devices (ADI). The company is closely working with the underlying connectivity solutions that allow vehicle manufacturers to shift from domain architectures to zonal with ethernet-to-edge (E2B) bus, automotive audio bus (A2B), and gigabit multimedia serial link (GMSL) technology. “Our focus this year is to show how we are adding intelligence at the edge and bringing the capabilities from bridging the analog of the real world into the digital world. That’s the vision of where automotive wants to get to, they want to be able to create experiences for their customers, whether it’s the driving experience, whether it’s the back seat passenger experience. How do you help create these immersive and safe experiences that are personalized to each occupant in the vehicle? In order to do that, there has to be a fundamental change of what the architecture of the car looks like,” said King. “So in order to do this in a way that is sustainable, for mobility to remain green, remain long battery range, good fuel efficiency, you have to find a way of transporting that data efficiently, and the E2B bus is one of those connectivity solutions where it’s it allows for body control, ambient lighting.”
E2B: Remote control protocol solution 10BASE-T1S solutionBased on the OPEN alliance 10BASE-T1S physical layer (PHY), the E2B bus aims at removing the need for MCUs centralizing the software to the high performance compute (HPC) or central compute (Figure 1). “The E2B bus is the only remote control protocol solution available on the market today for the 10BASE-T1S so it’s a very strong position for us. We just released our first product in June of this past year, and we see this as a very fundamental way to help the industry transform to zonal architecture. We’re working with the OPEN alliance to be part of that remote control definition.” These transceivers will integrate low complexity ethernet (LCE) hardware for remote operation and, naturally, can be used on the same bus as any other 10BASE-T1S-compliant product
BMW has already adopted the E2B bus for their ambient lighting system, King mentioned that there has already been further adoption by other OEMs but they were not public yet. “The E2B bus is one of those connectivity solutions where it allows for body control, ambient lighting. Honestly, there’s about 50 or 60 different applications inside the vehicle.” She mentioned how E2B is often used for ambient lighting today but there are many other potential applications such as driver monitoring systems (DMSs) that might detect a sleeping driver via the in-vehicle biometric capabilities to then respond with a series of measures to wake them up, E2B allows OEMs to apply these measures with an OTA update. Without E2B, you’d have to not only update the DMS, but you’d have to update the multiple nodes that are controlling the ambient light. The owner might have to take it back into the shop to apply the updates, it just takes longer and is more of a hassle. With E2B, it’s a single OTA update that is an easy, quick download to add safety features so it’s more realistic to get that safer, more immersive driver experience.” The goal for ADI is to move all the software from all edge nodes to the central location for updates.
Figure 1: EDN editor, Aalyia Shaukat (left) and VP of automotive cabin experience, Yasmine King (right) in front of a suspension control demo with 4 edge nodes sensing the location of the weighted ball, sends the information back to the HPC to send commands back to control the motors.
A2B: Audio system based on 100BASE-T1Based upon the 100BASE-T1 standard, the A2B audio follows a similar concept of connecting edge nodes with a specialization in sound limiting the installation of weighty shielded analog cables going to and from the many speakers and microphones in vehicles today for modern functions such as active noise cancellation (ANC) and road noise cancellation (RNC). “We have RNC algorithms that are connected through A2B, and it’s a very low latency, highly deterministic bus. It allows you to get the inputs from, say, the wheel base, where you’re listening for the noise, to the brain of the central compute very quickly.” King mentioned how audio systems require extremely low latencies for an enhanced user experience, “your ears are very susceptible to any small latency or distortion.” The technology has more maturity than the newer E2B bus and has therefore seen more adoption, “A2B is a technology that is utilized across most OEMs, the top 25 OEMs are all using it and we’ve shipped millions of ICs.” ADI is working on a second iteration of the A2B bus that multiplies the data rate of the previous generation, this is likely due to the maturation of the 1000BASE-T1 standard for automotive applications that is meant to reach 1 Gbps. When asked about the data rate King responded, “I’m not sure exactly what we are publicly stating yet but it will be a multiplier.”
GMSL: Single-wire SerDes display solutionGMSL is the in-vehicle serializer/deserializer (SerDes) video solution that shaves off the significant wiring typically required with camera and subsequent sensor infrastructure (Figure 2). “As you’re moving towards autonomous driving and you want to replace a human with intelligence inside the vehicle, you need additional sensing capabilities along with radar, LiDAR, and cameras to be that perception sensing network. It’s all very high bandwidth and it needs a solution that can be transmitted in a low-cost, lightweight cable.” Following a similar theme as the E2B and A2B audio buses, using a single cable to manage a cluster display or an in-vehicle infotainment (IVI) human-to-machine interface (HMI) minimizes the potential weight issues that could damage range/fuel efficiency. King finished by mentioning one overlooked benefit of lowering the weight of vehicle harnessing “The other piece that often gets missed is it’s very heavy during manufacturing, when you move over 100 pounds within the manufacturing facilities you need different safety protocols. This adds expense and safety concerns for the individuals who have to pick up the harness where now you have to get a machine over to pick up the harness because it’s too heavy.”
Figure 2: GMSL demo aggregating feeds from six cameras into a deserializer board going into a single MIPI port on the Jetson HPC-platform.
Aalyia Shaukat, associate editor at EDN, has worked in the design publishing industry for six years. She holds a Bachelor’s degree in electrical engineering from Rochester Institute of Technology, and has published works in major EE journals as well as trade publications.
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PWMpot approximates a Dpot
Digital potentiometers (“Dpots”) are a diverse and useful category of digital/analog components with up to a 10-bit resolution, element resistance from 1k to 1M, and voltage capability up to and beyond ±15v. However, most are limited to 8 bits, monopolar (typically 0v to +5v) signal levels, and 5k to 100k resistances with loose tolerances of ±20 to 30%.
Wow the engineering world with your unique design: Design Ideas Submission Guide
This design idea describes a simple and inexpensive Dpot-like alternative. It has limitations of its own (mainly being restricted to relatively low signal frequencies) but offers useful and occasionally superior performance in areas where actual Dpots tend to fall short. These include parameters like bipolar signal range, terrific differential nonlinearity, tight resistance accuracy, and programmable resolution. See Figure 1.
Figure 1 PWM drives opposing-phase CMOS switches and RC network to simulate a Dpot
RC ripple filtering limits frequency response to typically tens to hundreds of Hz.
Switch U1b connects wiper node W to node B when PWM = 1, and to A when PWM = 0. Letting the PWM duty factor, P = 0 to 1, and assuming no excessive loading of W:
Vw = P(Vb – Va) + Va
Meanwhile, switch U1a connects W to node A when PWM = 1, and to B when PWM = 0, thus 180o out of phase with U1b. Due to AC coupling, this has no effect on pot DC output, but the phase inversion relative to U1b delivers active ripple attenuation as described in “Cancel PWM DAC ripple with analog subtraction.”
The minimum RC time-constant required to attenuate ripple to no more than 1 least significant bit (lsb) for any given N = number of PWM bits of resolution and Tpwm = PWM period is given by:
RC = Tpwm 2(N/2 – 2)
For example:
for N = 8, Fpwm = 10 kHz
RC = 10 kHz-1*2(8/2 – 2) = 100 µs*22 = 400 µs
The maximum acceptable value for R is dictated by the required Vw voltage accuracy under load. Minimum R is determined by:
- Required resistance accuracy after factoring in the variability of U1b switch Ron: r which is 40 ±40Ω for the HC4053 powered as in Figure 1.
- Required integral nonlinearity (INL) as affected by switch-to-switch Ron variation, which is just 5 Ω for the HC4053 as powered here.
R = 1k to 10k would be a workable range of choices for N = 8-bit resolution. N is programmable.
The net result is the equivalent circuit shown in Figure 2. Note that, unlike a mechanical pot or Dpot, where output resistance varies dramatically with wiper setting, the PWMpot’s output resistance (R +r) is nominally constant and independent of setting.
Figure 2 The PWMpot’s equivalent circuit where r = switch Ron, P = PWM duty factor, and where the ripple filter capacitors are not shown.
Funny footnote: While pondering a name for this idea, I initially thought “PWMpot” was too long and considered making it shorter and catchy-er by dropping the “WM.” But then, after reading the resulting acronym out loud, I decided it was maybe a little too catchy.
And put the “WM” back!
Stephen Woodward’s relationship with EDN’s DI column goes back quite a long way. Over 100 submissions have been accepted since his first contribution back in 1974.
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AI at the edge: It’s just getting started
Artificial intelligence (AI) is expanding rapidly to the edge. This generalization conceals many more specific advances—many kinds of applications, with different processing and memory requirements, moving to different kinds of platforms. One of the most exciting instances, happening soonest and with the most impact on users, is the appearance of TinyML inference models embedded at the extreme edge—in smart sensors and small consumer devices.
Figure 1 The TinyML inference models are being embedded at the extreme edge in smart sensors and small consumer devices. Source: PIMIC
This innovation is enabling valuable functions such as keyword spotting (detecting spoken keywords) or performing environmental-noise cancellation (ENC) with a single microphone. Users treasure the lower latency, reduced energy consumption, and improved privacy.
Local execution of TinyML models depends on the convergence of two advances. The first is the TinyML model itself. While most of the world’s attention is focused on enormous—and still growing—large language models (LLMs), some researchers are developing really small neural-network models built around hundreds of thousands of parameters instead of millions or billions. These TinyML models are proving very capable on inference tasks with predefined inputs and a modest number of inference outputs.
The second advance is in highly efficient embedded architectures for executing these tiny models. Instead of a server board or a PC, think of a die small enough to go inside an earbud and efficient enough to not harm battery life.
Several approaches
There are many important tasks involved in neural-network inference, but the computing workload is dominated by matrix multiplication operations. The key to implementing inference at the extreme edge is to perform these multiplications with as little time, power, and silicon area as possible. The key to launching a whole successful product line at the edge is to choose an approach that scales smoothly, in small increments, across the whole range of applications you wish to cover.
It is the nature of the technology that models get larger over time.
System designers are taking different approaches to this problem. For the tiniest of TinyML models in applications that are not particularly sensitive to latency, a simple microcontroller core will do the job. But even for small models, MCUs with their constant fetching, loading, and storing are not an energy-efficient approach. And scaling to larger models may be difficult or impossible.
For these reasons many choose DSP cores to do the processing. DSPs typically have powerful vector-processing subsystems that can perform hundreds of low-precision multiply-accumulate operations per cycle. They employ automated load/store and direct memory access (DMA) operations cleverly to keep the vector processors fed. And often DSP cores come in scalable families, so designers can add throughput by adding vector processor units within the same architecture.
But this scaling is coarse-grained, and at some point, it becomes necessary to add a whole DSP core or more to the design, and to reorganize the system as a multicore approach. And, not unlike the MCU, the DSP consumes a great deal of energy in shuffling data between instruction memory and instruction cache and instruction unit, and between data memory and data cache and vector registers.
For even larger models and more latency-sensitive applications, designers can turn to dedicated AI accelerators. These devices, generally either based on GPU-like SIMD processor arrays or on dataflow engines, provide massive parallelism for the matrix operations. They are gaining traction in data centers, but their large size, their focus on performance over power, and their difficulty in scaling down significantly make them less relevant for the TinyML world at the extreme edge.
Another alternative
There is another architecture that has been used with great success to accelerate matrix operations: processing-in-memory (PiM). In this approach, processing elements, rather than being clustered in a vector processor or pipelined in a dataflow engine, are strategically dispersed at intervals throughout the data memory. This has important benefits.
First, since processing units are located throughout the memory, processing is inherently highly parallel. And the degree of parallel execution scales smoothly: the larger the data memory, the more processing elements it will contain. The architecture needs not change at all.
In AI processing, 90–95% of the time and energy is consumed by matrix multiplication, as each parameter within a layer is computed with those in subsequent layers. PiM addresses this inefficiency by eliminating the constant data movement between memory and processors.
By storing AI model weights directly within memory elements and performing matrix multiplication inside the memory itself as input data arrives, PiM significantly reduces data transfer overhead. This approach not only enhances energy efficiency but also improves processing speed, delivering lower latency for AI computations.
To fully leverage the benefits of PiM, a carefully designed neural network processor is crucial. This processor must be optimized to seamlessly interface with PiM memory, unlocking its full performance potential and maximizing the advantages of this innovative technology.
Design case study
The theoretical advantages of PiM are well established for TinyML systems at the network edge. Take the case of Listen VL130, a voice-activated wake word inference chip,which is also PIMIC’s first product. Fabricated on TSMC’s standard 22-nm CMOS process, the chip’s always-on voice-detection circuitry consumes 20 µA.
This circuit triggers a PiM-based wake word-inference engine that consumes only 30 µA when active. In operation, that comes out to a 17-times reduction in power compared to an equivalent DSP implementation. And the chip is tiny, easily fitting inside a microphone package.
Figure 2 Listen VL130, connected to external MCU in the above diagram, is an ultra-low-power keyword-spotting AI chip designed for edge devices. Source: PIMIC
PIMIC’s second chip, Clarity NC100, takes on a more ambitious TinyML model: single-microphone ENC. Consuming less than 200 µA, which is up to 30 times more efficient than a DSP approach, it’s also small enough for in-microphone mounting. It is scheduled for engineering samples in January 2025.
Both chips depend for their efficiency upon a TinyML model fitting entirely within an SRAM-based PiM array. But this is not the only way to exploit PiM architectures for AI, nor is it anywhere near the limits of the technology.
LLMs at the far edge?
One of today’s undeclared grand challenges is to bring generative AI—small language models (SLMs) and even some LLMs—to edge computing. And that’s not just to a powerful PC with AI extensions, but to actual edge devices. The benefit to applications would be substantial: generative AI apps would have greater mobility while being impervious to loss of connectivity. They could have lower, more predictable latency; and they would have complete privacy. But compared to TinyML, this is a different order of challenge.
To produce meaningful intelligence, LLMs require training on billions of parameters. At the same time, the demand for AI inference compute is set to surge, driven by the substantial computational needs of agentic AI and advanced text-to-video generation models like Sora and Veo 2. So, achieving significant advancements in performance, power efficiency, and silicon area (PPA) will necessitate breakthroughs in overcoming the memory wall—the primary obstacle to delivering low-latency, high-throughput solutions.
Figure 3 Here is a view of the layout of Listen VL130 chip, which is capable of processing 32 wake words and keywords while operating in the tens of microwatts, delivering energy efficiency without compromising performance. Source: PIMIC
At this technology crossroads, PiM technology is still important, but to a lesser degree. With these vastly larger matrices, the PiM array acts more like a cache, accelerating matrix multiplication piecewise. But much of the heavy lifting is done outside the PiM array, in a massively parallel dataflow architecture. And there is a further issue that must be resolved.
At the edge, in addition to facilitate model execution, it’s of primary importance to resolve the bandwidth and energy issues that come with scaling to massive memory sizes. Meeting all these challenges can improve an edge chip’s power-performance-area efficiency by more than 15 times.
PIMIC’s studies indicate that models with hundreds of millions to tens of billions of parameters can in fact be executed on edge devices. It will require 5-nm or 3-nm process technology, PiM structures, and most of all a deep understanding of how data moves in generative-AI models and how it interacts with memory.
PiM is indeed a silver bullet for TinyML at the extreme edge. But it’s just one tool, along with dataflow expertise and deep understanding of model dynamics, in reaching the point where we can in fact execute SLMs and some LLMs effectively at the far edge.
Subi Krishnamuthy is the founder and CEO of PIMIC, an AI semiconductor company developing processing-in-memory (PiM) technology for ultra-low-power AI solutions.
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Unconventional headphones: Sonic response consistency, albeit cosmetically ungainly
Back in mid-2019, I noted that the ability to discern high quality music and other audio playback (both in an absolute sense and when relatively differentiating between various delivery-format alternatives) was dependent not only on the characteristics of the audio itself but also on the equipment used to audition it. One key link in the playback chain is the speakers, whether integrated (along with crossover networks and such) into standalone cabinets or embedded in headphones, the latter particularly attractive because (among other reasons) they eliminate any “coloration” or other alteration caused by the listening room’s own acoustical characteristics (not to mention ambient background noise and imperfect suppression of its derogatory effects).
However, as I wrote at the time, “The quality potential inherent in any audio source won’t be discernable if you listen to it over cheap (i.e., limited and uneven frequency response, high noise and distortion levels, etc.) headphones.” To wit, I showcased three case study examples from my multi-headphone stable: the $29.99 (at the time) Massdrop x Koss Porta Pro X:
$149.99 Massdrop x Sennheiser HD 58X Jubilee:
and $199.99 Massdrop x Sennheiser HD 6XX:
I’ve subsequently augmented the latter two products with optional balanced-connection capabilities via third-party cables. Common to all three is an observation I made about their retail source, Drop (formerly Massdrop): the company “partners with manufacturers both to supply bulk ‘builds’ of products at cost-effective prices in exchange for guaranteed customer numbers, and (in some cases) to develop custom variants of those products.” Hold that thought.
And I’ve subsequently added another conventional-design headphone set to the menagerie: Sony’s MDR-V6, a “colorless” classic that dates from 1985 and is still in widespread recording studio use to this day. Sony finally obsoleted the MDR-V6 in 2020 in favor of the MDR-7506, more recent MDR-M1 and other successor models, which motived my admitted acquisition of several gently used MDR-V6 examples off eBay:
One characteristic that all four of these headphones share is that, exemplifying the most common headphone design approach, they’re all based on electrodynamic speaker drivers:
At this point, allow me a brief divergence; trust me, its relevance will soon be more obvious. In past writeups I’ve done on various kinds of both speakers and microphones, I’ve sometimes intermingled the alternative term “transducer”, a “device that converts energy from one form to another,” for both words. Such interchange is accurate; even more precise would be an “electroacoustic transducer”, which converts between electrical signals and sound waves. Microphones input sound waves and output electrical signals; with speakers, it’s the reverse.
I note all of this because electrodynamic speaker drivers, specifically in their most common dynamic configuration, are the conceptual mirror twins to the dynamic microphones I more recently wrote about in late November 2022. As I explained at the time, in describing dynamic mics’ implementation of the principle of electromagnetic induction:
A dynamic microphone operates on the same basic electrical principles as a speaker, but in reverse. Sound waves strike the diaphragm, causing the attached voice coil to move through a magnetic gap creating current flow as the magnetic lines are broken.
Unsurprisingly, therefore, the condenser and ribbon microphones also discussed in that late 2022 piece also have (close, albeit not exact, in both of these latter cases) analogies in driver design used for both standalone speakers and in headphones. Condenser mics first; here’s a relevant quote from my late 2022 writeup, corrected thanks to reader EMCgenius’s feedback:
Electret condenser microphones (ECMs) operate on the principle that the diaphragm and backplate interact with each other when sound enters the microphone. Either the diaphragm or backplate is permanently electrically charged, and this constant charge in combination with the varying capacitance caused by sound wave-generated varying distance between the diaphragm and backplate across time results in an associated varying output signal voltage.
Although electret drivers exist, and have found use both in standalone speakers and within headphones, their non-permanent-charge electrostatic siblings are more common (albeit still not very common). To wit, an excerpt from a relevant section of Wikipedia’s headphones entry:
Electrostatic drivers consist of a thin, electrically charged diaphragm, typically a coated PET film membrane, suspended between two perforated metal plates (electrodes). The electrical sound signal is applied to the electrodes creating an electrical field; depending on the polarity of this field, the diaphragm is drawn towards one of the plates. Air is forced through the perforations; combined with a continuously changing electrical signal driving the membrane, a sound wave is generated…A special amplifier is required to amplify the signal to deflect the membrane, which often requires electrical potentials in the range of 100 to 1,000 volts.
Now for ribbon microphones; here’s how Wikipedia and I described them back in late 2022:
A type of microphone that uses a thin aluminum, duraluminum or nanofilm of electrically conductive ribbon placed between the poles of a magnet to produce a voltage by electromagnetic induction.
Looking at that explanation and associated image, you can almost imagine how the process would work in reverse, right? Although ribbon speakers do exist, my focus for today is their close cousins, planar magnetic (also known as orthodynamic) speakers. Wikipedia again:
Planar magnetic speakers (having printed or embedded conductors on a flat diaphragm) are sometimes described as ribbons, but are not truly ribbon speakers. The term planar is generally reserved for speakers with roughly rectangular flat surfaces that radiate in a bipolar (i.e. front and back) manner. Planar magnetic speakers consist of a flexible membrane with a voice coil printed or mounted on it. The current flowing through the coil interacts with the magnetic field of carefully placed magnets on either side of the diaphragm, causing the membrane to vibrate more or less uniformly and without much bending or wrinkling. The driving force covers a large percentage of the membrane surface and reduces resonance problems inherent in coil-driven flat diaphragms.
I’ve chronologically ordered electrostatic and planar magnetic driver technologies based on their initial availability dates, not based on when examples of them came into my possession. Specifically, I found a good summary of the two approaches (along with their more common dynamic driver forebear) on Ken Rockwell’s always-informative website, which is also full of lots of great photography content (it’s always nice to stumble across a kindred interest spirit online!). Rockwell notes that electrostatics were first introduced in 1957 [editor note: by Stax, who’s still in the business], and “have been popular among enthusiasts since the late 1950s, but have always been on the fringe as they are expensive, require special amplifiers and power sources and are delicate—but they sound flawless.” Conversely, regarding planar magnetics, which date from 1972, he comments, “Planar magnetic drivers were invented in the 1970s and didn’t become popular until modern ultra-powerful magnet technology become common in the 2000s. Planar magnetics need tiny, ultra powerful magnets that didn’t used to exist. Planar magnetics offer much of the sound quality of electrostatics, with the ease-of use and durability of conventional drivers, which explains why they are becoming more and more popular.”
Which takes us, roughly 1,200 words in, to the specifics of my exotic headphone journey, which began with two sets containing planar magnetic drivers. Back in late May 2024, Woot! was selling the Logitech for Creators Blue Ella headset (Logitech having purchased Blue in mid-2018) for $99.99, versus the initial $699.99 MSRP when originally introduced in early January 2017. The Ella looked (and still looks) weird, and is also heavy, albeit surprisingly comfortable; the only time I’ve ever seen anyone actually using one was a brief glimpse on Trey Parker and Matt Stone’s heads while doing voice tracks for South Park within the recently released Paramount+ documentary ¡Casa Bonita Mi Amor!. But reviewers rave about the headphones’ sound quality, a headphone amplifier is integrated for use in otherwise high impedance-unfriendly portable playback scenarios, and my wife was bugging me for a Father’s Day gift suggestion. So…
A couple of weeks later, a $10-off promotional coupon from Drop showed up in my email inbox. Browsing the retailer’s inventory, I came across another set of planar magnetic headphones, the Drop + HIFIMAN HE-X4 (remember my earlier comments about Drop’s longstanding history of partnering with name-brand suppliers to come up with custom product variants?), at the time selling for $99.99. They were well reviewed by the Drop community, and looked much less…err…alien…than the Blue Ella, so…(you’ve already seen one stock photo of ‘em earlier):
Look how happy she is (in spite of how big they are on her head)!
And of course, with two planer magnetic headsets now in the stable, I just had to snag an electrostatic representative too, right? Koss, for example, has been making (and evolving) them ever since 1968’s initial ESP/6 model:
The most recent ESP950 variant came out in 1990 and is still available for purchase at $999.99 (or less: Black Friday promotion-priced at $700 on Amazon as I type these words). Believe it or not, it’s one of the most cost-effective electrostatic headphone options currently in the market. Still, its price tag was too salty for my curiosity taste, lifetime factory warranty temptation aside.
That box to the right is the “energizer”, which tackles both the aforementioned high voltage generation and output signal amplification tasks. Koss includes with the ESP950 kit, believe it or not, a 6 C-cell battery pack to alternatively power the energizer (therefore enabling use of the headphones) when away from an AC outlet. Portability? Hardly, although in fairness, the ESP950 was originally intended for use in live recording settings.
But then I stumbled across the fact that back in April 2019, Drop (doing yet another partnership with a brand-name supplier, this one reflective of a long-term multi-product engagement also exemplified by the earlier-shown Porta Pro X) had worked with Koss to introduce a well-reviewed $499.99 version of the kit called the Massdrop x Koss ESP/95X Electrostatic System:
Drop tweaked the color scheme of both the headphones themselves (to midnight blue) and the energizer, swapped out the fake leather (“pleather”) earpads for foam ones wrapped in velour, and dropped both the battery pack and the leather case (the latter still available for purchase standalone for $150) from Koss’s kit to reduce the price point:
Bad news: at least for the moment, the ESP/95X is no longer being sold by Drop. Good news: I found a gently used kit on eBay for $300 plus shipping and tax (and for likely obvious reasons, I also purchased a two-year extended warranty for it).
And what did all of this “retail therapy” garner me? To set the stage for this section, I’ll again quote from the introduction to Ken Rockwell’s earlier mentioned writeup:
Almost all speakers and headphones today are “dynamic.”
Conventional speakers and headphones stick a coil of wire inside a magnet, and glue this coil to a stiff cone or dome that’s held in place with a springy suspension. Current passes through this coil, and electromagnetism creates force on the coil while in the field of the magnet. The resulting force vibrates the coil, and since it’s glued to a heavy cone, moves the whole mess in and out. This primitive method is still used today because it’s cheap and works reasonably well for most purposes.
Dynamic drivers are the standard today and have been the standard for close to a hundred years. These systems are cheap, durable and work well enough for most uses, however their heavy diaphragms and big cones lead to many more sound degrading distortions and resonances absent in the newer systems below.
By “newer systems below”, of course, he’s referring to alternative electrostatic and planar magnetic approaches. And although he’s not totally off-base with his observations, the choice of words like “primitive method” reveals a bias, IMHO. It’s true that the large, flat, thin and lightweight membrane-based approaches have inherent (theoretical, at least) advantages when it comes to metrics such as distortion and transient response, leading to descriptions such as “unmatched clarity and impressive detail”, which admittedly concur with my own ears-on impressions. That said, theoretical benefits are moot if they don’t translate into meaningful real-life enhancements. To wit, for a more balanced perspective, I’ll close with a (fine-tuned by yours truly) post within an August 2023 discussion thread titled “Is there really any advantage to planar magnetics or electrostats?” at Audio Science Review, a site that I regularly reference:
For electrostatics, the strong points are the low membrane weight and drive across the entire membrane. The disadvantage is output level. The driver surface area is big, which has advantages and disadvantages. On can play with shape to change modal behavior. Electrostatics are difficult to drive in the sense that they require a bias voltage (or electret charge) and high voltage on the plates, which necessitates mains voltage or converters. Mechanical tension is a must and ‘sticking’ to one stator is a potential problem.
For planar magnetics, the strong points are the maximum sound pressure level (SPL), linearity and the driver size. The latter can be both a blessing and (frequency-dependent) downside. Fewer tuning methods are available, and it is difficult to get a bass boost in a passive way. The magnets obstruct the sound waves more than does the stator of electrostatic planars, which has an influence on mid to high frequencies. Planar magnetics are easier to drive than electrostatics but in general are inefficient compared to dynamic drivers, especially when high SPL is needed with good linearity. They are heavy (weight) due to the magnets compared to other drivers. They can handle a lot of power. They need closed front volume to work properly.
Dynamics can have a much higher efficiency, at the expense of maximum undistorted SPL. They can be used directly from low power sources. There are many more ways to ‘shape’ the sound signature of the driver, and the headphone containing it. They are less expensive to make, and lighter in weight. Membrane size and shape can both find use in controlling modal issues. Linearity (max SPL without distortion) can be much worse than planar alternatives, although for low to normal SPLs, this usually is not an issue.
Balanced armature drivers [editor note: an alternative to dynamic drivers not discussed here, commonly found in earbuds] are smaller and can be easily used close to the ear canal. These drivers too have strong and weak points and are quite different from dynamic drivers. They are easier to make custom molds for due to their size.
In closing, speaking of “balance” (along with the just-mentioned difference between theoretical benefits and meaningful real-life enhancements), I found it interesting that none of the electrostatic or planar magnetic headphones discussed here offer the balanced-connection output (even optional) that I covered at length back in December 2020:
And with that, having just passed through the 2,500-word threshold, I’ll close for today with an as-usual invitation for your thoughts in the comments!
—Brian Dipert is the Editor-in-Chief of the Edge AI and Vision Alliance, and a Senior Analyst at BDTI and Editor-in-Chief of InsideDSP, the company’s online newsletter.
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A brief history and technical background of heat shrink tubing
Heat shrink tubing, rarely referred to simply as “HST” even in our acronym-intensive world, is made of cross-linked polymers and is primarily used to cover and protect wire splices. EDN and Planet Analog contributor Bill Schweber provides a sneak peek of this important but often underrated technology in his latest blog.
Read the full story at EDN’s sister publication, Planet Analog.
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CES 2025: Moving towards software-defined vehicles
Software-defined vehicles (SDVs) are a big theme at CES this year, shifting vehicles from hardware-centric upgrades to over the air (OTA) software upgrades. In order to do this, vehicle subsystems must rely on a, more or less, generic processing platform that can perform a wide variety of functions to serve the various aspects of a car. As shown in Figure 1, TI’s approach to this is shifting from a “domain” architecture to a “zonal” one where ECUs that were once custom-tailored to specific domains (e.g., powertrain, ADAS, infotainment, body electronic and lighting, passive safety) are now more location, or zone-, -based to reduce weighty wire harnessing and improve processor speeds.
Figure 1 Traditional domain versus zone architecture. Source: Texas Instruments
TI’s radar sensor, audio processors, Class-D amplifierTI’s automotive innovations are currently focused in powertrain systems; ADAS; in-vehicle infotainment (IVI); and body electronics and lighting. The recent announcements fall into the ADAS with the AWRL6844 radar sensor as well as IVI with the AM275 and AM62D processors and the class-D audio amplifier.
ADAS: passenger safety solutionThe AWRL6844 radar sensor uses 60-GHz millimeter-wave (mm-wave) with a 4×4 antenna array and edge AI models running on an on-chip TI-specific accelerator and DSP to support several in-vehicle safety measures including occupancy monitoring for seat belt reminders, child presence detection, and intrusion (Figure 2). Presently, OEMs resort to a combination of in-seat weight sensors, two UWB sensors for front-row and back-row child presence detection, and an ultrasonic intrusion module for the same direct-sensing safety measures, directly tracking human activity such as respiration, heartbeat, movement, etc.). The technology is designed to assist OEMs in meeting evolving regulatory safety requirements such as the Euro new car assessment program (NCAP) advanced that offers rewards to manufacturers for implementing advanced safety technologies as a means to complement its established star rating system. Yariv Raveh, the vice president and business unit management of radar stated, “In 2025 the Euro NCAP requirement for child presence detection will only award points for a direct sensing system and in the near future, the in-cabin sensing system must accurately distinguish between a child and an adult in order to provide a good user experience.”
Figure 2 A block diagram of TI’s AWRL6844 radar sensor and the three vehicle modes that the sensor can assist with (seat belt reminder, child presence detection, and intrusion detection). Source: Texas Instruments
IVI: Premium audio solutionSome of the features of the new AM275x-Q1 and AM62D-Q1 processors are the integration of two vector-based C7x DSP cores, multiple Arm cores, on-chip memory, an NPU accelerator, and audio networking with Ethernet AVB. The differences between the processors is highlighted in Figure 3. “Tier 1 suppliers must elect the appropriate processing components to meet all of their customer needs across their fleets. So, our answer is to provide two different architectures to give engineers the flexibility to choose across the range of use cases, all using the same audio processing family where engineers can design standalone and integrated premium audio systems across a range of performance levels with minimal additional hardware and software investment,” said Sonia Ghelani, TI’s product line manager for signal processing MCUs. The company is actively working with customers to incorporate AI into the audio signal chain for unique solutions in applications such as active noise cancellation (ANC) and road noise cancellation (RNC).
Figure 3 The AM275x DDR-less MCU and AM62D DDR-based process for premium audio in IVI applications. Source: Texas Instruments
IVI: Class-D audio amplifierThe TAS6754-Q1 class-D amplifier (Figure 4) is meant to assist engineers with implementing TI’s “1L” modulation scheme, a technology that lowers the inductor count per audio channel to one (hence the phrase “1L”). Modern vehicles can embed well over 20 speakers and, in an effort to reduce size, weight, and cost, class-D amplifiers are being used for their higher power efficiency and lower thermal dissipation. However, these amplifiers generally require two LC filters per audio channel to attenuate high frequency noise. “1L maintains class-D performance while reducing component count and cost, allowing the premium audio system to grow in terms of speakers and mics,” added Sonia Ghelani.
Figure 4 Sample vehicle speaker and mic distribution as well as a sample block diagram of an audio signal chain including TI’s class-D amplifier. Source: Texas Instruments
Blurring the lines between IVI and ADASOne major discussion during the press briefing involved the industry trend of integrating ADAS and IVI functions on a single SoC. “So today we see that they’re in two separate boards, however, more and more we’re seeing that they end up being in the same board,” said Mark Ng, TI’s director of automotive systems. Sonia Ghelani added with an example of an overlap between ADAS and IVI functions, “these chimes and seat belt reminders are ADAS requirements that fall into the audio domain. As we move into a world of software-defined cars with more zonal architectures, you’ll continue to see an overlap between the two.” She continued, “For TI it’s important that we understand exactly what the customer is trying to build so that we don’t silo these systems in one bucket or another, but rather understand what problems the customer is trying to solve.”
Aalyia Shaukat, associate editor at EDN, has worked in the design publishing industry for six years. She holds a Bachelor’s degree in electrical engineering from Rochester Institute of Technology, and has published works in major EE journals as well as trade publications.
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A two transistor sine wave oscillator
Figure 1 shows a variation on a sine wave oscillator, it uses just two transistors and a single variable resistor to set the frequency.
Figure 1 Just a couple of components are needed for a simple tunable sine wave oscillator.
Wow the engineering world with your unique design: Design Ideas Submission Guide
The section around Q1 is a multiple-feedback-bandpass-filter (MFBF). The usual embodiment of this type of filter is shown in Figure 2.
Figure 2 A standard implementation of a MFBF.
The formulas for these filter can be found in almost any textbook (where C = C1 = C2):
Please note that the center frequency, among others, is determined by the resistance of R3. The gain of the filter is determined by the ratio of R2/R1 in such a way that Av = -R2/(2*R1). Usually this filter is implemented around an operational amplifier, it can also be implemented around an inverting transistor amplifier. However, because of the limited open-loop gain of the latter, the gain will be lacking at the higher frequencies.
The section around Q2 is an inverting amplifier, with an unloaded gain set by R8/R7. D1 and D2 together with R8 form a clipper to make sure that the signal offered to the MFBF is of constant level.
At the center frequency of the filter, the phase-shift is 180°. Together with the 180° phase shift of Q2 there is a total 360° phase shift at this frequency.The loop gain is >1 due to the ample gain of Q2. Thus, Barkhausen’s criteria are met.
The relative soft clipping of D1 and D2 together with the filtering of Q1 limits the amount of harmonics in the output signal. The passive components around Q1 determine the center frequency.
With the current values, the frequency can be set between 498 Hz and 1230 Hz by changing R3 between 1k and 6k. At the same time the output amplitude changes from 1.28 Vpp to 0.68 Vpp. The output shows around ~1% distortion (Figure 3).
Figure 3 The scope image shows the oscillator output at circa 1 kHz.
A variation in the supply voltage from 9 V to 12 V causes a frequency variation of only 2 Hz and a variation of output amplitude from 0.80 Vpp to 0.86 Vpp.
Cor van Rij blew his first fuse at 10 under the close supervision of his father who promptly forbade him to ever work on the house mains again. He built his first regenerative receiver at the age of 12 and his boys bedroom was decorated with all sorts of antennas and a huge collection of disassembled radios took up every horizontal plane. He studied electronics and graduated cum laude. He worked as a data design engineer and engineering manager in the telecom industry. And is working for almost 20 years as a principal electrical design engineer, specializing in analog and RF electronics and embedded firmware. Every day is a new discovery!
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CES 2025’s sensor design highlights
Sensing solutions—a vital ingredient in automotive, consumer and industrial applications—are prominent features in the offerings displayed at CES 2025 held in Las Vegas, Nevada on from 7 to 10 January. That encompasses sensing solutions packed into system-on-chip (SoC) devices as well as hardware components meshed with sensor fusion algorithms.
But the most exciting foray in this year’s sensor parade at CES 2025 relates to how artificial intelligence (AI) content is incorporated into sensing designs.
Read the full story published at EDN’s sister publication, Planet Analog.
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Is Imagination Technologies for sale again?
Graphics chip designer Imagination Technologies is up for grabs again. A Bloomberg report claims that Canyon Bridge Capital Partners, the private equity firm with ties to Chinese state investors, has hired Lazard Inc. to seek a buyer for the Hertfordshire, U.K.-based chip designer.
Imagination, once a promising graphics technology outfit, could never recover after the Apple fiasco and the perception of Chinese ownership. According to media reports, Apple, which owned an 8.1% stake in Imagination, considered buying the British chip designer in 2016. However, after failing to agree on Imagination’s valuation, Apple left the negotiating table and announced that it would start developing its own graphics IP.
Apple contributed to nearly half of Imagination’s sale, sending shock waves at the British chip company at that time. The company’s stock fell by 70%, and in 2017, Canyon Bridge, backed by state-owned China Reform, acquired Imagination for $686 million. Soon after, Imagination began shedding its non-core businesses; for instance, it sold its connectivity business Ensigma comprising Wi-Fi and Bluetooth silicon to Nordic Semiconductor.
Next came the issue of China gaining access to key semiconductor technology. The effort to appoint new board members and Imagination’s listing in Shanghai proved hot potatoes, leading to intervention from the U.K. regulators to ensure that Imagination remains a U.K.-headquartered business. The company has been in distress since then.
Figure 1 Imagination has more than 3,500 patents related to graphics and related technologies.
Its CEO, Simon Beresford-Wylie, has denied a recent Daily Telegraph report that he’s stepping down. He also rejected some reports about the company engaging in illicit transfers of technology to China. Earlier, in November 2023, Reuters reported that Imagination was laying off 20% of its staff.
With this backdrop, let’s go back to Imagination on the selling block. The Bloomberg report has named Alphabet Inc.’s Google, MediaTek, Renesas, and Texas Instruments as Imagination’s key clients. But no suitors have been reported in trade media yet.
Imagination owners are pinning their hopes on two major factors. First, they draw their hopes from Nvidia’s runaway success in the graphics realm. Though Nvidia’s GPUs are targeted at entirely different markets such as data centers and scientific computing. Imagination, on the other hand, mainly offers graphic solutions for lower-power markets such as automotive, PC cards, drones, robotics, and smartphones.
Second, like Nvidia, Imagination aims to bolster its standing by incorporating artificial intelligence (AI) content in its graphics IP offerings. The British chip firm plans to turn its graphics IP into AI accelerators for low-power training and inference applications.
Figure 2 Imagination is aiming to bring graphics-centric AI to battery-powered devices like drones and smartphones.
Imagination, founded in 1985, has come a long way in its 40-year long technology journey. Once seen as a jewel in Britain’s technology crown, it’s now facing the paradox of a struggling company with a highly promising technology. Perhaps its new owner could address that paradox and put the graphics design house in order.
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Clapp versus Colpitts
Edwin Henry Colpitts (January 19, 1872 – March 6, 1949)
James Kilton Clapp (December 03, 1897 – 1965)
The two persons above are the geniuses who gave us two classic oscillator circuits as shown in Figure 1.
Figure 1 The two classic oscillators circuits: Colpitts (left) and Clapp (right).
We’ve looked at these two oscillators individually before in “The Colpitts oscillator” and “Clapp oscillator”.
However, a side-by-side examination of the two oscillators is additional time well spent.
The Clapp oscillator was devised as an improvement over the Colpitts oscillator by virtue of adding one capacitor, C3, in the above image.
The amplifier “A” is nominally at a gain value of unity, but as a matter of practicality, the gain value is slightly lower than that because the amplifier is really a “follower”. If made with a vacuum tube, then “A” is a cathode follower. If made with a bipolar transistor, then “A” is an emitter follower. If made with a field effect transistor, then “A” is a source follower. The concept itself remains the same.
Each oscillator works because the RLC network develops a voltage step-up at the frequency of oscillation. The “R” is not an incorporated component though. The “R” (R1 or R2) simply represents an output impedance of the follower. The 10 ohms that we see here is purely an arbitrary value guess on my part. The other components are also of arbitrary value choices, but they are convenient values for illustrating just how these little beasties work.
We use SPICE simulations to examine the transfer functions of the two RLC networks as shown in Figure 2.
Figure 2 Colpitts versus Clapp spice simulations using the transfer functions of the two RLC networks.
Each RLC network has a peak in its frequency response which will result in oscillation at that peak frequency. However, the peak of the Clapp circuit is much sharper and narrower than that of the Colpitts circuit. This narrowing has the beneficial effect of suppressing spectral noise centered around the oscillation frequency.
Note in the examples above that the oscillation peaks differ by 0.16% and that the reactance of the L1 inductor and the reactance of the L2 C3 pair differ by 1.12%. That’s just a matter of my having chosen some convenient numbers with the intent of having the two curves match in that regard at the same peak frequency. (I almost succeeded.)
The Clapp oscillator has several advantages over the Colpitts oscillator. The transfer function peak of the Clapp circuit is narrower than that of the Colpitts which tends to yield an oscillator output with less spurious off-frequency energy meaning a “cleaner” signal.
Another advantage of the Clapp circuit is that capacitors C4 and C5 can be made very large as the L2 C3 combination is made to look like a very small inductance value at the oscillation frequency. The larger C4 and C5 values mean that any variations of those capacitance values brought about by variations of the input capacitance of the “A” stage have a minimal effect on the oscillation frequency.
That’s because frequency control of the Clapp circuit is primarily set by the series resonance of the L2 C3 pair rather than the parallel resonance of L1 versus the C1 C2 pair in the Colpitts circuit. If the “A” input capacitance tends to vary for this reason or that, the Clapp circuit is far less prone to an unwanted frequency shift as shown in Figure 3.
Figure 3 A Clapp versus Colpitts frequency shift comparison showing how the Clapp circuit (right) is far less prone to this unwanted shift in frequency.
John Dunn is an electronics consultant, and a graduate of The Polytechnic Institute of Brooklyn (BSEE) and of New York University (MSEE).
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The post Clapp versus Colpitts appeared first on EDN.
Industrial MCU packs EtherCAT controller
GigaDevice has introduced the GD32H75E 32-bit MCU, featuring an integrated GDSCN832 EtherCAT subdevice controller, which is also available as a standalone device. Both components target industrial automation applications, including servo control, variable frequency drives, industrial PLCs, and communication modules.
Powered by an Arm Cortex-M7 core running at up to 600 MHz, the GD32H75E microcontroller includes a DSP hardware accelerator, double-precision floating-point unit, hardware trigonometric accelerator, and filter algorithm accelerator. It also comes with 1024 KB of SRAM, up to 3840 KB of flash memory with security protection, and a 64-KB cache to enhance CPU efficiency and real-time performance.
The MCU’s integrated EtherCAT subdevice controller, licensed from Beckhoff Automation, manages EtherCAT communication, acting as an interface between the EtherCAT fieldbus and the sub-application. It includes two internal PHY ports and an external MII. With 64-bit distributed clock support, it enables synchronization with other EtherCAT devices, achieving DC synchronization accuracy to within 1 µs.
The GD32H75E MCU is available in two variants: one with two internal Ethernet PHYs and another that supports bypass mode, both housed in BGA240 packages. Samples and development boards are available now, with mass production planned for Q2 2025.
Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.
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