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In a written reply, Minister of State for Commerce & Industry, Jitin Prasada, informed the Rajya Sabha that incentives worth Rs. 15,554 crores have been provided under the large-scale electronics manufacturing & IT hardware 2.0 schemes. Additionally, a sum of Rs. 2,377.56 crore has been disbursed under the automobiles & auto components sector.

Prasad further highlighted that the PLI schemes have attracted investments worth more than Rs. 2.16 lakh crore so far. Until now, the government has rolled out the PLI scheme for 14 sectors with the aim of strengthening domestic manufacturing and boosting exports.

Providing a sectoral breakdown of funding, the minister informed that Rs 6,022 crore has been disbursed for the pharmaceutical sector, Rs 1,859 crore for telecommunications, and Rs 2,163 crore for food products. Other allocations include Rs 55 crore for bulk drugs, Rs 157 crore for medical devices, Rs 281 crore for white goods, Rs 93 crore for drones, Rs 81 crore for IT hardware, Rs 55 crore for textiles, and Rs 132 crore for speciality steel.

No incentives have been disbursed so far for high-efficiency solar PV modules and advanced chemistry cell (ACC) battery schemes, he added.

Commenting on the dynamics of West Asia and the Gulf countries, the minister highlighted their importance as key markets for Indian agricultural exports. The region, including UAE, Saudi Arabia, Oman, Kuwait, Qatar, Bahrain, as well as Iran, Iraq and Yemen, accounted for exports worth USD 10.68 billion in 2024-25, nearly 20.5 per cent of India’s total agri exports.

These exports span a wide range of products, including cereals, animal products, fruits and vegetables, spices and processed foods sourced from across the country.

Prasada said the government is closely monitoring the evolving geopolitical situation in West Asia and its impact on trade, shipping routes and logistics. Exporters have reported challenges such as higher freight rates, war-risk surcharges, container shortages, shipment delays and port congestion.

By: Shreya Bansal, Sub-Editor

The post Geopolitical Shifts in West Asia: India Tracks Impact on Vital Shipping & Logistics Corridors appeared first on ELE Times.

In the world of audio, silence is often as valuable as sound. Whether it is the low rumble of an airplane cabin, the drone of traffic, or the hiss of background noise in a recording, unwanted audio can compromise clarity and comfort.

Active noise control (ANC) offers a sophisticated solution: instead of merely blocking noise, it uses microphones, processors, and speakers to generate an equal and opposite signal that cancels interference in real time.

This marriage of acoustics and digital signal processing has transformed how we experience music, communication, and quiet itself, making ANC one of the most elegant applications of engineering in audio systems.

 

Active noise control vs. active noise cancellation

Before the dive, it’s good to note that active noise control (ANC) is the overarching engineering principle—using sound to counter sound—while active noise cancellation is its most familiar audio application, seen in headphones, earbuds, and car cabins.

This distinction matters because it shows how a fundamental control concept translates into everyday listening, making the science behind ANC directly relevant to how we experience clarity and comfort in audio systems.

Noise management: Isolation, reduction, and cancellation

To effectively manage sound, it’s important to distinguish between passive isolation, active noise reduction (ANR), and active noise cancellation (ANC), as these terms are often conflated in consumer marketing. Passive noise isolation provides the foundation, using physical barriers like dense ear-cup foam and high-quality seals to block sound waves from entering the ear canal, making it effective against a broad spectrum of high-frequency noises.

Beyond this physical barrier, active noise reduction (ANR) and active noise cancellation (ANC) represent the same advanced technology; the former term being more common in aviation and industrial sectors, and the latter in consumer retail. Both utilize integrated microphones and digital signal processing to sample environmental noise and generate a precise “anti-noise” signal in real time.

By applying the principle of destructive interference—creating an inverted wave that effectively neutralizes the original sound—these active systems are uniquely capable of erasing steady, low-frequency sounds that passive methods struggle to mitigate.

Nature’s ANC: How treefrogs and other animals tune out the world

Nature is the original engineer when it comes to acoustics, and while you will not find animals with electronic hardware, some species have evolved ingenious biological mechanisms that function on the exact same principle as active noise cancellation (ANC).

The most striking example is found in certain species of treefrogs, which face the daunting challenge of picking out a specific mate’s call amidst a deafening swamp-wide chorus. To solve this, they possess an internal connection between their eardrums that passes through their lungs; this allows the lungs to act as an acoustic filter, creating a phase-cancellation effect that effectively “mutes” the frequencies of competing species while amplifying the call of their own.

Beyond this direct analogue to ANC, many animals utilize other strategies to combat environmental noise, such as the “Lombard effect,” where birds and primates actively adjust the pitch or volume of their vocalizations to cut through ambient chaos, or the “jamming avoidance response” seen in electric fish, which shift their pulse frequencies to prevent signal interference. Ultimately, while these animals are not wearing headsets, evolution has mastered the art of filtering out the noise to focus on what matters most.

And as a historic note, ADI’s SSM2000 was a pivotal audio IC that revolutionized noise reduction through its patented HUSH “single-ended” technology.

Unlike traditional systems that required complex pre-encoding, SSM2000 could adaptively and dynamically strip away hiss and background noise from any audio source on the fly. By integrating a sophisticated dynamic filter and downward expander into a single, cost-effective package, it became the industry standard for enhancing signal clarity in 1990s consumer electronics—ranging from car stereos to early PC sound cards—offering a clever, hardware-based solution for high-fidelity sound that paved the way for modern signal processing.

Figure 1 From the 1990’s SSM2000 to today’s DSP-driven architectures, engineers leverage biological noise-suppression mechanisms to deliver precision audio clarity. Source: Author

Inside active noise cancellation systems

Active noise cancellation (ANC) works by detecting and analyzing incoming sound patterns, then generating an opposing “anti-noise” signal to neutralize them. This process significantly reduces the level of background noise you hear. ANC is especially effective against steady, low-frequency sounds such as ceiling fans or engine hums. While it’s most commonly found in stereo headsets that cover both ears, some mono headsets also incorporate ANC technology to enhance noise management.

Figure 2 Sketch demonstrates the core principle of ANC. Source Author

In essence, ANC works by generating an anti-noise waveform that mirrors the shape and frequency of the unwanted sound. This waveform is produced at a phase angle of exactly 180° opposite to the noise, so when both signals meet at the target area, they effectively cancel each other out.

ANC systems can be implemented through different hardware configurations:

• Feed-forward ANC: A microphone is positioned on the outside of the earphone to capture external noise before it reaches the ear.
• Feed-back ANC: A microphone is placed inside the earphone, monitoring the sound that actually enters the ear canal and canceling it in real time.
• Hybrid ANC: This combines both feed-forward and feed-back methods, offering more precise and adaptive noise reduction across a wider range of frequencies. That is, two microphones are used to form a closed-loop design. The reference microphone forecasts incoming external noise, while the error microphone audits the sound inside the ear canal. This dual setup enables the system to cancel noise effectively and avoid feedback issues.

Beyond hardware design, ANC relies on adaptive cancellation. This technique uses one or more microphones to continuously detect external noise and dynamically adjust the anti-noise waveform in real time to suit changing environments.

While some specialized industrial noise-control systems use a ‘synthesis method’—where the noise pattern is sampled and a known waveform is generated to counteract it—modern consumer headphones rely almost exclusively on adaptive, real-time processing to handle the unpredictable and constantly changing noise of the real world.

Broadband vs. narrowband noise cancellation

In the field of active noise control engineering, the terms broadband and narrowband carry meanings that differ from their use in telecommunications. Broadband ANC refers to systems designed to reduce unpredictable, wide-frequency environmental noise such as traffic, crowd chatter, or wind.

Because this type of noise is random, the system requires a coherent reference signal to generate an effective anti-noise waveform. By measuring the primary noise upstream, the digital controller can model the phase and magnitude of the disturbance in real time, allowing correlated noise to be canceled downstream at the loudspeaker.

Narrowband ANC, on the other hand, is tailored to periodic noise generated by rotational machinery, such as engines or fans. Instead of relying solely on an acoustic input microphone to capture the noise mid-propagation, the system uses a non-acoustic reference—such as a tachometer signal—to determine the fundamental rotational frequency.

Since repetitive noise occurs at predictable harmonics of this frequency, the control system can model these components with high precision. This approach is particularly effective in vehicle cabins, where it suppresses specific engine-related vibrations without interfering with speech, radio performance, or essential warning signals.

Modern ANC implementations often combine these strategies, resulting in adaptive broadband feedforward control, which utilizes acoustic sensors, and adaptive narrowband feedforward control, which employs non-acoustic sensors like accelerometers or tachometers.

Figure 3 A simple graphic depicts destructive interference as anti-noise combines with unwanted noise to reduce residual noise. Source: Author

Balancing promise and pitfalls: The realities of ANC

So, while active noise cancellation promises remarkable benefits—quieting the hum of engines, reducing fatigue during long journeys, and sharpening the clarity of music or speech—it also comes with challenges that beginners should appreciate. ANC systems excel at steady, low-frequency sounds but falter when faced with sudden or irregular noise.

Engineers must carefully tune parameters such as the damping ratio, which governs system stability, and the phase response, which determines how precisely the inverted signal cancels the original. Too much damping can make the system sluggish, while too little risks instability or even amplifying certain frequencies.

Latency in signal processing, microphone placement, and the physical limits of speakers all add complexity. Understanding these trade-offs is vital, because ANC is not about achieving perfect silence; it’s about learning how physics and signal processing collaborate to reduce chaos in real-world conditions.

Silence from chaos: The beginner’s journey into active noise cancellation

Active noise cancellation is one of those technologies that feels almost magical, yet it’s rooted in a principle simple enough for beginners to explore. Imagine sitting in a room filled with the steady hum of a fan or the drone of traffic outside and then hearing that noise dissolve because of a circuit you built yourself. That is the essence of ANC—capturing unwanted sound, inverting its waveform, and blending it back so the disturbance cancels itself out.

For those new to the field, the journey does not require professional acoustic labs or high-end industrial equipment; a pair of microphones, a set of speakers, and basic signal processing components are sufficient to begin. However, it is important to be clear: designing a functional ANC system from scratch is one of the most formidable challenges a hobbyist can undertake. It demands more than just coding skills; it requires a deep understanding of wave physics, precise timing, and acoustic dynamics.

The complexity of this task lies in the “latency budget”—the critical window of time the system has to process external noise and generate an inverse wave before it reaches the ear. If the processing takes too long, the waves will not align properly, failing to achieve destructive interference.

Fortunately, the barrier to entry has lowered. Modern, high-speed microcontrollers and dedicated DSP hardware now allow hobbyists to implement adaptive filters that were once exclusive to expensive, industrial-grade equipment. Chips from major players like Analog Devices and ams OSRAM bring ANC within reach of hobbyists, offering playful possibilities for makers eager to experiment with noise cancellation and advanced audio signal-processing projects.

As an introductory analog experiment, serious hobbyists can explore active noise cancellation by setting up a microphone to capture ambient noise, inverting that signal via an active phase-inverter, and summing it back into the audio path to create destructive interference. While this approach lacks the adaptive processing of digital systems, it provides a masterclass in phase alignment, group delay, and the iterative challenge of balancing amplitude in real-world signal paths.

Well, the first time you hear noise dissolve because of your own project, you realize it’s not just about electronics, it is about discovering how human ingenuity can carve silence out of chaos. That is the real inspiration of ANC for beginners: a hands-on path into the power of sound, silence, and imagination, now made more accessible than ever by today’s tools.

Ready to explore? Begin your first ANC experiment today and discover how you can turn noise into silence with your own hands.

T. K. Hareendran is a self-taught electronics enthusiast with a strong passion for innovative circuit design and hands-on technology. He develops both experimental and practical electronic projects, documenting and sharing his work to support fellow tinkerers and learners. Beyond the workbench, he dedicates time to technical writing and hardware evaluations to contribute meaningfully to the maker community.

Related Content

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• Active noise control – a software-based approach for automobiles
• Active noise cancellation: Trends, concepts, and technical challenges

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Amid growing cybersecurity risks in the industry, 63SATS Cybertech has renewed its strategic title partnership with CyberSec India Expo 2026 for the second consecutive year, strengthening efforts to advance India’s rapidly evolving cybersecurity ecosystem.

The expo, scheduled for April 23–24, 2026, at the Bombay Exhibition Centre, Mumbai, will bring together CISOs, CIOs, CTOs, DPOs, policymakers, security leaders, enterprise decision-makers, and technology providers to examine emerging risks, regulatory developments, and advanced defence strategies shaping the digital economy.

As organisations navigate increasing exposure to sophisticated cyber threats and stricter compliance requirements, the platform is expected to facilitate focused discussions on securing critical infrastructure, digital public systems, and enterprise environments. It will also serve as a meeting ground for solution providers and end users to exchange practical insights and explore scalable security frameworks.

Through this renewed association, 63SATS will contribute its expertise across security operations, threat intelligence, and risk mitigation, while engaging with industry stakeholders on addressing current and emerging cybersecurity challenges.

Mr Taher Patrawala, Managing Director, Media Fusion, said, “As digital adoption accelerates across sectors, with India’s digital economy projected to reach $1 trillion by 2030 and over 900 million internet users driving unprecedented data exchange, cybersecurity is becoming central to sustaining trust and business continuity. Our continued engagement with 63SATS strengthens the platform’s ability to bring together expertise, real-world perspectives, and solution-driven discussions that are critical to navigating today’s increasingly complex threat landscape.”

Mr Neehar Pathare, Managing Director, CEO & CIO, 63SATS Cybertech added, “As India advances into a new era of digital governance with the rollout of the Digital Personal Data Protection framework, organisations are being held to significantly higher standards of accountability and compliance. In this environment, cybersecurity is no longer just a technical function but a critical pillar of risk management and business resilience. Our continued partnership with CyberSec India Expo reflects our commitment to driving industry-wide alignment with evolving regulatory mandates, while fostering meaningful conversations around building secure, compliant, and future-ready digital ecosystems.”

With increasing regulatory oversight, growing digital adoption, and heightened exposure to cyber risks, the partnership signals a broader industry shift toward integrated, ecosystem-led approaches to cybersecurity. CyberSec India Expo 2026 is positioned to serve as a critical convergence point for aligning strategy, technology, and policy in response to these challenges.

The post 63SATS Cybertech Reaffirms Strategic Partnership with CyberSec India Expo 2026 to Advance India’s Cyber Defence Ecosystem appeared first on ELE Times.

The Ansys simulations aren't that trustworthy, I was running into some Fidelity relates issues + Student License Limitations, in the end by hacking stuff a bit I Managed to get a good run, the FETs hit 60-63 °C while the Rsense turned into a mess (forgot to configure local Fidelity for it) The FETs are Infineon SMD FETs BSC010N04LSATMA1, chose them due to extremely low Rds (1m OHM) and max Vds of 40V (forgot the current rating, it's definitely high 40s though) This is designed to handle a 20A Steady Current. OCD set to 1.4 Sec i the config. And a switch to Change the BMS between hibernate and active state. submitted by /u/The_Digital_Quill [link] [comments]

I low key don't know shit about electronics. I found a old Samsung camera of my parents but the charger was missing. I had this charging module over because I wanted to power an esp32 with a battery (never did something with it). And I looked at the battery and it said 3,8v (4,2v) on the outside and this module was for 3,7v batteries which also charge up to 4,2v, so I thought close enough. I needed a metal that was easy to bend and wouldn't scratch the shit out of the contacts and that I could push a little so it would make contact. Solder was my first thought so all the wiring is solder. It's quite annoying to solder solder but in the end it worked and charged the battery and the camera works. submitted by /u/Tee-Der-Schwarz-Ist [link] [comments]

Found this place after my regular closed. submitted by /u/BlownUpCapacitor [link] [comments]

submitted by /u/AutoModerator
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I came across a problem today where I'm ordering lots of parts to prototype my product I'm building. I got a lot of the basic dimensions of some of the PCBs, but I needed to know spacing of components as well! I made this website that lets you paste any image of a part. You just draw the outline of the PCB with your mouse (it snaps to the axes to make it easy). Then you can find out the relative distances of the components on the PCB by drawing your own lines. The program automatically finds the distance relative to the boundary of the PCB using a pixels ratio. Check it out here. Absolutely free of charge, no ads or anything like that, just thought it might be a neat tool for the community! submitted by /u/Legitimate-Pea3605 [link] [comments]

It has some pixel errors for some reason, but it works otherwise. It has 2 lines with 40 characters each. Each character has a 5x12 dot matrix. I really like VFDs. submitted by /u/PPEytDaCookie [link] [comments]

I love old Tektronix test gear, it's all beautifully designed and made. submitted by /u/TheMightyMadman [link] [comments]

I wanted to learn more about CPU architecture, so designed a small one. Importantly, this design has an integrated boot-loader (so that we can load programs to be run) and integrated IO (We can use UART to load programs onto the board, and observe the program trace) The whole project is open-source, and can be seen here: https://github.com/matchahack/tcpu. It includes a simulation and FPGA emulation guide. It is a small architecture, since buying space on the tiny-tapeout shuttle is expensive, but it is on the sky26a! See here: https://app.tinytapeout.com/projects/4119 submitted by /u/AlienFlip [link] [comments]

Step-down buck converters used in 48V-to-5V power supply designs are becoming increasingly common in automotive and industrial applications, especially in advanced driver assistance systems, in-vehicle infotainment, and robotics. While synchronous buck topologies achieve high efficiency, they sometimes fall short of expected performance. In some cases, switching behavior, controller bias, power, and thermal performance can create limiting losses, resulting in a decrease in efficiency.

Figure 1 shows the efficiency of Texas Instruments’ 48 VIN, 960 W four-phase buck converter with integrated GaN reference design (PMP23595), with the output voltage set to 5 V using forced pulse-width modulation operation without cooling.

Figure 1 Efficiency of 48 VIN to 5 VOUT at a 400 kHz switching frequency. Source: Texas Instruments

The efficiency curve in Figure 1 can meet the specifications of most 48V-to-5V power supply designs, but could fall just below the intended target for others. Rather than changing topology or adding complexity, it’s possible to make some practical adjustments within a standard buck converter to boost efficiency further.

Figure 2 shows the efficiency curve for of the 48V-5V buck converter under several test configurations, including added thermal management, switching frequency adjustment and external bias operation. These configurations were selected to isolate the effects of each adjustment and indicate that different loss mechanisms dominate depending on the operating point. Let’s look at each adjustment in greater detail.

Figure 2 Efficiency of 48VIN to 5VOUT with multiple adjustments. Source: Texas Instruments

Adjustment No. 1: Thermal performance

Adding a cooling system, in this case a heat sink, produced a negligible improvement at a low output current but resulted in a clear improvement above 30 A.

At a low output current, the total power dissipation remains relatively small, and device temperatures remain closer to ambient. Thus, reducing thermal resistance provides little effect.

At higher output current, conduction losses increase with IOUT2, causing the field-effect transistor (FET) junction temperature and inductor temperature to rise. As temperature increases, the FET drain-to-source on-resistance (RDS(on)) and inductor copper resistance increase, further increasing conduction losses. Incorporating a heat sink or some form of cooling reduces this rise in junction temperature, directly lowering temperature-dependent resistances. Another result is a measurable reduction in conduction losses, which appear as improved efficiency at high currents. At a high current – 80 A in this scenario – the improvement reached 0.8%.

Adjustment No. 2: Switching frequency

Reducing the switching frequency from 400 kHz to 250 kHz while ensuring that the inductance value was still suitable improved efficiency approximately 0.5% through the mid-current range and 1% in the high-current range. However, decreasing the switching frequency too much with the same inductor value can result in higher core losses if you don’t manage the ripple current correctly.

Reduced switching-related losses cause this behavior, such as field-effect transistor turn-on and turn-off losses, gate-drive losses, and internal controller switching losses. At a 48-V input, these losses scale quickly with both current and switching frequency.

At light loads, reducing the switching frequency produces smaller efficiency improvements, suggesting that fixed losses such as quiescent current or inductor core loss dominate in this region and limit the overall impact of this adjustment.

Adjustment No. 3: Controller bias power

In a forced pulse-width modulation configuration, supplying the controller bias from an external 5-V source improves efficiency by approximately 0.5% in the light- to mid-current range.

Deriving bias from VOUT remains a viable option if the output voltage is not a much higher voltage (such as 24 V and above) or much lower (such as 3V and below).

When deriving bias power internally from the output rail, a small portion of the converter’s output power operates the controller. At light loads, this overhead represents a slightly larger fraction of the total output power.

At higher output currents, the conduction losses in the FETs and inductor begin to dominate. In this region, the controller bias power becomes such a small fraction of total losses that it no longer produces a measurable efficiency benefit. As a result, the externally biased efficiency curve converges with the internally biased efficiency curve.

Adjustment No. 4: Inductor optimization

The inductor can play a larger role in efficiency than its direct current resistance (DCR) alone suggests. While copper losses depend on DCR and scale with the output current, core losses depend strongly on ripple current and switching frequency.

If the ripple current is high, core losses can become significant. This is especially common with powdered iron core material, which can have high core losses if you don’t account for the ripple current.

Increasing the inductance reduces ripple current and core losses but may increase DCR. Conversely, using a very low DCR inductor while having excessive ripple current can increase core losses to the point where it offsets the efficiency boost. The inductor choice balances DCR and ripple current such that neither copper nor core losses dominate.

When looking to improve converter efficiency, identify which loss mechanism dominates the operating region of interest as a useful first step. For what we have seen here on this synchronous buck converter, you can evaluate it quickly:

• If light-load efficiency is low, examine the switching frequency and internal bias losses.
• If efficiency is low at high current, focus on conduction losses and thermal management.
• If the losses appear higher than expected across the full current range, review the inductor ripple current and core material.

Once you identify the dominant loss mechanism, minor design adjustments can often lead to measurable efficiency gains.

The high-efficiency system in this exercise used the TI reference design that I mentioned earlier, which includes the LMG708B0 synchronous step-down converter with integrated GaN configured to a 5-V output with a reduced inductance of 2.5µH.

References

1. Jacob, Mathew. “Select inductors for buck converters to get optimum efficiency and reliability.” Texas Instruments Analog Design Journal article, literature No. SLYT775, 3Q2019.

Matthew Bowers is a systems engineer in TI’s Power Design Services team, focused on developing power solutions for automotive applications. Matthew received his bachelor’s degree in electrical engineering from Texas Tech University in 2023.

 

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The post Power Tips #151: Improving efficiency in 48V-input multiphase buck converters with GaN appeared first on EDN.

Arm is now a chip vendor—what does it mean for the semiconductor industry? EE Times’ Nitin Dahad was at the event in San Francisco, California, where the British IP giant unveiled its first chip, an AGI CPU for data centers. He reports on what it means for the company, now increasingly dubbed Arm 2.0, and how this launch will impact its standing in the semiconductor industry. He also explains the delicate balancing act that Arm will have to play moving forward.

Read the full article at EDN’s sister publication, EE Times.

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The post What does Arm’s own chip stand for? appeared first on EDN.

У КПІ відбулася відкрита лекція Посла Республіки Корея Пака Кічанга kpi пт, 03/27/2026 - 12:41

КПІ ім. Ігоря Сікорського відвідала делегація Королівства Данія kpi пт, 03/27/2026 - 12:38

📰 Газета "Київський політехнік" № 11-12 за 2026 (.pdf) Інформація КП пт, 03/27/2026 - 12:10

Wolfspeed Inc of Durham, NC, USA — which makes silicon carbide (SiC) materials and power semiconductor devices — has completed its private placements (announced on 19 March) of...

Over the last few years, there has been growing interest across the global semiconductor packaging industry with a new approach. Co-packaged optics (CPO) involves integrating optical fibers, used for data transmission, directly onto the same package or photonic IC die as semiconductor chips. Traditionally, semiconductor packaging has used copper interconnects, but these can consume large amounts of power and lead to signal weakening at high frequencies when the distance is further than a couple of meters.

With CPO, the optical components are integrated directly into a package, and the long copper trace between the switch and the optical module is replaced with short, high-integrity connections. Optical signaling uses far less power at high data rates than electrical signaling. As CPO reduces the distance between optical components and the semiconductor dice, this lowers latency, improves high-speed signal integrity, and accelerates data transfer.

All of which are fundamental for the next generation of AI devices for high performance computing (HPC) inside the data center systems. Nevertheless, there are obstacles that need to be overcome with CPO and when designing photonic packages, especially for integrated photonic circuits or photonic chips. This is why advances in photonic package design are coming to the forefront.

 

Overcoming CPO obstacles

When co-packaging photonics with electronics, there can be signal integrity issues. Electrical crosstalk must be reduced to improve signal quality. Using short interconnects and low-parasitic layouts are the most appropriate tactics when used alongside co-design tools for optical optimization. Signal integrity can be ensured without requiring complex routing or more space, as optical interconnects can support multi-terabit-per-second data rates over long distances with only minor signal loss.

Mounting a large photonic IC die onto a laminate or organic substrate can be problematic. Due to the coefficient of thermal expansion (CTE) mismatch between the substrate and the photonic IC die, non-negligible die warpage may occur. This warpage can significantly degrade optical signal performance in the photonic IC waveguides during data transmission, leading to substantial reductions in optical signal power and quality.

In addition, excessive warpage may introduce mechanical stress in the photonic IC die, altering its material properties and further impacting optical performance. While using a ceramic substrate could mitigate these issues, it’s more costly and is not widely adopted today.

Dealing with temperature variations can be a concern with photonic devices, but efficient thermal management and thorough thermal design can help to improve performance and reliability. Integrating photonics with electronics may require thermoelectric coolers (TECs) and heat sinks along with smart thermal simulations throughout the design process.

Sub-micron alignment is also a complex technical task. Optical misalignment can lead to significant insertion losses, as well as disrupting device performance. Leveraging passive alignment techniques with etched features or alignment markers may mean lower levels of accuracy, but this is the lowest cost. Active alignment, using real-time optical feedback, results in better performance and efficiency, though it’s far more complex and costly.

Addressing challenges when testing optical components involves using built-in test waveguides, automated optical probing systems, and standardized test procedures during and after packaging. Integrating optical and electrical components into a single package not only makes the manufacturing process more complicated, the associated risks and costs are also greater due to the different assembly phases. It’s possible to cut through the complexity and improve yields by using standardized processes for CPO assembly.

The future of CPO and photonic package design

As a result of the growing interest in CPO and photonic packaging, there have been advances in photonic package design. CPO enables faster data transmission and improved power-efficiency when compared to the conventional copper-based interconnects approach. It has many advantages, including high-speed communication and lower power consumption, but there are also concerns related to signal integrity, thermal management, optical alignment, and costs.

Advances in photonic package design can overcome these obstacles and help electronic design engineers create new architectures that would not be viable with traditional semiconductor packaging. As the semiconductor industry continues to rapidly evolve, with more complex devices requiring high-performance, compact and power-efficient chips, CPO with advanced photonic package design will become increasingly important.

Dr Larry Zu is CEO of Sarcina Technology.

Special Section: Chiplets Design

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• Scoping out the chiplet-based design flow
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• Chiplets: 8 best practices for engineering multi-die designs

The post Overcoming interconnect obstacles with co-packaged optics (CPO) appeared first on EDN.

Leading semiconductor manufacturer, Nuvoton, has partnered with pioneering cybersecurity business, Trustonic, to strengthen the capability of its advanced NuMicro® MA35 series MPU.

Established in 2008, Nuvoton was founded to bring innovative semiconductors to market and has since evolved into a leading name in the provision of microcontroller application integrated circuits (ICs), audio application ICs and cloud & computing ICs.

To strengthen the security of the solution, the Trusted Secure Island (TSI) of Nuvoton’s NuMicro MA35 series integrates Trustonic’s Trusted Execution Environment (TEE), Kinibi.

Having obtained the World’s first comprehensive EAL5+ certification in 2022, ‘Kinibi’ is now deployed to nearly 3 billion smart devices and 20 million vehicles globally, with zero safety violations. Its integration in the NuMicro MA35 series creates a secure environment that drives Protection, Detection, and Recovery for IoT products, including EV chargers.

Walter Tseng, Vice President of the Microcontroller Business Group at Nuvoton, explained: “Our partnership with Trustonic represents a significant milestone in Nuvoton’s commitment to providing industry-leading security for the industrial IoT market. By integrating the EAL5+ certified Kinibi TEE into our NuMicro MA35 series, we are providing our customers with a robust, hardware-backed security foundation. This collaboration ensures that critical industrial applications—from edge gateways to smart factory automation—are protected against evolving cyber threats through a dedicated ‘Protection, Detection, and Recovery’ framework, all while maintaining the high performance our users expect.”

Andrew Till, General Manager of Secure Platform for Trustonic, added: “Nuvoton’s MA35 platform is designed for high-performance edge applications, and security is critical to its success. Integrating Kinibi provides a proven Trusted Execution Environment that protects sensitive operations and enables manufacturers to build secure, scalable industrial IoT solutions with confidence.”

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