ELE Times

Subscribe to ELE Times потік ELE Times
latest product and technology information from electronics companies in India
Оновлене: 3 години 16 хв тому

Light + Building 2024: Fulminant innovation show provides a stage for sustainability and efficiency in buildings

Пн, 04/15/2024 - 13:58

The modern building is intelligent, connected and as a result saves energy. In combination with alternative energy sources and efficient lighting solutions, emissions in the building sector can be drastically reduced. This makes a significant contribution to achieving climate targets. 2,169 exhibitors presented the latest developments in building technology and trends in innovative lighting design at Light + Building in Frankfurt am Main from 3 to 8 March 2024. Over 151,000 visitors travelled to the world’s leading trade fair for lighting and building-services technology.

“The atmosphere at the exhibitors’ booths, in the halls and throughout the exhibition grounds was simply fantastic. We are extremely pleased that so many exhibitors and visitors, as well as our long-standing partners, have continued the success story of the world’s leading trade fair for lighting and building-services technology in 2024,” summarises Wolfgang Marzin, President and Chief Executive Officer of Messe Frankfurt. He adds: “With the switch to renewable energy sources, greater efficiency and sustainability in buildings, the industry has key goals on its agenda. That’s why they used the platform intensively, especially in the first few days, to present and discover innovations and drive forward key topics. After all, if we want to achieve the climate protection goals, the building sector is an essential milestone. It is unfortunate that the rail and air transport strikes have already affected Messe Frankfurt’s third leading international event since the beginning of the year.”

Buildings of tomorrow and inspiring lighting solutions

Key topics are the electrification and digitalisation of homes and buildings in order to reduce emissions and reuse raw materials. At Light + Building, the industry presented the digital and electrotechnical infrastructure for this and, on this basis, showcased solutions for dynamic power control, energy storage systems and applications for connected security. One growing area is the range of e-mobility and charging infrastructure as well as innovations and products for decentralised energy supply systems and components.

Light plays an important role in the architecture of tomorrow. At Light + Building 2024, 65 per cent of exhibitors belonged to this sector. They presented high-quality lighting solutions for indoor and outdoor areas as well as dynamic room concepts. Modern LED installations ensure contemporary efficiency and either blend harmoniously into the architecture or emphasise the design elements. Lighting is to provide maximum visual comfort in all living and working environments. Thanks to the materials used, Acoustic Lighting combines a pleasant lighting atmosphere with sound-absorbing functions. Sustainability plays an essential role in both the materials used and the manufacturing processes. Many manufacturers design luminaires in a way that the raw materials used can be recycled at the end of their useful life.

Light + Building 2024 in figures

The high-quality, extensive and international portfolio of lighting and building-services technology impressed the visitors. 95 per cent of them were extremely satisfied with what was on display and stated that they had achieved 93 per cent of their trade fair attendance targets. The most came to the innovation meeting point from Germany, China, Italy, the Netherlands, France, Switzerland, Belgium, Austria, the UK, Spain and Poland. They came from a total of 146 countries – including, for example, India, the USA, the United Arab Emirates, Australia, Brazil and Singapore. The degree of internationality was thus 51 per cent. The level of internationality among the 2,169 exhibitors was also high at 76 per cent.

Meeting place for the social media community

The social media community also found its home at Light + Building. On 3 and 4 March, the leading content creators in the lighting and building-services technology sector gathered for the Power Creator Days. In addition to live podcasts, expert talks and case studies, visitors had the chance to pedal for a good cause and work together towards a high energy target. A total of 1,510 minutes were cycled on the six fitness bikes. The sponsors will convert the result into a cash donation for the Leberecht Foundation, which Messe Frankfurt will double. The exact amount will be announced on social media further to Light + Building.

The next Light + Building will take place from 8 to 13 March 2026 in Frankfurt am Main.

Voices of the industry 02_191008_Alexander-Neuhaeuser_RO7A4153_Foto_ZVEHAlexander Neuhäuser, General Manager ZVEH (Central Association of the German Electrical and Information Technology Trades)

Alexander Neuhäuser, General Manager ZVEH, Central Association of the German Electrical and Information Technology Trades, says that “Light + Building demonstrates how sector coupling can succeed through the necessary connectivity. The electrical trades integrate photovoltaics, storage, electromobility and heat pumps. They show how the energy industry requirements for controllable consumption devices (SteuVE) can be met and thus take account of the current transformation process. The good atmosphere at this year’s Light + Building 2024 was also noticeable at the joint stand of the electrical trades, which was very busy on all days of the event. The traditional partners’ evening was also a complete success, bringing together the partners of the electrical trades and the industry leaders. We were particularly pleased that so many young people once again took the opportunity to visit the E-House and the workshop street and gain an impression of what is feasible with smart and intelligently connected building automation.”

Wolfgang Weber, CEO, ZVEI, Electro and Digital Industry Association, is of the opinion that, “In the context of climate goals and the economic situation of urgently creating more affordable living space in Germany, technologies are increasingly coming into focus. The exhibiting companies at Light + Building have impressively demonstrated how easily well-designed climate protection can even lead to greater economic efficiency in the operation of houses, buildings and entire neighbourhoods.

Wolfgang-Weber-Portraet-Quelle-ZVEI-Alexander-Grueber-scaledWolfgang Weber, CEO, ZVEI (Electro and Digital Industry Association)

This requires the right solutions, especially from the electrical and digital industry, such as heat pumps, controllable lighting, charging points and an energy management system. This is relevant – not just in Germany and Europe, but worldwide. Light + Building is the right place to present innovative, climate-friendly technologies and solutions and to engage in dialogue with trade visitors from Germany and abroad.”

The post Light + Building 2024: Fulminant innovation show provides a stage for sustainability and efficiency in buildings appeared first on ELE Times.

Microchip Acquires ADAS and Digital Cockpit Connectivity Pioneer VSI Co. Ltd. to Extend Automotive Networking Market Leadership

Птн, 04/12/2024 - 10:17

Acquisition adds ASA Motion Link technology to Microchip’s broad Ethernet and PCIe automotive networking portfolio to enable next-generation software-defined vehicles

Microchip Technology Inc. has announced the completed acquisition of Seoul, Korea-based VSI Co. Ltd., an industry pioneer in providing high-speed, asymmetric, camera, sensor and display connectivity technologies and products based on the Automotive SerDes Alliance (ASA) open standard for in-vehicle networking (IVN). The terms of the transaction are not disclosed.

The market size of automotive radar, camera and LiDAR modules is expected to grow by greater than two times between 2022 to 2028 to $27B in revenue, according to Yole Group[1]. This anticipated growth is driven by the increased adoption of Advanced Driver Assistance Systems (ADAS), in-cabin monitoring, safety and convenience features (e.g., 360-degree surround view, e-mirrors) and multi-screen digital cockpits for next-generation software-defined vehicles (SDV). These applications will require more highly asymmetric raw data and video links and higher bandwidths, making current, proprietary serializer/deserializer (SerDes) based solutions no longer adequate, both commercially and technically. In response to these developments, the Automotive SerDes Alliance (ASA) was formed in 2019 and released the first open-standard ASA Motion Link (ASA-ML)  specifications.

“This acquisition brings VSI’s knowledgeable team, their market traction and ASA Motion Link technologies and products to Microchip’s expansive automotive networking portfolio to better serve the ADAS megatrend we are focused on,” said Mitch Obolsky, senior vice president of Microchip’s automotive products, networking, and data centre business units. “As the industry converges around three primary IVN pillars – Ethernet, PCIe and ASA Motion Link, camera and display connectivity is one of the fastest growing and largest IVN markets. With VSI, Microchip can now offer products that span all three pillars and also provide automotive security, microcontrollers, motor control, touch and power management solutions to our customers to enable their next-generation software-defined vehicle architectures.”

Today, ASA has over 145 members, including Microchip who is a promoter member. With 11 automotive manufacturers including BMW, GM, Ford, Stellantis and Hyundai-Kia Motors Corporation, the Alliance also includes an ecosystem ranging from Tier 1 suppliers, semiconductor and imager vendors, to test and compliance houses. In addition to being an open standard, ASA-ML brings link layer security and scalability to support 2 Gbps to 16 Gbps line rates. Furthermore, the upcoming specification update will enable ASA-ML to support Ethernet-based architectures.

“Microchip Technology is an established and trusted market leader in automotive networking known for their automotive quality and robust supply chain, and our team is excited to join them to address the growing ADAS and digital cockpit connectivity market,” said Steve Kang, CEO of VSI Co. Ltd. “VSI is a leader in the development of ASA-ML products and was the first to introduce products to the market. Our standards-compliant chipsets are being evaluated by car manufacturers worldwide. We recently collaborated with BMW in a proof of concept to showcase ASA-ML and our product readiness. This acquisition brings together two organizations with a shared commitment to advancing technology through innovation. We look forward to successfully deploying our solutions in production vehicles for years to come.”

In March 2024, BMW Group announced at the Automotive Ethernet Congress in Munich they would shift to using standardized ASA-ML for the upcoming start of productions. BMW has always been at the forefront of in-vehicle networking innovation and strongly believes in leveraging standardized technologies in their vehicle architectures and now also their video architecture.

[1] Sources: LiDAR for Automotive – Radar for Automotive – Status of the Camera Industry – Yole Intelligence, 2023.

The post Microchip Acquires ADAS and Digital Cockpit Connectivity Pioneer VSI Co. Ltd. to Extend Automotive Networking Market Leadership appeared first on ELE Times.

Vishay Intertechnology Industrial-Grade TRANSZORB and Automotive Grade PAR TVS Deliver Peak Pulse Power of 600 W in DFN3820A Package

Чтв, 04/11/2024 - 14:40

Featuring Compact 3.8 mm by 2.0 mm Footprint, Low 0.88 mm Profile, and Wettable Flanks, Space-Saving Devices Offer Operating Temperatures to +185 °C

Vishay Intertechnology, Inc. today introduced four new series of surface-mount industrial-grade TRANSZORB and automotive-grade PAR transient voltage suppressors (TVS) in the low profile DFN3820A package with wettable flanks. Providing space-saving solutions for automotive, computer, consumer, and industrial applications, the 6DFNxxA, 6DFNxxxCA, T6NxxA, and T6NxxxCA offer peak pulse power of 600 W at 10/1000 μs and low leakage current down to 1 μA.

The first package in Vishay’s new Power DFN family, the DFN3820A features a compact 3.8 mm by 2.0 mm footprint and an extremely low typical height of 0.88 mm, allowing the Vishay General Semiconductor TVS to make more efficient use of PCB space. Footprint-compatible with the SMP (DO-220AA) package, the DFN3820A is 85 % smaller than the SMB (DO-214AA) and 42 % smaller than the SlimSMAW (DO-221AD), but it keeps peak pulse power dissipation with a 10/1000 μs waveform at 600 W.

The devices released are designed to protect sensitive electronic equipment against voltage transients induced by inductive load switching and lightning. The 6DFNxxA and 6DFNxxxCA TRANSZORB TVS will be used for signal line protection in server power modules, digital media controllers, and AV signal extenders for computer and consumer applications, in addition to industrial robot control boards, process/flow control instruments, and automation systems.

AEC-Q101 qualified and offering high-temperature operation to +185 °C, the T6NxxA and T6NxxxCA PAR TVS are intended for automotive load dump protection. Typical applications will include advanced driver assistance (ADAS), battery management (BMS), electric power steering (EPS), and infotainment systems; central control units; on-board chargers (OBC); DC/DC converters and traction inverters; and electrical motor drives.

The TVS offer excellent clamping capability with a maximum clamping voltage from 16.7 V to 70.1 V for the 6DFNxxA and T6NxxA, and 16.7 V to 137 V for the 6DFNxxxCA and T6NxxxCA. The wettable flanks of their DFN3820A package allow for automatic optical inspection (AOI), eliminating the need for an X-ray inspection. Ideal for automated placement, the rectifiers offer an MSL moisture sensitivity level of 1, per J-STD-020, LF maximum peak of 260 °C. The devices are RoHS-compliant and halogen-free, and their matte tin-plated leads meet the JESD 201 class 2 whisker test.

Device Specification Table:

Series

6DFNxxA

6DFNxxxCA

T6NxxA

T6NxxxCA

Automotive Grade

No

No

Yes

Yes

VBR (V)

12 to 51

12 to 100

12 to 51

12 to 100

VWM (V)

10.2 to 43.6

10.2 to 85.5

10.2 to 43.6

10.2 to 85.5

Max. reverse leakage at VWM (mA)

1.0 to 2.0

PPPM (10/1000 μs) (W)

600

Max. clamping voltage (V)

16.7 to 70.1

16.7 to 137

16.7 to 70.1

16.7 to 137

TJ max. (°C)

175

175

185

185

Polarity

Unidirectional

Bidirectional

Unidirectional

Bidirectional

Package

DFN3820A

Circuit configuration

Single

The post Vishay Intertechnology Industrial-Grade TRANSZORB and Automotive Grade PAR TVS Deliver Peak Pulse Power of 600 W in DFN3820A Package appeared first on ELE Times.

Ceremorphic Driving Vision to Develop Sustainable Product Portfolio Across Sectors

Чтв, 04/11/2024 - 14:12

Ceremorphic is doing great business and quality development in the areas of supercomputing, datacentre, life sciences, automotive, robotics, and metaverse processing. As the world moves towards a highly advanced computing era, Ceremorphic is leading many channels in developing high-tech computing and engineering systems. Their technical excellence covers a vast portfolio including multi-thread processors, security processing, machine learning processors, analog computing, reliable circuits, 3D interconnects, graph neural processing, programmable logic, and low-power memory.

Dr. Venkat Mattela, Founder & CEO, of Ceremorphic

Rashi Bajpai, Sub-Editor at ELE Times interacted with Dr. Venkat Mattela, Founder & CEO, of Ceremorphic about the company’s vision and technical competence, and also touched upon topics of Make in India and ESG norms.

This is an excerpt from the conversation.

 

 

 

ELE Times: Please throw some light on Ceremorphic’s recent development of the ultra-low power supercomputer chip built in TSMC 5nm.

Venkat Mattela: Designing products with optimal energy consumption is a challenge we foresee for the semiconductor industry for the next few decades especially with the advent of carbon neutrality mandates. As supercomputing innovations burgeon and data centers consume ever more energy, within a decade they will consume a significant part of the total energy generation in the world. This was the catalyst behind our mission to design chips with ultra-low energy consumption. Our breakthrough innovation is not just in advanced nodes like 5nm and 3nm, but we are also broadening our reach to other paradigms to minimize task workloads alongside semiconductor technology optimizations. Having taped out our 5nm chip in October 2022 and validated key technologies for our upcoming 3nm device, we’re proud of how far we’ve come in addressing these challenges. Equipped with advanced features like multi-thread processing and custom connectivity interfaces, our chips cater to modern applications’ rigorous demands, from AI model training to drug discovery. We’re excited to continue pushing the boundaries of technology and remain committed to creating solutions that make a meaningful impact.

ELE Times: In the latest development under the “Make in India” policy, India is set to begin manufacturing equipment for semiconductor manufacturing. In this regard, what in your view, are India’s major contributions to the semiconductor industry besides cutting-edge R&D? Also help us understand the challenges with physical manufacturing.

Venkat Mattela: In addition to cutting-edge R&D, India’s contributions to the semiconductor industry extend across various domains, showcasing the nation’s growing significance in this field. Firstly, India serves as a hub for semiconductor design and engineering services, with numerous companies specializing in chip design, verification, and testing. These capabilities play a crucial role in the global semiconductor supply chain, contributing to the development of innovative semiconductor products.

We also boast a robust ecosystem for semiconductor software development, encompassing tools and platforms for chip design, simulation, and optimization. This is complemented by our vast pool of skilled engineers and technologists that form a rich talent pool sought after by semiconductor companies worldwide. Moreover, initiatives like the Skill India program aim to enhance the employability of Indian youth in high-growth sectors such as semiconductors, fostering a skilled workforce for the industry’s future needs.

However, despite these contributions, India faces several challenges in physical manufacturing. One key challenge is the need for robust infrastructure and logistical support. Semiconductor fabrication facilities require state-of-the-art equipment, cleanroom environments, and reliable power and water supply, which may be lacking in certain regions.

Additionally, establishing a consistent supply chain for raw materials, chemicals, and equipment components is crucial to reduce reliance on imported materials and prevent disruptions. To scale up manufacturing, it is crucial to present ourselves as an ideal candidate for manufacturing thereby attracting investments in research, infrastructure, and workforce development.

While initiatives like the “Make in India” policy aim to do this, sustained efforts are needed to overcome regulatory barriers, attract foreign investment, and push for innovation-driven growth in the sector.

ELE Times: What potential collaborations can be explored between the renewable energy sector and semiconductor fabrication plants to establish ESG norms and sustainable practices in manufacturing?

Venkat Mattela: Renewable energy should not be viewed as merely an option, but rather as a standard practice across all industries. Given the semiconductor industry’s substantial energy consumption, it is crucial for us to take the lead in adopting renewable energy sources. Collaborations between the renewable energy sector and semiconductor fabrication plants play a pivotal role in establishing robust ESG norms and sustainable manufacturing practices.

By integrating renewable energy sources such as solar, wind, and hydroelectric power into semiconductor fabrication plants we can significantly reduce carbon emissions and environmental impact. Research and development efforts aimed at enhancing energy efficiency in semiconductor fabrication, such as advanced cooling systems, energy-efficient equipment, and optimized manufacturing processes, can yield significant environmental benefits while also improving operational efficiency and cost-effectiveness. Additionally, encouraging partnerships between renewable energy providers and semiconductor companies can facilitate the development of innovative solutions for energy storage and management. Technologies like battery storage systems and smart grid integration enable semiconductor facilities to store excess renewable energy and optimize its usage based on demand, thereby maximizing energy efficiency and grid stability. By leveraging renewable energy sources, emphasizing innovation, and promoting sustainability across the supply chain, we can contribute to a more environmentally conscious and socially responsible semiconductor industry.

ELE Times: What would be your insights and recommendations for the policymakers navigating the challenges of establishing India as a semiconductor hub?

Venkat Mattela: We are making significant strides in positioning India as a global R&D hub, thanks to our supportive policies and initiatives that prioritize top-tier institutions and foster innovation, particularly in AI. However, transitioning into a semiconductor manufacturing hub requires additional effort and time. A crucial starting point would be to build a semiconductor manufacturing facility, which is doable and requires very dedicated engineering leadership to action. Fortunately, the current government’s policies are highly encouraging and provide India an ideal path to make substantial progress in this direction within the coming decade.

ELE Times: Looking at Ceremorphic’s technology portfolio, help us understand its role in addressing the crucial needs of the high-performance computing era.

Venkat Mattela: Generative AI has played a critical role in enabling various technological applications to efficiently adopt Artificial Intelligence (AI) and supercomputing is the catalyst in training these AI models. At Ceremorphic, we embarked on this journey six years ago with a primary objective of developing ultra-low-energy, low-power supercomputing solutions. While few companies prioritized low-energy supercomputing at the time, it has now become an industry standard. With a portfolio boasting over 200 patented core technologies in this field, we have certainly has played a part in driving this shift. Our efforts in advancing low-energy supercomputing have had far-reaching implications, especially in the life sciences and pharmaceutical space.

We recently introduced our new platform, BioCompDiscoverX, which promises to revolutionize drug development by significantly accelerating the process, reducing costs, and enhancing efficacy. Furthermore, reiterating our commitment to high-performance computing in an energy-efficient manner, our upcoming chip will be manufactured using TSMC’s cutting-edge 3nm node.

ELE Times: What extra efforts and measures are necessary on the grassroots level to further elevate and enhance skill development across various sectors and emerging technologies?

Venkat Mattela: Progress at the grassroot level hinges on the coming together of supportive policies and robust funding infrastructures. As we enter a pivotal decade of innovation, we are witnessing promising advancements in these areas within India. Positioned in our golden era, we have the privilege of seizing numerous opportunities to leave a significant impact on the upcoming technological era.

Advanced universities are already leading the way by implementing specialized curriculums tailored to new technologies. But, to ensure widespread skill development, we must distil key learnings and core concepts and integrate them into the lower education levels to establish a solid foundation for future generations. This approach must go beyond theoretical knowledge and touch upon practical demonstrations of concepts. By encouraging innovation ideation from an early stage, we can sustainably cultivate a culture of creativity that will propel us to the forefront of every emerging technology.

The post Ceremorphic Driving Vision to Develop Sustainable Product Portfolio Across Sectors appeared first on ELE Times.

Anritsu Company Expands Inline Sensor Family

Чтв, 04/11/2024 - 09:51

Anritsu Company is proud to announce the launch of our new inline power sensor MA24103A which is designed to measure accurate Peak and True-RMS average power measurements from 25 MHz to 1 GHz and 2 mW to 150 W power range.

Several applications demand accurate peak and average power measurements well below the frequency range of 1 GHz. Agencies in Public Safety, Avionics (air traffic control and repair stations), and Railroads, etc. must maintain critical communications between the control centres and the vehicles. The slightest error in making measurements or maintaining a communication network in these markets could risk public safety or even have fatal consequences.

The advantage of lower frequencies is that they can propagate a longer distance and maintain communication with fast-moving vehicles. Normally, at lower frequencies, the power of the transmitting signal is in the range of watts, which makes the MA24103A more suited for these types of applications.

This highly accurate, Inline Peak Power Sensor communicates with a PC via USB or with an Anritsu handheld instrument equipped with the high-accuracy power meter option 19.

Some of the main markets that benefit from this low-frequency Inline Power Sensor include:

  • Broadcast Network and Manufacturer: Lab performance accuracy and low insertion loss over a wide temperature range (0 ºC to 55 ºC), making it perfect for field applications.
  • Railroads: to evaluate various systems like Positive Train Control Systems, End of Train (EOT) signals, automated train control systems, and FM voice base stations.
  • Avionics: such as Civil and Military Airports for beacon testing, surveillance radar testing, localizer, and marker testing.

The post Anritsu Company Expands Inline Sensor Family appeared first on ELE Times.

Renesas Expands Quick Connect Studio with Real-Time Code Customization, Remote Debugging and Broad Portfolio of Supported Devices

Чтв, 04/11/2024 - 09:04

Industry’s First-Ever Cloud-based System Development Tool Enables Rapid Prototypes and Co-Optimization of Software and Hardware

Renesas Electronics Corporation, a premier supplier of advanced semiconductor solutions has announced new features and additional coverage for its Quick Connect Studio, a cloud-based embedded system design platform. Quick Connect Studio enables users to graphically co-optimize hardware and software to quickly validate prototypes and accelerate product development.
Quick Connect Studio empowers engineers to graphically drag and drop devices and design blocks on the Cloud to build their solution. After placing each block, users can generate, compile, and build the base software automatically, a major shift towards the no-code paradigm of development. This makes building production-level software as easy as piecing building blocks together. There is very little upfront learning or investment needed. The cloud computing power provides fast compilation, and the intuitive GUI reduces the learning curve. Quick Connect Studio automatically generates system software that can be iteratively tested on the hardware.
Renesas is continuing to expand this platform with a broad portfolio of a growing number of devices from Renesas and partners that users can use to build their prototype systems. Quick Connect Studio now offers support for all the Renesas RA MCU boards, as well as multiple Renesas wireless modules and sensors. Additionally, devices from partners such as ams OSRAM, TDK, and Arducam have been added to further broaden the range of supported applications and designs. Quick Connect Studio can now help users build over 350 systems using Renesas MCU and breakout boards. Renesas is working with more suppliers and partners to automate the addition of their complementary devices, thus providing customers with a broad portfolio of supported devices to build their system designs.
Renesas is now introducing real-time code customization and remote debugging for Quick Connect Studio users. The automatically generated code can be customized in real-time in the browser application. Using remote board farms, the code can be tested on target hardware dynamically to verify the operation before buying or building the physical board and setting up the test system. This capability dramatically speeds up the process of building proof of concepts and prototyping system solutions by concurrently working on both software and hardware components of system design.
Renesas now offers multi-region secure infrastructure deployments around the world for uniform user experience, fastest response and reduced latency. This enables auto-scaling to accommodate multiple concurrent users to access the platform anywhere, anytime.
 “Quick Connect Studio is a transformational offering for the industry,” said DK Singh, Vice President, Digitalization for Renesas. “For the first time, engineers can now pursue hardware and software development simultaneously. Our aim is to remove all the preparatory work from the system development process. This is a radical shift, enabling designers to focus their resources and energy on their core innovation build software immediately with the ability to quickly reconfigure and test product ideas.”
“Renesas is empowering customers to accelerate their proof of concepts and production processes through Quick Connect Studio,” said Sahil Choudhary, Director of Marketing at TDK. “Once integrated into this platform, customers can seamlessly incorporate our MEMS 6-axis motion sensor with any Renesas RA MCU, generating production-ready code within minutes, without delving into intricate technical details.”
Renesas’ Quick Connect Studio is a part of Renesas Quick Connect, a platform of standardized hardware featuring industry-established interfaces such as PMOD, Arduino, and MIKROE. With standard connectors, engineers can mix and match MCUs, MPUs, sensors, and connectivity boards seamlessly. In the future, users will be able to extend and expand beyond Renesas to different partners such as major cloud providers, service integrators, and leaders in the open-source community.

The post Renesas Expands Quick Connect Studio with Real-Time Code Customization, Remote Debugging and Broad Portfolio of Supported Devices appeared first on ELE Times.

Exploring Process Scenarios to Improve DRAM Device Performance

Срд, 04/10/2024 - 15:18

In the world of advanced semiconductor fabrication, creating precise device profiles (edge shapes) is an important step in achieving targeted on-chip electrical performance. For example, saddle fin profiles in a DRAM memory device must be precisely fabricated during process development in order to avoid memory performance issues. Saddle Fins were introduced in DRAM devices to increase channel length, prevent short channel effects, and increase data retention times.

Critical process equipment settings like etch selectivity or the gas ratio of the etch process, can significantly impact the shape of fabricated saddle fin profiles. These process and profile changes have significant impact on DRAM device performance. It can be challenging to explore all possible saddle fin profile combinations using traditional silicon testing, since wafer-based testing is time-consuming and expensive. To address this issue, virtual fabrication software (SEMulator3D) can be used to test different saddle fin profile shapes without the time and cost of wafer-based development.

In this article we review an example of using virtual fabrication for DRAM saddle fin profile development. We also assess DRAM device performance under different saddle fin profile conditions. This methodology can be used to guide process and integration teams in the development of process recipes and specifications for DRAM devices.

The Challenge of Exploring Different Profiles

Imagine you are a DRAM process engineer, and have received nominal process conditions, device specifications, and a target saddle fin profile for a new DRAM design. You want to explore some different process options and saddle fin profiles to improve the performance of your DRAM device. What should you do? This is a common situation for integration and process engineers during the early R&D stages of DRAM process development.

Traditional methods of exploring saddle fin profiles are difficult and sometimes impractical. These methods involve the creation of a series of unique saddle fin profiles on silicon wafers. The process is time-consuming, expensive, and in many cases impractical, due to the large number of scenarios that must be tested.

One solution to these challenges is to use virtual fabrication. SEMulator3D allows us to create and analyze saddle fin profiles within a virtual environment and to subsequently extract and compare device characteristics of these different profiles. The strength of this approach is its ability to accurately simulate the real-world performance of these devices, but to do so faster and less-expensively than using wafer-based testing.

Let’s dive into the methodology behind our approach.

Creating Saddle Fin Profiles in a Virtual Environment

First, we input the design data and process flow (or process steps) for our device in SEMulator3D. The software can then generate a “virtual” 3D DRAM structure and provide a visualization of saddle fin profiles (Figure 1). In Figure 1(a), a full 3D DRAM structure including the entire simulation domain appears. To enable detailed device study, we cropped a small portion of the simulation domain from this large 3D area. In Figure 1(b), we extracted a cross sectional view of the saddle fin structure, which can be modified by varying a set of multi-etch steps in the process model. The section of the saddle fin we want to modify is identified as the “AA” (active area). We can finely tune the etch taper angle, AA/fin CD, fin height, taper angle, and additional nominal device parameters to modify the AA profile.

Using the structures, we built in SEMulator3D, we next assign dopants and ports to the simulated structure and perform electrical performance evaluation. Accurately assigning dopant species and defining dopant concentrations within the structure is critical to ensuring the accuracy of our simulation. In Figure 2(a), we display a dopant concentration distribution generated in SEMulator3D.

Ports are contact points in the model, which are used to apply or extract electrical signals during a device study. Proper assignment of the ports is very important. Figure 2(b) provides an example of port assignment in our test DRAM structure. By accurately assigning the ports and dopants, we can extract the device’s electrical characteristics under different process scenarios.

 (a) Dopant concentration and (b) Port assignments (in blue)Figure 2: (a) Dopant concentration and (b) Port assignments (in blue) Manufacturability Validation

It is important to ensure that our simulation models match real world results. We can validate our model against cross-sectional images (SEM or TEM images) from an actual fabricated device. To ensure our simulated device matches the behavior of an actual manufactured chip, we can create real silicon test wafers containing DRAM structures with different saddle fin profiles.

To study different saddle fin profiles, we use different etch recipes on an etch machine to vary the DRAM wordline etch step. This allows us to create specific saddle fin profiles in silicon that can be compared to our simulated profiles. A process engineer can change etch recipes and easily create silicon-based etch profiles that match simulated cross section images, as shown in Figure 3.

In this case, the engineer created a nominal (Process of Record) profile, a “round” profile (with a rounded top), and a triangular shaped profile (with a triangular top). This wafer-based data is not only used to test electrical performance of the DRAM under different saddle fin profile conditions, but can also be fed back into the virtual model to calibrate the model and ensure that it is accurate during future use.

 (a) Nominal condition (Process of Record), (b) Round profile and (c) Triangle profileFigure 3: Cross section images vs. models: (a) Nominal condition (Process of Record), (b) Round profile and (c) Triangle profile Device Simulation and Validation

In the final stage of our study, we review the electrical simulation results for different saddle fin profile shapes. Figure 4 displays simulated electrical performance results for the round profile and triangular saddle fin profile. For each of the two profiles, the value of the transistor Subthreshold Swing (SS), On Current (Ion), and Threshold Voltage (Vt) are displayed, with the differences shown. Process integration engineers can use this type of simulation to compare device performance using different process approaches. The same electrical performance differences (trend) were seen on actual fabricated devices, validating the accuracy and reliability of our simulation approach.

 the transistor performance difference between the Round and Triangular Saddle Fin profile is shown for Subthreshold Swing (SS), On Current (Ion), and Threshold Voltage (Vt)Figure 4: Device electrical simulation results: the transistor performance difference between the Round and Triangular Saddle Fin profile is shown for Subthreshold Swing (SS), On Current (Ion), and Threshold Voltage (Vt) Conclusion

SEMulator3D provides numerous benefits for the semiconductor manufacturing industry. It allows process integration teams to understand device performance under different process scenarios and lets them easily explore new processes and architectural opportunities.

In this article, we reviewed an example of how virtual fabrication can be used to assess DRAM device performance under different saddle fin profile conditions. Figure 5 displays a summary of the virtual fabrication process and how we used it to understand, optimize, and validate different process scenarios.

Virtual fabrication can be used to guide process and integration teams in the development of process recipes and specifications for any new memory or logic device and to do so at greater speed and lower cost than silicon-based experimentation.

The post Exploring Process Scenarios to Improve DRAM Device Performance appeared first on ELE Times.

TATA in Partnership with Satellogic Launches First Made in India Military Satellite

Срд, 04/10/2024 - 15:04

Tata Advanced Systems Ltd, a subsidiary of TATA Sons, in collaboration with Satellogic has successfully launched India’s first private sector-built sub-metre resolution earth observation satellite, TSAT-1A from the Kennedy Space Centre, Florida through SpaceX’s Falcon 9 rocket on April 7.

The TSAT-1A satellite assembled at TASL’s Karnataka facility represents a significant milestone in space technology. Its deployment as part of SpaceX’s inaugural Bandwagon flight, which also deployed a total of 11 satellites, underscores its importance in the realm of space exploration and satellite deployment.

The satellite is anticipated to bring about a paradigm shift in satellite imaging due to its high-resolution capabilities and rapid data delivery. Its configuration in low-earth orbit, coupled with its lightweight design of less than 50 kg, positions it as a versatile asset capable of serving a wide range of applications. Its potential impact on various sectors including defense and communication, makes it a pivotal development in the field of space technology.

The post TATA in Partnership with Satellogic Launches First Made in India Military Satellite appeared first on ELE Times.

Semiconductors beyond nanometers

Срд, 04/10/2024 - 14:53

SCHUMACHER | Infineon Technologies AG

In today’s world, semiconductors are essential components of our everyday lives and the backbone of our economies. From the devices we use to communicate to the machines that power our factories, semiconductors are the building blocks that enable digitalization and decarbonization. However, public and policy debates about semiconductors often focus solely on their smallest feature size, measured in nanometers, which fails to capture the full complexity and importance of these high-tech goods.

At Infineon, we have developed a simple yet powerful way to understand semiconductors – our “Semiconductor Tree.” This intuitive structure provides a framework for discussing the different branches of the semiconductor industry, from power semiconductors to memory chips and microcontrollers. By exploring each branch of the tree, we can gain a better understanding of the unique properties and specialized industries that each one represents.

First transistor (1947)

At the core of the semiconductor industry is the transistor switch, which was first demonstrated in 1947 by a team of researchers at AT&T Bell Labs. Since then, we have seen an exponential miniaturization roadmap, which has led to microprocessors that contain billions of transistors. However, this race to shrink transistors and integrate them as densely as possible into an Integrated Circuit (IC) requires extreme ultraviolet light and the most complex machines ever manufactured by mankind.

Power semiconductors

pic

Notably, one branch of the semiconductor industry has focused on optimizing the individual transistor for faster switching and/or switching of ever-higher electrical power. These are known as power semiconductors and are becoming increasingly important as societies and economies move towards electrification as a means to decarbonize. Power semiconductors require sophisticated control of the underlying technologies and processes, and leading companies often control much of the value chain in-house.

Infineon’s power semiconductor business is an example of an Integrated Device Manufacturer (IDM), with major manufacturing sites in Germany, Austria, and Malaysia.

Memory, microcontrollers/microprocessors, and analog/mixed-signal

Another path to optimizing the transistor was to standardize it as much as possible, shrink it, and pack it as densely as possible. This gave rise to other branches in the semiconductor tree, including memory, microcontrollers, and microprocessors. Each of these branches has its unique properties, requirements, and industries. For instance, memory semiconductors allow storage and read-out of information in the form of electrical signals.

Microcontrollers, on the other hand, control everyday devices like washing machines, cars, airplanes, and industrial control systems. Analog/mixed-signal semiconductors act as the interface between our real world and the digital world, processing analog electrical signals like WiFi, Bluetooth, or radar chips for autonomously driving cars. Since analog signal processing doesn’t follow the same shrink path as analog, manufacturing analog/mixed signal today is often done at a sweet spot of 130-90nm.

Final Thoughts

The world of semiconductors is vast and diversified, and it is crucial to have a more nuanced understanding of the importance and development of the respective industries. Semiconductors are essential building blocks for our personal lives, modern societies, and economies, and their importance will only grow as we continue to digitize and decarbonize.

As such, it is no surprise that semiconductors are at the center of global politics. By understanding the complexity and importance of semiconductors, we can have more precise discussions about their role in shaping our world.

The post Semiconductors beyond nanometers appeared first on ELE Times.

Examining an Air Filter with a RANS Turbulence Model

Срд, 04/10/2024 - 14:21

Joseph Carew | Comsol

HVAC systems do more than provide the smooth, chilled air that flows when the temperature outside rises. Within these systems, air moves through filters to ensure high air quality. With clean air at stake, modeling and simulation can be used to gain an in-depth understanding of the physics behind the behavior of air as it moves through a filter…

Modeling an Air Filter

The filters within HVAC systems rely on a material (often fiberglass or cotton folds) capable of straining the air and catching particulates like dust, pollen, and bacteria. These materials impact the flow of the air, catching the unwanted particulates while simultaneously allowing the filtered air to flow through. Modeling these devices and the turbulent flow they induce allows for determining the effectiveness of different materials when they are used for filters, helping designers to narrow down the material options before investing in real-life, experimental versions.

In this blog post, we will look at a common air filter geometry (shown below) as our example.

Modeling this air filter begins with the CFD Module, an add-on product to the COMSOL Multiphysics® software, which enables users to create Reynolds-averaged Navier–Stokes (RANS) turbulence models in open and porous domains. In this example, the air filter is modeled as a highly porous domain with 90% of the material occupied by cylindrical pores with a diameter of .1 mm. The support of the air filter is represented by a frame with no-slip walls. For this example, we employed the Turbulent Flow, k-ω interface because of its accuracy for models with many walls, including no-slip walls. (An in-depth look at the model setup can be found in the model documentation, which can be accessed via the button at the end of this blog post.)

Evaluating the Results

Solving the model allows for visualizing the change in turbulence, velocity, and pressure as air moves toward, through, and past the filter. The computation begins with the air moving toward the filter (purple in the image below). When the air passes through the filter, the interstitial velocity increases (although the porous-averaged velocity remains constant), resulting in an increase in turbulence kinetic energy. Additionally, there is an abrupt pressure drop due to the increase in velocity and the increased friction and pressure losses, which stem from the high number of wall surfaces. As for the behavior of the air as it moves away from the filter, the frame of the filter prevents the air from moving freely, instead causing downstream wakes of air.

The visualization of the air moving through the filter can be used to conclude whether or not the filter will remove contaminants from the air. To confirm this conclusion, the solution can be evaluated with different slice plots. One of the slice plots for this example indicates that the velocity of the air is most impacted by the porous air filter and the frame and that it homogenizes through the wake region. A slice plot measuring the turbulence kinetic energy shows that the turbulence kinetic energy peaks noticeably within the filter and attains typical values on the no-slip walls.

In general, the model points to a pressure drop and a dramatic increase in turbulence within the filter, creating perturbations in velocity perpendicular to the main direction of the flow thus also increasing the probability of the particles to collide with the pore walls and stay there. In other words, the increase in turbulence provides the mixing required for filtering out the unwanted particulates, which otherwise would flow through the pores undisturbed.

The post Examining an Air Filter with a RANS Turbulence Model appeared first on ELE Times.

Broadcom brings together two proven portfolios to deliver complete hybrid cloud cybersecurity

Срд, 04/10/2024 - 14:04

Rob Greer, Vice President and General Manager, Enterprise Security Group, Broadcom

Merging Carbon Black with Symantec forms the new Enterprise Security Group at Broadcom

It is clear, there is no let-up in cyberattacks, so the timing could not be better for Broadcom to bring Carbon Black and Symantec together. These engineering-first, innovation-centric brands are both committed to delivering proven cybersecurity solutions and support built to meet the unique and highly complex challenges of the largest and most heavily regulated enterprise customers and partners. Broadcom will make significant investments in both brands, and continue to offer both portfolios under the Enterprise Security Group business unit. Our joint mission is to help secure the world’s largest and most advanced enterprises.

Symantec’s portfolio, with some of the best security technology and research in the world, concentrates on data and network protection, while Carbon Black’s complimentary portfolio specializes in both endpoint detection and response (EDR) and application control. Bringing both network and data telemetry to Carbon Black will enable greater visibility and control for our joint customers. Under the new Enterprise Security Group, customers will continue to receive the best service with more dedicated resources and focused support than ever before. What can you expect in the near-term? Let’s take a closer look at innovation, customers, and partners.

Innovation

Broadcom’s financial stability empowers Symantec and Carbon Black product portfolios to innovate at a massive scale. Our customers will benefit from access to an enhanced enterprise-grade portfolio and leading technological advancements, with unparalleled service and support.

Initially, we will invest in R&D to improve – and extend the life — of the products our customers are using both on-prem and across hybrid clouds. We also are excited about the complementary nature of both sets of technologies and the combined value they will provide our customers, opening up more choices. For example, Symantec has a data center security product to protect traditional workloads in the data center. Carbon Black has a complementary solution. With access to these two technology sets, defenders will be even better equipped to protect their infrastructures.

On the talent side, we will be making significant investments in engineering. Carbon Black is known for its outstanding, customer-centric engineering capabilities, and we are committed to investing in Carbon Black’s incredible franchise and putting the best talent in the best roles. For example, both Carbon Black and Symantec have existing engineering sites in India. While we see the opportunity to converge them, we do not expect to make headcount reductions in those sites. In fact, we plan to make more investments in India. In addition, we will continue to invest in support and R&D for both brands, retaining key technical and product leaders to ensure continued success today and in the future.

Customers

Symantec and Carbon Black product portfolios will continue to operate in their current states for the immediate future. Our customers can expect to gain access to an extensive and robust enterprise-class portfolio supported by top-tier security experts, intelligence, and continued innovation, all backed by the financial stability of Broadcom.

Looking ahead, we will explore innovative new ways to deliver solutions to our customers. This will involve intensely focusing on the technologies that provide the most value to our customers and partners and invest more resources in those areas so our customers realize even greater value and ROI.

Partners

At Broadcom, we take a very focused go-to-market approach. As Hock Tan, our CEO, says, “We do what we do best.” By focusing on our core strengths and not trying to be all things to everyone, we open big opportunities for our partners to step in, fill gaps, and profit from them. The addition of the Carbon Black portfolio provides a great opportunity for our partners to drive more revenue, win more customers, and grow. Broadcom will provide the necessary training, support and other resources to ensure our partners’ success with Carbon Black solutions. For examples of our breakthrough approach to building a highly scalable, close-to-the-customer partner ecosystem, look no further than our Global Cybersecurity Aggregator Program (GSAP) and the Expert Advantage Partner Program. Partners in these programs deliver high-value services to customers of all sizes – including our largest enterprise accounts.

Building a strong security future

Over the next few weeks, we will be sharing more details about how today’s announcement will further benefit our customers and partners. In the meantime, we encourage you to visit our online resources to access additional information. As ransomware attacks and other cybersecurity threats continue to rise, you can be rest assured that Carbon Black and Symantec together will provide the mission-critical technologies to defend the most complex, highly regulated organizations.

The post Broadcom brings together two proven portfolios to deliver complete hybrid cloud cybersecurity appeared first on ELE Times.

element14 brings latest Silex Wi-Fi 6 Radio Development Kit from Gateworks to Industrial Developers Worldwide

Срд, 04/10/2024 - 13:58

element14 will be the only distributor to offer this kit for sale at Embedded World 2024.

element14 has announced the availability of Gateworks’ latest Wi-Fi 6 Development Kit – GW11048-5-A.

Gateworks will showcase its cutting-edge technology kit during the Embedded World 2024 exhibition in Nuremberg, Germany, from the 9th to 11th April. element14 has been chosen as the exclusive distributor of the kit, making it the only place where customers can purchase it during the event.

The Wi-Fi 6 Development Kit is designed to facilitate the validation of the Silex SX-SDMAX and SX-PCEAX Wi-Fi 6 radios, providing developers with a seamless out-of-the-box evaluation experience. It delivers ruggedized wireless connectivity for a diverse range of industrial applications, from remote real-time monitoring to predictive maintenance and enhanced logistics.

This latest innovation comes with a pre-loaded Linux system and all the necessary accessories to get started quickly.

Key features include:

  • Supports Silex SX-SDMAX and SX-PCEAX Wi-Fi 6 radios (radios not included)
  • Includes Venice GW7200 Single Board Computer (SBC) with pre-loaded Linux drivers
  • Onboard NXP i.MX8M Mini processor (1.6 GHz quad-core)
  • 8GB eMMC flash storage and 1GB LPDDR4 DRAM
  • Two Gigabit Ethernet ports and two Mini-PCIe expansion slots
  • Multiple connectivity options including MicroSD, Nano SIM, I2C, SPI, and serial ports
  • Real-time clock, voltage and temperature monitoring
  • Wide input voltage range (8 to 60VDC) with PoE support
  • Operates in temperatures ranging from -40°C to +85°C

“We are thrilled to provide Gateworks’ WI-FI 6 development kit to our customers. This cutting-edge technology is a game-changer for those seeking to develop and deploy IoT applications and systems. We look forward to seeing its capabilities showcased at the exhibition and support our customers with all their development needs”, said Romain Soreau, Head of Single Board Computing at element14.

In addition to the Wi-Fi 6 Development Kit, element14 also offers Gateworks Corporation’s complete line of products for industrial applications.

Gateworks will be highlighting their line of railway solutions at Embedded World, aimed at enhancing the efficiency and safety of rail yards, such as rugged Gateworks Single Board Computers (SBCs) combined with a variety of wireless options such as high-precision GNSS Mini-PCIe cards. These solutions enable capabilities such as centimetre-level accuracy in tracking and monitoring critical data, streamlined yard operations and enhanced customer service for rail operators.

The post element14 brings latest Silex Wi-Fi 6 Radio Development Kit from Gateworks to Industrial Developers Worldwide appeared first on ELE Times.

Designers lead advances in CT scanning field

Срд, 04/10/2024 - 13:46

Courtesy: Avnet

When a doctor tells you to get a CT scan, they’re calling on a powerful medical imaging technology for insights only otherwise possible through invasive procedures.

Computed tomography (CT) exploits the penetrating nature of X-rays. A standard X-ray shines a 2D beam of high-energy photons through the subject. How these photons are detected has changed over the years. It was once just photographic film, but today it is more likely to be a digital detector.

Since bone, muscle and fat each absorb X-rays differently, the image captured is effectively the shadow cast by the mix of tissues in the body. Rather than create an image directly from the photons detected, computed tomography processes that captured data to synthesize an image.

In CT scanning, a source illuminates the subject using a fan-shaped beam of X-rays that are picked up by an arc-shaped array of digital detectors. The source and the detector are mounted on a circular gantry, which rotates around the patient, taking scans from multiple angles.

The resulting scans are not directly interpretable as an image. The scans are combined in a computer, creating a more detailed 2D “slice” through the body. Many CT scanners also coordinate the movement of the patient with the gantry’s rotation, creating a sequence of slices through the body that can be processed into a 3D image.

Seeing the advantages of CT in medical imaging  Computed tomography is an advanced medicalimaging technology. New developments are making it
even more useful for healthcare professionals and safer for
patients.Figure 1: Computed tomography is an advanced medical imaging technology. New developments are making it even more useful for healthcare professionals and safer for
patients.

CT scans can render more detail about internal structures than ordinary X-rays and can present that data in augmented 2D or 3D, making it easier to interpret. They are also relatively fast, which makes them useful for providing insights about injuries to the head, spine, chest, abdomen and pelvis.

The ability to post-process CT images means that they can provide a useful basis for detecting tumors and cancers, their size, location, and how they have spread. They can also reveal internal bleeding and the spread of infection as well as enable doctors to visualize blood vessels, aneurysms and blockages throughout the body.

CT imaging can be used to reduce the invasiveness of some procedures. The ability to differentiate diseased tissue helps surgeons avoid removing healthy tissue unnecessarily. Similarly, the 3D detail possible with CT imaging can provide a useful basis for planning procedures such as biopsies, surgery, implants, and radiation treatment.

The technique can reveal the detailed health of bones and joints, making it easier to understand wear or disease and to diagnose fractures. CT scans can also help track the progress of disease and reveal the effectiveness of treatments such as chemotherapy.

There are challenges associated with CT scanning. They usually involve greater exposure to ionizing radiation than is common with standard X-rays. Patients may also react badly to the contrast agents used to improve the CT scan’s effectiveness.

Navigating the key trade-offs in CT scanner design  CT scanning is a non-invasive solution to seeing inside the body. It can reveal vital details for healthcare professionals but there are still areas for improvement.Figure 2: CT scanning is a non-invasive solution to seeing inside the body. It can reveal vital details for healthcare professionals but there are still areas for improvement.

Developers of CT scanners work with two forms of constraints. The first is the paramount nature of combining innovation with patient safety when using ionizing radiation. The second is the tension that can bring for patients and care providers. The availability of new technologies and capabilities must always be met with the best judgment and a conservative attitude.

There are technical trade-offs in CT design too. Perhaps the most important of these is between image quality and radiation dose levels. Higher doses may improve image clarity at the cost of greater exposure. Technologies such as iterative image reconstruction and denoising algorithms based on machine-learning techniques can now replicate some of the image-quality gains of high-dose scans at lower doses.

Trade-offs also exist between the speed of scanning and image resolution. Faster scanning reduces artifacts introduced by patient movements but can result in lower spatial resolutions. Scanning more slowly can deliver higher resolution if the patient is still for long enough.

Designers also need to decide which market niche they want to address. For example, designing a scanner with a large field of view makes it easier to scan large body parts, but requires larger, more expensive detector arrays. Other trade-offs may have to be made between scanner flexibility and specialization, hardware quality and maintenance costs, and software capabilities and reliability.

There are also financial considerations over initial cost and long-term upgradability. Buying a CT scanner means a large upfront outlay and substantial operating costs. Buyers may be prepared to choose a scanner engineered to evolve, rather than a lower-cost machine with a more limited useful lifetime.

 CT scanner represent a significant capital outlay. New technologies are tackling the ROI on machines, with capability and longevity in mind.Figure 3: CT scanner represent a significant capital outlay. New technologies are tackling the ROI on machines, with capability and longevity in mind. Making innovations in CT design

Despite the constraints and trade-offs outlined above, there are many avenues for innovation in CT design. Each detector usually has a scintillator, which emits visible light when it is hit with X-rays, mounted over a digitizing photodetector circuit. A basic CT scanner will have one arc of these detectors, but more sophisticated variants will have multiple arcs so that they can sample multiple “slices” simultaneously. There may be as many as 256 arcs.

To support the high number of detectors, semiconductor companies are engineering 128-channel analog-to-digital converters (ADCs). These ADCs can be mounted in modules to produce 256-channel capabilities. The chips have low-power, low-noise, low-input-current integrators. Simultaneous sample-and-hold circuits ensure that all samples are taken at once. Some ADCs targeting medical applications offer resolutions of up to 24 bits.

Achieving low-dose CT imaging

Different beam energies can reveal different things about the subject they are illuminating. Radiologists can adjust the beam strength used in the scan to pick out specific details. This is called the spectral CT technique.

Another approach is to use a dual-layer detector, with the top layer absorbing the lower-energy X-ray photons and a lower layer absorbing the higher-energy photons. This technique can reveal more about how the X-rays have been affected by their passage through the subject material.

A further innovation involves single-photon capture detection, in which a semiconductor device is used to directly count each X-ray photon. This gives scope for lower-dose CT imaging, since it does away with potential photon losses in the scintillation process of conventional detectors. It also makes it possible to measure the arrival energy of every photon, again giving greater insights into how it has been affected by passing through the patient.

In dual-source CTs, two source/detector array pairs are mounted on the rotating gantry ring at 90 degrees to each other. This arrangement gives good coverage of the patient while minimizing interference between the sources.

The two sources can run at different energies, which brings the advantages of spectral CT discussed above. They can also acquire a whole slice image more quickly than a single-source scanner, which gives them greater temporal resolution for imaging moving features such as a beating heart. This in turn reduces motion artefacts in the final scan. Faster scans may also be more acceptable to some patients.

Developing high-resolution CT scanners

High-resolution CT scanners produce very thin slices of less than 1 mm. They use more, smaller detectors, to achieve higher spatial resolutions than standard scanners. The extra resolution makes it easier to detect and characterize small features accurately.

Such scanners usually have sophisticated image-reconstruction algorithms to enhance image quality and detail, which is particularly important for visualizing fine structures and edges. They can also have features such as enhanced X-ray beam management. These techniques give higher contrast images than standard scanners.

CT scanners are enormously valuable for producing insights into patient health without the need for invasive procedures. Their developers can call on rapidly evolving technologies, such as detector electronics and machine-learning techniques, to provide enormous scope for innovation. Responsibility for patient safety means the adoption of new technologies can feel slow.

Fortunately, designers can make a real difference here by exploring the systemic trade-offs involved in the development of novel CT scanners to produce capabilities that are engineered to encourage rapid uptake. For example, designing a detector sampling and digitization circuit with a lower noise floor will enable higher-resolution scans at the same beam energy, or similar resolutions at lower doses.

An FPGA accelerator board may be used to speed up image-processing algorithms, increasing the scanner’s throughput and so cutting the cost of individual scans. Or perhaps there’s a better way to manage power use in the scanner, extending its reliability and so cutting its operating costs.

Avnet recognizes the holistic challenge of developing medical imaging products and has the resources to help OEMs address them.

The post Designers lead advances in CT scanning field appeared first on ELE Times.

Infineon PSOC Edge E8x microcontrollers are the first devices designed to meet the new PSA Level 4 certification requirements

Срд, 04/10/2024 - 13:27

With embedded security considered to be a vital aspect in the deployment of Internet of Things (IoT) applications, Infineon Technologies AG has announced that its new PSOC Edge E8x MCU product family has been designed to meet the highest certification level provided by the Platform Security Architecture (PSA) Certified program, a framework for embedded security. The PSA Certified Level 4 device certification is targeted by implementing an on-chip, hardware-isolated enclave that provides secured boot, key storage and crypto operations in all PSOC Edge E8x devices.

“By aspiring to achieve this robust embedded security certification, IoT designers for edge applications such as wearables and smart home applications can be confident their products can achieve highest levels of security,” said Erik Wood, Senior Director Product Security for IoT, Computer and Wireless business, Infineon Technologies. “Integrating hardware security on the MCU also unlocks new edge computing markets such as printers and payment terminals that previously required discrete security chips. As a security leader, we are committed to enabling designers to reach the highest level of security for all applications.”

PSA Certified is a security framework established by Arm and industry partners in 2019. It provides both design guidelines and independent security evaluations through third-party labs intended to assure that all connected devices are built upon a Root of Trust. PSA Certified certifications achieved by an MCU extend through the value chain, allowing device builders and application providers to reuse that certification as they deploy products in the field.

“Connected device security is critical to scaling IoT deployments, and something that Arm and its ecosystem is committed to continuing to drive through initiatives like PSA Certified,” said David Maidment, Senior Director, Secure Devices Ecosystem at Arm. “We applaud Infineon’s ongoing commitment to robust device security by striving to achieve PSA Certified Level 4 iSE/SE for its new family of MCUs.”

The post Infineon PSOC Edge E8x microcontrollers are the first devices designed to meet the new PSA Level 4 certification requirements appeared first on ELE Times.

Transforming Manufacturing with Digital Twins

Срд, 04/10/2024 - 13:23

Sometimes, the tech buzzwords of the moment are used so freely when speaking to colleagues and customers and read daily in articles, on social media, and even in the mainstream news. Although terms such as AI, gen AI, edge computing, digital twins, IoT, and sustainability are familiar, their practical implementation is challenging. The challenges and obstacles are numerous and, at times, unique to specific use cases or organizations and depend on the maturity of the emerging technology.

Consider digital twins as an example; what are they, and what is all the hype surrounding them? The definition used by the Digital Twin Consortium describes a virtual representation of real-world entities and processes synchronized at a specified frequency and fidelity with the capability of transforming business by accelerating holistic understanding, optimal decision-making, and effective action. Digital twins use real-time and historical data to represent the past and present and simulate predicted futures. Furthermore, digital twins are motivated by outcomes, tailored use cases, powered by integration, built on data, guided by domain knowledge, and implemented in IT/OT systems.

Suppose we take a manufacturing plant as an example. Whether the equipment used is of new generation or legacy and has fixed function, general-purpose devices, or a combination, one thing is for sure: an overwhelming amount of data is produced. The data is a modern-day goldmine if extracted, processed, aggregated, and verified. Data allows digital twins to thrive, and its integrity is one of the most critical aspects of the technology. It is what helps ensure consistent, accurate, reliable results. In the future, IT and OT resources and infrastructure will need to converge further to standardize, transform, and apply data insights in manufacturing settings.

The accuracy of the data allows us to rapidly create physically precise, virtual 3D models and replicate real-world environments, from the factory floor to stores and cities.

Digital twins can be used to recreate the factory itself, allowing organizations to monitor and make changes in the digital environment to verify the impact of results before making changes on the factory floor. Manufacturers can also create an exact digital replica of their product and carry out true-to-world testing, allowing them to find and correct issues or errors and make optimizations before moving into production. Furthermore, digital twins create predictive models based on data points and their historical changes. They are measuring conditions against historical patterns and trends to identify anomalous behaviour, such as production line bottlenecks or potential safety and security breaches, right down to granular details, such as the temperature and vibration of a single appliance.

Considering today’s level of technological maturity, digital twins provide a range of benefits, including:

  • Heightened visibility and transparency into assets and environments
  • Reducing costs, time, and effort in changing production workflows
  • Reducing material waste and delivering energy and other utility savings
  • Sustainability
  • Efficient acceleration of production times
  • Reduced errors and issue resolution in pre-production phase
  • Employing machine learning models that can understand and act in real-world situations.
So how are digital twins created?

Digital twins generally require purpose-built software on IoT edge servers that draw real-time data from sensors, appliances, and cameras. However, in most cases, organizations can start with their existing infrastructure and layer analytic tools to leverage the data already generated by installed equipment. Incrementally adding compute resources will help improve the accuracy of the digital twin over time. These considerations depend on what the organization is trying to achieve and its long-term goals. Technology is a strategic investment, so organizations should work with a reliable collaborator to plan for new use cases from infrastructure, resource, and security aspects.

The skill sets needed to leverage modern technology have evolved, and the workforce needs to evolve with that to obtain optimal results.

ROLAND DUCOTEDirector, Sales Intelligent Solutions, OT + Emerging Accounts, Arrow Electronics, Inc.ROLAND DUCOTE
Director, Sales Intelligent Solutions,
OT + Emerging Accounts,
Arrow Electronics, Inc.

The post Transforming Manufacturing with Digital Twins appeared first on ELE Times.

AURIX TC4x microcontrollers for embedded AI application development receive safety assessment from Fraunhofer IKS

Срд, 04/10/2024 - 12:25

In the automotive industry, embedded AI is becoming increasingly important for safety-critical real-time applications. However, this also creates new requirements and standards that must be considered during the complete product lifecycle. Infineon Technologies addresses these new requirements with the AURIX TC4x microcontroller (MCU) family, which meets the AI-specific safety requirements to achieve SAFE AI compliance, as proposed by the Fraunhofer Institute for Cognitive Systems IKS. The MCUs, with their ASIL-D compliant AI accelerator (PPU), provide an innovative platform for developing embedded AI-based use cases and automotive applications such as motor control, battery management systems, vehicle motion control and siren detection.

The SAFE AI framework based on ISO PAS 8800 and current state-of-the-art AI regulations is an evaluation methodology developed by Fraunhofer IKS that assesses the trustworthiness of AI in terms of robustness, data utility, operational design domain (ODD) and environmental conditions. The functional safety measures of the AURIX TC4x family thus provide mechanisms for compliance with AI regulations and standards at the application level. By using the AURIX TC4x family, car manufacturers can assess the safety and reliability of AI solutions and identify potential vulnerabilities during system development and operation. For safety-critical real-time applications, the use of AI models like neural networks increases accuracy and provides additional safety in conjunction with the existing physical sensor.

“The integration of safe and reliable AI functionality into automotive microcontroller families is essential to further improve vehicle performance, safety, and comfort,” said Thomas Boehm, Senior Vice President Microcontroller at Infineon. “We are therefore very proud that our AURIX TC4x microcontroller has successfully passed the SAFE AI assessment by the Fraunhofer Institute for Cognitive Intelligence. This underlines our position as one of the leading innovation drivers in the industry.”

The post AURIX TC4x microcontrollers for embedded AI application development receive safety assessment from Fraunhofer IKS appeared first on ELE Times.

Renesas Introduces New Entry-Level RA0 MCU Series with Best-in-Class Power Consumption

Срд, 04/10/2024 - 10:40

Low-Cost Devices Target Consumer Electronics, Small Appliances, Industrial System Control and Building Automation

Renesas Electronics Corporation, a premier supplier of advanced semiconductor solutions has introduced the RA0 microcontroller (MCU) Series based on the Arm Cortex-M23 processor. The new, low-cost RA0 devices offer the industry’s lowest overall power consumption for general-purpose 32-bit MCUs.
The RA0 devices consume only 84.3μA/MHz of current in active mode and only 0.82 mA in sleep mode. In addition, Renesas offers a Software Standby mode in the new MCUs that reduces power consumption by a further 99 per cent to a miniscule 0.2 µA. Coupled with a fast wake-up High-speed On-Chip Oscillator (HOCO), these ultra-low power MCUs deliver an ideal solution for applications including battery-operated consumer electronics devices, small appliances, industrial system control, and building automation applications.
 
Feature Set Optimized for Low Cost
Renesas is now shipping the first group in the RA0 Series, the RA0E1 Group. These devices have a feature set optimized for cost-sensitive applications. They offer a wide operating voltage range of 1.6V to 5.5V so customers don’t need a level shifter/regulator in 5V systems. The RA0 MCUs also integrate timers, serial communications, analog functions, safety functions and HMI functionality to reduce customer BOM cost. A wide range of packaging options is also available, including a tiny 3mm x 3mm 16-lead QFN.
In addition, the new MCU’s high-precision (±1.0%) on-chip oscillator (HOCO) improves baud rate accuracy and enables designers to forego a standalone oscillator. Unlike other HOCOs, it maintains this precision in environments from -40°C to 105°C. This wide temperature range enables customers to avoid costly and time-consuming “trimming,” even after the reflow process.
The RA0E1 MCUs include critical diagnostic safety functions as well as an IEC60730 self-test library. They also offer security features including true random number generator (TRNG) and AES libraries for IoT applications, including encryption.
“As the leader in embedded processing, our customers expect Renesas to provide the best solution for any application,” said Akihiro Kuroda, Vice President of the Embedded Processing 2nd Division at Renesas. “The RA0E1 Group MCUs deliver the ultra-low power and low cost needed for price-sensitive systems without sacrificing safety, data security and ease of design. Coupled with the recent introduction of the high-performance RA8 Series, Renesas now offers the premier MCU solution for any customer application anywhere in the world.”
“Power-constrained IoT embedded applications addressing markets such as industrial and smart home have specific performance, efficiency and security needs,” said Paul Williamson, senior vice president and general manager, IoT Line of Business at Arm. “Renesas’ RA MCU Family, built on Arm technology, now offers solutions ranging from low power RA0 MCUs to the high-performance AI-capable RA8 devices, all with a common design environment that enables easy and fast development and migration.”
Key Features of the RA0E1 Group MCUs
  • Core: 32MHz Arm Cortex-M23
  • Memory: Up to 64KB integrated Code Flash memory and 12KB SRAM
  • Analog Peripherals: 12-bit ADC, temperature sensor, internal reference voltage
  • Communications Peripherals: 3 UARTs, 1 Async UART, 3 Simplified SPIs, 1 IIC, 3 Simplified IICs
  • Safety: SRAM parity check, invalid memory access detection, frequency detection, A/D test, immutable storage, CRC calculator, register write protection
  • Security: Unique ID, TRNG, Flash read protection
  • Packages: 16-, 24- and 32-lead QFNs, 20-pin LSSOP, 32-pin LQFP
The new RA0E1 Group MCUs are supported by Renesas’ Flexible Software Package (FSP). The FSP enables faster application development by providing all the infrastructure software needed, including multiple RTOS, BSP, peripheral drivers, middleware, connectivity, networking, and security stacks as well as reference software to build complex AI, motor control and cloud solutions. It allows customers to integrate their own legacy code and choice of RTOS with FSP, thus providing full flexibility in application development. Using the FSP will ease the migration of RA0E1 designs to larger RA devices if customers wish to do so.
Winning Combinations
Renesas has combined the new RA0E1 Group MCUs with numerous compatible devices from its portfolio to offer a wide array of Winning Combinations, including the HVAC Environment Monitor Module for Public Buildings. Winning Combinations are technically vetted system architectures from mutually compatible devices that work together seamlessly to bring an optimized, low-risk design for faster time to market. Renesas offers more than 400 Winning Combinations with a wide range of products from the Renesas portfolio to enable customers to speed up the design process and bring their products to market more quickly.
 
Demonstration at embedded world 2024
To see a live demonstration of the new RA0 MCUs, join Renesas at embedded world 2024 in Nuremberg, Germany, April 9-11 in Hall 1, Stand 234.

The post Renesas Introduces New Entry-Level RA0 MCU Series with Best-in-Class Power Consumption appeared first on ELE Times.

ROHM Develops a New Op Amp that Minimizes Current Consumption

Срд, 04/10/2024 - 10:00

Industry-low 160nA current consumption improves power savings in consumer and industrial equipment

ROHM has developed a linear operational amplifier (op amp) – LMR1901YG-M – featuring the lowest* current consumption in the industry. This makes it ideal for amplifying sensor signals used to detect and measure temperature, flow rate, gas concentration, and other parameters in applications powered by internal sources (i.e. batteries).

In recent years, advanced control has been in increasing demand for various applications in consumer and industrial electronics. Therefore, there is an increasing need for accurate sensing of parameters relevant to the application – such as temperature, humidity, vibration, pressure, and flow rate. Op amps whose main function is to amplify sensor signals for subsequent detection and/or analog-to-digital conversion, is a crucial component in the signal chain – greatly affecting both accuracy and power consumption. ROHM is developing op amps that satisfy the dual need for high accuracy and low current consumption. By further refining the circuit design based on original Nano Energy technology, ROHM is now able to offer an op amp that delivers the lowest current consumption on the market.

The LMR1901YG-M leverages original ultra-low power technology that thoroughly suppresses current increase caused by temperature and voltage changes to reduce current consumption to just 160nA (Typ.) – approximately 38% lower than that of general low power op amps. This not only extends the life of applications powered by internal batteries like electronic shelf labels, but also contributes to longer operating times for smartphones and other devices equipped with rechargeable batteries. At the same time, this low current consumption does not change over the temperature range of -40°C to +105°C – allowing stable low-power operation, even in environments where external temperatures fluctuate, including fire alarms and environmental sensors.

Other performance enhancements include 45% reduction of input offset voltage to just 0.55mV (Max. Ta=25°C) over general low-current op amps while a maximum input offset voltage temperature drift of 7V/°C is guaranteed. This enables high-accuracy amplification of sensor signals. Capable of operating from 1.7V to 5.5V supply voltage and offering rail-to-rail input/output, LMR1901YG-M is suitable for a wide variety of applications in the industrial equipment and consumer markets. ROHM’s new op-amp also complies with the automotive reliability standard AEC-Q100 – ensuring stable operation even under harsh conditions such as vehicle cabins without compromising functionality.

In addition to various technical documents necessary for circuit design and SPICE models for simulation (available free of charge on ROHM’s website), the LMR1901YG-M can be used with ROHM Solution Simulator to speed up time to market.

Going forward, ROHM will continue to pursue further power savings in op-amps using proprietary ultra-low power technology. On top, ROHM aims to improve the performance of op-amp lineups by reducing noise and offset – increasing power savings and expanding the power supply voltage range while contributing to solving social issues through higher accuracy application control.

Product Lineup

Application Examples

  • Consumer applications: smartphones, smartwatches, wearables, fire alarms, motion sensors, etc.
  • Industrial equipment: electronic shelf labels (ESL), handheld measurement instruments, data loggers, environmental sensors for IoT, etc.
  • Automotive systems: anti-theft sensors, drive recorders, etc.

The post ROHM Develops a New Op Amp that Minimizes Current Consumption appeared first on ELE Times.

STMicroelectronics’ NFC reader brings outstanding performance-to-cost ratio of embedded contactless interaction to high-volume consumer and industrial devices

Срд, 04/10/2024 - 09:25

STMicroelectronics’ ST25R100 near-field communication (NFC) reader delivers a unique combination of advanced features, robust communication, and affordability, raising the value of contactless interaction in high-volume consumer and industrial products.

Combining its high performance and reliability with low power consumption, the 4mm x 4mm ST25R100 supports powerful contactless use cases. The tiny outline simplifies integration in products such as printers, power tools, gaming terminals, home appliances, medical devices, and access controls.

Contactless is a great way for all sorts of products to interact for purposes such as recognizing genuine accessories, ordering consumables, and monitoring usage,” said Sylvain Fidelis, Multi-market Business Line Manager at STMicroelectronics. “Bringing an outstanding performance-to-cost ratio, with the added advantage of fast development using our software ecosystem, the ST25R100 delivers an affordable and easily embedded solution to our customers.”

Supporting advanced controls for signal quality and power management, the ST25R100 ensures strong and reliable wireless connections even in space-constrained devices that allow only a tiny antenna. Additionally, the ST25R100 features a new and enhanced low-power card detection (LPCD). This greatly extends the detection range compared to state-of-the-art devices, to ensure a user-friendly experience.

The ST25R100 integrates an advanced analog front end (AFE) and a data-framing system that supports standard NFC specifications, NFC-A/B (ISO 14443A/B, up to 106kb/s) and NFC-V (ISO 15693, up to 53kbit/s) to read cards.

The reader has a wide power-supply and peripheral-I/O voltage range from 2.7V to 5.5V. Multiple operating modes assist power management by allowing the device current to be reduced to as little as 1µA for longer runtime in battery-powered applications. There is also a reset mode that draws just 0.1µA.

The ST25R100 is sampling now, in a compact 4mm x 4mm 24-pin TQFN package that allows small devices to provide contactless card experiences. Pricing starts from $1.82 for orders of 1000 pieces.

ST will showcase the ST25R100 reader’s capabilities in practical demonstrations at Embedded World 2024 in Nuremberg, Germany, April 9-11, booth 148, Hall 4A.

The post STMicroelectronics’ NFC reader brings outstanding performance-to-cost ratio of embedded contactless interaction to high-volume consumer and industrial devices appeared first on ELE Times.

Balancing Currents for Optimal Performance in Automotive Smart Drivers

Срд, 04/10/2024 - 08:58

Author: Giusy Gambino, Marcello Vecchio, and Filippo Scrimizzi from STMicroelectronics, Catania, Italy

When developing distributed intelligence for smart power switches in automotive power management systems, it is crucial to ensure that the protection mechanisms are truly intelligent. This is especially critical in scenarios involving multi-channel drivers as even minor asymmetries or unexpected load conditions can impact protection effectiveness.

In automotive environments, smart drivers play a crucial role in managing and distributing power from the car’s battery to various components like ECUs, motors, lights, and sensors. These multi-channel drivers control different electrical loads, such as resistive, inductive, and capacitive actuators, in parallel. It is crucial to maintain a balanced current flow across all channels for the drivers to function correctly and ensure the vehicle operates effectively and efficiently. Any minor asymmetries in the layout that cause current focalization through specific metal paths as well as unexpected situations like damaged or faulty loads and improper wiring can cause high current density in small areas. This leads to overheating of the integrated circuits and heat focalization with hot spots, ultimately resulting in component failure and damage.

Although thermal simulations and preventive measures are implemented, verifying and validating the implementation of intelligent protection mechanisms is crucial to identify potential issues that can delay timely intervention.

Thermal Sensing in Smart Switches

Balanced current flow is essential for high-side drivers to effectively manage heat, as they are required to handle significant amounts of current in very small and compact packages. They are often located in enclosed areas with poor ventilation and thermal dissipation, making heat management even more crucial.

Therefore, intelligent performance should rely on embedded thermal diagnostics based on sensing and protection mechanisms which monitor the driver’s temperature and take action when it exceeds predefined thresholds. Temperature sensing is quite a difficult task as it is strongly affected by the uniformity of the current flow in the different sections of the driver across all channels to achieve accurate temperature readings.

Unexpected high current density areas or short-circuit conditions are a significant concern as they can cause unpredictable heat concentration through diffused hot spots which produce sudden temperature increases in a very short period of time. These conditions can lead to overheating and component failure, which can be dangerous and costly to repair.

To prevent damage caused by thermal stress, the protection circuit is designed to limit the current and keep the power MOSFET within the safe operating area (SOA) until the thermal shutdown is triggered, which turns off the driver. However, this type of protection can cause physical stress on the surface of the power device. The current limit needs to be set high to meet inrush requirements and process tolerances, resulting in a fast thermal rise on the die’s surface when driving into a short load. This sudden temperature fluctuation can create significant thermal gradients across the die’s surface, leading to thermo-mechanical stress that can affect the device’s reliability.

The VIPower M0-9 high-side drivers have addressed this issue by integrating two temperature sensors in the cold and hot zones, respectively (as shown in Fig. 1).

Fig. 1 Simplified block diagram of a smart switch with different temperature sensors.

The temperature sensors are implemented using polysilicon diodes thanks to their linear temperature coefficient across operating temperatures. The cold sensor is positioned in the cold zone of the driver near the controller, while the hot sensor is placed in the power stage area, which is the hottest zone in the driver.

Using this double-sensor technique enables the driver’s temperature increase to be limited since the thermal protection is triggered when the lowest temperature value between the over-temperature threshold and a dynamic temperature level between the sensors is reached. Once removed the overtemperature fault, the smart switch can be reactivated when the temperature decreases to a fixed value.

This significantly helps to reduce thermal fatigue in terms of thermo-mechanical stress on the switch, which can accumulate over time and lead to degradation and reduced reliability.

Thermal Mapping

Along with simulation and prevention procedures, infrared (IR) thermography is a valuable technique to obtain detailed thermal maps of the driver, which provide a comprehensive understanding of the heat distribution within the integrated circuit, highlighting any potential hazard.

To assess the effectiveness of intelligent protections in harsh automotive applications, the heat distribution within the driver has to be analyzed under challenging short-circuit conditions with two different scenarios:

  • Terminal Short-Circuit (TSC);
  • Load Short-Circuit (LSC).

The terminal short-circuit condition occurs when a low resistance connection between the terminals of a component or device is present, as shown in Fig. 2.

Fig. 2 Testing circuit for temperature measurement under TSC.

On the other hand, a load short-circuit condition arises when there is an inductive path between the load and the power source, leading to a sudden surge in current flow (Fig. 3).

Fig. 3 Testing circuit for temperature measurement under LSC.

The following test conditions are considered:

  • Tamb = 25 °C
  • Vbat = 14 V
  • Ton = 1 ms for mapping
  • Ton = 300 ms for temperature acquisition of thermal sensors and hot spots
  • TSC condition: RSUPPLY = 10 mΩ, RSHORT = 10 mΩ
  • LSC condition: RSUPPLY = 10 mΩ, LSHORT = 5 µH, RSHORT = 100 mΩ

where  Tamb is the ambient temperature

Vbat the DC battery voltage

Ton the time duration of the short-circuit event

RSUPPLY the resistance of the battery

                RSHORT the short-circuit resistance

LSHORT the short-circuit inductance.

In order to generate a temperature map, the IR camera sensor is utilized to capture the infrared emissions at each location, which are then converted into temperature values. To ensure the conversion accuracy from specific colors to defined temperature values, a calibration process is essential. This process involves comparing the different colors obtained from the sensor with known temperature values, which can be obtained through specific thermal sensitive parameters and their trend versus temperature increase. By analyzing these parameters, the calibration process can ensure that the temperature map accurately reflects the temperature distribution in the area being scanned.

To calibrate the IR camera sensor, the forward voltage (VF) of the MOSFET’s body drain diode is chosen due to its linear dependence on temperature. However, a pre-calibration of the diode is necessary to accurately determine its temperature coefficient. This is achieved by measuring the VF voltage at a constant forward current (IF) while varying the temperature from 25°C to 100°C. To prevent any temperature rise caused by the current and its associated power dissipation, the IF value is selected within the range of 10mA to 20mA.

The VF values collected at different temperatures can be used to perform a linear interpolation and mathematical fitting to obtain the temperature coefficient of the diode, as shown in Fig. 4.

Fig. 4 Pre-calibration of MOSFET’s body drain diode.

Calculations are made through the following equation (1):

Dt =     DVF /K                         (1)

where:

Dt is the temperature variation;

DVF the forward voltage variation;

K is the temperature coefficient of the diode.

The temperature map is created by acquiring each temperature point through an IR camera sensor at 1ms intervals. Once all the die points are acquired (which takes around 3000 seconds), a specialized software generates the map, which depicts the temperature of each point based on the minimum spatial resolution of the IR sensor. By overlaying the thermal map onto the row silicon die picture, it is possible to identify the hottest points in the active area and determine their coordinates while the current flows through the device.

As an example, the thermal maps for the dual-channel VND9012AJ smart switch are depicted in Fig. 5 under TSC conditions.

Fig. 5- Thermal maps for VND9012AJ channels under TSC condition.

The graphical representation of temperature distribution across the driver’s channels, depicted through varying colors within the temperature range of 25°C to 150°C, serves as a crucial aid in detecting any regions experiencing excessive heat and ensuring the driver’s safe temperature operation. The provision of thermal maps for each channel under diverse operating conditions enables the tests to authenticate the driver’s reliable functioning without surpassing its maximum temperature threshold.

In order to locate the hot spots and monitor the temperature evolution for both hot and cold sensors, and subsequently validate the efficacy of the thermal shutdown mechanism, a longer short-circuit duration of 300ms is taken into account.

The temperature variations observed in VND9012AJ while undergoing TSC are displayed in Fig. 6.

Fig. 6- Temperature variations for both sensors under TSC condition.

The graph indicates the presence of hot spots in both channels of VND9012AJ as detected by the hot sensors, and the maximum temperature of these hot spots is in the range of 150 °C.

The thermal maps for VND9012AJ under LSC conditions are presented in Fig. 7.

Fig. 7- Thermal maps for VND9012AJ channels under LSC condition.

The temperature variations observed in VND9012AJ while undergoing LSC are displayed in Fig. 8.

Fig. 8 Temperature variations for both sensors under LSC condition.

Both conditions trigger the thermal protection mechanism, causing the current to be limited to a safe level.

Conclusions

Valuable insights into the design and operation of the smart switch have been obtained through experimental results, particularly regarding current distribution and thermal protection mechanisms. It is essential to maintain a well-balanced behaviour of all channels to create an intelligent driver that improves safety and reliability in automotive systems. The use of IR thermography enables a precise and comprehensive analysis of temperature distribution, which enhances the smart switch’s thermal sensing and protection system. In demanding automotive environments, swift activation of these protections is crucial to detect overheating and prevent any potential harm to the device or system.

References

[1]  P. Meckler and F. Gerdinand, “High-speed thermography of fast dynamic processes on electronic switching devices”, 26th International Conference on Electrical Contacts (ICEC 2012), 2012.

[2]  X. Zhou and T. Schoepf, “Detection and formation process of overheated electrical joints due to faulty connections”, 26th International Conference on Electrical Contacts (ICEC 2012), 2012.

[3]  T. Israel, M. Gatzsche, S. Schlegel, S. Großmann, T. Kufner, G. Freudiger, “The impact of short circuits on contact elements in high power applications”, IEEE Holm Conference on Electrical Contacts, 2017.

[4]  Y. Lozanov, “Assessment of the technical condition of electric contact joints using thermography”, 17th Conference on Electrical Machines, Drives and Power Systems (ELMA), 2021.

[5]  M. Bonarrigo, G. Gambino, F. Scrimizzi, “Intelligent power switches augment vehicle performance and comfort”, Power Electronics News, Oct. 10, 2023.

The post Balancing Currents for Optimal Performance in Automotive Smart Drivers appeared first on ELE Times.

Сторінки