ELE Times

Cadence has announced that Nokia is using its AuraStack AI Super Agent on the Cadence Millennium M2000 AI Supercomputer to improve the design of complex electronic systems. The platform combines agentic AI, Cadence engineering software and high-performance computing in a secure system installed on-site. According to Cadence, this technology helps Nokia complete key design and analysis tasks up to five times faster while keeping sensitive engineering data and intellectual property under its own control.

The deployment introduces a new approach to AI-powered engineering for large technology companies. Nokia can use Cadence’s AuraStack AI Super Agent to automate engineering tasks, evaluate different system designs and analyse how multiple physical factors, such as heat, electrical performance and mechanical effects, interact in complex electronic systems. The modular Millennium architecture also allows Nokia to expand computing capacity as its needs increase and run multiple AI-driven engineering tasks simultaneously.

“Nokia’s deployment demonstrates how agentic AI can transform the way the world’s most advanced systems are engineered,” said Michael Jackson, corporate vice president of R&D for System Design and Analysis at Cadence. “Cadence uniquely brings together AI, computational software and accelerated computing in one platform, enabling Nokia to automate complex workflows, accelerate design convergence and protect critical IP.”

The Cadence platform integrates three layers of AI-driven engineering:

1. Agentic AI: The Cadence AuraStack AI Super Agent, built with NVIDIA Nemotronopen models, automates and coordinates electronic system design tasks, including schematic capture, placement, routing and multi-objective optimization.
2. Computational software: Cadence EDA and SDA technologies use GPU-optimized NVIDIA CUDA-X libraries, including cuDSS, and NVIDIA Omniverse to accelerate power integrity, thermal analysis, electromagnetic characterization, and circuit simulation workflows.
3. Accelerated computing: Cadence Millennium M2000 systems provide a shared, scalable foundation for the AuraStack AI Super Agent and Cadence engineering applications, powered by NVIDIA Blackwell GPUs.

Together, these technologies help Nokia compress design and analysis cycles from months to days and accelerate targeted workflows by 5X, increasing engineering throughput and enabling teams to evaluate more design options. The self-contained deployment keeps sensitive data and IP within Nokia’s environment, while the modular architecture provides a path to scale capacity with demand.

“Cadence is helping us rethink how we approach electronic system design and heterogeneous integration,” said Derek Urbaniak, Head of SoC Development at Nokia. “The integrated platform enables our teams to evaluate complex tradeoffs and close multiphysics loops in a fraction of the time, while keeping sensitive engineering data and IP under our control. This helps us move advanced systems toward production faster.”

“AI gives engineering teams the speed to explore more designs and the insight to make better tradeoffs, while keeping proprietary data and expertise under their control,” said Tim Costa, vice president and general manager of industrial and computational engineering at NVIDIA. “Nokia is bringing that capability inside its own environment, with Cadence agents built with NVIDIA Nemotron open models and simulation powered by NVIDIA accelerated computing and NVIDIA CUDA-X libraries like cuDSS. Together, they connect design automation with the power, thermal and electromagnetic analysis needed to evaluate each iteration, while keeping proprietary data and IP under Nokia’s control.”

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Renesas Electronics Corporation has announced a pair of 32-bit MCUs that achieve up to 600 MHz processing speeds, the first MCUs in the family to utilize a 22nm process, and also designed with embedded magnetoresistive random access memory (MRAM). The first in the RX Family for Renesas using a 22nm process technology, these microcontrollers feature embedded magnetoresistive random-access memory (MRAM). Both devices outperform the previous models, RX72M and RX72N (240 MHz), by more than two times. The new solutions are the RX74M for industrial and factory automation, including AC drives, industrial robots and programmable logic controllers (PLCs), and the RX74N for wider industrial applications, including smart meters, power conditioners and heating, ventilation and air conditioning (HVAC) systems.

High-Speed Real-Time Processing Enabled by 22nm Process and MRAM

To improve system control and responsiveness as well as data processing capabilities, industrial devices require MCUs that can operate faster, integrate processing and memory capabilities into a single chip and communicate efficiently. The RX74M and RX74N MCUs, are based on a 22nm process and pack a 600 MHz RXv3e processor core, 1 MB of MRAM, 256 KB of zero-wait-state tightly coupled memory (TCM) and 1.5 MB of SRAM. These features enable the MCUs to handle demanding, time-critical operations while providing consistent performance, even when encountering frequent interrupts and branching operations.

Writing data to MRAM does not require erasing it beforehand, unlike traditional embedded flash memory. This allows the speed of code and data updates to be increased, with a marked reduction in programming time and system downtime. It has applications in industrial systems where settings and operating parameters are regularly revised, as well as log data.

Support for Major Industrial Networks Including EtherCAT, Ethernet TSN and CAN FD

There is increasing demand for seamless connectivity across multiple industrial Ethernet standards, yet supporting diverse protocols has conventionally required multiple devices. The RX74M integrates an EtherCAT slave controller, a TSN-capable Gigabit Ethernet switch and CAN FD onto a single chip. These features allow the device to support major industrial networks such as EtherCAT, PROFINET and EtherNet/IP on a single chip, including deterministic communication via TSN, as well as redundant network configurations such as EtherNet/IP DLR (Device Level Ring), which were not supported in previous generations. As a result, the device provides an IIoT-ready industrial network foundation that connects field devices to higher-level systems.

Hardware-Based Security Features Anticipating CRA and PQC

With the proliferation of IoT devices, regulations such as the Cyber Resilience Act (CRA) are driving demand worldwide for security measures that span the entire device lifecycle.

The RX74M and RX74N enhance hardware-based security features by incorporating ProtectZone into the RX CPU, enabling secure and non-secure regions to be separated within a single chip. Furthermore, the next-generation Renesas Secure IP (RSIP) extends public-key cryptography beyond the conventional TSIP and supports authenticated encryption as well as a broader range of hash algorithms. This enables advanced, forward-looking security implementations, including post-quantum cryptography (PQC), within a single MCU.

“Industrial equipment development requires three key elements: advanced real-time performance, diverse industrial networking and robust security,” said Yoshi Ishikawa, Senior Director of the EP Advanced MCU Business Division at Renesas. “By integrating these requirements into a single chip, the new products simplify the design of increasingly complex industrial equipment and support the evolution of industrial automation.”

Improved Development Efficiency Through a Comprehensive Partner Ecosystem

Renesas collaborates with ecosystem partners to provide solutions for the RX74M and RX74N, helping customers shorten development time.

• Software: Codewerk, RT-Labs
• Development Tools: IAR
• Real-Time OS: eForce, Zephyr RTOS

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Microchip Technology has expanded its L-Series timing product portfolio with the launch of the LX-820 Radiation-Tolerant Quartz Oscillator for Low Earth Orbit (LEO) satellites and other space applications. The L-Series offers satellite developers different types of oscillators with varying levels of frequency stability, phase noise, power consumption and size, allowing them to choose the right solution for their specific mission requirements.

The L-Series sits between standard commercial oscillators and traditional high-reliability space products. It combines commercial- or military-grade components with additional inspections, electrical and thermal testing, and specialised manufacturing processes to meet the needs of space applications. The oscillators have undergone radiation testing as complete, working devices to check their ability to withstand Total Ionizing Dose (TID) and Single-Event Latchup (SEL). They offer radiation tolerance of up to 50 krad and have been tested for SEL at 40 MeV·cm²/mg. Most L-Series products also use specially processed quartz crystals to reduce changes in frequency caused by radiation. The L-Series oven controlled crystal oscillators (OCXOs) feature a rugged design and four-point crystal mounts to withstand launch conditions and the demands of their intended missions.

Designed to address two persistent challenges for satellite developers, the L-Series helps ease supply chain constraints while reducing budget pressure. Many timing solutions qualified for space environments have extended lead times and significant procurement costs. The L-Series is designed to provide a more accessible alternative, with many configurations available from stock or with lead times of less than 20 weeks. Additionally, the L-Series oscillators may lower overall program costs by reducing the need for the component pedigree, documentation requirements and inspection overhead that are typically associated with traditional high-reliability space-grade timing products.

“Satellite developers should not have to choose between dependable precision timing and the cost and schedule requirements of their mission,” said Randy Brudzinski, corporate vice president of Microchip’s frequency and time systems business unit. “Our L-Series oscillators bring together the performance, radiation tolerance and supply availability our customers need to confidently deploy their New Space applications using a precision timing solution that helps reduce both schedule and mission risk.”

The new LX-820 is available in a compact 3.2 mm × 2.5 mm surface-mount package and is designed to operate across a wide temperature range from -55°C to 125°C. The rugged device is engineered to meet MIL-PRF-55310 Level B and provides ±100 ppm performance. Additionally, the LX-820 supports CMOS output frequencies from 1.25 MHz to 135 MHz and low-voltage differential signalling (LVDS) output frequencies from 100 MHz to 250 MHz.

Modern satellite systems rely on highly accurate timing references to support communications, navigation, Earth observation, mapping and emerging lunar missions. As these applications can have different timing requirements, Microchip’s L-Series encompasses crystal oscillators (XOs), temperature-compensated crystal oscillators (TCXOs), oven controlled crystal oscillators (OCXOs) and a pulse-per-second (PPS) disciplined oscillator. These products allow developers to use compact XOs where size and broad frequency coverage are priorities, TCXOs where tighter temperature stability and lower power are needed, OCXOs for more demanding stability and phase-noise requirements, and a disciplined oscillator where PPS synchronization and holdovers are required.

Microchip offers an extensive portfolio of clock and timing systems, ranging from miniature component oscillators, to small plug-in timing server cards, to atomic clocks and multi-rack time scale systems. As a primary contributor to the world’s time, Microchip’s timing solutions are trusted, reliable and resilient. For more information, visit Microchip’s clock and timing solutions webpage.

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The next phase of AI evolution moves from fact-finding chatbots to a learnable system that can plan tasks, invoke tools, search, and take various steps (workflows). On the leading edge of this evolution are AI agents that utilize LLMs, tools, and context to move toward an explicit goal. When adopting agentic AI, a key architectural decision concerns whether to operate a single agent or manage many specialised agents.

Single Agent vs Multi Agent AI Systems allows organisations to determine the best architecture for their day-to-day activities. Single-agent systems are easier to manage and keep simple, though multi-agent system architectures help split larger workflows among different agents. That said, some people think more agents don’t necessarily mean better results. It all comes down to task type, security, lag, and cost.

Understanding Single-Agent AI Systems

A single-agent AI system has a single primary agent. That agent accepts input, decides what action to take, chooses a tool, and produces an ending result. It can interact with databases, utilize an application programming interface, invoke enterprise knowledge systems, or execute any of the others as it operates. Its architecture includes a language model, the system instructions, the tools you might have, and a context manager. It receives a request, decides what to do next, and observes the result.

For example, a customer service person might check the status of an order, refer to a database of delivery schedules, explain the reason for a delay, and write a response- all in the same conversation without transferring the conversation between different AI agents. The major benefit of single-agent AI design is that it is simple. Developers can tweak the main system prompt, adjust the tool authorizations, trial the model’s behaviour, and observe how it makes decisions.

Although a single-agent approach is preferable when it is capable of fulfilling the requirements, Google Cloud advises deploying a single agent. It can regress when one agent needs to handle too many tools, tasks, or conflicting prompts. These limitations may make it necessary to utilize multi-agent architecture.

What Are Multi-Agent AI Systems?

Multi-agent AI is when multiple agents work together to cooperate on a shared goal. Each of the individual agents might be given different source material, instructions, scope, and access to different tools, and therefore one may do one step. For example, in the flow of a piece of enterprise research, each of the agents might be given a job such as finding info, fact-checking the technical points, assessing the impact on the market, and then writing up the report.

This method is based on AI agent orchestration- initiating tasks, disseminating data, defining interdependencies, and consolidating the results. It is possible to guide the approach or use it on demand, where agents determine their next action.

These patterns are popular:

1. Sequential Orchestration: The agents follow a predetermined order, and one agent makes use of the output of the previous one.
2. Parallel execution: Completing various components simultaneously could decrease the amount of time to complete the task.
3. Coordinate-based architecture: A central agent assigns tasks to specialised agents and pools their results.
4. Hierarchical task decomposition: A lead agent breaks down a complex goal into a number of simple goals (possible till being simple enough to be assigned to low agents).
5. Collaborative or group-chat architecture: The agent shares outputs, challenges concepts, and iterates on a shared product.

The AI agent’s approach to orchestration explains these patterns and provides an example of how a trade-off exists in terms of the level of coordination, speed, and flexibility for any given deployment.

Single-Agent vs Multi-Agent AI Systems: Key Architectural Differences

The primary difference is in how you slice and dice each responsibility and what decision you’re making. In a single agent design, a single agent takes care of the complete workflow, even when talking to more than one tool. In a multi agent AI system, a set of agents are divided between responsibilities and communicate with each other through orchestration.

Task complexity is also important. Many structured tasks like answering customer questions, summarising documents, information retrieval, and the majority of data analysis can be achieved quickly by a single agent. Multi-agent systems are better if a workflow requires clear specialist roles, planning, or individual investigations.

The scalability and maintenance are also different. Adding new features and new tools can make a single agent system too complex to be manageable. Multi-agent modular systems will allow developers to change a single agent without causing all these implications in the system, as long as the interface or port to the agent is well specified. But multi agent systems also add the problem of additional communication, states, testing, and monitoring.

Cost also matters. A single-agent workflow might be able to use fewer model calls, but a multi-agent workflow could lead to the usage of more tokens and greater computing power. Parallel execution might lower the time taken for completing the task, but will bump up the peak resource consumption. Therefore, organisations need to assess single agent vs multi-agent architecture with actual task success rates, response times, and cost failure rates.

Real-World Use Cases of Single-Agent AI Systems

Single-agent AI use cases are more interesting if that one agent can do a workflow with only a few tools and KBs. Customer service: A single agent could answer a question about a product, find an order, and suggest troubleshooting steps. Productivity tools- summarize a document, search enterprise KBs, prepare for a meeting.

A further application is software development. A coding agent can examine a code repository, create code, execute tests using authorized applications, and make recommendations for repairs. An IT support agent could explore common problems, query monitoring systems, and make recommendations. These applications could take advantage of a fairly simple control structure. Organisations could set up rules for permissions, examine results, and incorporate human approval for critical actions without having to coordinate a large network of agents.

Multi-Agent AI Use Cases Across Industries

Multi-agent use cases are especially valuable when a business process can be achieved using multiple different functionalities. Within financial markets, various specialised agents can gather market information, monitor the risk profile of the portfolio, perform rule checks and make suggestions for actions. Financial transactions and other large transactions should still be subject to correct authorisation and regulation.

Functions might also be linked to, for example, watch sensor data from machinery, view your maintenance history, inventories of spare parts, and support fixing. A chain like this to combine functions would foretell failure and avoid downtime, yet to be safe, devices require suitable deterministic controls with people involved. For instance, one actor reacts to a security alarm, while another deals with connected phenomena, while the other starts compiling a report. Controls will need to restrict and authenticate access, because a wrong conclusion might cause a negative reaction to the incident.

The consequences might be beneficial for other links in the supply chain, too. For example, each agent could review inventory, track records of their suppliers, delays in shipping, and demand forecasts before producing the suggestion to human planners. For publishing and research, agents could handle source discovery, fact-checking, analysis, and writing. The results, however, still need human review, particularly if there are technical claims or fast-charging data.

Challenges, Security and Governance

However, multi-agent AI systems also pose new risks which organisations need to manage before deploying. For example, agents may generate inaccurate information, misinterpret commands, or deliver substandard results to other agents. The presence of several different elements can also make failures harder to track.

Security is crucial when agents have access to business apps, private files, or are equipped with tools that can modify data. Every agent should be assigned the minimum permissions they require. Businesses should verify tool inputs, restrict access to sensitive information, log key activities, and seek human approval for critical decisions.

Another challenge is context management. Agents require useful context to perform their tasks, but more context can add to processing costs and create distraction. Systems should deliver brief, task-specific context between agents, and shared state should be preserved when needed. Testing should test the whole workflow, not just individual agents. Appropriate metrics would be task success and accuracy, tool call error, latency, cost per task success, and human intervention.

Choosing the Right AI Agent Architecture

Choose between a single-agent or multi-agent system based on the task you are trying to solve, and not by the number of agents you want to use. If it’s something within a well-defined, relatively narrow scope and with narrow tool access, and where workload performance can be improved by providing more specific instructions or by designing the workflow, then you should probably want to use a single agent. Multi-agent design is appropriate when responsibilities entail specialised capabilities, isolated security domains, parallel execution, or coordination.

The most pragmatic solution may be to construct and test the simplest architecture capable of achieving the performance requirements; then, assuming that measurable constraints remain, deploy specialised agents and orchestration following. Long-term, the future of an agentic AI architecture isn’t simply about more agents but about more reliable, secure, measurable, and useful ones. For businesses, success will be designing an architecture that’s commensurate with real-world needs and ensures the costs, accountability, and human oversight are all well managed.

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The winners of the 2026 Infineon Start-up Challenge – the competition for critical technologies for the next generation of humanoid robots – have been announced by Infineon. After four months of hard work, the jury finally chose 15 startups from more than 100 submissions to pitch their solutions during the Infineon Start-up Challenge Demo Day at EBSCON – the Electronic Based Systems Conference in Graz, Austria.

The challenge united start-ups from Europe and Asia, investors, industry innovators, and technology leaders around robotics and physical AI innovation. The participants innovated solutions to enable humanoid robots to more effectively sense their surroundings and interact with the environment, handle objects, and execute precise movements. The winners were chosen by an international jury of industry, venture capital, start-up ecosystem, and technology innovation experts.

“Strategic collaboration with start-ups creates a win-win situation, combining novel ideas with industrially proven semiconductor technologies and thereby accelerating innovative, market-ready applications,” said Sören Jehmlich, Vice President Ventures, Start-ups & Ecosystems at Infineon. “The Start-up Challenge is a key pillar of our innovation culture, bringing together entrepreneurial courage, technological expertise and rapid implementation.”

“The quality of innovation we have seen throughout this year’s challenge has been remarkable. Start-ups from Europe and Asia demonstrated how diverse perspectives and technologies can come together to solve some of the most important challenges in humanoid robotics. Programs like the Infineon Start-up Challenge are essential for connecting innovators across regions and accelerating the path from breakthrough ideas to real-world impact,” highlights Jerry Park, Director Asia Pacific at Infineon.

The winners are shaping the future of humanoid robotics

First place went to AdapTronics S.r.l. from Italy with its innovative gripping technology, which allows robots to safely handle a wide variety of objects without conventional suction cups or mechanical grippers. Such flexible object handling is a key capability for next-generation humanoid robots. The technology also addresses applications in logistics, packaging, and future space-robotics. The jury highlighted its versatility, innovation, and potential for industrial use. “Winning the Infineon Start-up Challenge is a great recognition of our team’s work and vision,” said Lorenzo Agostini, Founder and CEO at AdapTronics S.r.l. “The challenge gave us valuable access to technology experts, industry insights and a strong innovation network. We look forward to further advancing our solution and exploring new opportunities for collaboration.”

COSMOKE and TECHiFAB complete the podium

Second place went to COSMOKE from South Korea. The start-up developed COSKIN, an innovative flexible magnetic tactile sensing technology that enables humanoid robots to perceive touch, pressure, and physical interactions. By providing essential tactile feedback for dexterous manipulation and safer human robot interaction, COSKIN plays a key role in advancing next-generation humanoid robotics and physical AI.

TECHiFAB from Germany took third place with its In-Memory Computing based approach to real-time motor control for robotic actuators. This is physical AI by definition and is designed to enable faster, more energy-efficient and safer control while improving performance directly within the drive train of humanoid robots.

The solutions presented during the challenge reflect the technologies required for the next generation of humanoid robots, from tactile sensing to dexterous gripping and precise motor control. To support the start-ups in developing and validating their concepts, Infineon provided access to dedicated hardware and software platforms, including Environmental Sensing Kits, Artificial Skin Kits, Motor Control Kits, Visual Feedback Kits, and in-house AI development software, enabling teams to accelerate prototyping and transform innovative ideas into scalable applications.

“Humanoid robots are the most complex form of physical AI and highly relevant for Infineon,” said Dirk Geiger, Senior Director & Team Lead Humanoid Robotics at Infineon. “They combine power, sensing, real-time connectivity, safety and security with software and AI compute, turning machines into autonomous systems. No single company can master
this complexity alone. With the Start-up Challenge, we gave start-ups early access to our hardware stack as well as our software and system offering and brought them together with our partners and application experts. The solutions shown prove how quickly ideas can become building blocks for scalable humanoid platforms and give valuable insight into where the technology is heading.”

The Infineon Start-up Challenge is part of the global Infineon Start-up Co-Innovation Program, in which Infineon collaborates with start-ups as a technology and development partner. As the winner of the Infineon Start-up Challenge 2026, AdapTronics will now join the Infineon Start-up Co-Innovation Program to further develop and scale its solution together with Infineon. The collaboration will officially kick off at the Start-up Night in Munich in November, where Infineon showcases successful start-up partnerships and highlights the value of start-up-driven innovation. Infineon continues to engage with other promising participants for future technological and business collaboration. By combining the agility and creativity of start-ups with Infineon’s technological expertise and global capabilities, the program supports the development of scalable applications and accelerates innovation in humanoid robotics and physical AI.

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Infineon Technologies AG is expanding its technology partnership with NVIDIA based on 800 Volt direct current (VDC) power architectures for AI data centres. The latest from the companies is an announcement timed to NVIDIA’s GTC Berlin developer conference based on the high-voltage intermediate bus converter (IBC), which is one of the most critical and challenging conversion stages in the power chain of AI data centres, with Infineon’s gallium nitride (GaN) emerging as a preferred technology. This builds on the companies’ prior collaboration announced in May 2025, and elaborated on in October 2025, which included power-path protection and hot-swap functionality for 800 VDC server architectures.

“AI is fundamentally reshaping the demands we place on power infrastructure, and semiconductors are at the heart of solving that challenge,” said Jochen Hanebeck, CEO, Infineon Technologies AG. “Our collaboration with NVIDIA on 800 Volt power architectures shows what is possible when deep semiconductor expertise meets the pace of innovation required by AI. Gallium nitride-based system solutions are a key enabler of this next generation of data centres, and Infineon is proud to help power the AI era from grid to core.”

The growing power demands of AI workloads have driven data centre designers to adopt intermediate-bus architectures. An intermediate bus converter (IBC) steps down the main DC bus voltage and supplies a lower voltage to subsequent power-conversion stages, which generate the voltage levels required by AI processors. This multi-stage approach helps manage power-distribution losses and improve overall efficiency while meeting strict constraints on board space, thermal management and system reliability. As AI computing requirements grow, 800 VDC is emerging as an additional power-distribution approach designed to support higher power densities in AI data centres.

Gallium nitride is well suited to meet these requirements. Compared to silicon, GaN allows power devices to switch significantly faster with lower losses, which enables higher switching frequencies of up to 1 MHz at the IBC stage. This in turn allows the size of magnetic components and passives to shrink considerably, directly translating into higher power density and lower board heights, a critical advantage as rack space becomes an increasingly scarce resource in AI data centres. At the same time, GaN’s low conduction and switching losses support best-in-class conversion efficiency, helping to limit heat generation even as power levels per rack continue to climb toward the megawatt range. These characteristics make GaN the preferred semiconductor technology today capable of meeting the combined demands of power density, efficiency, and fast transient response at the IBC stage, a position Infineon has built on the back of many years of leadership in GaN development and manufacturing. In combination with PSoC control C3 and EiceDRIVER product families, full system solutions for IBCs are provided by Infineon.

Infineon’s GaN portfolio supports the full range of conversion ratios required at the HV IBC stage, including 800 V to 50 V, 800 V to 12 V, and 800 V to 6 V, giving data centre operators the flexibility to optimize rack architectures without compromising on power density or efficiency. At this combination of high switching frequency, power density and efficiency, the GaN power switches are used to their full benefits. Infineon’s technology leadership in power semiconductors relies on extensive in-house manufacturing capabilities as well as application and system expertise built up over many years. The company’s portfolio spans IBC solutions across silicon, gallium nitride and silicon carbide, supporting customers along the entire range of their design requirements.

Infineon and NVIDIA collaborate along the entire data centre power chain. In addition to IBCs, this also includes power path protection solutions, as announced in October 2025, targeting safety and service aspects such as the hot-swap controller functionality and enabling future server boards to operate in 800 VDC power architectures.

This advanced collaboration underscores Infineon’s position as a grid-to-core power semiconductor partner for AI infrastructure, supplying solutions across the full power delivery chain, from grid-facing power supply units to the point of load at the processor.

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Keysight Technologies, today announced the Functional Interconnect Test Solutions (FITS)-16CH digital-layer error performance validation system, expanding Keysight’s FITS portfolio for optical, active copper, and passive copper interconnects. With 16 transmit and 16 receive channels, FITS-16CH has twice the channel density of FITS-8CH, and is designed to validate complete interconnect assemblies across research and development, product design, manufacturing, and pre-and post-production AI and network infrastructure deployments.

As interconnect speeds increase, testing only the physical-layer does not provide a complete view of system-level error performance. FITS-16CH combines bit error ratio (BER) and forward error correction (FEC) measurements at the digital layer to evaluate how complete interconnect assemblies perform under real-world conditions. The platform enables 106G and 212G lane-rate validation for today’s 800G interconnects and emerging 1.6T technologies.

FITS-16CH supports validation across a broad range of optical and electrical interconnects. These include full-retimed optics (FRO), active optical cables (AOCs), linear-retimed optics (LRO), linear pluggable optics (LPO), active copper cables (ACCs), active electrical cables (AECs), passive direct attach cables (DACs), and high-speed copper flyover cables used in networking and high-performance computing equipment. The platform also supports development and manufacturing workflows for silicon chips, networking equipment, and interconnect products, as well as performance benchmarking for data centre operators.

Key capabilities include:

• Higher channel density for complete-assembly validation: With 16 transmit and 16 receive channels, FITS-16CH is designed to test fully assembled interconnects using two Module Compliance Boards (MCBs) with independent channel groups and MCB controls, enabling teams to validate interconnect performance on more lanes simultaneously, ensuring a high degree of system-level qualification.
• Broad interconnect support and insertion-loss capability: A large insertion-loss budget supports signals across lossy channels and customer fixtures, enabling validation of a broad range of optical and copper interconnects, including active copper and high-speed copper flyover cables.
• Automated lane tuning: The FITS Windows 11 graphical user interface integrates FITS-16CH with the Keysight DCA-X to automatically calculate optimal transmit finite impulse response (FIR) tap settings and open the electrical eye. The automated process can reduce tuning time to a few minutes compared with manual tuning that can take hours, days, or even weeks.
• Flexible integration and automation: FITS-16CH can integrate as a transmitter or receiver with Keysight data communications analysers (DCAs), high-performance bit error ratio testers (BERTs), and UXR real-time oscilloscopes. The platform supports automated validation workflows with Standard Commands for Programmable Instruments (SCPI) API support, automatic real-time charts and data tables, pass/fail flagging, and PDF and .csv report generation. The solution reduces validation complexity by using the common FITS software framework, providing a familiar environment across the FITS portfolio.

Ameet Suri, Vice President of Product, Credo Technologies, said: “The tighter margins at 1.6T make it essential to evaluate active electrical cable performance at the system level, not in isolation for each link. Keysight’s solutions give Credo a practical way to test our AEC cables during development and qualification, so issues surface sooner and designs reach production with greater assurance.”

Ram Periakaruppan, Vice President and General Manager, Network Test & Security Solutions, Keysight, said: “As interconnect speeds increase, manufacturers need to validate more lanes simultaneously on many types of interconnects without adding unnecessary complexity to their labs. FITS-16CH expands our functional interconnect validation portfolio with the capacity, flexibility, and automation needed to help engineers move from product development and qualification to mass production with greater confidence.”

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In an exclusive interview with Anwesh Koley of ELE Times, Prasanth Viswanathan Pillai, Design Manager, Senior Member Technical Staff (SMTS), Texas Instruments, shares his views on the recent innovations at TI and how next-generation applications are simplifying the path from design to deployment.

ELE Times: Texas Instruments recently introduced the AM13Ex MCU family at Embedded World 2026. Could you walk us through the core innovation behind this launch and its significance for the embedded systems market?

Prasanth Viswanathan Pillai: At Embedded World 2026, Texas Instruments introduced the AM13Ex MCU family, designed to help developers bring intelligence closer to where data is generated and decisions are made. The core innovation behind the AM13Ex family is the integration of TI’s TinyEngine Neural Processing Unit (NPU) alongside an Arm Cortex-M33 core, dedicated hardware accelerators, and an advanced real-time control architecture on a single chip. This combination enables developers to run AI inference directly at the edge while maintaining deterministic real-time control performance.

The first device in the family, the AM13E23019, is built for applications that require both intelligent decision-making and precise control. It combines a 200MHz Cortex-M33 core, TinyEngine NPU, trigonometric math acceleration, integrated security features, and high-performance analogue peripherals, enabling developers to address increasingly complex industrial and embedded workloads on a single platform.

For the embedded systems market, this represents an important shift. Embedded devices are evolving from performing fixed functions to becoming intelligent, adaptive systems capable of local data processing and real-time decision-making. By integrating AI acceleration, real-time control, and security into one device, the AM13Ex family helps reduce system complexity and improve energy efficiency.

ELE Times: Texas Instruments also recently expanded its MCU portfolio with the MSPM33C321A. What role does this device play in TI’s broader embedded strategy, and what opportunities does it create for developers?

PVP: The MSPM33C321A reflects Texas Instruments’ commitment to delivering highly integrated, scalable microcontroller solutions that address the growing demands of modern embedded applications. Built on the Arm Cortex-M33 core, the device combines processing performance, integrated security features, advanced communication capabilities, and precision analogue integration in a single platform.

A key differentiator of the MSPM33C321A is its rich analogue and control integration, including high-speed ADCs, configurable analogue peripherals, and motor-control capabilities. These features make it well-suited for applications that require accurate sensing, real-time control, and reliable operation, while helping developers streamline system design.

For developers, the MSPM33C321A opens opportunities across a wide range of applications, including industrial automation, motor drives, building automation, smart appliances, and intelligent sensing systems. Additionally, as part of the MSPM0 portfolio, it enables developers to leverage a common software ecosystem and development environment, supporting greater design flexibility and scalability as product requirements evolve.

ELE Times: How does the Arm Cortex-M33 architecture support next-generation embedded applications?

PVP: At the core of M33C321 is the Arm Cortex-M33 architecture, which is built to balance performance, efficiency, and security. Its TrustZone-enabled security framework provides hardware-level protection, which is increasingly essential as connected systems expand.

At the same time, its deterministic real-time responsiveness and DSP capabilities make it ideal for applications that require precision, reliability, and efficient decision-making at the edge. This architecture gives developers the flexibility to design for today’s needs while building platforms that can scale with tomorrow’s complexity.

ELE Times: What was the role of TI India in the development of this MCU, and how did the local team contribute to enabling this innovation?

PVP: M33C321 is especially meaningful because it represents true end-to-end product leadership from India. At Texas Instruments India, the team drove the journey from architecture and core design through full development, validation, and test program generation.

This demonstrates how India is contributing not just engineering capacity, but full-spectrum semiconductor innovation. It reflects the maturity of India’s R&D ecosystem and reinforces its role as a strategic center for global product development.

ELE Times: What differentiates TI’s approach to embedded processing compared with other MCU vendors?

PVP: TI’s differentiation comes from taking a truly end-to-end view of semiconductor innovation. Beyond designing advanced embedded processors, Texas Instruments combines system architecture, analogue leadership, software ecosystems, and importantly, internal manufacturing capability. This in-house manufacturing strength allows TI to co-develop silicon and process technologies together—optimising device architecture alongside manufacturing processes to deliver better performance, efficiency, quality, and long-term reliability for customers.

For customers, this means more tightly optimised products and a stronger value proposition because device design is not isolated from manufacturing realities. For engineers, it opens up a far more complete perspective—extending beyond product design into process development, optimisation, and manufacturability. From a semiconductor standpoint, that full-stack visibility is incredibly valuable because it creates opportunities to innovate across the entire lifecycle, from architecture to fabrication. This combination of product, process, and ecosystem integration is what makes TI’s approach particularly distinctive in embedded processing.

ELE Times: How do these new devices help customers accelerate innovation in industrial and automation applications?

PVP: M33C321 helps customers innovate by simplifying the path from design to deployment. Its integrated architecture supports advanced control, secure connectivity, and efficient system management, enabling developers to focus more on differentiation and less on integration challenges.

This versatility makes it highly relevant across evolving sectors—from industrial automation and precision robotics to intelligent infrastructure supporting large-scale digital transformation. As industries modernise, customers need platforms that can adapt quickly, scale efficiently, and maintain reliability—and that is where the M33C321 delivers significant value.

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Henkel Adhesive Technologies, the market leader in adhesives, sealants and surface treatments, has been actively developing and executing numerous initiatives geared towards sustainable, energy-efficient, lightweight solutions for the Automotive and Metals market in India. Anwesh Koley of ELE Times caught up with Manish Dave, Head of Industrials – India, Henkel Adhesive Technologies, to deep-dive into the company’s India initiatives and its completion of 150 years of operations.

ELE Times: Tell us about Henkel at Productronica this year. What is the company showcasing?

Manish Dave: We are very passionate about Electronica, and as you can see, we have a wide variety of offerings. Our business spans from data centres and AI—which obviously are seeing a lot of growth—to power and industrial automation, because all this data requirement now needs energy, and we supply solutions for that.

We also have aviation and avionics, which are growing significantly, alongside newer domains around life sciences and wearable items. Across all of these, we provide material solutions, whether it is circuit board protection or thermal materials to dissipate heat.

ELE Times: In terms of the current market for electronics in India, how do you perceive the Indian market vis-à-vis other Asian markets and from a global perspective? How do you see that?

Manish Dave: It depends upon the segment you talk about. For AI, we are behind; certainly, the US and China are far ahead. But India is catching up really fast. Over the last many months, I have continuously seen India coming in at number 3. It used to be maybe 5 or 6, with Japan, Germany, many European countries, and even South Asian nations ahead of us. If you look at Malaysia, Thailand—Thailand is really, really good—and Vietnam, India is certainly growing. We still have some work to do, so I would say a couple more years before we arrive on the global scene.

ELE Times: In terms of the latest innovations at Henkel that we are seeing, particularly in the AI domain, and then if you could talk about the defence sector which is also showing a lot of promise, please brief us about the initiatives at Henkel.

Manish Dave: For AI, for sure, there is data generation and heat management. An AI data centre would have servers and routers, and we are involved with all of them across the whole ecosystem. Our job is to make sure that piece of circuit board is protected—that you have underfills and conformal coatings, potting that protects it. And then for any heat on any active surface, we have our thermal interface materials that dissipate heat, keeping it at an optimal temperature. We see a tremendous amount of growth in data and AI, and I think India is probably at the cusp of getting into the lead at some point in time.

Defence is new for us, but there have been lots of announcements from the frontline objects, and Henkel is involved. Our Loctite products have been used on frontline objects onwards. From a structural strength perspective, I always say our products are used to bond primary and secondary structures on an aircraft flying at 24,000 feet, going 500 miles per hour, carrying 300 people. Our products play a very important role in that, delivering quality and innovation. We have several key innovations not just in electronics, but around structures—how to make them lighter—and composites are a big part of what we do.

ELE Times: In terms of current market dynamics and how you see India vis-à-vis other markets, there are also challenges the industry faces regarding process optimization. How does Henkel deal with that, and how does the cost factor feature in this?

Manish Dave: That is a very good question. What we have done in Bangalore is open an application centre, because we want to be closer to the customer and faster. The role of our engineers there is to welcome customers who bring in their challenges.

We had a recent case where they brought in a challenge, we worked together to find a solution, and within one week we delivered an end-to-end solution. That is really what we are trying to do: build our ecosystem to work with the epicentre here, working with both unicorns and established players.

ELE Times: The government is highly optimistic about semiconductors, not only in terms of products but also the investments coming up in recent years. What’s your take on the India Semiconductor Mission 2.0, the massive investments, and how do you see this sector going forward?

Manish Dave: I think this is the next big frontier for us. The government has done the right job of investing. You could argue we are a little late, but I think the speed at which India moves is what I am really enjoying.

I grew up in Ahmedabad, and I used to know this small town called Sanand. Now I go there and I see Tata Electronics and Tata Semiconductor, and it’s just breathtaking. There is massive potential, and public-private partnerships are playing a key role there. We are very actively involved on both sides of that, and NASSCOM is one area where we work very closely.

ELE Times: You mentioned PCBs and PCB designs. How critical is getting this technology right? Many manufacturers have been wary of introducing new technologies, preferring to continue with older ones due to the critical nature of the component. How do you see PCB design evolving, and what is your perspective?

Manish Dave: We are more focused on solutions to protect the circuit board and have seen the evolution of PCBs. I remember the early days—and I have been in the industry a long time across multiple roles—circuit boards went from being very small to massive boards for different subsystems, and now they are coming back down to smaller sizes, showing a tremendous amount of innovation.

For India, I think there is still a heavy reliance on China in terms of critical components. A lot of investment has gone into components and assembly being made in India, but not necessarily the raw materials required. If you look at a circuit board, there are so many materials required; I think bringing some of those in to achieve independence is the next big frontier. Then you can truly talk about cost, quality, and speed altogether.

ELE Times: Henkel has been part of the entire value chain in electronics. You talked about developing indigenous technology as of now and mentioned our reliance on China. What according to you can be the steps to increase self-reliance going forward?

Manish Dave: That’s an excellent question. One key factor is investment coming not just from the government, but from private players—the movement of capital is critical. I spent most of my life in the US, and I am convinced the entrepreneurial drive exists in India. However, people sometimes lack access to capital. How do they get access to that capital?

What I love about Bangalore and coming here is that we can find everything in one place: people with money, people with technology, and people with ideas and aspirations. Platforms like NASSCOM give them a chance to come together, and we work very closely with many corporations to help startups grow. We are still dependent on China, but if we keep doing what we are doing with no setbacks in our path forward. The next 10 years are going to be the golden 10 years for India.

ELE Times: Henkel is celebrating 150 years. Tell us about how this journey has been and how you expect the upcoming decades to be.

Manish Dave: It started with Fritz Henkel with a very small role in laundry—that’s where he started. Then he realized those sacks required adhesives, adhesives came into the picture, and now we are at a €22 billion public organization.

Dr. Simone Bagel-Trah, Chairwoman of Henkel’s Supervisory Board and Carsten Knobel, CEO of Henkel

Henkel is celebrating 150 years this month across the world, and in India, the celebration will be in two weeks. We are very, very excited and really proud of an organization that’s 150 years rich. We don’t just look ahead another 150 years; our plan is always long term, always sustainable. Our mantra is “Pioneers at heart for the good of generations.” We really want to create enduring value for generations to come for the next hundreds of years.

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With its new SOLO placement head, ASMPT SMT Solutions, the global market and technology leader in integrated hardware and software solutions for the electronics manufacturing industry, is expanding its portfolio of solutions for the production of complex circuit boards for AI and high-performance computing (HPC) applications. Developed especially for the reliable placement of particularly large and heavy processor BGAs, the new head can initially be used on the SIPLACE SX. It handles components measuring up to 240 × 240 millimetres (9.45 × 9.45 inches) and weighing over 2 kilograms (4.4 pounds), soon to be increased to up to 5 kilograms (11 pounds). 

The growing demand for AI applications and their associated computing power is driving the development of highly integrated multi-die modules. More transistors, higher memory bandwidths and thousands of power supply and signal connectors make processor BGAs increasingly complex, larger, and heavier. Whereas only one year ago large processor BGAs measured roughly 150 × 150 millimetres (9.45 × 9.45 inches) and weighed 500 grams (1.1 pounds), the next generation is already reaching 240 × 240 millimetres (8.45 × 9.45 inches) with weights of 2 kilograms (4.4 pounds) – about two times the area and four times the weight. To meet the dynamic growth of the AI market, ASMPT has developed within six months its completely new SOLO placement head as the perfect solution for handling these ever larger and more expensive processors.

Specialist for large and heavy processor BGAs

The new SOLO head is specially designed for picking and placing processor BGAs of this size and weight class. It is based on a new single-segment architecture with a strengthened and stiffened axis. The connection between the placement head and the gantry as well as the interface between nozzle and segment were also designed to withstand the greater mechanical loads. The maximum placement force is 200 newtons. Construction-wise, the head is already designed for significantly heavier components weighing up to 5 kilograms (11 pounds).

Since the highly complex processors can cost more than 20,000 U.S. dollars, they must be handled with an appropriate level of safety and reliability. The nozzles are matched to the respective housing surfaces and take into account any areas that must not be touched during pickup. And since the mass inertia of the large BGAs can be taken into consideration in the movement profiles, acceleration and rotational movements can be customized for the respective component.

The SOLO placement head handles the final step

The processor is merely one of many components on an AI server board. Before it is placed, many ICs, condensers, connectors and super-small passive components must be processed. To accomplish this, various placement heads can be combined on SIPLACE placement machines in an SMT line: The CP20 handles the speedy placement of the smallest components, the CPP covers a broad component spectrum, and the TWIN VHF handles large, heavy and unusually shaped components. The expensive processor BGAs are installed at the very end of the placement process. The new SOLO head handles this particularly critical step and ensures that these large and heavy components are picked up and placed with reliability and precision.

Process reliability along the entire line

The placement of large processor BGAs is only one part of the manufacturing process. Material feeding, circuit board handling and quality control must also be designed to meet the special requirements of AI server applications. The SIPLACE SX provides the necessary functions. Heavy-duty conveyors ensure the safe transport of large and heavy circuit boards while the SIPLACE Smart Pin Support provides the necessary support and prevents PCBs from bending and vibrating during the placement process. And before placing the processor, the machine can inspect critical board segments, especially those in the processor’s target area, for foreign matter and ensure the presence and correct position of spacers. After picking up the processor, it checks BGA connectors optically and can optionally measure the coplanarity of the solder balls via 3D laser triangulation. With the SOLO placement head, the SIPLACE SX is now keeping pace with the rapid developments in the size and weight of processor BGAs.

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CyteSi, a Menlo Park–based innovator in digital microfluidics, today announced the successful validation of a next generation sequencing (NGS) library preparation workflow on CyteSi’s proprietary Turing Biosystem D1 platform using NGS library preparation kits from QIAGEN GmbH. The validation was conducted by Intelligent Biosystems in Hangzhou, China, applying its industrial-scale biological data-generation capabilities and integrated workflows to support automated NGS library-preparation performance on the D1 platform.

Compared with conventional manual library preparation, the Turing Biosystem D1 enables fully automated NGS library preparation for up to six samples per run with less than five minutes of hands-on time. By miniaturizing and digitizing key liquid-handling steps, the D1 system can reduce reagent consumption and lower reagent costs by more than 70%, dramatically reduce labour requirements, and help minimize batch-to-batch variance.

These advantages are especially important for clinical diagnostics markets in North America, Europe, and Japan, where cost control, workflow standardization, reproducibility, and operational efficiency are critical to broader adoption of NGS based testing. CyteSi and QIAGEN are positioned to support future NGS workflow adoption through validated kit compatibility and automated library preparation, while Intelligent Biosystems’ validation work demonstrates the D1 platform’s readiness for broader clinical-diagnostics applications.

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DigiKey, the global distribution leader of electronic components and automation products, is the exclusive distributor of the newly available Coralboard, a developer-ready edge AI board powered by Coral NPU technology from Google Research and Synaptics Astra embedded processors. Manufactured by Grinn, the development board offers a practical starting point for rapid prototyping, product evaluation, and production-oriented edge AI development.

“DigiKey is excited to partner with Synaptics and Google Research to bring the Synaptics Coralboard to the global engineering community,” said Mike Slater, vice president of global business development for DigiKey. “By carrying the full stack, from development board to module to silicon, DigiKey can support edge AI developers at every stage from experimentation to production. Google Research, Synaptics and Grinn have delivered a game-changing dev board to the electronics industry, and we are excited to support them in getting the board into the hands of engineers, designers, makers and developers worldwide.”

What is Coralboard?

The Coralboard is a development platform for edge AI powered by Coral NPU from Google Research and Synaptics Astra embedded processors. Built for rapid prototyping, the board features an integrated Coral NPU for fast, efficient on device AI acceleration, giving you the power to create, test, and deploy smart experiences with ease. The kit is fully equipped with everything needed to bring development projects to life and offers seamless plug-and-play support for cameras, displays and audio. It also effortlessly keeps devices connected with versatile options like Ethernet-over-USB and optional support for Wi-Fi and Bluetooth modules.

The Coralboard edge AI development board is available now from DigiKey worldwide. Designed for ultra-low-power, always-on applications using ambient sensing, the dev board enables fast, efficient on-device inference and supports all day AI experiences in battery-constrained form factors.

Typical Coralboard applications include smart cameras, industrial monitoring, predictive maintenance, voice-enabled devices and battery-powered edge AI systems.

The Coralboard is intended for embedded developers, AI and machine learning engineers, system architects, product teams, and device manufacturers building the next generation of intelligent edge products. Teams can begin with Coralboard for evaluation and rapid prototyping, move to product prototyping and integration, and scale to full production designs. This flexible path helps developers explore real-world AI workloads, validate product concepts, and move from experimentation to production using a common Edge AI technology foundation.

“We are excited that the Synaptics Coralboard is now available directly for developers through DigiKey,” said Billy Rutledge, director for Google Research. “With Coralboard, it is easier than ever to bring advanced AI to the edge, and this platform reflects our shared commitment to secure and accessible Edge AI for developers around the globe.”

“With Google’s Coral NPU technology, we are enabling a cutting-edge class of systems where power efficiency, performance and on-device intelligence characterize developer experience,” said Vikram Gupta, SVP & GM, edge compute & connectivity solutions division for Synaptics. “The Coralboard provides users and OEMs a faster path to building and deploying at-scale AI products for the edge.”

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Murata Manufacturing Co., Ltd. announces the development of the world’s smallest 008004-inch size (0.25mm × 0.125mm) NTC thermistor, the NCU01 series. Compared with Murata’s previous smallest 01005-inch size (0.4mm × 0.2mm) product, the new series reduces mounting area by approximately 60% while achieving equivalent temperature sensing performance, with resistance tolerance of ±1% and B-constant tolerance of ±1%. Its ultra-compact size enables temperature sensing to be positioned in increasingly restricted spaces and closer to heat-generating components, supporting more accurate and responsive thermal monitoring in smartphones, wearable devices, and other densely integrated electronic devices.

Murata plans to begin sample shipments in October 2026 and mass production during 2027. The line-up will be expanded progressively, beginning with 100kΩ and 10kΩ resistance values.

Bringing Temperature Sensing Closer to the Heat Source

As electronic devices continue to become smaller and more sophisticated, component density on circuit boards and inside modules continues to increase. As a result, mounting space for electronic components is limited, making it difficult to place NTC thermistors close to heat-generating components. If a thermistor must be placed farther from the heat source, the measured temperature can differ from the actual component temperature, while rapid temperature changes may also take longer to detect.

This creates a demand for smaller NTC thermistors that can be positioned closer to critical components without consuming valuable board space. However, continued miniaturization makes high-precision processing and manufacturing more difficult, making it more challenging to maintain consistent sensing characteristics. For NTC thermistors, tight resistance and B-constant tolerances are critical to enable stable temperature sensing.

High-Precision Performance at 008004-inch Size

Murata addressed these challenges through its proprietary ceramic materials technology, high-precision processing, and optimization of the component structure and manufacturing process to develop the world’s smallest 008004-inch size NTC thermistor. Despite its significantly smaller footprint, the new NCU01 series maintains the ±1% resistance and B constant tolerances achieved by Murata’s previous 01005-inch size product.

By reducing the mounting area by approximately 60%, the NCU01 can be placed in locations that are difficult to accommodate with larger thermistors, including closer to heat-generating components. This can help reduce the temperature difference and detection delay associated with more distant measurement points while contributing to the stable operation of electronic devices with high-density component layouts.

Primary applications include temperature monitoring on circuit boards in smartphones and wearable devices, as well as in integrated circuit (IC) packages and system-in-package (SiP) modules.

Murata will continue to expand its NTC thermistor line-up and contribute to further miniaturization and improved reliability of electronic devices. For product inquiries, please contact us here.

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​AVL and VisIC Technologies are partnering companies that share the vision of upgrading and commercialising high efficiency gallium nitride (GaN) traction inverters. The partnership recently demonstrated advanced research related to traction inverters by integrating gallium nitride (GaN)-based power modules into an electric vehicle reflecting a move that advances high-efficiency power electronics for electric vehicles (EVs).

The test was conducted at AVL’s facilities in Germany where VisIC’s D³GaN technology was integrated into an AVL vehicle demonstrator platform. The development has moved from laboratory testing into a complete vehicle environment.

GaN Technology Targets Lower Inverter Losses

The conducted test trial assembles a GaN technology-based inverter with a high-speed electric axle, advanced power electronics and vehicle control systems. The traction inverter transforms the DC power from an EV’s battery into AC for use in the electric motor. Its efficiency determines the amount of energy taken from the battery that the reaches the motor. This newly announced technology significantly reduces switching and conduction losses, thereby lowering overall inverter losses.

The project also involves NXP Semiconductors for dri​ver electronics, system integration, and performance support. NXP supplies specialized driver ICs for proper control of D³GaN technology at high frequencies. Reducing the inverter’s power losses improves thermal management and supports a more compact powertrain design.

Potential Benefits for Future EVs

Integrating an inverter into a vehicle allows the partnership to evaluate performance metrics under a complete development environment including the electric drivetrain, and their interaction with the motor and vehicle control systems. The companies reported that GaN-technology-based inverter achieved 99.67% efficiency at a switching frequency of 10 kHz and over 99.8% at 5 kHz.

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Hillcrest Energy Technologies, a Canadian clean technology company specializing in manufacturing high-performance power conversion devices and digital control systems, has reported a major development towards a zero-voltage switching (ZVS) inverter. The company has reduced motor-terminal voltage overshoot by more than 90% compared to a conventional hard-switched silicon carbide (SiC) inverter.

Reducing motor-terminal voltage overshoot extends motor’s insulation life, reduces electromagnetic interference (EMI), decreases motor heating, and enables safe deployment of fast-switching, high-efficiency power devices. The detailed findings of the research were presented at the IEEE Energy Conversion Congress and Expo (ECCE 2026). The event was held from October 4 to 8, 2026, in Vancouver, BC, Canada.

ZVS Technology Addresses Motor Insulation Stress

The primary role of the traction inverter is to convert direct current (DC) from the battery into controlled, multi-phase alternating current (AC) to drive the electric motor. Traditional SiC semiconductors enable fast switching operations resulting in voltage spikes between the inverter, connecting wires, and motor. These voltage spikes put additional stress on the motor’s insulation system and increase the risk of premature failure.

Hillcrest’s ZVS technology addresses this challenge by using a smart method for switching the electric current on and off. It allows switching operations between semiconductor devices when the voltage across them is close to zero. This approach slows voltage transitions and reduces overshoot without depending on additional filtering components which add to the system’s volume, cost, and power losses.

This technology could help EV manufacturers to deal with the problem of motor insulation reliability and electromagnetic interference instead of relying on large-sized filtering solutions. The final validation of these results will be seen when the technology moves towards the development phase and yields a positive impact on the vehicle’s long-term reliability.

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​With the rising demands of electric vehicles, researchers are continuously working in this domain to make future mobility more practical for electric vehicle (EV) users. To make future mobility more convenient, researchers have introduced an advanced all-solid-state lithium-sulfur battery. This charging solution addresses two major challenges in modern EV infrastructure: long charging periods and limited cycle life.

Many government agencies and companies across the globe are working to commercialize solid-state lithium-sulphur battery designs because they provide high energy density, better safety, reduced dependence on rare-earth metals, and long shelf-life by eliminating the shuttle effect.

Redox Mediator Improves Battery Reaction Kinetics

All-solid-state lithium-sulfur batteries are being explored as an alternative to lithium-ion batteries, offering higher specific energy and lower material cost. However, the solid-state reaction hinders the development of all-solid-state lithium-sulfur batteries due to slow reaction kinetics, which can reduce charging speed and cycling stability.

To overcome this problem, the research team designed a positive electrode with a unique nano-eutectic material of sulfur and iodine arranged in an amorphous network. The iodine serves as a redox mediator, which allows electrons to transfer easily and enhances the sulfur reactions. The electrode’s electrochemical activity is further improved by growing the material within mesoporous carbon.

In lab tests, the battery delivered 851.9 mAh (milliamp-hours per gram) of sulfur and iodine when charged at a rate of 10C, and 474.7 mAh/g at 24C. According to the researchers’ report, electrode showed 9,000 cycles over nine months at 2C and 2,800 cycles at 0.5C over 17 months. These results demonstrate promising cycling stability under the tested conditions.

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DRDO has successfully carried out a flight trial of the indigenous High-Altitude Platforms (HAPS). HAPS is a long endurance unmanned aircraft designed as an aerial platform to be used as a surveillance system in the stratosphere. The platform has been developed by ADRDE, Agra, which is an agency of the DRDO.

In the course of the experimental flight, the platform attained an altitude of about 21 kilometres above mean sea level and was maintained at a level of 20 kilometres for more than 30 minutes before being ordered to descend. The vehicle was recovered and analysed, and its flight-performance data were obtained. Instrumental and control systems onboard included an inertial measurement unit, GPS receiver, onboard cameras, and an altitude-control system. Video and other vehicle data were sent back to a ground control station during the trial.

HAPS vehicles are meant to fly at substantially higher altitudes than aircraft that are currently flying today. They may be capable of watching a large area for an extended period of time. They could eventually be used in a variety of surveillance, comms, and monitoring roles. The trial was also conducted in collaboration with the Indian Air Force, CEMILAC, the Directorate General of Civil Aviation, the Airport Authority of India, and other agencies. The flight achieved a significant milestone in the development, though tests are still needed to confirm endurance, payload capacity, and operational viability.

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Lockheed Martin has announced a new and improved missile for the missile defence force known as PAC-3 Edge for the US Army Future Interceptor programme. It is aimed at enhancing military capability to protect against increasingly sophisticated missile threats such as hypersonic missiles. The PAC-3 Edge is based on technology developed for the combat-proven PAC-3 Missile Segment Enhancement (MSE), including a new seeker, enhanced flight control technology, and a Northrop Grumman-designed multi-pulse solid rocket motor.

Lockheed Martin has announced a new and improved missile for the missile defence force known as PAC-3 Edge for the US Army Future Interceptor programme. It is aimed at enhancing military capability to protect against increasingly sophisticated missile threats such as hypersonic missiles. The PAC-3 Edge is based on technology developed for the combat-proven PAC-3 Missile Segment Enhancement (MSE), including a new seeker, enhanced flight control technology, and a Northrop Grumman-designed multi-pulse solid rocket motor. defence as forces encounter a more complex array of threats. But PAC-3 Edge is still a development program rather than an operational system in the field.

Lockheed Martin said development and testing would start in 2027, and the missile would enter service in 2031. PAC-3 Edge is a prime example of how manufacturers are already moving legacy interceptor technology forward in the areas of sensors, propulsion, and flight control. Its future utility will be contingent on test results, integration, and procurement.

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US-based defence technology firm Anduril Industrial has announced its new family of missiles, Steelfin, a high-speed, configurable surface-to-air missile developed to counter a variety of aerial threats, such as hypersonic vehicles, cruise missiles, and ballistic missiles. The system employs a common two-stage design. Its first-stage booster can be tailored to vary range, performance, and launch parameters. Its second-stage interceptor consists of a common baseline airframe, avionics, software, and flight-control architecture for each variant.

The modular design aims to lessen the incidence of having to redesign the whole missile in the event of a change of operational requirement. Identical parts and production methods could be used to help bring about efficiencies in the manufacturing process and help to achieve economies of scale. Anduril says Steelfin is capable of being integrated with existing land- and sea-based launch infrastructure, such as the Mk 41 Vertical Launch System, and interoperates with current battle-management systems. Ballistic testing with surrogate air vehicles has been conducted, and flight tests will start in 2027.

The move also comes as the armed forces search for cheaper counter-drone tactics to deal with swarms of enemy aircraft that don’t max out the available expensive interceptors. Layered air defence, defensive and offensive protection of the armed forces and the military facilities, ships from the attack of various missile-type ballistics. Steelfin embodies the trend towards modular missile architectures and scalable defence manufacturing. Its actual ability, cost, and effectiveness will have to be proved through additional trials.

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India’s Defence Research and Development Organisation (DRDO) has demonstrated the capacity of a Quantum Key Distribution (QKD) platform on the live network of Proof and Experimental Establishment at Chandipur, Odisha. The trial is aimed at developing cutting-edge technology to safeguard high-value information from growing cyber threats.

Quantum Key Distribution (QKD) uses properties of quantum physics to generate encryption keys. QKD can involve the use of physical objects, such as photons, which have the ability to detect some form of tampering when quantum signals are used to distribute those keys. It has the potential to be part of a high-security communications network.

In the trial, the platform was launched on a live network in a defence test-range environment. The trial was important because a real operational network faced a number of practical issues such as equipment integration, transmission conditions and communication reliability. QKD does not itself encrypt all transmitted information. It enables the creation of secure keys with which to encrypt data, provided that suitable encryption systems are used. In addition, secure end points, management, authentication, and measures to prevent attacks on the system are needed.

Use Cases: Strategic military command network and communications, strategic military research establishments, and other facilities of strategic importance.

The successful demonstration has created more interest in quantum-secured communications in India. Additional testing and integration of the systems will be necessary to ascertain the role this technology will play in defence networks.

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