Новини світу мікро- та наноелектроніки

Research Headlines - La ricerca in campo cardiovascolare offre nuove soluzioni cliniche

EC:RIC:News - Втр, 01/19/2021 - 02:00
ImageI ricercatori europei stanno creando l’essere umano fisiologico virtuale, un modello informatico completo del corpo. In tal modo, un progetto finanziato dall’UE si è prefisso di migliorare le cure cardiovascolari e l’industria sta raggiungendo vari risultati chiave. L’obiettivo finale è tradurre la scienza in pratiche mediche reali a vantaggio dei pazienti e migliorare la qualità delle cure.

Research Headlines - La recherche cardiovasculaire apporte de nouvelles solutions cliniques

EC:RIC:News - Втр, 01/19/2021 - 02:00
ImageDes chercheurs européens créent l’humain physiologique virtuel (VPH), un modèle entièrement informatisé du corps. Un projet financé par l’UE entendait donc améliorer les soins cardiovasculaires, et plusieurs résultats sont mis en œuvre par l’industrie. Son objectif vise à transformer la science fondamentale en pratiques médicales qui profiteront aux patients et amélioreront les normes de soins.

Research Headlines - La investigación cardiovascular ofrece nuevas soluciones clínicas

EC:RIC:News - Втр, 01/19/2021 - 02:00
ImageInvestigadores europeos han creado el humano fisiológico virtual, un modelo informático completo del organismo. En el proceso, un proyecto europeo se centró en mejorar los cuidados cardiovasculares. La industria ya está aplicando varios de sus resultados. El objetivo es convertir la ciencia básica en prácticas médicas reales que beneficiarán a pacientes y mejorarán los estándares de atención.

Research Headlines - Herz-Kreislauf-Forschung liefert neue klinische Lösungen

EC:RIC:News - Втр, 01/19/2021 - 02:00
ImageEin europäisches Forschungsteam hat den „Virtual Physiological Human“ (VPH) als vollständiges Computermodell des Körpers erstellt. Nun forscht ein EU-finanziertes Projekt an Herz-Kreislauf-Behandlungen und mehrere zentrale Ergebnisse werden von der Industrie übernommen. Grundlagenforschung wird so in medizinische Praktiken überführt, die behandelten Personen helfen und Standards anheben.

Research Headlines - Cardiovascular research delivers new clinical solutions

EC:RIC:News - Втр, 01/19/2021 - 02:00
ImageEuropean researchers have been building the Virtual Physiological Human (VPH), a full computer model of the body. Through this process, an EU-funded project focused on improving cardiovascular care, and several key results are now being implemented by industry. The ultimate aim of all this is to turn basic science into real medical practices that will benefit patients and improve care standards.

Badania nad układem krążenia dostarczają nowych rozwiązań medycznych

EC:RIC - Втр, 01/19/2021 - 02:00
Europejscy naukowcy pracują nad wirtualnym fizjologicznym człowiekiem – kompleksowym modelem komputerowym ludzkiego ciała. W ramach tego procesu naukowcy realizowali finansowany przez UE projekt mający na celu usprawnienie leczenia chorób układu krążenia, którego wyniki znalazły zastosowanie w sektorze medycznym. Celem prac jest przełożenie nauki na praktyki medyczne z korzyścią dla pacjentów.

La ricerca in campo cardiovascolare offre nuove soluzioni cliniche

EC:RIC - Втр, 01/19/2021 - 02:00
I ricercatori europei stanno creando l’essere umano fisiologico virtuale, un modello informatico completo del corpo. In tal modo, un progetto finanziato dall’UE si è prefisso di migliorare le cure cardiovascolari e l’industria sta raggiungendo vari risultati chiave. L’obiettivo finale è tradurre la scienza in pratiche mediche reali a vantaggio dei pazienti e migliorare la qualità delle cure.

La recherche cardiovasculaire apporte de nouvelles solutions cliniques

EC:RIC - Втр, 01/19/2021 - 02:00
Des chercheurs européens créent l’humain physiologique virtuel (VPH), un modèle entièrement informatisé du corps. Un projet financé par l’UE entendait donc améliorer les soins cardiovasculaires, et plusieurs résultats sont mis en œuvre par l’industrie. Son objectif vise à transformer la science fondamentale en pratiques médicales qui profiteront aux patients et amélioreront les normes de soins.

La investigación cardiovascular ofrece nuevas soluciones clínicas

EC:RIC - Втр, 01/19/2021 - 02:00
Investigadores europeos han creado el humano fisiológico virtual, un modelo informático completo del organismo. En el proceso, un proyecto europeo se centró en mejorar los cuidados cardiovasculares. La industria ya está aplicando varios de sus resultados. El objetivo es convertir la ciencia básica en prácticas médicas reales que beneficiarán a pacientes y mejorarán los estándares de atención.

Herz-Kreislauf-Forschung liefert neue klinische Lösungen

EC:RIC - Втр, 01/19/2021 - 02:00
Ein europäisches Forschungsteam hat den „Virtual Physiological Human“ (VPH) als vollständiges Computermodell des Körpers erstellt. Nun forscht ein EU-finanziertes Projekt an Herz-Kreislauf-Behandlungen und mehrere zentrale Ergebnisse werden von der Industrie übernommen. Grundlagenforschung wird so in medizinische Praktiken überführt, die behandelten Personen helfen und Standards anheben.

Cardiovascular research delivers new clinical solutions

EC:RIC - Втр, 01/19/2021 - 02:00
European researchers have been building the Virtual Physiological Human (VPH), a full computer model of the body. Through this process, an EU-funded project focused on improving cardiovascular care, and several key results are now being implemented by industry. The ultimate aim of all this is to turn basic science into real medical practices that will benefit patients and improve care standards.

Energy Harvesting Spotlight: Maxim Claims “Smallest Solar Harvesting Solution”

AAC - Втр, 01/19/2021 - 01:34
IoT designers are commonly plagued with the issue of long-term deployment. Energy-harvesting paradigms, including a new solar harvesting device from Maxim, may be a promising supplement to battery cells.

6 core capabilities an IoT device needs for basic cybersecurity

EDN Network - Пн, 01/18/2021 - 23:23

Ensuring the cybersecurity of an IoT device can seem a daunting challenge. Innumerable options exist for choosing what security features to implement as well as methods for implementation. Fortunately for developers, there is now a baseline of device capabilities that can provide a starting point for consideration.

The US National Institute of Science and Technology (NIST) has released two documents that provide guidance on cybersecurity for IoT developers. The first – NISTIR 8259 Foundational Cybersecurity Activities for IoT Device Manufacturers – outlines the activities that development teams should pursue when planning their device’s design. An earlier post explored this document.

The second document – NISTIR 8259A IoT Device Cybersecurity Capability Core Baseline – describes the capabilities an IoT device would need to implement to provide the foundation of basic cybersecurity. It identifies six key capabilities that developers should consider providing in the device itself:

  • Device identification: The IoT device should be uniquely identifiable both logically and physically.
  • Device configuration: The IoT device’s software configuration should be changeable, with such changes able to be implemented only by authorized entities.
  • Data protection: The IoT device should protect the data it stores and transmits against unauthorized access and modification.
  • Logical access to interfaces: The IoT device should be able to restrict its local and network interfaces, and the protocols and services used by those interfaces, to logical access by authorized entities only.
  • Software update: The IoT device’s software should allow updating, but only by authorized entities using a secure and configurable mechanism.
  • Cybersecurity state awareness: The IoT device should be able to report on its cybersecurity state and only make that information accessible to authorized entities.

For each of these capabilities, the document describes what common elements an organization might use to achieve that capability. For example, to implement data protection a team might provide cryptographic capabilities for both stored and transmitted data. It also might provide an ability to configure the cryptography usage, such as choosing the key length, and include an ability for authorized entities to render all data on the device inaccessible. This might include an ability to erase all data, erase keys, and the like.

NISTIR 8259A further provides a rationale for implementing each capability. The ability to alter device configuration, for instance, is important for customers seeking to customize a device when integrating it with their own systems. It also supports the restoration of devices to a secure configuration should it become compromised. Similarly, the ability to allow software updates gives customers a chance to refine their security measures as threats evolve and allows them to “roll back” software changes should any prove to adversely impact system compatibility.

By implementing the baseline functionality into their IoT devices, developers can give their customers the tools they will require to implement whatever additional security features the specific installation demands. However, it is also true that not every installation will require all these functions, and some installations will require the device to include additional built-in functionality. It all depends on what is important to the customer.

IoT development teams thus must begin their development efforts by performing a risk analysis. In this analysis, the team needs to identify what kinds of threats they can anticipate and determine which parts of their design will require protection against these threats. The assessment further includes estimating the probability of the attack happening, the potential impact on system operation and data security, and the significance or severity of that impact. By ranking these assessments from slight to severe and estimating the expected cost of providing mitigation, development teams can create a priority list for the functionality that must be implemented.

Here, too, the NIST offers guidance. NISTIR 8228, Considerations for Managing IoT Cybersecurity and Privacy Risks provides development teams with areas of consideration for the risk assessment process to help determine which areas will require mitigation. These risk mitigation areas dovetail with the baseline functionality guidelines, as shown in Figure 1.

diagram of IoT device risk mitigation areasFigure 1 There are six key areas of IoT device usage that developers should consider when deciding on what cybersecurity features to implement. Source: NIST

The device baseline document includes numerous references to existing implementations of cybersecurity features to help stimulate development team thinking. These implementations are neither required nor endorsed by NIST; they are simply there for reference. Still, reviewing them can help stimulate ideas for development teams seeking their own approach.

Ensuring the security of IoT devices will require the investment of considerable thought, at the very least. What is becoming increasingly clear, though, is that the investment is one that must be made. The days of believing that “no one will want to hack this device” or “customers will not pay extra for security” are rapidly becoming history. As IoT devices proliferate and their impact on systems and lives grows, cybersecurity becomes increasingly imperative. Guidelines such as these can help development teams begin to get a handle on the problem.

Rich Quinnell is a retired engineer and writer, and former Editor-in-Chief at EDN.

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Are AR Smart Glasses Making a Comeback? Lenovo and Vuzix Think So

AAC - Пн, 01/18/2021 - 20:30
Since the initial hype of Google Glass has died down in recent years, many AR companies have used the CES stage to resurge excitement in AR smart glasses. Here are the latest advancements from CES 2021.

Capture solutions of already-debugged issues

EDN Network - Пн, 01/18/2021 - 19:58

How often do you have a déjà vu? Like you have seen an already-debugged issue before, and when you can’t recollect even after digging through e-mails for hours, you end up debugging the same issue, thereby re-investing the same amount of time again.

Here are some facts to consider:

  1. Fixing a bug takes 30 times longer than writing a line of code.
  2. 75 percent of a developer’s time is spent on debugging; that amounts to 1,500 hours a year.

Known issues and solutions or “KIAS” is a term coined by the authors as a short form of a notebook that comprises all the issues faced, ranging from problems in projects to editors like gvim to programming languages to Linux and Windows-related OS problems.

As time passed, the notebook became a word file and moved to the cloud. Then, it became increasingly difficult to involve others in the system as no one really felt like documenting the stuff. The additional step to go search for issues in this pre-registered page/doc was just too cumbersome, so people gave up on the idea.

Even if people logged information on issues every now and then, no one really went on to search once they found an issue during a debug cycle, rendering all the logged information of no use. So, we came up with the idea of an executable KIAS.

However, before we delve deeper into that, what’s the primary motivation? The answer to this is a rhetorical question. Do we really want to add more time to what we have already spent on debugging issues? Therefore, the solution aims to remove two dependencies:

  1. Dependency on “who” by eliminating the dependency on the person who first debugged the issue.
  2. Dependency on “when” and “how” by eliminating the dependency on self-memory to remember when and how one debugged an issue.

The solution aims to add two facets to errors previously faced by developers:

  1. Provide root cause analysis (RCA) information to the user.
  2. Provide a list of possible solutions to the user.

Here, it’s worth mentioning that JIRA and other bug-tracking tools have limitations. These tools don’t proactively tell users that this issue has arisen before, and they may not be logged for common issues that aren’t really bugs.

Executing KIAS

Here is how the idea of executable KIAS is achieved:

  • By logging KIAS information in a YAML file—could be virtually any format, including XML, JSON, TXT—and a script to parse for pre-registered errors and append information to errors seen in the compile/simulation log files.
  • By using system Verilog callbacks to intercept the UVM_ERROR/UVM_FATAL message and analyze and append information before it’s printed to the log.

Now let’s explore both options.

1. Using system Verilog callback

For users who only wish to log KIAS for runtime issues and uvm errors, it’s an ideal solution. It uses the catch and throw mechanism in the uvm_report_catcher class. It’s like implementing exception handling when we want to demote some errors in our TB for certain tests.

However, in this case, what we are really doing is modifying the error message by appending KIAS information to the error string itself, thereby automating the printing of past logged debug information of the error/issue in question.

The uvm_report_catcher is used to catch messages issued by the uvm report server. Catchers are uvm_callbacks#(uvm_report_object,uvm_report_catcher) objects, so all facilities in the uvm_callback and uvm_callbacks#(T,CB) classes are available for registering catchers and controlling catcher state.

The uvm_callbacks#(uvm_report_object,uvm_report_catcher) class is aliased to uvm_report_cb to make it easier to use. Multiple report catchers can be registered with a report object. The catchers can be registered as default catchers, which catch all reports on all uvm_report_object reporters, or catchers can be attached to specific report objects (i.e. components).

User extensions of uvm_report_catcher must implement the catch method in which the action to be taken on catching the report is specified. The catch method can return CAUGHT, in which case further processing of the report is immediately stopped, or return THROW in which case the (possibly modified) report is passed on to other registered catchers. The catchers are processed in the order in which they are registered.

On catching a report, the catch method can modify the severity, ID, action, verbosity, or the report string itself before the report is finally issued by the report server. What we intend in this case is to change the report string.

screenshot of macros defined to help provide string-based messagesFigure 1 Some macros that we have defined to help us provide string-based messages, which we would like to see whenever the error is logged.

Here’s the callback implementation.

screenshot of the system callback implementation codeFigure 2 The implementation uses system callback.

2. KIAS Python script

The KIAS Python script can capture any form of error string—compilation or simulation—and search for it in the given log files to provide KIAS information about that error string. The script can parse log files independent of the language, EDA tool, or process, thereby helping verification engineers and design engineers alike.

It has a look-up list of KIAS stored in a YAML file format. Users can use the GUI mode to save information in the YAML file, which would be used in all subsequent KIAS script execution of parsing log files for error strings and providing logged probable cause and possible solution for the same.

The KIAS script has mainly three functions. The first one is to provide a means for the user to easily add new KIAS to the YAML file using a GUI platform (entry form shown in Figure 3) or an interactive mode. It helps the user to create a database of KIAS that can be used by the next function.

The second function loads the YAML file and extracts it contents in a Python dictionary (dict) datatype. Part of this function is also to distinguish between compilation error and simulation error KIAS so that both can be separated into two different arrays or lists.

The third function uses the lists created by the second function to search and process the log files for the error message and append the KIAS information extracted from the YAML file.

screenshot of the KIAS entry formFigure 3 Here’s how the KIAS entry form looks; users can add new KIAS to YAML and can also use regular expressions in their error string to perform string matches accordingly.

Here is how the sample usage and YAML format look:

Sample usage

./kias_exec.py –infile kias.yaml –log debug –comp compile.log –sim sim.log

YAML format

—<Start of Yaml Document identifier>

KID:001<KIAS ID number>

OWN:Ronak<Name of contact person who identified/worked on this issue>

TYP:COM<Type of error, COM for compile time, SIM for simulation time>

ERR:RO period mismatch<Err msg which script should look for in the log file, more precise, the better>

RCA:RO period mismatches because clk period provided in testcase is not correct<Root Cause Analysis, why the error showed up, reason behind the issue>

SOL:|<Use when need to write multi-line info>

Provide proper clk period in test as per RTL/Waveform.

Check RTL for proper clock frequency. <Multi-line/single line message of what is the possible way to resolve this kind of issue or the exact solution found in this case>—

Ronak Dham and Sourabh Goyal work on the verification of FPGAs at Xilinx.

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DIY Digital Clock Using ATmega328p, RTC DS3231 and Seven Segment Displays

Open Electronics - Пн, 01/18/2021 - 18:46

  This is an user friendly tiny digital table clock where user can access all basic functions of clocks including setting alarms, viewing temperature, viewing date, setting date and time, etc. It has a buzzer for alarm and four push buttons (Menu, Left, Right, Cancel) for user interaction. It can be powered by a standard […]

The post DIY Digital Clock Using ATmega328p, RTC DS3231 and Seven Segment Displays appeared first on Open Electronics. The author is Emanuele Signoretta

ROHM completes new building at Apollo plant in Chikugo

Semiconductor today - Пн, 01/18/2021 - 17:45
Power semiconductor maker ROHM of Kyoto, Japan has held an opening ceremony announcing the recent completion (in December) of its new five-storey building at ROHM Apollo’s plant in Chikugo, Fukuoka, which will boost the firm’s silicon carbide (SiC) power device production capacity (after it enters operation in 2022)...

Handheld VNA works up to 26.5 GHz

EDN Network - Пн, 01/18/2021 - 17:22

A two-port vector network analyzer (VNA), the ZNH from Rohde & Schwarz performs cable and antenna analysis, along with full S-parameter measurements. It can help detect and remedy defective RF cables and communication system components up to 26.5 GHz. A built-in receiver step attenuator at both ports protects the analyzer from overloading.

Rohde & Scwarz PR photo of the ZNH VNA

The analyzer’s four-receiver architecture supports unknown through, open, short, and match (UOSM) calibrations. RF specifications include low trace noise of 0.0025 dB RMS, dynamic range of 100 dB, maximum output power of 0 dBm typical, and 16,001 measurement points.

Weighing just 3 kg, the ZNH has a small form factor, fanless design, long battery life, and widely-spaced large keys suitable for gloved operation in the field. A 7-in. multi-touch display uses smart touch gestures similar to smartphones, making operation simple and user-friendly. The analyzer’s wizard function enables preconfiguration of test sequences to reduce on-site errors.

The ZNH VNA comes in four models offering frequency bandwidths of 30 kHz to 4 GHz, 8 GHz, 18 GHz, and 26.5 GHz. One-port cable and antenna measurement and two-port S-parameter measurements are standard. Software options include power sensor support, pulse measurement, wave ratio and wave quantity measurements, vector voltmeter, and DC bias variable voltage source. ZNH analyzers are available now. Request a quote online using the product page link below.

ZNH product page

Rohde & Schwarz 

Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.

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