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Новини світу мікро- та наноелектроніки
Music synthesizer built on lots of breadboards
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Beefing up backup
Further to my prior coverage of this year’s iteration of periodic lightning-damage debacles at my Rocky Mountain foothills residence, I’d earlier mentioned that among the pieces of electronics gear that bit the dust this time was one of my network storage devices (NASs). The setback compelled me to no longer ignore a longstanding chink in my data-backup armor, which I’ve subsequently patched. What it was, and how I fixed it, is the subject of today’s post.
Simplistically speaking, there are (at least) three main ways that a storage device’s data can become compromised:
- If a virus, ransomware or other malware corrupts it, either via a computer it’s directly connected to, another device on the LAN, or a WAN-sourced attack, scenarios for which QNAP offers regularly executed (and updated) integrated scan-and-alert support.
- If a hard drive (or SSD, in some cases) fails. That’s why at minimum my NASs are all dual-drive setups, enabling RAID 1 redundancy, and they preferably contain at least three drives to add RAID 5-delivered performance to the mix, too.
- If the storage device itself dies; the power supply, for example, or something on the motherboard. Sometimes the failing component is straightforward to replace, but other times the NAS is destined only for the teardown pile, followed by the landfill.
The latter situation is the one I encountered recently. As background, I had two NASs active on my network at the time. My four-drive QNAP TS-453Be holds my music and photo libraries, along with decades’ worth of other accumulated personal files:
Its sibling beside it, a three-drive TS-328:
is my network backup destination. Part of the available capacity acts as a Time Machine repository for my Macs, while the remainder handles our various Windows machines, via a combo of File History and the legacy (and deprecated, but still included) Backup and Restore, both of which I’ll likely replace with something third-party and more modern sooner vs later.
The TS-328 is the one that died earlier this year. Although I could still get it to emit a factory-reset “beep”, firmware recovery attempts were fruitless; I’m guessing something(s) vital on the motherboard had fried (a common issue with this model, not just in response to an external “zap”, so I already knew I was running on borrowed time). While its stored data was less critical than that on the TS-453Be, since thankfully none of the computers previously backing up to it had themselves also failed, I wanted to get backup back up (heh heh) and running as quickly and straightforwardly as possible. And clearly, had the TS-453Be failed instead (or in addition), I would have had a more acute situation on my hands.
Step one: resurrect the TS-328. I found a gently used one on eBay (for nearly $100 more than I’d paid for my brand new one five-plus years earlier, although the seller did also throw in a used eight-port GbE switch, but I digress…), which was shipped and arrived promptly. I pulled the HDDs out of the original TS-328 and reinstalled them in the new-to-me NAS in the same order as before. And then I crossed my fingers and punched the power button.
Huzzah; it booted! Since the replacement NAS had only recently been retired by its previous owner, I’d gambled that its firmware version was close-to-identical to that in my expired device, which ended up being the case. There was only a minor discrepancy between the new-to-me NAS’s motherboard firmware version and the newer version stored on my old NAS’s drives, which I was alerted to and an online-supplied firmware update remedied. And speaking of online, I was glad to see that QNAP’s cloud service was smart enough to notice that the device now mated to my HDDs, therefore to my online account, had different hardware than was previously the case (a new MAC address at minimum) and insisted that I re-login and -associate the NAS with it first.
Now to fix my setup’s “chink in the armor” resulting from full-NAS failure potential. Some of you may already be familiar with the “3-2-1 backup rule”; Wikipedia has a concise summary:
The 3-2-1 rule…states that there should be at least 3 copies of the data, stored on 2 different types of storage media, and one copy should be kept offsite, in a remote location (this can include cloud storage). 2 or more different media should be used to eliminate data loss due to similar reasons (for example, optical discs may tolerate being underwater while LTO tapes may not, and SSDs cannot fail due to head crashes or damaged spindle motors since they do not have any moving parts, unlike hard drives). An offsite copy protects against fire, theft of physical media (such as tapes or discs) and natural disasters like floods and earthquakes.
While, as you’ll see in the paragraphs to follow, I’m not following the 3-2-1 rule to the most scrupulous degree—all of my storage devices are HDD-based, for example, and true offside storage would be bandwidth-usage prohibitive with conventional home broadband service—I feel, and hope you’ll agree, that I’ve followed it sufficiently, and that regardless the result is much more robust than it was before. It involves among other things pressing into service the two-drive QNAP TS-231K NAS that I’d also mentioned back in December 2020. I bought three (including a spare) 12 TByte used Hitachi enterprise SATA HDDs with five-year warranties for it from a well-known eBay retailer. Two of the three drives arrived reporting S.M.A.R.T warnings (197+198 sector count code combos, to be precise), but to the retailer’s credit, it replaced them promptly, even proactively sending replacements ahead of the originals’ return.
For my Macs, on which the “primary copy” of the data is stored, implementing the 3-2-1 rule was particularly straightforward. Modern MacOS versions support Time Machine configuration for multiple destinations, which the utility rotates among automatically for consecutive backups. While this means that each backup likely ends up being bigger (i.e., taking longer) than before, given that the precursor backup to that same destination was older than with a conventional single-destination alternative setup, it also means that if one destination fails, you’ve still got relatively current backups available at alternate destinations. In my case, there are two backup destinations, the Time Machine-tailored partitions on the TS-231K and TS-324. And counting the Mac source, you end up with three dataset copies total, if you’re not already keeping track.
What about the Windows systems? Again, the “primary copy” of the data is located on their SSDs. I run Backup and Restore sessions from them to the TS-324 every early-Saturday morning (since they tend to swamp Wi-Fi while in progress). And every early-Sunday morning, the QNAP HBS 3 Hybrid Backup Sync utility then does a full mirror of the archived Windows backup data from the TS-324 to the TS-231K (over Cat 5 this time, but still, why not do this while we’re still asleep?). This time, if one NAS fails, the backup data on the other NAS is no more than a week old. And once again, I end up with three total dataset copies.
The TS-453Be is a bit more complicated. Here, the primary copy of the data is stored on its four-HDD RAID 5 array. I’ve long had an external 2.5” HDD USB-tethered to it for daily sync purposes, which I can quickly grab (theoretically, at least) in case of fire or another emergency. And now, once again on Sunday mornings, the TS-453Be also does a full mirror to the TS-231K.
“Quickly grab” leads to my final discussion topic, involving the different-locations angle on the 3-2-1 rule. As I’ve already confessed, none of my backups are located offsite. However, I’ve installed the TS-231K upstairs in my office (at least for now, until I lose my sanity due to the constantly-clattering-HDDs din), still connected to the router over wired GbE, albeit now with a two-switch hop intermediary, as well as to the two other NASs and other LAN devices. And, as with the TS-324, the TS-453Be manages controlled shutdown of the TS-321K in response to premises power loss in coordination with their common NUT software and my APC UPS.
As I’ve mentioned before, the furnace room downstairs acts as my networking nexus. The probability for fire caused by the one of the furnaces (or any of the other equipment, for that matter) in that room is non-zero, and since that “other equipment” includes the hot water heater, fluid-delivered compromise of the NASs there is also a possibility. And given that “downstairs” is also “ground level”, an outside-sourced fire is also an ongoing concern, one accelerated of late due to climate change-induced environmental effects. But, thinking as I write these words, since my office is directly above the furnace room…yeah, having the TS-231K in my office probably isn’t wise, noise-wise or otherwise. Time to figure out somewhere else to put it.
With that, I’ll wrap up for today and welcome your thoughts in the comments!
—Brian Dipert is the Editor-in-Chief of the Edge AI and Vision Alliance, and a Senior Analyst at BDTI and Editor-in-Chief of InsideDSP, the company’s online newsletter.
Related Content
- Lightning strikes…thrice???!!!
- The whole-house LAN: Achilles-heel alternatives, tradeoffs, and plans
- NAS successors add notable features
- Disassembling a Cloud-compromised NAS
- Exposing a NAS security issue
- NAS failure launches a data recovery mission
- Teardown: Disposable 1-Tbyte NAS drives: How’d that happen?
The post Beefing up backup appeared first on EDN.
Earplugs ready? Let’s make some noise!
Usually, noise annoys. Occasionally, it can be a valuable tool. Surprisingly, there is a whole palette of noise colors. This design idea (DI) shows good ways of generating the commonest and most useful ones, which are white and pink and optionally brown. At its heart is a microcontroller programmed to generate raw white noise and a much-improved filter to convert that into pink.
Wow the engineering world with your unique design: Design Ideas Submission Guide
Sources of random electronic noise are all too common. The most controllable source of the white stuff is probably the well-known pseudo-random binary sequence (PBRS) generated by a shift register with feedback, and that will be our starting-point. A fairly standard implementation using logic ICs is shown in Figure 1.
Figure 1 A pseudo-random sequence generator (PRSG) built with standard logic ICs generates wideband white noise.
Three 8-bit devices (or dual 4-bit ones, as here) are concatenated to make a 23-bit shift register. The outputs from bits 18 and 23 are EXORed and inverted (or EXNORed) and fed back to the input, producing a pattern of bits which appears random though it repeats every 223-1 clock cycles, which at a clock rate of 240 kHz is about every 35 seconds. (That “-1” represents the illegal, locked-up, all-1s condition, against which the simple reset circuitry guards.) For frequencies up to about a tenth of the clock rate, the spectrum is virtually identical to that of pure and ideal white noise. It has the same intensity in any given bandwidth: its spectrum is flat. For other colors, we just need to filter it appropriately.
A cheap microcontroller makes a good PRSGSo far, so conventional. But why use 62-pins-worth of chippery plus at least ten discretes when a single package with 8 pins—or even fewer—will suffice? The schematic for that is too boring to show—imagine a rectangle fed with power (decoupled with a single cap) and having a GPIO pin delivering the PRBS—but here is the MPASM assembly-language code for doing it with on a Microchip 12F1501 PIC. (It should open cleanly with Notepad.) The code is logically and functionally identical to Figure 1’s circuit and can easily be modified for use in different low-end PICs, while the underlying logic can be ported to any other suitable µC. (Back in the day, NatSemi made the MM5837, an 8-pin, 15-V, PMOS white noise source using 17 stages. It’s long obsolete, but this could be a nice substitute for it.)
We now have pseudo-random white noise with a spectrum ranging roughly from 30 mHz to a few MHz, which is just a few more octaves than we need. (There are nulls at multiples of the bit rate, which is 267 kHz for this PIC version.) It’s still in the form of a pulse stream, which needs band-limiting before we have truly useful white noise. For pink noise, further filtering is needed so that all octaves (or other frequency ratios) have the same intensity, which is what we need for audio use. The circuitry to do all this is shown in Figure 2.
Figure 2 A pseudo-random signal—white noise—is tailored to fit within the audio band, and further filtered to produce pink noise as well.
The PRSG could use Figure 1’s discrete logic, but the micro version is electrically quieter (hah!) as well as being more compact and, ignoring programming overheads, cheaper. The pulse-shaping network turns the rail-to-rail rectangular pulse stream into trapezoids having a defined level (about 1.2 V pk-pk) and with slew rates less than those of the downstream op-amps. The 20 kHz low-pass filter does what it says. (That “20 kHz” isn’t its 3-dB corner, but a label for its function.) Only high-pass filtering from ~20 Hz is now needed to give white noise within the audio spectrum and at a level of just greater than -10 dBu.
A new and improved pink noise networkPink noise is a little trickier and needs a more complex filter to give the necessary 3.01 dB/octave (10 dB/decade) slope. Most published solutions use four RC sections as well as the basic R and C shown in Figure 2 as R10 and C11, with some having even fewer. (And many appear to be clones.) Those RCs have their component values spaced by around √10, but some thought and playing with LTspice showed that far better results come from using a few more stages, and ratios close to the cube root of 10. Figure 3 shows the calculated response of Figure 2’s seven-stage network without the added high- or low-pass filters. Even with E12 component values, it is almost a straight line, unlike the clones’ responses.
Figure 3 The response of the new 7-stage pink noise filter, taken in isolation.
A gain stage brings the pink noise’s RMS level up to -10 dBu to match that of the white, while a selection switch, level-control pot, output buffer, and rail-splitter (A2d etc.) complete the design. Figure 4 shows the calculated response curves along with the worst-case deviations from ideal.
Figure 4 The calculated responses of the completed design, showing the mask for IEC 60268-1 limits and the peak errors of the filters.
The output is now within ±0.2 dB of the ideal from 24 Hz to 21 kHz. With slightly softer HP and LP filters even that could be improved on, especially by reducing the ripple at the ends of the spectrum, but they were calculated to meet the requirements of IEC 60268-1, which refers to the performance, testing, and application of audio systems.
Some further notes on the circuitryFigure 2’s circuit was designed (and tested) to use a nominal 5 V (or ±2.5 V) rail (what are cheap power banks or surplus USB PSUs for?) but the extremes of 2.7 V (three end-of-life AA cells) and 5.5 V (USB limit) allow for other powering options.
The shaping network ensures that the output will be reasonably constant no matter what the rail voltage may be, and the signal levels of -10 dBu avert clipping even for low rail voltages. With a guaranteed 5 V supply, A2c could have about 7 dBs of extra gain before clipping starts. The output crest factor—the peak-to-RMS ratio—is fairly high, at around 5:1 or 14 dB.
A1a uses the MCP6022 rather than the MCP6004 (or MCP6002s, of course) because the latter can only just cope with the shaped pulses and distorts them noticeably. The gain needed after the pink noise network is rather high, so A1b is also a ’6022: faster, and with lower input offset. The ’6004 works fine in all the other positions. The components between A2c and the output aren’t mandatory, just good practice.
Current consumption was about 6 mA, unloaded.
Brown(ian) noise generationAdding brown—or red, or Brownian—noise generation is simple, as sketched in Figure 5. All that’s needed is an RC network, giving a 6.02 dB/octave (20 dB/decade) fall-off with increasing frequency, followed by lots of gain. (Some sources specify two cascaded 3 dB/octave—pink—networks, but surely that’s more expensive and less accurate?) The values shown give a -10 dBu output (~2.6 V pk-pk) to match the other responses. Obviously, the switching shown in Figure 2 needs to be changed if you want to add this. For use in isolation, precede it with at least the 20 Hz high-pass filter, or your woofers may try to simulate a small earthquake.
Figure 5 This simple circuit converts white noise into Brownian.
Implementing other pseudo-random sequence lengthsThe PIC- (or other µC-)based PRSG may have other uses needing different sequence lengths. It’s trivially easy to change the code as long as only two taps from the (virtual) shift register are needed; more taps would need more XNOR code. This reference has a comprehensive table showing the necessary taps as well as a lot of useful background information.
Longer sequences just need extra registers, with each one adding a single processor cycle; the XNOR logic takes longer to run (12 cycles) than the shifting. Eight concatenated registers with feedback from bits 62 and 63 would give a sequence that only repeats after some 1.2 million years, assuming a clock rate of 16 MHz (4 MHz instruction rate). Using 10 registers, tapped at bits 70 and 79, ups that to around 77 billion years. Long enough? If not, the above reference gives many 2-tap solutions for up to 167 bits. You might then want to invest in some ultra-ultra-long-life batteries or a really, really reliable UPS.
—Nick Cornford built his first crystal set at 10, and since then has designed professional audio equipment, many datacomm products, and technical security kit. He has at last retired. Mostly. Sort of.
Related Content
- Ultra-low distortion oscillator, part 2: the real deal
- Squashed triangles: sines, but with teeth?
- 1/f Noise—the flickering candle
- Create noise and signals with software
- The pink noise tangent principle
The post Earplugs ready? Let’s make some noise! appeared first on EDN.
Design considerations in high-speed fiber networks
Fiber optic cables play a key role in high-speed network expansion. As wireless and cellular network complexity increases, fiber networks supporting elevated bandwidth, latency and data transmission rate demand have become essential. How should electronics design engineers incorporate this technology into their projects?
It’s important to note that that fiber network cables that were once considered cutting-edge have become legacy technology sooner than professionals could have anticipated. Even fiber has undergone significant changes since its inception, boasting advancements like fusion splicing and single-mode cables.
With advancement comes expansion. In August 2024, the Federal Communications Commission (FCC) announced it would move forward with targeted investments in fifth generation (5G) wireless cellular technology, distributing around $9 billion to facilitate 5G-capable networks. This plan will require massive, high-density fiber infrastructure.
Traditionally, mobile backhaul networks used copper time division multiplexing (TDM) circuits, which have become a legacy technology. Fiber cables are one of the only alternatives that make sense for longevity. However, while fiber deployment guarantees lasting improvements, engineers must still make proactive design decisions to ensure a lifetime of use from the upgrades.
How fiber cables fit into modern infrastructure
The rapid proliferation of advanced wireless and cellular network infrastructure has outpaced the capabilities of supporting components. Fiber cables are the clear alternative because they offer benefits like space efficiency, superior bandwidth, higher data transmission rates, and long-distance signal integrity.
Already, the United States has made progress toward a fiber-based future to support rapidly proliferating high-speed networks. As of December 2023, 60.4% of fixed connections in the country were coaxial cable, while 23.1% were fiber optic. Copper wire, fixed wireless, and satellite made up the remaining percentage.
Although the fiber adoption rate will inevitably increase, laying the groundwork for advancement is no longer enough; electronics design engineers must future-proof modern infrastructure. They can keep computing resource demand from outpacing infrastructure capabilities within the coming decades.
Designing high-speed networks with fiber
Electronics design engineers should first consider which type of fiber cable will suit their needs well into the future. While the larger 62.5-micron core of multimode cables enables higher data transmission rates, its range is limited. Single mode may be more expensive upfront, but it helps facilitate a more expansive network.
Strand count is another important consideration. While surpassing the project’s minimum requirements may seem unnecessarily expensive, it helps future-proof the infrastructure. Engineers should consider how factors like urbanization and wireless cellular technology will affect their design’s efficacy over the coming decades.
Of course, deploying fiber requires time, resources, and money. The median cost of underground deployment is $16.25 per foot, while the median aerial cost is around $6.49 per foot. Labor accounts for 50% to 90% of the total cost. Professionals should conduct a feasibility study—considering possible routes and the practicality of expansion—to determine which designs and areas to prioritize.
Will government policies affect electronic component availability? Will business leaders be able to secure research and development grants? Future-proofing wireless and cellular networks involves considering every possibility. However, electronics design engineers must be careful not to overcomplicate planning.
Ellie Gabel is a freelance writer as well as an associate editor at Revolutionized.
Related Content
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The post Design considerations in high-speed fiber networks appeared first on EDN.
NUBURU receives notice of non-compliance with NYSE
Diamfab and HiQuTe Diamond partner on synthetic diamond for power electronics
My own designed linefollower robot
Just wanted to share my project that I recently finished. I think it's the biggest project so far where I designed the electronics circuit and PCB layout. I also created MCU firmware and PC application for debugging and controlling the robot. The whole project is availiable on my github https://github.com/konrad1s/LineFollower-Kwark if you have any questions, feel free to ask [link] [comments] |
Never ever use a rubbing alcohol to clean old acrylic plastics
Or this will happen. Deep cracks and partial delamination it is. Tried to clean old HPDL-1414 display with isopropyl alcohol. Thankfully I have 6 more to work with. [link] [comments] |
First time desoldering all the thru-hole and most of the smd’s
Weekly discussion, complaint, and rant thread
Open to anything, including discussions, complaints, and rants.
Sub rules do not apply, so don't bother reporting incivility, off-topic, or spam.
Reddit-wide rules do apply.
To see the newest posts, sort the comments by "new" (instead of "best" or "top").
[link] [comments]
Power Tips #135: Control scheme of a bidirectional CLLLC resonant converter in an ESS
A single-stage isolated converter, such as a bidirectional capacitor-inductor-inductor-inductor-capacitor (CLLLC), is a popular converter type in energy storage systems (ESSs) to save system costs and improve power density. The gain curve of an CLLLC is flatter, however, when the switching frequency (fs) is higher than the series resonant frequency (fr) the gain curve will be undesirably flat. The parasitic capacitance of the transformer and MOSFETs would also significantly impact the converter gain [1], which will lead the converter’s output voltage out of regulation. In this power tip, I will introduce a CLLLC control algorithm and a synchronous rectifier (SR) control method to eliminate this nonlinearity, using a 3.6-kW prototype converter to verify the performance. Figure 1 is a block diagram of a residential ESS.
Figure 1 Residential ESS block diagram with bidirectional power factor correction (PFC)/inverter, bidirectional DC/DC converter, and maximum power point tracking (MPPT). Source: Texas Instruments
Design considerations in the control stageFigure 2 shows the circuit topology of the full-bridge CLLLC resonant converter with the parasitic capacitors. This topology consists of a symmetric resonant tank and full-bridge structure.
Figure 2 The circuit topology of the full-bridge CLLLC converter with parasitic capacitors. Source: Texas Instruments
Figure 3 shows the ideal gain curve of the CLLLC. Similar to an LLC converter, variable frequency control is a popular control scheme for a CLLLC resonant converter.
Figure 3 An ideal CLLLC gain curve that uses variable frequency control. Source: Texas Instruments
As mentioned earlier, the gain curve is flat when fs exceeds fr. Moreover, with the power level increasing, the converter needs to parallel more FETs on the battery side to handle more current, which means that the output capacitance (Coss) on the output full-bridge FETs will be extremely large. Considering the parasitic parameters of transformer interwinding capacitance and Coss, the non-monotonic gain curve at high frequency is serious, which corresponds to a light-load condition, as shown in Figure 4.
Figure 4 The CLLLC gain curve considering parasitic parameters such as the transformer interwinding capacitance and Coss. Source: Texas Instruments
In this case, frequency control is useless. Hiccup mode is a popular method for addressing CLLLC resonant converter nonmonotonic features, but this method is not suitable in battery applications because the converter needs to deliver high current when the battery voltage is low. Pulse-width modulation (PWM) and phase-shift control could resolve this issue, but PWM control will make the transistors work at a hard-switching state, which decreases efficiency and limits the operational frequency. Therefore, phase-shift control is a better choice.
Control logicFigure 5 shows the frequency and phase-shift mixed-control scheme diagram. The battery voltage is low during startup, so the converter needs to soft start with low charging current to limit the high current spike and prolong the battery life. It is a limited effect to soft start from a high frequency if the resonant inductor value or frequency is not high enough. When the battery charges to near full capacity, it will trickle charge with a small current and maintain a constant voltage. Both cases correspond to a light-load condition for the converter. At light load, the output voltage tends to rise because of the parasitic capacitance and could eventually go out of regulation based on previous analysis; phase-shift control can help regulate the output voltage in this state. The controller’s calculation result decides whether the converter needs to enter phase-shift mode or not.
Figure 5 The control scheme in different charge states. Note, the battery voltage is low during startup, so the converter needs to soft start with low charging current to limit the high current spike and prolong the battery life. Source: Texas Instruments
Figure 6 shows the modulation switch between frequency and phase shift. When the load decreases, the frequency will increase to regulate the output voltage. If the calculated maximum frequency is higher than the setting value, the converter will enter phase-shift modulation; then when the load increases, the phase-shift angle will decrease in order to regulate the output voltage. The converter will enter frequency mode again when the phase-shift angle decreases to zero.
Figure 6 The control scheme between frequency and phase-shift modes. When the load decreases and the phase-shift angle is zero, the frequency will increase to regulate the output voltage (frequency mode). If the maximum frequency is higher than the setting value, the phase shift angle decreases to regulate output voltage (phase shift mode). Source: Texas Instruments
Problems caused by parasitic capacitanceThe MOSFETs’ Coss also has this effect under phase-shift mode; the tank current will oscillate with these capacitors, as shown in Figure 7.
Figure 7 The tank current waveforms under phase-shift mode in open loop. Source: Texas Instruments
Figure 8 plots a gain comparison of a CLLLC converter with and without considering MOSFET Coss. According to the figure, there will be fluctuation in the gain curve. In this case, the controller may adjust the phase-shift angle to the wrong direction under closed-loop control, resulting in a large current spike.
Figure 8 The gain curve under phase-shift mode with and without COSS. Source: Texas Instruments
Solution for the gain problemTo eliminate the non-monotonic of gain, employing SR control as shown in Figure 9 could resolve this issue. Turning on either two upper or two lower SR switches at the same time during the tank current oscillation period will temporarily short the transformer’s secondary-side winding, such that Coss will not involve the resonant.
Figure 9 Proposed SR control scheme to eliminate the non-monotonic of gain. Source: Texas Instruments
Figure 10 shows the test result; there is no oscillation compared to Figure 8. For more detailed analysis and test results, see reference [2].
Figure 10 Gain curve under phase-shift mode using the proposed control scheme (grey line). Source: Texas Instruments
Experimental resultsA prototype [3] uses this control scheme to verify the performance. Figure 11 shows the soft-start waveform and Figure 12 shows the tank current waveforms under phase-shift mode with the proposed control scheme.
Figure 11 The phase-shift soft start with 750 W of output power. Source: Texas Instruments
Figure 12 The tank current waveforms under phase-shift mode with the proposed scheme. Source: Texas Instruments
Figure 13 and Figure 14 show the frequency/phase-shift modulation switch test. From the test waveforms, the startup current is limited within 28 A with 750 W of output power. There is no oscillation in the tank current and the converter could change the modulation smoothly in different working conditions.
Figure 13 The phase-shift and frequency modulation switch: frequency mode with a 5-A load. Source: Texas Instruments
Figure 14 The phase-shift and frequency modulation switch: phase-shift mode with a 1-A load. Source: Texas Instruments
ConclusionThe proposed frequency and phase-shift mixed-control scheme limits the inrush current during the startup stage and makes the gain linear at a light load condition. The converter could switch between frequency modulation and phase shift modulation smoothly. Besides, phase-shift control also introduces the non-monotonic gain issue and makes the current oscillate in the designs that have large COSS. The proposed SR control method can help solve the current oscillation issue and makes the gain monotonic.
Guangzhi Cui is a System Engineer at Texas Instruments, where he is responsible for developing power supply design. Guangzhi earned his M.S. degree in Electrical Engineering from Hong Kong University of Science and Technology in 2016; and his B.S. degree of Engineering from Hunan University in 2014.
Related Content
- Power Tips #102: CLLLC vs. DAB for EV onboard chargers
- Power Tips #92: High-frequency resonant converter design considerations, Part 2
- Power Tips #134: Don’t switch the hard way; achieve ZVS with a PWM full bridge
- Power Tips #117: Measure your LLC resonant tank before testing at full operating conditions
- Power Tips #97: Shape an LLC-SRC gain curve to meet battery charger needs
- Power Tips #94: How an upside-down buck offers a topology alternative to the non-isolated flyback
References
- Lee, Byoung-Hee, Moon-Young Kim, Chong-Eun Kim, Ki-Bum Park, and Gun-Woo Moon, “Analysis of LLC Resonant Converter Considering Effects of Parasitic Components.” Published in INTELEC 2009 – 31st International Telecommunications Energy Conference, Incheon, Korea (South), Oct. 18-22, 2009, pp. 1-6.
- Tai, Will, Guangzhi Cui, and Sheng-Yang Yu, “Gain Optimization Control Method for CLLLC Resonant Converters Under Phase Shift Mode.” Published in PCIM Europe 2024; International Exhibition and Conference for Power Electronics, Intelligent Motion, Renewable Energy and Energy Management, Nürnberg, Germany, June 11-13, 2024, pp. 2513-2518.
- Cui, Guangzhi. n.d. “3.6kW Bidirectional CLLLC Resonant Converter Reference Design.” Tex as Instruments reference design No. PMP41042. Accessed Nov. 6, 2024.
The post Power Tips #135: Control scheme of a bidirectional CLLLC resonant converter in an ESS appeared first on EDN.
Aeluma wins NASA contract to advance quantum dot photonic integrated circuits for aerospace and AI
Magic spinny
I got bored and made a bench power supply to power my magic spinny and my blinkys. [link] [comments] |
New Motion Controller available for four different motor technologies.
A motion controller with even more possibilities: With the new MC 3602 B and MC 3606 B motion controllers, the selection and commissioning of drive systems is now even simpler. With the compact MC 3602/06 B, DC-motors, brushless DC-motors and linear motors can be operated with the typical position encoders as servo drive in accordance with CiA 402. Also new is the support of stepper motors with encoder as servo or without encoder in open-loop operation. The products “speak” EtherCAT, CANopen, RS232 and USB.
The new MC 3602 B variant is equipped with up to 2 A continuous output current for smaller motors and the MC 3606 B variant has up to 6 A continuous output current for medium-sized motors which simplifies work for engineers. For applications in which more than one motor technology is used, just one motor controller and a GUI are needed. The free FAULHABER “Motion Manager 7” software is available for installation and commissioning. With this, the drive is running in just a few steps. All main operating modes of the CiA 402 servo drive are offered. Integration is performed via CANopen or RS232, and for commissioning, primarily the USB interface is used. Additionally, an optional EtherCAT module enables cycle times as short as 1 ms. In conclusion, the motion controllers can also be operated without central control in stand-alone mode.
Everything from a single sourceIn combination with FAULHABER motors, the MC 3602 B and MC 3606 B deliver a sophisticated drive system with extensive protective functions. The products were developed for the operation of motors with ironless winding and offer high dynamics here. Standard motors – such as NEMA stepper motors – can likewise easily be operated with the MC 3602/06 B. They thereby represent a solid basis for a range of applications. Regardless of whether the application uses a stepper motor in open-loop or closed-loop operation, or in combination with brushless, linear or DC servomotors, the MC 3602/06 B provides a solution for nearly every requirement – in industrial automation or in laboratory automation, robotics, semiconductor processing or in use with measurement systems.
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NEOTech Significantly Improves Wire Bond Pull Test Process
NEOTech, a leading provider of electronic manufacturing services (EMS), design engineering, and supply chain solutions in the high-tech industrial, medical device, and aerospace/defense markets, proudly announces a major advancement in its wire bond pull testing process, reducing manufacturing cycle time by more than 60% while maintaining industry-leading production yields of over 99.99%. This improvement reflects NEOTech’s commitment to continuous process enhancement and operational excellence.
The wire bond pull test is a critical method used to assess the quality and integrity of wire bonds in microelectronics. Leveraging extensive historical data and its exceptional process yield rate, NEOTech’s manufacturing engineers developed a robust random sampling methodology that ensures testing efficiency without compromising quality. The new sampling plan has dramatically reduced average testing time from 2.5 hours per assembly to approximately 1 hour per assembly.
This innovative process is fully compliant with the stringent requirements of MIL-PRF-38534 and MIL-STD-883, ensuring that NEOTech meets the highest quality and reliability standards. The process has been implemented on mission-critical, high-frequency RF assemblies — products recognized in the industry as highly complex and challenging to manufacture. NEOTech’s success in achieving these advancements demonstrates its expertise in addressing the rigorous demands of such sophisticated microelectronics applications.
“Achieving greater than 99.99% production yields is a remarkable milestone,” said Daniel De Haro, General Manager of the NEOTech Chatsworth site. “But our team didn’t stop there. They went above and beyond to implement innovative sampling techniques and streamline testing processes to significantly improve production cycle times. I’m incredibly proud of our engineers, technicians, and manufacturing teams for their dedication to excellence and their commitment to setting new benchmarks in microelectronics manufacturing.”
The transition to a sample-based testing methodology was supported by enhanced data collection and analysis, as well as the development of comprehensive training procedures. These efforts ensured that the NEOTech team could maintain its exceptional yield rates while increasing throughput and efficiency for its customers’ microelectronics circuit assemblies.
At the core of NEOTech’s success is its customer-centric approach. Offering a comprehensive suite of services — from design and prototyping to full-scale production and post-production support — NEOTech tailors its solutions to meet each customer’s specific needs. The company’s ability to provide personalized solutions, while also reducing time-to-market and optimizing costs, has earned it a strong reputation for delivering exceptional value.
With more than 40 years of heritage in electronics manufacturing, NEOTech specializes in high-reliability programs in the aerospace/defense industry, medical products, and high-tech industrial markets. NEOTech is well recognized as a premier EMS provider with in-depth experience manufacturing high-tech products and managing stringent US government requirements. For more information about NEOTech’s Microelectronics manufacturing capabilities, please visit www.NEOTech.com/microelectronics.
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Well i made a post 30 seconds ago thinking i found my problem, but then i found somthing else lol
submitted by /u/the_potato_of_doom [link] [comments] |
I think i just found the issue thats been plauging my trs-80
I think this ceramic disk has gone bad, the dark line is much clearer in real life than in the photo too [link] [comments] |
"Habit tracker" I designed and built
submitted by /u/Dycus [link] [comments] |
EDA software uses AI to boost productivity
Keysight’s EDA 2025 software leverages AI, ML, and Python integrations to reduce design time for complex RF and chiplet products. The tool suite enhances data manipulation, integration, and control of advanced simulators, enabling seamless workflows across multiple tools.
AI-optimized workflows allow engineers to move from simulation to verification and compliance with greater confidence. The software simulates fast digital interconnects using end-to-end component models and standards-compliant measurements, creating an accurate digital twin for complex electronic designs.
According to Keysight, the core benefits of the EDA 2025 software portfolio include:
- RF circuit design: Accelerate RF design with open, automatable workflows, Python integration, and multi-domain simulation. The Python toolkit consolidates load pull data into unified datasets for AI/ML model training.
- High-speed digital design: Create precise digital twins for complex standard-specific SerDes designs, including UCIe chiplets, memory, USB, and PCIe, with the Advanced Design System (ADS) 2025 release.
- Device modeling and characterization: Reduce model re-centering time by 10X through AI/ML capabilities in the IC-CAP 2025 release, while Python integrations streamline and automate the modeling process.
Learn more about Keysight EDA 2025 at the virtual launch event on December 3, 2024. To register, click here.
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Collaboration drives innovation in software-defined vehicles
Siemens is integrating its embedded automotive software with Infineon’s AURIX TC4x MCUs to enable advanced features in software-defined vehicles (SDVs). This collaboration supports OEMs in achieving production readiness for next-generation SDV capabilities.
Siemens’ Capital Embedded AR Classic software, based on AUTOSAR Classic Release R20-11, leverages an AUTOSAR-compliant architecture to enable the multicore, functional safety, and cybersecurity features of the AURIX TC4x. This pre-validated, feature-rich software simplifies OEMs’ homologation processes for functional safety and cybersecurity compliance.
The AURIX TC4x microcontrollers from Infineon play a critical role in automotive systems, managing functions like electric powertrain, battery management, ADAS, radar, and chassis. They combine enhanced power and performance with advances in virtualization, AI-based modeling, functional safety, cybersecurity, and networking, enabling next-gen E/E architectures and software-defined vehicles.
To learn more about Siemens’ AUTOSAR embedded software development capabilities, click here.
Siemens Digital Industries Software
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