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Electric motors are everywhere—from the cars we drive to the appliances in our homes—but most rely on rare earth magnets that come with high costs and environmental challenges. A new wave of innovation is changing that story. Magnet-free electric motors are proving that smart engineering can deliver powerful performance without depending on scarce materials.

By removing rare earths from the equation, these designs promise cleaner supply chains, more sustainable production, and fresh opportunities for industries ranging from electric vehicles to renewable energy. It’s a shift that could redefine how we think about powering the future.

Why rare earths matter

Rare earth magnets, especially neodymium and dysprosium, have been the secret ingredient behind the compact, high-torque motors that power everything from electric vehicles to wind turbines. Their ability to deliver strong magnetic fields in small packages has made them indispensable in modern motor design.

But there is a catch: mining and processing rare earths is energy-intensive, environmentally challenging, and geographically concentrated in just a few regions of the world. This creates supply chain risks, price volatility, and sustainability concerns that ripple across industries.

By understanding why rare earths became so central to electric motors, we can better appreciate the significance of moving beyond them—and why magnet-free designs are more than just an engineering curiosity. They represent a strategic shift toward resilience, affordability, and cleaner technology.

How do you pull without a magnet

So how do you build a motor without magnets? The answer lies in clever engineering that takes advantage of the natural properties of materials and the geometry of the motor itself. Instead of relying on powerful magnets to create motion, magnet-free designs use principles like reluctance torque—where the rotor naturally aligns with the path of least magnetic resistance—or induction, where currents in the rotor generate the force needed to spin.

These approaches may sound technical, but the idea is simple: by rethinking the fundamentals, engineers can coax motors into delivering the same performance we expect, without the rare earth magnets. The result is a motor that can be lighter, more affordable, and easier to manufacture at scale. And because these designs lean on widely available materials, they sidestep the supply chain bottlenecks that have long plagued magnet-based motors.

Why it matters

Magnet-free motors are not just an engineering breakthrough; they are a practical step toward cleaner, more resilient technology. By removing rare earths, manufacturers can cut costs, ease supply chain pressures, and reduce environmental impact.

The benefits ripple across industries: in electric vehicles, they promise more affordable and sustainable mobility; in renewable energy, they support wind turbines and other systems without relying on scarce materials; and in industrial machinery, they offer reliable performance with simpler, more scalable production.

In short, magnet-free motors matter because they combine innovation with real-world impact, helping power a future that is smarter, greener, and less dependent on limited resources.

Figure 1 Today’s magnet-free electric motors deliver high efficiencies for heavy-duty and commercial vehicle applications. Source: Advanced Electric Machines

Working principles of magnet-free motors

For learners, makers, and anyone with a curious engineering mind, the real excitement lies in how magnet-free motors actually work. Instead of relying on rare earth magnets to generate motion, these designs tap into fundamental physics—using reluctance torque, induction, or clever rotor geometry to produce rotation.

Think of it as guiding the motor to “want” to align itself with paths of least resistance, or harnessing currents induced in the rotor to drive movement. The beauty is that these principles are elegant, scalable, and rooted in concepts every engineer encounters early in their studies. By revisiting the basics with fresh eyes, magnet-free motors show how fundamental science can be reimagined to solve modern challenges.

At their core, magnet-free motors rely on clever ways to generate motion without permanent magnets, using principles that every curious engineer can appreciate.

That is, reluctance motors exploit the tendency of a rotor to align with the path of least magnetic resistance, producing torque through geometry rather than magnets. Induction motors create rotation by inducing currents in the rotor with alternating fields, a design that is simple yet powerful. Synchronous reluctance motors combine aspects of both, offering efficiency and control that rival traditional designs.

Each approach shows how fundamental physics—magnetic fields, current flow, and mechanical alignment—can be harnessed in different ways to achieve the same goal: reliable rotation. For learners, makers, and innovators, these principles are a reminder that rethinking the basics can unlock new possibilities for sustainable engineering.

Figure 2 A synchronous reluctance motor demonstrates magnet‑free operation with smooth torque characteristics. Source: ABB

It’s important to note that not all reluctance motors are the same. A synchronous reluctance motor (SynRM) runs in step with the supply frequency, using flux barriers in the rotor to align with the path of least magnetic resistance, delivering smooth torque and efficiency. A switched reluctance motor (SRM), by contrast, relies on sequentially energizing stator phases to pull a simple steel rotor around; it’s rugged and powerful but tends to be noisier with more torque ripple.

Sitting between these designs is the permanent magnet assisted SynRM (PMA‑SynRM), which adds small magnets to stabilize the field and boost efficiency while still using far fewer rare earths than traditional permanent magnet motors. Together, these variations show the spectrum of approaches engineers use to balance performance, simplicity, and sustainability.

Unlocking SynRM performance with VFDs

While SynRMs deliver smooth torque and efficiency, they typically need a variable frequency drive (VFD) to start and stay synchronized with the stator’s rotating field. The VFD supplies control frequency and voltage, making these motors flexible but dependent on modern power electronics.

By contrast, older induction motors could start “across the line”—plugged directly into the grid—though at the cost of high inrush currents and less precise control. This reliance on VFDs underscores how magnet-free motor innovation is inseparable from advances in drive technology, reminding designers that motor and electronics progress go hand in hand.

As a worthy side note, VFD is the electronic brain that makes modern motors flexible. By adjusting the frequency and voltage, it lets a motor start gently, avoid the punishing inrush currents of direct grid connection, and run at variable speeds with precision. For SynRMs, the VFD is essential—it keeps the rotor locked in sync with the stator’s rotating field. Older induction motors could start “across the line” without such electronics, but that simplicity came at the cost of efficiency and control.

Figure 3 A compact VFD module suitable for driving 3-phase SynRM motors supports efficient control in both industrial and household applications. Source: Mean Well

From a design standpoint, the dependence on VFDs is both enabling and constraining. On the enabling side, drives unlock efficiency gains, smoother torque, and precise speed control that make SynRMs competitive with permanent-magnet machines.

On the constraining side, they add cost, require integration expertise, and shift part of the reliability burden from the motor to the electronics. For engineers, it means evaluating magnet-free motors is not just about rotor geometry; it’s about the total system, where sustainability benefits must be balanced against drive complexity and lifecycle economics.

Note that modern control strategies such as field-oriented control (FOC) and sensorless vector control extend the capabilities of these VFDs. FOC regulates stator currents to deliver precise torque and flux, while sensorless vector methods estimate rotor position without mechanical sensors, reducing cost and improving reliability. Together, they allow SynRMs—and other magnet-free designs—to match the responsiveness and efficiency of permanent-magnet machines.

Quick FOC take: Field‑oriented control does not have to be daunting. For makers eager to experiment, compact FOC shields/modules provide a straightforward, low‑power entry point. The Arduino SimpleFOC Shield is a practical example, lowering barriers and making hand-on exploration accessible.

Figure 4 SimpleFOC Shield empowers accessible FOC experimentation for Arduino users. Source: Author

Next, getting into design significance, the combination of magnet-free motor design, advanced VFDs, and intelligent control strategies has broad implications. Engineers gain access to motors that are lighter, more affordable, and easier to manufacture at scale, while sidestepping rare-earth supply chain constraints.

In the long run, magnet-free motors not only reduce dependence on scarce materials but also align with global sustainability goals, positioning them as a cornerstone of next-generation electrification across industries spanning from manufacturing to consumer appliances.

Closing thoughts

Magnet-free motors are steadily moving from concept to reality, driven by both maker ingenuity and industry ambition. With BMW and Mahle advancing externally excited synchronous motors to reduce rare-earth dependence, and Tesla having already demonstrated the scalability of induction motors, the message is clear: sustainable propulsion can deliver performance without compromise.

For makers and engineers alike, this is an invitation to experiment boldly and rethink motor design fundamentals, because the next leap in innovation may emerge as much from a personal workbench as from an automotive R&D lab.

T. K. Hareendran is a self-taught electronics enthusiast with a strong passion for innovative circuit design and hands-on technology. He develops both experimental and practical electronic projects, documenting and sharing his work to support fellow tinkerers and learners. Beyond the workbench, he dedicates time to technical writing and hardware evaluations to contribute meaningfully to the maker community.

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The post Magnet-free electric motors: Driving innovation beyond rare earths appeared first on EDN.

Following the introduction of Industry 4.0, power electronics are becoming more significant in both digital and industrial infrastructures. Factories, energy systems, and data centers are getting smarter and more connected. This requires efficient power solutions that offer high power density and can scale with them.

Semiconductors are expected to deliver performance beyond the limits of conventional silicon-based power devices. Wide-bandgap (WBG) materials such as silicon carbide (SiC) and gallium nitride (GaN), as well as novel approaches to designing, packaging, and controlling power devices, are helping achieve the main goals of Industry 4.0: efficiency, flexibility, scalability, and intelligence.

800-VDC power architecture

One of the most significant changes introduced in the power system is the move of data centers to 800-VDC distribution, as detailed in an Nvidia white paper. Traditional systems that use AC and low-voltage DC can’t keep up with the speed and growth needs of AI-based workloads. High-performance computing clusters, especially those that support generative AI and machine learning, demand more power and should use it as efficiently as possible.

By raising the distribution voltage to 800 VDC, operators can reduce the current for a given power level. This approach offers the benefits of reduced I2R losses and the ability to use thinner wires. Overall, efficiency can thus be increased, and more power can be integrated in the same area or volume. The design also becomes less complicated because there are fewer steps in the conversion process.

This new architecture directly affects semiconductor requirements. Power devices need to perform well at higher voltages with minimum loss and support fast switching. Chipmakers and manufacturers are developing power solutions to support Nvidia’s 800-VDC power architecture reference design for next-generation AI factories to improve efficiency and reduce power losses.

To support gigawatt-scale AI factories based on an 800-VDC power architecture, Flex, for example, introduced a new reference design (Figure 1) that integrates power, liquid cooling, and compute capabilities into a modular assembly. This prefabricated solution streamlines the implementation of 800-VDC architectures and, according to the company, enables 30% faster deployment than conventional systems.

Figure 1: Flex’s reference design accelerates giga-scale AI factory deployment through a modular and preassembled structure. (Source: Flex) SiC semiconductor advances

Due to its physical properties, such as high breakdown voltage, low switching losses, and high thermal conductivity, SiC can operate efficiently and provide high reliability in high-voltage and high-power environments.

At the high-voltage end, SiC devices are going into the multi-kilovolt range. More devices are gaining ratings above 1,200 V, making SiC more common in places where silicon-based power devices used to be the norm.

Navitas Semiconductor recently announced the availability of samples for its 2,300-V and 3,300-V high-voltage SiC products, specifically designed to increase efficiency in AI data centers, power grids, and renewable energy infrastructure. The devices, available in discrete, module, and known-good-die formats, are based on the company’s Trench-Assisted Planar architecture.

This semiconductor structure optimizes electric-field management, significantly reducing voltage stress and improving avalanche robustness compared with traditional trench- or planar-MOSFET designs. It also achieves lower RDS(on) at high temperatures and better current spreading.

As power devices improve, their packaging becomes increasingly crucial to the overall performance of the system. Newer packages are designed to reduce parasitic inductance, improve thermal management, and handle larger current densities.

These advancements in packaging technology enable higher performance and efficiency gains. Texas Instruments (TI), for example, recently unveiled two isolated power modules for applications from data centers to electric vehicles that require improvements in power density, efficiency, and safety. The UCC34141-Q1 and UCC33420 isolated power modules leverage TI’s IsoShield technology, which copackages a high-performance planar transformer and an isolated power stage, providing functional, basic, and reinforced isolation capabilities.

TI’s proprietary multichip packaging solution claims up to 3× higher power density than discrete solutions in isolated power designs and shrinks the solution size by as much as 70% by packing more power into smaller spaces. Applications range from factory automation PLC modules and EV and powertrain systems to grid infrastructure and rack and server power.

Wolfspeed Inc. has revealed that its 300-mm SiC platform, leveraging patent-pending innovations, is set to become a key material component for AI and high-performance computing (HPC) packaging by the late 2020s. Figure 2 shows a conceptual demonstration of an interposer substrate built on the company’s 300-mm SiC wafer. According to Wolfspeed, the SiC substrate helps to improve the thermal, mechanical, and electrical performance of next-generation packaging structures required by AI and HPC systems.

Figure 2: Conceptual demonstration of a 100 × 100-mm interposer substrate enabled by Wolfspeed’s 300-mm SiC wafer (Source: Wolfspeed Inc.) GaN advances

While SiC excels at high voltages, GaN is suited for low- and medium-voltage applications, especially below 650 V. This semiconductor can switch at high frequencies, up to the megahertz range, with very low power loss, making power converters more efficient and smaller and requiring less cooling.

One important trend in GaN’s growth is integration. For example, Schottky diodes could be incorporated into GaN transistors to reduce losses from reverse conduction and make it easier to build power stages. Following this concept, Infineon Technologies AG has introduced the industry’s first industrial-grade GaN power transistors featuring an integrated Schottky diode.

Traditionally, GaN devices in hard-switching applications suffer from higher power losses due to their large body-diode voltage drop. This issue gets worse during the “deadtime” of a power controller. Engineers previously solved this by adding an external Schottky diode or complex controller tuning, both of which increase design time and costs. The new CoolGaN transistor G5 family solves this by integrating the diode directly into the transistor, reducing deadtime losses and boosting overall system efficiency.

Another important trend is bidirectional switching, where new GaN devices can block current and voltage in both directions. This simplifies converter topologies and requires fewer components. This capability is especially crucial for applications such as energy storage systems, EV chargers, and power-factor-correction circuits.

Renesas Electronics Corp. has introduced the industry’s first bidirectional switch (TP65B110HRU) based on depletion-mode (d-mode) GaN technology (Figure 3). Most current high-power conversion systems rely on unidirectional silicon or SiC switches that block current in only one direction. This limitation forces engineers to design multi-stage circuits or use “back-to-back” switch configurations, which significantly increases component count and reduces overall efficiency.

By integrating bidirectional blocking into one GaN product, this technology enables “single-stage” power conversion. The high switching speed and low stored charge of GaN also enable higher power density and switching frequencies. According to the company, this architecture has demonstrated over 97.5% power efficiency, providing a solution well-suited for AI data centers, on-board EV chargers, and renewable energy applications.

Figure 3: Renesas’s TP65B110HRU high-voltage d-mode bidirectional GaN switches (Source: Renesas Electronics Corp.) Solid-state transformers

Solid-state transformers (SSTs) are a huge change in how power is transferred and controlled. SSTs are not like ordinary transformers, as they use power electronic converters to modify, split, and control the voltage.

Using this technology, more advanced features become available. These include two-way power flow, real-time voltage management, and the capacity to operate with renewable energy sources. Smart grids, microgrids, and Industry 4.0 all need SSTs that can change rapidly and easily. For SSTs to grow, WBG semiconductors are particularly significant.

For example, Infineon and DG Matrix, a company specializing in SSTs, have partnered to integrate SiC semiconductors into the Interport multiport SST platform. This collaboration aims to modernize the connection between the public grid and energy-intensive applications such as AI data centers, EV charging, and industrial microgrids.

Unlike traditional copper- and iron-based transformers, SSTs are semiconductor-based devices. They are smaller and lighter, accelerating deployment and providing higher power density. Adopting Infineon’s SiC technology, these SST systems achieve improved efficiency and reliability.

The technology enables direct power conversion from medium-voltage grid levels to the low-voltage requirements of modern digital infrastructure. DG Matrix plans to scale toward higher-voltage platforms to support the global rollout of high-performance power infrastructure.

The post Power electronics evolve to maximize efficiency appeared first on EDN.

У КПІ фахівці провідних енергокомпаній провели цикл занять для студентів-енергетиків kpi пн, 04/13/2026 - 15:49

На війні загинув студент нашого університету Роман Андрійчук kpi пн, 04/13/2026 - 15:43

The technology treadmill never stops, and so it goes with Blink’s second-generation hub device versus its predecessor.

Last month, I compared the conceptually similar (and thankfully, concurrent-use RF-compatible) hub-and-spokes approaches used by Blink and TP-Link for their respective battery-operated device ecosystems. Blink’s particular hub implementation, the first-generation Sync Module still in active use at my residence to this very day, doesn’t support local recording storage, only to the cloud, a service which fortunately is free for me (albeit in a somewhat limited-duration fashion) as a legacy customer.

(it’s more recently been moved from my office to the laundry room, and as regular readers know from other recent writeups, that Belkin Wemo smart switch above it is also now DOA)

Gratis capacity for non-geriatrics

But when I saw an inexpensive “for parts only” second-generation Sync Module available for sale on eBay, I still jumped on the opportunity, driven by curiosity. Primary differences between the two generations include, for the more recent model:

• A functionally active embedded USB-A connector, for mating with a flash stick or other mass storage device for local recording storage
• More robust, therefore more responsive, integrated processing, and
• Claimed wider-range Wi-Fi coverage

Turns out the device itself works fine, at least to the degree I’ve tested it so far; I was able to factory-reset it, and the Blink app can now “see” it (although I haven’t yet set it up). The only thing missing was the originally included AC/DC adapter with a micro-USB output, but I’ve got plenty of spares of those already, along with the one currently fueling its same-dimensions precursor in case I ever decide to upgrade in situ. So, let’s dive inside and see what we can learn, both in an absolute sense and relative to the first-gen Sync Module that I took apart…yikes….nearly seven years ago. Shall we?

Here’s today’s patient, as usual accompanied by a 0.75″ (19.1 mm) diameter U.S. penny for size comparison purposes:

All-important FCC ID (2AF77-H2121520):

Micro-USB power input:

and now-functional USB-A data port:

Open sesame

I wish everything I tore down was this easy to open up:

At this point…

Let’s pause a moment for some interesting (at least to me) background info. In re-reading my archaic first-gen teardown verbiage, I noted that I’d written (among other things) the following:

Today’s teardown candidate is that very same Sync Module. The one currently in use with my Blink XT cameras matches their black color; this particular one was purchased standalone off Ebay specifically for teardown purposes and is white (and previously used). Color scheme deviations aside, the two models are functionally identical.

I was right with my “identical” claim, at least with respect to the functional angle. And I’d already noted the color deviation. But further (and more recent) research has enlightened me that there were other (non-functional) hardware differences between my in-use device and the one I took apart, too. Blink actually brought to production multiple main variations of the first-generation Blink Sync Module (including a low-volume initial “launch” iteration), along with region-specific tweaks of each variant reflective of differing RF spectrum regulations:

There have been 5 main revisions of sync modules:

Version 0 which was white and has a (non-functional) ethernet port and (non-functional) USB and BLE (non-functional) available. This was the ‘launch’ era.

 Version 1a which is white and has a (non-functional) ethernet port and (non-functional) USB.

Version 1b which is white or black and has a (non-functional) USB.

Version 1c which can be white or black and has no ports.

These were all the general ‘XT’ era modules.

Version 2 (the current one) which has a functional USB port.

All the modules are currently compatible with each other, but Modules 0, 1a,b,c have support ‘no longer guaranteed’.

However, this isn’t the end of the story, as the boards inside all come in combinations of EU and US and Intl flavors (due to regulatory / radio differences) too!

I’m guessing that the version I tore down back in mid-2019 was a “Version 1a”. I suppose it also could have been a “Version 0”, although I didn’t come across any Bluetooth Low Energy circuitry inside it. The one still in use here is a “Version 1b”.

Intra-generational variation

When the Redditor who wrote the above shared his thoughts four years ago, there may have been only one (initial) version of the Sync Module 2 we’re looking at today. Fast forward to the present, however, there now have been (at least) two. The initial hardware was based on Atheros silicon for both the processor and Wi-Fi module; Blink subsequently switched to NXP-sourced ICs for both the processor and wireless subsystems, the latter this time supporting not only Wi-Fi but also both Bluetooth and BLE.

Onward. Remove two screws:

And the PCB pops right out:

You’ve already gotten a glimpse of the PCB frontside, so in fairness to its backside counterpart, let’s start there with the detailed analysis:

Admittedly, there’s not much of note, unless you’re into passives and embedded traces, that is. At lower left is the reset-and-pairing switch. And to its right is a Winbond W25Q256JV 256 Mbit serial NOR flash memory, presumably for system code storage. For comparisons sake, here’s the comparatively sparse backside of the first-gen Sync Module PCB:

Now flipping the PCB back over…

I didn’t bother expending much effort at peeling the initially stubborn sticker off the processor; I already know from the NXP logo visibly atop the chip in its upper right corner in conjunction with the helpful Wiki reference page I’d found that it’s the second iteration of the second-gen design, employing NXP’s MCIMX6Z0DVM09AB application processor with the following specs:

• ARM Cortex-A7 running Linux
• 900MHz
• SRAM: 128kB
• SPI/UART/I2C
• 96KB bootrom, 128KB internal RAM
• Has Arm TrustZone

That other NXP chip I previously noted is the 88W8987-NYE2 wireless “solution”. Below the processor is an ISSI IS43TR16640BL 1 Gbit DDR2 SDRAM. And at the top center of the PCB is one more notable (albeit tiny) IC. Labeled as follows:

455A
CQRX
220

It’s Silicon Labs’ Si4455 sub-GHz wireless transceiver, which (as the name) implies implements the proprietary long-range 900 MHz channel that Blink refers to as the LFR (low-frequency radio) beacon.

In closing, here’s the first-generation Sync Module PCB topside for comparisons sake:

And with that, I’ll turn it over to you for your thoughts in the comments!

—Brian Dipert is the associate editor, as well as a contributing editor, at EDN Magazine.

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The post The Blink Sync Module 2: Faster response and local storage, too appeared first on EDN.

Marktech Optoelectronics Inc of Latham, NY, USA has made available for order several new 280nm UVC LEDs in single-chip, two-chip and four-chip configurations, designed to accelerate the development and prototyping of UVGI water purifiers, air disinfection systems, and surface sanitizers...

In collaboration with the Kyoto University Institute for Advanced Study, Tokyo-based Asahi Kasei Microdevices Corp (AKM, a member of the Asahi Kasei Group’s Material sector) has achieved laser oscillation in a 2μm-band infrared photonic crystal surface-emitting laser (PCSEL). This should enable the miniaturization of next-generation sensing systems while maintaining PCSEL’s high directionality and narrow spectral bandwidth, the firm adds...

For its fiscal third-quarter 2026 (ended 27 February), Aehr Test Systems of Fremont, CA, USA — which provides solutions for testing, burning-in and stabilizing semiconductor devices in wafer-level, singulated die, and packaged-part form — has reported revenue of $10.3m, down on $18.3m a year ago but up on $9.9m last quarter...

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This is my project: ZVS feeding a transformer feeding a symmetrical Cockroft-Walton voltage multiplier. The circuit in the pic is the second part, earlier i posted the CW diagram that i designed with falstad. I study electrical engineering, and i decided to challenge myself with building this setup. The voltage between the 2 multipliers will be 240kV and produce ~30cm arcs(30cm according to gemini). I had problems with this ZVS and LTSpice, the simulation was harder to get going than the actual circuit, but today i succeeded with it. I think i'll reward myself with some ice cream later! :) submitted by /u/CountCrapula88 [link] [comments]

submitted by /u/maifee [link] [comments]

I’ve been working on a custom CH32V006 dev board for OpenServoCore, which is my attempt to turn cheap servos like the MG90S into smart actuators with Dynamixel-style single-wire UART. PCBWay kindly sponsored the fabrication and assembly for this first spin. When the boards arrived, I plugged one in over USB-C and immediately noticed the 3.3V rail LED was off. Measuring the rail gave me 0.84V. I checked all 5 boards and got the same result every time, so it was pretty clear this was not a one-off assembly issue. I even injected an external 3.3V supply directly onto the rail and it was still stuck at 0.84V. At that point the evidence was clearly pointing to my design, not the fab. After staring at the KiCad files and schematics for way too long and finding nothing, I started probing around different test points. At some point I hooked 3.3V up to what was labeled as the +3V3 test point for some reason. Then I heard a pop, saw magic smoke, and immediately assumed I had just made things worse. Then I looked down and the green 3.3V LED was on. What??? Measured the rail again: 3.3V. Turns out the silkscreen test point labels were wrong. That “3V3” test point was actually the EN pin between the MCU and motor driver. So by feeding 3.3V into it, I fried either the DRV or the MCU, and whatever burned open stopped dragging the rail down. In other words, I accidentally failed my way into a debugging success. From there I started removing parts on a fresh board one at a time. I removed the DRV, still 0.84V. Then I removed MCU, and the LED came back. After another round of staring at the schematic, I finally found the real root cause: I had accidentally swapped VDD and VCC on the MCU. It was staring at my face the entire time. Talk about shame... I ended up attempted three board surgeries and the third attempt finally worked with trace cuts and magnet wire, and somehow the CH32V006 survived reverse voltage on its power pins and still ran firmware afterwards. This little MCU is tough! It's not a failure if I never give up, right? I wrote up the full debugging story with photos and repair details here if anyone wants the whole mess. submitted by /u/aq1018 [link] [comments]

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Воркшоп «ШІ у роботизованих системах оборонного призначення» kpi пт, 04/10/2026 - 23:23

The US Department of Energy’s (DOE) Office of Critical Minerals and Energy Innovation (CMEI) and the Hydrocarbons and Geothermal Energy Office (HGEO) have announced a ‘Critical Minerals and Materials Accelerator’ Notice of Funding Opportunity (NOFO) of up to $69m for technologies that advance the domestic separation, processing, and refining of critical materials. Projects selected will address the greatest technical obstacles to a more secure, domestic critical materials supply chain...

Firmware over-the-air (FOTA) updates are essential for improving system quality, adding new features after initial release, fixing bugs and vulnerabilities, improving system performance, and reducing recall and service costs. As new features are added, the size and complexity of the firmware stored in flash memory typically increases, inevitably leading to increased FOTA completion times.

Most of this time is spent on erasing and reprogramming. Beyond optimizing the user experience through faster updates, the irreversible nature of these operations must also be considered.

Another important consideration is that FOTA operations should ideally be performed in a stable environment similar to flash programming in a production environment. However, field update environments are relatively harsh and unstable. To avoid lengthy, risky, or potentially critical FOTA operations, the time required should be minimized.

But field updates are also vulnerable to various security threats, so thorough preparation is essential. These threats can range from third-party attacks to arbitrary modifications attempted by the product owner. This article outlines key considerations for implementing FOTA.

FOTA basics

FOTA is a technology that remotely updates a device’s firmware via wireless networks such as Wi-Fi, 5G, LTE, or Bluetooth without a physical connection. The flash memory used in this process serves as a core hardware resource, either temporarily storing the update package or ultimately writing the new executable code.

Let’s first examine the classification of FOTA based on flash memory configuration. This classification is determined by whether the flash memory is located internally or externally.

• Dual-bank architecture, internal NOR flash memory method

The dual-bank flash memory space within the MCU is allocated as active and passive slots, respectively. Each partitioned slot provides a space for executing existing software while simultaneously downloading new updates. This configuration features simple hardware configuration, high security, and fast bank switching through address remapping. However, it requires twice the flash memory density compared to the software size, resulting in increased hardware costs.

• External NOR flash memory method

This method uses external NOR flash memory connected to the application processor (AP)/microcontroller (MCU) via the QSPI (Quad SPI) or OSPI (Octal SPI) interface. Its large flash memory density makes it ideal for large-scale software updates. The update file or binary image is stored in flash memory and then copied to the internal flash memory. This method overcomes internal memory limitations and facilitates the storage of multiple versions of backup binary images, including emergency recovery binary images.

Let’s look at the classification of FOTA based on its implementation mechanism. These mechanisms can be used independently or combined and reconfigured.

• A/B update (seamless update)

The active slot (bank) where the current software/firmware is running and the passive slot (bank) for update downloads are physically separated, and software is installed or disabled across the two banks. This physical separation ensures that even if power is cut or a malfunction occurs during an update, the bank where the current software is running is preserved, preventing bricking.

• Execute-in-place (XIP) and concurrency

FOTA relies entirely on external NOR flash memory, meaning that code is read directly from external NOR flash memory. This technique involves executing code in one flash memory area while simultaneously downloading new updates to another area. However, the large capacity NOR flash memory used for FOTA is logically configured as a single bank, even when using multi-chip packaging technology. Therefore, the use of XIP for FOTA is limited.

• Delta update

This update only receives the changed differences or patches, rather than the entire software update or binary image. By reducing the amount of data transmitted, it reduces the time required for FOTA and saves on flash memory writes (program/erase cycles). Currently, optimized compression algorithm solutions are being employed to enable delta updates even on MCUs with low hardware specifications.

Reliability and security enhancements

FOTA design goes beyond simply writing data. It focuses on maximizing uptime (zero downtime) by leveraging safety, efficiency, and continuity, and securely controlling flash memory within a Trusted Execution Environment (TEE).

• Integrity verification

To ensure that data written to flash memory has not been corrupted or altered, the digital signature of the downloaded data is verified using a hardware security module (HSM) or TrustZone. After writing to flash memory, a checksum or CRC check is performed on the entire area to check defects in the flash memory.

• Rollback

If a boot failure occurs with a new update or software, the system must have the ability to immediately revert to the previous version.

• Flash memory life management (wear leveling)

Maximize the hardware lifespan of flash memory by preventing flash writes from being concentrated on specific areas of flash memory.

• Secure boot integration

Root of Trust (RoT) verifies that the software written to flash memory is signed by a trusted manufacturer.

• Secure storage

In addition to securing communication between the host and flash memory, flash memory must provide secure storage. The latest secure flash memory features a built-in HSM, enabling real-time encryption and decryption without performance degradation and providing secure storage capabilities.

NOR in FOTA architecture

Among the explanations mentioned above, the FOTA architecture utilizing external NOR flash memory is a strategy that overcomes the physical limitations of embedded memory and maximizes system flexibility. As of 2026, the role of external NOR flash memory is becoming increasingly important due to the increasing size of firmware and strengthened security requirements.

FOTA utilizing external NOR flash memory offers overwhelming advantages over embedded methods in terms of safety, density, and flexibility, and is becoming the standard for industrial devices requiring high reliability and smart devices using large-capacity firmware. We will delve into the five key advantages of FOTA using external NOR flash memory.

1. Scalability and cost efficiency

• Large image accommodation: Firmware containing the latest operating systems (RTOS, Embedded Linux), graphics libraries, and AI models often exceed tens of MBs in size. Adding relatively inexpensive external NOR flash memory is more advantageous for reducing overall bill of materials (BOM) costs than increasing the internal flash capacity of expensive MCUs.
• Multi-image storage: Simultaneously storing multiple versions of firmware backups and user data images dramatically increases memory resource management flexibility.

2. Provides a stable backup and rollback environment

• Fail-safe mechanism: Even if a power failure or communication error occurs during an update, the existing executable code in the internal flash remains intact. The replacement process only begins after the new image has been fully downloaded and verified to prevent bricking.
• Factory recovery: Factory recovery firmware can be stored in external memory. If a critical bug is discovered in a new version, it can be immediately restored to a stable previous version or factory settings from external memory without a server connection.

3. Minimized downtime

• Non-intrusive background downloads: The internal flash memory focuses on running the current application, while the external flash memory receives data in the background via an independent bus. This facilitates zero-downtime implementation, ensuring device service is not interrupted even while receiving update packets.
• Bus separation: Using separate interfaces such as QSPI and OSPI prevents bus conflicts between internal memory access (command fetch) and external memory access (update write), minimizing system performance degradation.

4. Extended flash life and maintainability

• Internal flash memory protection: Flash memory has a limited number of write/erase cycles (P/E cycles). During development with frequent updates or when frequent firmware changes are required, a significant portion of write operations are handled by external memory, protecting the life of the MCU’s internal flash, which cannot be replaced.
• Modular capacity expansion: Even if firmware capacity increases due to added functionality in the product lineup, the burden of hardware redesign is reduced because only the external flash memory can be replaced with a larger capacity without replacing the MCU.

5. Security and data isolation

• Physical isolation: The executable code (internal) and the update standby image (external) can be physically separated and managed.
• Security update patch: By storing the firmware in an encrypted state in external memory and decrypting it only at boot time and uploading it to internal memory or RAM, an additional layer of defense against firmware theft attacks can be added.

FOTA implementation

The success of a FOTA solution hinges on the ability to provide secure and seamless updates. The implementation of the above architecture will be key to achieving this.

The automotive industry is already responding to the changes that make FOTA essential. As the transition to software-defined vehicles (SDVs) becomes more concrete, demand for software updates is skyrocketing. This is because it enables flexible changes or additions to vehicle functions even after mass production, enabling rapid response to errors and defects and continuous delivery of new services to customers.

As the frequency of software updates increases, their importance is also increasing. United Nations Economic Commission for Europe (UNECE) WP.29 enacted R156 in June 2020, which now covers not only passenger cars, commercial vehicles, and trailers with towing devices, but also agricultural machinery equipped with software update capabilities.

UNECE WP.29 R155 and R156 define the requirements OEMs must meet in the areas of cybersecurity and software updates. UNECE regulations R155 and R156 introduce framework conditions for cybersecurity and software update capabilities for all vehicles. They also require automakers to establish certified Cyber Security Management Systems (CSMS) and Software Update Management Systems (SUMS).

R155 requires the establishment of a cybersecurity risk identification and response system, consideration of security throughout the entire vehicle lifecycle, documentation and maintenance of a CSMS based on ISO/SAE 21434, and submission of documentation and evidence during the Vehicle Type Approval (VTA) audit.

R156 addresses the security assurance of OTA or wired updates, change impact analysis and verification systems, update history management, and auditability. It’s based on the ISO 24089 standard for software updates.

The introduction of FOTA is no longer an option. It’s essential for improving system quality, adding new features, fixing vulnerabilities, enhancing system performance, and reducing recall costs.

We have examined the important considerations before adopting these new solutions. In addition to providing safe and fast update methods for improved user experience, we have also briefly discussed the security regulations that must be considered.

Scott Heo is lead principal engineer at Infineon Technologies.

Related Content

• OTA Software Updates: Changes Ahead
• Addressing the challenge of automotive OTA update
• OTA: A Core Technology for Software-Defined Vehicles
• How PCM memory bolsters OTA firmware upgrades in vehicles
• The role of phase-change memory in automotive OTA firmware upgrades

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📰 Газета "Київський політехнік" № 13-14 за 2026 (.pdf) Інформація КП пт, 04/10/2026 - 16:12

Motor control integrated circuits (ICs) and motor drives are essential elements for implementing smart manufacturing within the framework of Industry 4.0. A common requirement in modern industrial applications is high-efficiency motor solutions. About 50% of global energy consumption is due to electric motors, and therefore, even a moderate improvement in efficiency can provide meaningful economic benefits, helping reduce the carbon footprint.

International efficiency standards for industrial motors, such as IE3 (Premium) and IE4 (Super Premium), have been introduced to reduce energy use. As of July 2023, European regulations mandate that three-phase induction motors between 75 kW and 200 kW adhere to the IE4 efficiency standard.

In addition to being more efficient, modern industrial motor solutions must be smart and connected. “Smart devices” are equipped with sophisticated capabilities. They can identify irregularities such as excessive heat or voltage surges and respond automatically. The introduction of AI technologies, such as machine learning, brings this function to the next level, allowing predictive maintenance and reducing factory downtime.

Connection is another key requirement for motor solutions deployed in the Industry 4.0 sector. This feature allows the devices to exchange data in real time, supporting predictive maintenance, energy efficiency improvements, and remote control. Using the industrial internet of things, electric motors can send operational data to cloud systems. This helps reduce downtime and allows for continuous improvement of production processes. Moreover, technicians can access performance data remotely, decreasing the need for on-site inspections and allowing faster troubleshooting.

Motor driver architecture

Motor driver electronics is the power interface between digital control systems and electromechanical loads. This architecture is based on three components: control logic, gate drivers, and power stages.

Control logic typically resides within microcontrollers (MCUs), digital-signal processors, or dedicated motor control ICs, which are engineered to perform real-time control loops. Subsequently, gate drivers transform these logic-level signals into switching commands, which are then employed to regulate power transistors, encompassing MOSFETs and IGBTs. The power stage, frequently implemented via inverter or H-bridge configurations, supplies the desired current to the motor windings.

Furthermore, in Industry 4.0 contexts, motor drivers incorporate supplementary functionalities, encompassing fault monitoring, thermal sensing, communication interfaces, and energy management capabilities. Motor driver ICs also feature integrated protective measures, such as overcurrent, overvoltage, and thermal shutdown mechanisms. These protections improve system reliability and simplify the design process.

Microchip Technology Inc. recently introduced a lineup of 12 600-V gate drivers. These high-voltage drivers are designed to deliver output currents between 600 mA and 4.5 A. They are also available in a range of configurations, including half-bridge, three-phase driver, and high-side/low-side options.

These gate drivers facilitate rapid switching, thereby promoting efficient performance, and are particularly appropriate for industrial motor control applications. In addition, the logic inputs are compatible with standard TTL and CMOS levels, extending down to 3.3 V, which streamlines integration with conventional MCUs. The safe operation of the output power MOSFETs is ensured by Schmitt triggers on the inputs and an internal deadtime preset.

The MCP8062136, for instance, is a three-phase half-bridge with three high-side drivers operating in bootstrap operation up to 600 V and can provide a 200-mA source and 350-mA sink output current. The gate drivers also include several protection features, including shoot-through protection logic, undervoltage lockout for VCC, and overcurrent protection.

Figure 1: Microchip’s high-voltage (600 V) MOSFET and IGBT silicon gate drivers, designed for a range of applications, including stepper motors, compressors, pump motors, motor drives, industrial inverters, and renewable energy systems (Source: Microchip Technology Inc.)

To drive motor-controlled industrial applications such as sensorless three-phase fans and pumps up to 40 W, Melexis has introduced the MLX81339 motor control IC. The device is also suitable for driving brushless DC (BLDC) and bipolar stepper motor control for accurate positioning in applications such as automated valves, flaps, and small robotic motors.

The MLX81339 supports several types of communication interfaces with a host MCU, including the legacy PWM/FG, as well as the I2C, UART, and SPI interfaces. The motor control IC offers several protection and diagnostics features, including undervoltage, overvoltage, overcurrent, and overtemperature detection and protection, and integrates a programmable flash memory that can be used for application customization and IC configuration.

Connectivity in smart motor control

In Industry 4.0 applications, motor drivers often adopt communication protocols, such as EtherCAT, Profinet, and Ethernet/IP, to exchange real-time data with other drives, sensors, or systems supervising the industrial network. Typical data that can be exchanged includes torque, speed, temperature, and vibration. When processed at the edge or remotely on the cloud, this data allows predictive-maintenance models to provide valuable insights into motor operation, helping to detect potential faults before they occur.

Drive units mounted directly on motors or industrial machines are becoming very common. These devices, which include embedded controllers and communication interfaces, reduce the wiring complexity and allow machines to be reconfigured quickly for different production requirements.

For example, the RA8T2 MCU from Renesas Electronics Corp. is optimized for industrial motor control. Based on a 1-GHz Arm Cortex-M85 processor (with an optional 250-MHz Arm Cortex-M33 processor available in the dual-core version), the RA8T2 is designed for industrial motor control applications that require real-time performance and a high-speed communication interface.

These devices (Figure 2) integrate a 14-channel PWM timer for motor control, different types of memories (including a low-latency and high-speed TCM memory), and analog functions in a single chip. They also provide a dual-channel Gigabit Ethernet MAC with DMA and an optional EtherCAT slave controller that supports synchronous networks in industrial fields.

Figure 2: Renesas’s RA8T2 MCU supports high-speed connectivity in industrial motor control applications. (Source: Renesas Electronics Corp.) Wide-bandgap semiconductors

Wide-bandgap materials, such as silicon carbide (SiC) and gallium nitride (GaN), provide higher breakdown voltages, faster switching speeds, and lower on-resistance per unit area than silicon IGBTs and MOSFETs. From a designer’s perspective, this means that lower switching losses, improved thermal management, and higher operating frequencies can be achieved. These characteristics also lead to higher efficiency across the load range and a reduced footprint due to a reduced size of the passive components.

SiC is usually preferred in high-voltage and high-current applications above 600 V, such as high-power industrial drives and inverters. GaN, meanwhile, operates well in the 100- to 650-V range, with switching frequencies up to about 1 MHz. It is well-suited for mid-power motor drives in appliances, HVAC, pumps, small robots, and light industrial equipment.

Through a partnership, Qorvo Inc. and Cambridge GaN Devices (CGD) have developed the 400-W PAC5556AEVK2 and the 800-W PAC5556AEVK3 evaluation kits, suitable for developing motor control solutions in applications such as industrial fans, pumps, compressors, and white goods. The kits combine Qorvo’s PAC5556A mixed-signal system-on-chip with CGD’s ICeGaN HEMTs. The PAC5556A is a programmable 32-bit MCU that integrates a 600-V DC/DC buck controller and 600-V gate drivers.

The PAC5556AEVK2 evaluation kit features CGD’s 240-mΩ ICeGaN power devices, achieving up to 400-W peak performance without requiring a heat sink. The PAC5556AEVK3 integrates CGD’s 55-mΩ ICeGaN switches and provides a peak output power of 800 W, requiring minimal airflow cooling. The usage of GaN transistors improves the overall efficiency due to reduced power loss, reduces heat dissipation, and allows for smaller and more reliable motor control solutions.

Efficient Power Conversion (EPC), a company focused on e-mode GaN solutions, introduced the EPC91202 evaluation board for motor drive applications. It integrates a three-phase BLDC motor drive inverter built on the EPC2361 100-V eGaN FET and can provide an output current up to 70 A peak (50 ARMS), with a switching frequency up to 150 kHz.

The EPC91202 is designed to handle sensorless and encoder-based motor control, boasting a low-voltage change rate, specifically a dV/dt rate of under 10 V/ns. This low voltage change rate reduces electromagnetic interference and acoustic noise. This board is well-suited for developing motor drive applications in various sectors. These include industrial automation, e-mobility, robotics, drones, and battery-powered devices.

AI and ML integration

Integrating AI/ML in motor control systems offers a valuable solution to investigate the behavior of motors during normal operation, helping to prevent anomalies or possible faults in advance. An example of a hardware and software integrated solution is the STSPIN32G4-ACT reference design and the FP-IND-MCAI1 STM32Cube function pack from STMicroelectronics.

The STSPIN32G4 is an advanced system-in-package that combines an STM32G431 MCU (based on an Arm Cortex-M4 core with CORDIC mathematical accelerator) with a three-phase gate driver. This architecture is specifically designed for controlling BLDC/permanent-magnet synchronous motors and provides the computing power needed to handle field-oriented control (FOC) algorithms, as well as local data analysis tasks (edge AI).

The FP-IND-MCAI1 software provides an implementation example for condition monitoring and predictive maintenance. This package collects data from internal sensors (current and voltage) and from external sensors (vibration and temperature), using it to feed pre-trained ML models.

Using ST’s NanoEdge AI Studio tool, optimized libraries can be generated that run directly on the chip, enabling the drive to “learn” the motor’s normal behavior and detect anomalies (such as mechanical imbalances or bearing failures) in real time.

Software tools

Several vendors offer software toolchains that cover the full development workflow from motor parameter identification through algorithm configuration, real-time debugging, and production code generation.

Infineon Technologies AG recently expanded its ModusToolbox Motor Suite to include a hardware-abstracted motor control core library covering advanced algorithms such as FOC and trapezoidal control, multiple startup methods including rotor alignment and six-pulse injection for initial position detection, and SVPWM modulation schemes. The integrated graphical user interface (GUI) provides a configurator and testbench that auto-detects connected evaluation boards; a digital oscilloscope monitoring up to eight firmware variables simultaneously; a motor profiler for automated extraction of resistance, inductance, and inertia parameters; and a PID tuner for closed-loop optimization.

Power Integrations released its MotorXpert v3.0 last year, a suite developed for its BridgeSwitch motor driver ICs (Figure 3). It adds shuntless and sensorless FOC support, a two-phase modulation scheme that cuts inverter switching losses by 33% in high-temperature environments, and a five-fold improvement to its waveform visualization tool. The codebase is written in MISRA-C and is MCU-agnostic, covering applications from 30 W to 750 W.

Figure 3: Power Integrations’ MotorXpert v3.0 offers an easy-to-use control interface and GUI. (Source: Power Integrations)

Other development tools available from leading semiconductor manufacturers include ST’s STM32 Motor Control SDK (X-CUBE-MCSDK) and Texas Instruments Inc.’s MotorControl SDK.

The post Designer’s guide: Motor control and drivers appeared first on EDN.

For full-year 2025, molecular beam epitaxy (MBE) system maker Riber S.A. of Bezons, France has reported revenue of €40.3m, down 2.1% on 2024’s €41.2m...

We once looked at how conducted emissions testing could be affected by the negative input impedance of a switch-mode power supply. Please see: “Conducted Emissions testing.”

Digital data signals that a client’s electric power company was putting on the power lines were being amplified by the negative input impedance of the power supply being tested, which made it look like the power supply itself was generating conducted emissions, which, in fact, it was not.

I have since been asked by someone, “How can a negative impedance result in amplification?” The sketch below will illustrate how that can come about.

Figure 1 Negative resistance amplification.

Let our “impedance” in question be a resistance. In our sketch, voltages E2 and E4 are derived by voltage dividers from identical “Esig” sources for which standard voltage division equations apply. What is NOT standard here is that we are going to set R4 to negative numerical values.

My SPICE simulator will not let me assign a negative number to any resistance value (I think of that as picky, picky, picky!), but given that as the case, the voltage divider equations can be set up in GWBASIC. Line 150 of that code is where that happens.

With R1 and R3 arbitrarily set to 1K each and held there, we vary R2 and R4 together as shown to look at the effects on outputs E2 and E4, where we find the following.

E2 is always a lesser voltage than Esig. E2 varies versus the choices of value of R2, but it is always smaller than Esig.

On the other hand, E4 is always a greater voltage than Esig. E4 varies versus the negative value of R4, but it is always larger than Esig.

This effect on E4 is the amplification effect referred to in the earlier essay.

John Dunn is an electronics consultant and a graduate of The Polytechnic Institute of Brooklyn (BSEE) and of New York University (MSEE).

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