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Wearables, smartphones, tablets: In the consumer sector in particular, the demand for ever greater functionality, simplicity, and battery lifetime is increasing. Infineon Technologies AG contributes to these requirements with the introduction of the OPTIGA Connect Consumer OC1230. It is the world’s smallest GSMA-compliant and first 28 nm eSIM solution. OPTIGA Connect Consumer allows up to 50 percent less energy consumption compared to eSIMs on the market, extending the lifetime of the device’s battery without compromising on performance. It also contributes largely to more convenience since eSIMs can be managed remotely, making haptic SIM changes abundant thus saving time and resources and allowing for greater flexibility. Smartphone users can switch between different providers more easily, manufacturers can be more flexible in their design since physical access is not required. This can be a large advantage in IoT devices. Above all, OPTIGA Connect Consumer OC1230 is ideal for consumer devices such as smartphones, tablets, and notebooks, and even for small devices such as smartwatches and other wearables as well as 5G routers and POS payment terminals.

The OPTIGA Connect Consumer OC1230’s security architecture is based on Arm v8 and Infineon’s Integrity Guard 32 technology for increased performance and reduced power consumption. It enables a gain of 25 percent power/performance ratio compared to existing eSIMs on the market, thus extending the lifetime of the device’s battery. Remote SIM provisioning (RSP) and multiple enabled profiles (MEP) compliant with GSMA SGP.22 v3 enhance the end user experience. Users can download and store several mobile network operator profiles and remotely activate multiple profiles simultaneously.

With only 1.8 x 1.6 x 0.4 mm, the ultra-small chip-scale packaging reduces printed circuit board (PCB) space requirements by a factor of 37 relative to Nano SIMs and by a factor of 130 compared to standard SIMs. The OPTIGA Connect Consumer OC1230 is also available in X2QFN20 (3.0 x 3.0 x 0.3 mm) package. The eSIM solution features a large memory of 1 MB to accommodate multiple network operator profiles along with additional applications and user data.

OPTIGA Connect Consumer OC1230 is security evaluated according to BSI-CC-PP-0100-2018, specified in GSMA SGP.25 and is based on post-quantum-cryptography-(PQC) ready hardware.

The post The world’s smallest eSIM solution for mobile consumer devices: Infineon launches OPTIGA™ Connect Consumer OC1230 appeared first on ELE Times.

This was inside my fortune cookie at lunch today. submitted by /u/robs2287 [link] [comments]

TRUMPF Photonic Components GmbH of Ulm, Germany (part of the TRUMPF Group) — which makes vertical-cavity surface-emitting lasers (VCSELs) and photodiodes for consumer electronics, datacom, industrial sensing and heating markets — and iThera Medical GmbH of Munich, Germany — a spin-off of the Helmholtz Center Munich that provides optoacoustic imaging (OAI) diagnostics for preclinical and clinical research — are introducing a solution for optoacoustic imaging for clinical applications. The VCSEL-based subsystem can replace existing photonic systems for routine clinical use, starting with soft-tissue perfusion and oxygenation measurements, applicable to a wide range of diseases...

Ortel LLC of Alhambra, CA, USA (which was acquired by Photonics Foundries in 2023, and offers products for wireless, sensing, satcoms and broadband applications) has transferred wafer fabrication for its flagship C-band, high-power, continuous wave laser module platform to pure-play III–V semiconductor wafer foundry Canadian Photonics Fabrication Centre (CPFC), which is located at the National Research Council of Canada. Transfer assures uninterrupted wafer supply and a smooth transition of the laser to expanding markets including LiDAR, fiber-optic sensing, coherent and externally modulated fiber-optic communications, and test & measurement...

Professor Richard Hogg, chief technical officer at III–V Epi Ltd of Glasgow, Scotland, UK — which provides a molecular beam epitaxy (MBE) and metal-organic chemical vapor deposition (MOCVD) service for custom compound semiconductor wafer design, manufacturing, test and characterization —advocates using gallium arsenide (GaAs) epitaxial regrowth for many emerging semiconductor laser applications. Gallium arsenide is a less proven material system than indium phosphide (InP), which is commonly used in high-volume 5G, datacom, telecom and co-packaged optics applications...

The recent design idea (DI) “Negative time-constant and PWM program a versatile ADC front end” disclosed an inventive programmable gain amplifier with integral samples-and-holds. The circuit schematic from the DI appears in Figure 1. Briefly, a PWM signal controls the switches shown. In the X0 positions, a differential signal connected to the inputs of op amps U1a and U1b drives a new voltage sample across capacitor C1 through switches U2a and U2b. Because switch U2c’s X-to-X1 connection is open, capacitor C2 is “holding” a version of the previous sample. This “held” version was amplified by the subcircuit consisting of U2a, U2b, U1c, C1, R1, R2, and R3 with switches in the X1 position. The U1c-based gain-of-two amplifier applies positive feedback through R1 and U2a to the load of C1 in series with the resistance of U2b. This causes the voltage across the load to increase exponentially (with a positive time constant), affording a gain which is a function of the time period that the switches are in the X1 position. The advantage of this approach is that programmable, wideband gains of 60 dB or more can be achieved because the op amps’ maximum closed loop gain is only 6 dB; bandwidth is not sacrificed to achieve a high closed-loop gain.

Wow the engineering world with your unique design: Design Ideas Submission Guide

Figure 1 Two generic chips and five passives make a versatile and unconventional ADC front end.

As with any design, this one has errors and characteristics whose nature must be understood before compensation can be considered. These include passive component tolerances; op amp input currents (negligible) and offset voltages; switch turn-on and turn-off times; leakage currents; as well as resistances and switching-induced charge injections. A non-obvious error can also exist which might be termed a “dead zone”. At time t = 0 when the X1 positions are initially active, the sum of a positive low amplitude VIN – (-VIN) input voltage sample and various errors can yield a negative voltage at the non-inverting input of U1c. Consequentially, U1c’s output voltage would not trend positive and, assuming the analog-to-digital converter (ADC) driven by VOUT accepts only positive voltages, the circuit would not work properly. To understand how to bound this undesirable behavior and for other reasons, it’s wise to develop equations to analyze circuit behavior. Some analytic simplicity is possible when the switches are in the X0 position and operation is mostly intuitive. But operation in the X1 position will require a bit of a deeper dive.

Charge injection error

Op amp input offset voltages and switch resistances are commonly well-understood. As for switch leakage current and charge injection, there’s a referencei that provides an excellent discussion of each. Charge injection Q is most pernicious when the switch transitions from “on” to “off” and a switch terminal is connected to a circuit path which includes a capacitor C and is characterized by a high resistance.

This extends the time for the error voltage Q/C impressed upon the capacitor to “bleed off”. This is not a concern for U2b’s X pin at any time, because both X0 and X1 positions provide a low “on” resistance path. But it must be considered for U2a and U2c when respectively, X0 and X1 turn off. For U2a, X1 is in series with relatively large resistance R1. When U2c’s X1 is turned off and C2 is in hold mode (allowing an analog to digital conversion), C2 sees X1’s multi-megaohm “off” resistance. There is no mechanism to bleed off and recover from U2c’s charge injection error; it is inherent in circuit operation until the PWM reactivates X1 for “tracking” mode, during which time conversions are precluded.

Leakage current

This same high resistance might create a real problem due to leakage current. Such currents flow continuously from U2’s power supplies through its internal ESD diodes to the switch terminals. What saves the circuit from these errors is that an analog to digital (A-to-D) conversion of VOUT can be triggered quickly after X1 turns off, before significant leakage current errors can accumulate. Leakage from terminal X of U2b can be ignored because as mentioned before, it’s always connected to a low resistance through X1 to ground or X0 to U1b’s output. Not so the X terminal of U2a with its connection to moderately high resistance R1. Here the leakage current effect must be considered.

LTspice model and equation validation

Taking all this into account, equations can be developed with reference to the circuit seen in Figure 2. Figure 2 is an illustration of the LTspice file developed to model Figure 1 circuit operation and compare it with the equations (which are also evaluated in the file) to ensure their accuracies.

U2a charge injection is not explicitly shown in the circuit, but is incorporated by summing it with the intended input sample voltage Vin in the .param Vc0 statement. The .param statements and the circuit constitute the model. These statements and the algebraic expressions assigned to voltage sources eq_1 and eq_VOUT validate the equations by allowing direct comparisons with the performance of the model. This is accomplished by graphing simulations of the circuit and evaluations of the voltage sources and confirming that eq_1 = e_1 and that eq_Vout = Vout. Not accounted for are switch turn on and turn off times. Their effects will be addressed later.

Figure 2 The LTspice file comparing the performances of the circuit model and the equations developed of it.

Reference Figure 1 and Figure 2, particularly Figure 2’s .param statements. At time t = 0 when the X0 switches turn off and the X1’s turn on, the voltage across C1 has been initialized to Vc0 as seen in the C1 initial condition (IC) and the .param Vc0 statements. We can write that the current (w) through C1 can be seen in [1].

Therefore:

Assuming a solution of the form:    

Where t = time, [3] and [4] can be seen:

And:

Therefore, the voltage at terminal e_1 can be seen in [6].

To evaluate the voltage at terminal e_2 in the model, it is necessary to convolve the signal at e_1 with the impulse response h(t) of the rc and C2 network shown in [7].

Where the exponential time constant can be seen in [8].

The convolution is given by [9].

This evaluates to [10].

Where:              

Allowing for the U2c charge injection and U1d input offset, shown in [12].

or equivalently:              

The model and this last equation above predict the circuit output at any time t = t1 immediately after the charge injection of U2c has occurred due to the enabling of the X0 switches.

Assessments

Let’s get some worst-case error parameter values for U1 and U2. The original DI proposed specific op amp TLV9164ii, but not a particular 74HC4053. Surprisingly, there are significant differences between parts from different 74HC4053 manufacturers. The MAX74HC4053Aiii looks like a reasonable choice. Let’s consider operation of both IC’s in the commercial temperature range of 0 to 70°C. Refer to Table 1 and Table 2.

Supply	Temperature range	Input current, typical	Input offset voltage	Input offset voltage drift	Open loop gain minimum
5-16 V	-40 to +125oC	± 10 pA	± 1.3 mV	± 0.25 µV/oC	104 dB

Table 1 The TLV9164 maximum parameter values.

Supply	Temperature range	Switch resistance	Switch resistance differences	Flatness, VCOM= ±3V, 0V	COM current	NO current	Charge injection	Switch t(on)	Switch t(off)
± 5 V	0 to 70 oC	125 Ω	12 Ω	15 Ω	± 2.5 nA	± 5 nA	± 10 pC	250 ns	200 ns
5 V	0 to 70 oC	280 Ω	–	–	± 5 nA	± 10 nA	± 10 pC	275 ns	175 ns
3 V	0 to 70 oC	700 Ω	–	–	± 5 nA	± 10 nA	± 10 pC	700 ns	400 ns

Table 2 MAX74HC4053 parameters, maximum values. Note performance degradations when powered by a single supply.

The output of U1c will not move in a positive direction if the sign of the parameter J in [5] is negative. Assuming ADCs whose most negative input value is ground, the circuit will fail to function properly. It’s unlikely that parameters Q1, Voffab, Voffc, and iLeak all take on their worst-case values in a particular circuit, but if they do, Vin will have to be more positive than 10pC/1nF + 2·1.2mV + 1.2mV + 2.5nA * 14300 = 14mV to avoid this “dead zone”. Of course, you’re free to use criterion other than the sum of the worst possibilities, but Caveat Designer!

Another consideration is the circuit settling time in successive PWM periods for the sampling voltage of C1, particularly in the transit between an ADC full-scale voltage to half of its LSB (this is the most extreme case which might not be a requirement for some applications). For a ±5-V powered MAX74HC4053A, two 125-ohm switches in series drive the 1-nF C1. With a 12-bit ADC, the required time is (2·125)·1e-9·ln(212+1) = 2.3 µs. Add the switch on-time of 250 ns, and the PWM should enable the X0 switches for tmin = three of its 1 µs cycles for accurate voltage sample acquisition. By comparison, 8-bit ADC’s can get by with 2 µs.

Calibration

The iLeak·R1 and the temperature-sensitive portions of U1’s input offset voltage errors are negligible in comparison with the ones caused by charge injection. However, as noted in the referencei and in typical curves provided in the switch datasheetiii, the magnitudes and signs of voltages will significantly affect the sizes of the charge injections Q1 (U2a) and Q2 (U2c) and also somewhat the ra, rb and rc resistances. For Q1, ra, and rb, the U1a and U1b input voltages are not determinable from A-to-D conversions. Increasing the values of capacitors C1 and C2 will reduce the Q/C charge injection-created error magnitudes but will also necessitate increases in PWM times. Avoiding such time increases by reducing the R1 value magnifies the errors due to mismatches of ra, rb and rc.

The resistances ra, rb and rc will vary with both temperature and voltage levels. Applying algebra to [13] shows surprisingly that if ra, rb and rc resistances are identical, there is zero error introduced regardless of their value! (This assumes that enough time has elapsed for the e-t/Tc term to be negligible. ) While not identical, the slightly less than 1% maximum mismatch error can be calibrated out, but only for a given set of switch voltages and temperature. The datasheet does not provide the information required to determine the errors that could occur when the voltages and temperature are other than those present during calibration.

With the circuit as it stands, I know of no way to eliminate temperature- and voltage-sensitive errors. But there are errors insensitive to these conditions that can be calibrated out. The following procedure assumes an ADC of negligible error (its resolution and accuracy require further investigation) and conversion factor CF counts/volt, one perhaps present on the assembly line of a product incorporating this design.

For any instance of this circuit to which specific and accurately known Vin and -Vin (See Figure 1) voltages are applied at a given temperature, [13] can be thought of as a function of time and Vin: VOUT(t, Vin). VOUT(t1, Vin), VOUT(t2, Vin), and VOUT(t3, Vin) can be captured such that t3/3 = t2/2 = t1 > tmin. A t1 value of 15 µs is suitable, and Vin = 20 ms avoids the dead zone. (The reason for such a small input voltage is given later.) A t3 of 45 µs applies a gain of less than 24 and keeps things under a 1.8 V full scale A-to-D level. It will be appreciated that et3/T = (et1/T)3 and et2/T = (et1/T)2 and that:

where each VOUT(t, Vin) is scaled by CF to a measurement made by the product line A-to-D. The difference terms cancel the constant terms in [13], and the ratio cancels the A·N term. Such cancellations are necessary if T is to be determined accurately. [14] is a quadratic equation, the desired of the two solutions of which is given by :

From this, the value of T can be obtained (note that T depends slightly on ra because of Req and so it also depends on voltage and temperature):

Further:

Allowing the solution:

N( ) is a function of Vin (see .param N) and is equal to SVin + U where S and U are unknown and again are slightly dependent on the usual. The process of equations [14] to [18] will need to be repeated with a value Vin2 different from Vin to arrive at an AN2 term. We could use different values of t, but we might as well keep the same ones. We can safely choose Vin2 = 25 mV (incurring a charge injection and switch resistances very close to that with Vin = 20 mV) and calculate:

From [13] it can be seen that:

so that:

Given an A-to-D conversion count and reversing [22], it can be seen that:

never forgetting that even this result is influenced by the usual.

Because of their negligible sensitivities to voltage and temperature, NPO/COG capacitors and 25 ppm or better metal film resistors are recommended. 1% or better parts are available at costs around .01 USD in quantity.

Conclusions

This innovative circuit has several features to recommend it. It offers differential to single ended conversion with very high CMRR and wide common mode operating range. It offers gains starting at 6 dB in increments of .6dB limited only by the combination of the sampled voltage and saturation at the positive supply rail. Op-amp gains are no greater than 6 dB, so there is no loss of bandwidth due to operation at high closed-loop gains. But this design has some disadvantages.

A detailed calibration scheme is needed which requires the availability on the production line of an ADC whose requirements for accuracy and resolution have not yet been determined. Even with calibration, various errors which cannot be rescued by calibration can impose an operational “dead zone” for circuit input voltages less than up to 14 mV. Errors due to switch charge injection and switch resistance vary with temperature and applied voltages and are difficult if not impossible to calibrate out. The MAX74HC4053A discussed here is a better ‘4053 than others, but another part may exist with less variations in resistance and charge injection.

I would suggest disconnecting the U2c X0 pin. This connection is of limited usefulness and does damage—it injects charge into U1c, affecting the signal fed through R1 to C1. (The effect on C2 during the “hold” mode can be neglected, being of very short duration due to the X1 rc “on” resistance in the C2 path.) If it is decided to retain this connection, please note that its effects have not been accounted for in the foregoing analysis.

Finally, I’d like to acknowledge the comments of eldercosta, a review and comments with some unique perspectives by David Lundquist, and especially the comments and contributions of Stephen Woodward, who designed the circuit discussed in this DI.

Christopher Paul has worked in various engineering positions in the communications industry for over 40 years.

References

ihttps://www.analog.com/media/en/training-seminars/tutorials/MT-088.pdf

iihttps://www.ti.com/lit/ds/symlink/tlv9164.pdf?ts=1733035616360&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FTLV9164

iiihttps://www.analog.com/media/en/technical-documentation/data-sheets/MAX4051-MAX4053A.pdf

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The post Error assessment and mitigation of an innovative data acquisition front end appeared first on EDN.

India’s smart lighting industry is witnessing rapid growth, driven by innovation, sustainability, and advancements in technology. Leading companies are transforming traditional lighting systems into intelligent solutions that cater to modern lifestyles and smart homes. From globally renowned brands like Philips and Osram to trusted domestic players like Havells, Syska, and Bajaj Electricals, these companies are revolutionizing how lighting integrates with everyday life. With features such as energy efficiency, voice control, automation, and seamless connectivity to home automation platforms, the industry is setting benchmarks for convenience and customization. As the demand for smart living increases, these companies continue to push the boundaries of innovation, offering sustainable and user-centric lighting solutions across residential, commercial, and industrial sectors.

Philips India Limited
Philips India Limited, a global leader in lighting solutions, is renowned for its innovative smart lighting products that combine advanced technology with seamless functionality. The company offers an extensive range of smart bulbs, fixtures, and lighting systems designed to integrate effortlessly with popular home automation platforms like Alexa, Google Assistant, and Apple HomeKit. Known for enhancing convenience, energy efficiency, and customization, Philips continues to redefine modern lighting solutions for homes, offices, and public spaces.

Havells India Limited
Havells India Limited is a leading name in the electrical and consumer goods industry, renowned for its innovative and energy-efficient solutions. The company offers a wide range of smart lighting products, including LED bulbs, fixtures, and automation systems designed to elevate modern living. Known for its commitment to quality, sustainability, and cutting-edge technology, Havells seamlessly integrates advanced lighting solutions with user-friendly features, making it a trusted choice for homes, offices, and commercial spaces across India.

Syska LED Lights Pvt. Ltd.
Syska LED Lights Pvt. Ltd. is a prominent player in the smart lighting industry, known for its innovative and energy-efficient solutions. The company offers a diverse range of smart LED lighting products, including bulbs and fixtures, that are compatible with voice assistants like Alexa and Google Assistant. With features like customizable colors, brightness levels, and scheduling options, Syska’s smart lighting solutions are designed to enhance convenience and elevate modern lifestyles. The brand’s focus on sustainability and cutting-edge technology has made it a preferred choice for homes, offices, and commercial spaces across India.

Bajaj Electricals Ltd.
Bajaj Electricals Ltd., a trusted name with a rich legacy in the lighting industry, has successfully ventured into the smart lighting segment. The company offers a wide range of innovative products that blend traditional reliability with modern technology, including smart LED bulbs, fixtures, and automation systems. Known for its commitment to quality and energy efficiency, Bajaj’s smart lighting solutions are designed to provide convenience, customization, and sustainability, making them ideal for homes, offices, and commercial spaces across India.

Wipro Lighting
Wipro Lighting is a leading provider of innovative lighting solutions, offering a diverse range of smart lighting products tailored for residential and commercial spaces. The company focuses on delivering energy-efficient and sustainable solutions that combine advanced technology with superior design. Wipro’s smart lighting systems provide customizable options, including automation and voice-controlled features, ensuring convenience and enhanced user experiences. With a strong emphasis on sustainability and innovation, Wipro Lighting continues to set benchmarks in the lighting industry.

Osram India Private Limited
Osram India Private Limited, a subsidiary of the globally renowned lighting company Osram, is a leader in advanced smart lighting solutions. The company caters to a wide range of sectors, including automotive, residential, and commercial lighting, offering innovative and energy-efficient products. Osram’s smart lighting solutions are designed to integrate seamlessly with modern technologies, providing enhanced functionality and customization. With a strong focus on quality, innovation, and sustainability, Osram India continues to redefine lighting standards across industries.

Samsung India Electronics Private Ltd.
Samsung India Electronics Private Ltd. is a leading innovator in smart technology, offering a range of smart lighting solutions that seamlessly integrate with its extensive ecosystem of smart home devices. Designed to enhance connected living, Samsung’s smart lighting products provide advanced features like voice control, automation, and energy efficiency. With a focus on delivering convenience, customization, and cutting-edge technology, Samsung continues to redefine modern living experiences for homes and businesses alike.

The post Top 10 Smart Lighting Companies in India appeared first on ELE Times.

submitted by /u/Dull-Pressure9628 [link] [comments]

submitted by /u/Dull-Pressure9628 [link] [comments]

Arm has announced the availability of the first public specification drafted around its Chiplet System Architecture (CSA), a set of system partitioning and chiplet connectivity standards harnessed in a design ecosystem supported by over 60 companies. The companies that are part of the CSA initiative include ADTechnology, Alphawave Semi, AMI, Cadence, Jaguar Micro, Kalray, Rebellions, Siemens, and Synopsys.

CSA aims to offer industry-wide standards and frameworks by facilitating the reuse of specialized chiplets, and thus address the fragmentation caused by compatibility issues in chiplet design. It provides a shared understanding of defining and connecting chiplets while developing composable system-on-chips (SoCs).

A couple of recent announcements show how semiconductor firms are employing CSA to build chiplets as part of Arm Total Design, a platform for deploying chiplet-based compute subsystems. Arm Total Design facilitates custom silicon solutions powered by Arm Neoverse Compute Subsystems (CSS), which includes processor cores, IPs, software, and design tools.

Take the case of Alphawave Semi, which has combined its proprietary I/O dies with an Arm Neoverse CSS-powered chiplet. In this chiplet design, Alphawave Semi has employed AMBA CHI chip-to-chip (C2C) architecture specification to connect artificial intelligence (AI) accelerators.

Figure 1 The block diagram shows a chiplet’s major design building blocks. Source: Alphawave Semi

ADTechnology, another member of Arm’s CSA initiative, has utilized Neoverse CSS V3 technology to create a CPU chiplet for high-performance computing (HPC) and AI/ML training and inference applications. In this chiplet, ADTechnology has incorporated Rebellions’ REBEL AI accelerator; the chiplet design is implemented on Samsung Foundry’s 2-nm gate-all-around (GAA) process node, which has been standardized in the CSA ecosystem.

Figure 2 ADTechnology’s CPU chiplet is powered by Neoverse CSS V3 technology. Source: Arm

AMI, also a member of CSA initiative, is contributing its firmware expertise to accelerate the development of custom chiplet solutions. AMI, the first independent firmware vendor in the Arm Total Design ecosystem, offers modular framework for separating the compute and I/O subsystems. Its pre-configured and pre-tested production quality modules for the reusable chiplets streamline the time and resources required for this stage of development.

A multitude of industry-wide chiplet initiatives—spanning from Arm Total Design to Neoverse CSS to CSA—is a testament to how Arm sees the emergence of chiplets as a major opportunity. It also highlights how Arm sees its place as both chiplet solution provider and ecosystem builder.

The ecosystem-building part is especially crucial because RISC-V companies are also making inroads in the chiplets realm.

Related Content

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• Chiplets Get a Formal Standard with UCIe 1.0
• How the Worlds of Chiplets and Packaging Intertwine
• Imec’s Van den hove: Moving to Chiplets to Extend Moore’s Law

The post Arm’s Chiplet System Architecture eyes ecosystem sweet spot appeared first on EDN.

In booth 3553 at SPIE Photonics West 2025 in San Francisco, CA, USA (25–30 January), photonic simulation CAD software developer Photon Design Ltd of Oxford, UK is previewing results from its upcoming quantum dot module being added to its established laser simulator HAROLD. The expansion to HAROLD will allow simulation of gain and absorption spectra from epitaxy structures with multiple quantum dot layers using an eight-band k.p model and a full 3D stress-strain model. The module was developed and validated in collaboration with Cardiff University, which has expertise in compound semiconductor photonics...