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In booth 657 (Hall 7) at the Power Electronics, Intelligent Motion, Renewable Energy and Energy Management (PCIM 2025) Expo & Conference in Nuremberg, Germany (6–8 May), fabless firm Cambridge GaN Devices Ltd (CGD) — which was spun out of the University of Cambridge in 2016 to design, develop and commercialize power transistors and ICs that use GaN-on-silicon substrates — is demonstrating how gallium nitride (GaN) technology is delivering improved performance in higher-power applications...

Навчальний практикум-тренінг «Монтаж теплових насосів» у рамках проєкту з GIZ kpi пт, 05/02/2025 - 16:26

Gallium nitride (GaN) power IC and silicon carbide (SiC) technology firm Navitas Semiconductor Corp of Torrance, CA, USA has announced a new family of GaNSense Motor Drive ICs targeting home appliances and industrial drives up to 600W...

Supply chain solutions firm Partstat of Winter Springs, FL, USA (which specializes in semiconductor storage and inventory ownership) has announced a strategic partnership with WIN Semiconductors Corp of Taoyuan City, Taiwan — which provides pure-play gallium arsenide (GaAs) and gallium nitride (GaN) wafer foundry services for the wireless, infrastructure and networking markets. The collaboration aims to provide comprehensive long-term storage solutions for semiconductors, including die and wafer banking...

In the ever-dynamic and fast-moving world of semiconductors, why do some old transistors like 2N3904 keep on going for decades? Bill Schweber takes a closer look at this remarkable premise while analyzing why design engineers still prefer these tried-and-tested devices to reduce risk, cost, and sourcing hassles.

Read the full story at EDN’s sister publication, Planet Analog.

Related Content

• Goodbye, FR-4, we’re going to miss you
• Just give me a decent data sheet, please
• Can Analog’s Reality Chill Today’s Mega-Hype?
• Old vs. New Transistor Radio Exemplifies Advances

The post Why is the 2N3904 transistor still up after 60 years? appeared first on EDN.

Sixteen planar Schottky diodes for automotive and industrial use are now available from Nexperia in compact CFP2-HP packages. These clip-bonded FlatPower (CFP) packages offer a smaller, high-performance alternative to legacy SMA, SMB, and SMC packages, delivering improved heat dissipation while maintaining a compact 3.45 mm² footprint—particularly in space-constrained automotive designs.

This portfolio extension includes eight industrial-grade parts, such as the PMEG6010EXD, and eight AEC-Q101 qualified automotive-grade parts, such as the PMEG4010EXD-Q. The Schottky diodes provide reverse voltages ranging from 20 V to 60 V and average forward currents of 1 A and 2 A. 

Rated for junction temperatures up to 175°C, the CFP2-HP package combines an exposed heatsink and copper clip to enhance thermal performance in a small 2.65×1.3×0.68-mm (including leads) form factor. An optimized lead design ensures consistent solder joints suitable for automated optical inspection.

To learn more about Nexperia’s planar Schottky diodes in CFP2-HP packaging, click here.

Nexperia

The post Nexperia shrinks Schottky footprint with CFP2-HP appeared first on EDN.

Infineon’s 750-V CoolSiC G2 MOSFETs enhance system efficiency and power density in automotive and industrial power conversion. The second-generation G2 technology provides typical on-resistance values up to 60 mΩ, supporting a wide range of applications such as onboard chargers, DC/DC converters, xEV auxiliaries, and solar inverters. A best-in-class RDS(on) of 4 mΩ is available in the top-side cooled Q-DPAK package, which delivers strong thermal performance and reliability.

G2 technology also offers low RDS(on) × Qoss and RDS(on) × Qfr values, reducing switching losses in both hard- and soft-switching topologies, with strong efficiency in hard-switching use cases. Lower gate charge enables faster switching and reduces gate drive losses, improving performance in high-frequency applications.

The 750-V MOSFETs provide a high VGS(th) of 4.5 V and a low QGD/QGS ratio, enhancing protection against parasitic turn-on. They also support gate voltages down to -11 V, offering extended design margins and improved compatibility with other devices.

Samples of the 750-V CoolSiC G2 MOSFETs in Q-DPAK packages, with RDS(on) values of 4 mΩ, 7 mΩ, 16 mΩ, 25 mΩ, and 60 mΩ, are now available for order. For more information, click here.

Infineon Technologies 

The post SiC MOSFETs trim on-resistance and gate losses appeared first on EDN.

Murata has begun mass production of the Type 2FY combo module featuring 2.4-GHz, 5-GHz, and 6-GHz Wi-Fi 6E and Bluetooth LE 5.4. Built on Infineon’s CYW55513 combo chipset, the Type 2FY dual-radio module combines a compact form factor with low power consumption to suit space-constrained IoT devices.

The Bluetooth subsystem of the Type 2FY wireless module—supporting BR, EDR, and LE—enables LE Audio, Advanced Audio Distribution Profile (A2DP), and Hands-Free Profile (HFP) for high-quality audio streaming. It delivers PHY data rates up to 3 Mbps for Bluetooth and 2 Mbps for Bluetooth LE. The WLAN subsystem complies with 802.11a/b/g/n/ac/ax standards and achieves PHY data rates up to 143 Mbps. It uses an SDIO 3.0 interface, while the Bluetooth section connects via a high-speed 4-wire UART and PCM for audio data.

Pin-compatible with Murata’s Type 1MW (CYW43455), the Type 2FY offers a drop-in upgrade that requires no hardware redesign. Its compact 7.9×7.3×1.1-mm form factor is made possible by Murata’s proprietary packaging technology. Although based on the Wi-Fi 6E standard, the module limits bandwidth to 20 MHz to reduce cost.

To learn more about the Type 2FY wireless combo module, click here.

Murata Manufacturing  

The post Module combines triband Wi-Fi 6E with BLE appeared first on EDN.

Taiwan Semiconductor offers two series of high-voltage rectifiers, both manufactured to AEC-Q101 standards for reliable automotive performance. The fast-recovery HS1Q series provides a repetitive peak reverse voltage of 1200 V, a forward current of 1 A, and a reverse recovery time of 75 ns. The standard-recovery SxY series includes 1600-V rectifiers with forward currents of 1 A (S1Y) and 2 A (S2Y). Both series are also available in commercial-grade versions.

These devices operate within a junction temperature range of -40°C to +175°C and feature a low forward voltage drop and high surge current capability. They are well-suited for bootstrap, freewheeling, and desaturation functions in IGBT, MOSFET, and wide-bandgap gate drivers, particularly in electric vehicles and high-voltage battery systems.

The HS1Q and SxY rectifiers are available from distributors, including Mouser, Arrow Electronics, and DigiKey. Lead time for production quantities is 8 to 14 weeks. Production part approval process (PPAP) documentation is available.

HS1Q product page

S1Y product page  

S2Y product page  

Taiwan Semiconductor 

The post Rectifiers meet automotive quality standards appeared first on EDN.

The EDA trio—Cadence, Siemens EDA, and Synopsys—was prominent at the Intel Foundry Direct Connect 2025 while lining up AI-driven analog and digital design flows for Intel’s 18A process node. The offerings also included IPs ranging from SerDes to DDR5 to Universal Chiplet Interconnect Express (UCIe).

Next, these EDA outfits inked advanced packaging partnerships by offering workflows for Intel Foundry’s Embedded Multi-die Interconnect Bridge-T (EMIB-T) technology, which combines the benefits of EMIB 2.5D and Foveros 3D packaging technologies for high interconnect densities at die sizes beyond the reticle limit.

Let’s start with EDA flows.

Cadence has certified its RTL-to-GDS flow for 18A process design kit (PDK), which includes the Cerebrus Intelligent Chip Explorer, Genus Synthesis solution, Innovus Implementation System, Quantus Extraction solution, Quantus Field Solver, Tempus Timing solution, and Pegasus Verification System.

Siemens EDA has certified its Calibre nmPlatform sign-off tool and Solido SPICE and Analog FastSPICE (AFS) software tools for 18A production PDK. Likewise, the qualification of Calibre nmPlatform and Solido Simulation Suite offerings for the Intel 18A-P process node is now underway. These EDA tools are also part of the Intel 14A-E process definition and early runsets already available.

Figure 1 Synopsys unveiled an EDA and IP collaboration roadmap with Intel Foundry at the event.

IP and advanced packaging liaison

Cadence has announced a broad range of IPs for the 18A process node. That includes 112G extended long-reach SerDes, 64G MP PHY for PCIe 6.0, CXL 3.0, and 56G Ethernet, LPDDR5X/5 – 8533 Mbps with multi-standard support, and UCIe 1.0 16G for advanced packaging.

Besides IP offerings, Cadence is partnering with Intel Foundry to develop an advanced packaging workflow to leverage EMIB-T technology. This workflow will streamline the integration of complex multi-chiplet architectures while complying with standards.

Figure 2 Cadence is certifying EDA toolsets and IPs for Intel’s 18A process node.

Meanwhile, Siemens EDA has announced the certification of a reference workflow for EMIB-T technology using through silicon via (TSV) technique. It’s driven by the company’s Innovator3D IC solution, which provides a consolidated cockpit for constructing a digital twin. It also features a unified data model for design planning, prototyping, and predictive analysis of complete package assembly.

Synopsys is also employing its 3DIC Compiler to facilitate a reference workflow that enables efficient EMIB-T designs with early bump and TSV planning and optimization. It also features automated UCIe and HBM routing for high quality of results and fast 3D heterogeneous integration. Here, the 3DIC Compiler facilitates feasibility and partitioning, prototyping and floorplanning, and multiphysics signoff in a single environment.

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• Intel Financial Risks, Layoffs, Foundry Ambitions
• Intel 18A Advanced Packaging is Key to Tech Leadership
• Partners Applaud Intel Foundry’s Wider Ecosystem Approach
• Intel comes down to earth after CPUs and foundry business review

The post EDA powerhouses align offerings with Intel’s 18A node appeared first on EDN.

Sensing of current going to a load is a critical and often mandatory requirement in many designs. While there are many contact and non-contact ways to accomplish this sensing, such as using Hall-effect devices, current transformers (for AC only, of course), Rogowski coils, fluxgate sensors, among others, the in-line resistor is among the most popular due to its small size, low cost, and overall convenience. The concept is simple: measure the voltage across an accurate, known resistor, and use Ohm’s law to determine the current; this can be done with analog circuitry or digital computation.

Terminology

A quick terminology note: this inline resistor is almost always called a “shunt” resistor in application notes and data sheets, but that is a misnomer. The reason is that to “shunt” means to divert some of the current around the point being measured, and that was done is some current-measurement arrangements, especially for power in the pre-electronics era. However, the sensor resistor here is in series, so all the current flows through it.

This misleading terminology has become such an embedded part of our established verbiage that I won’t try to fight that battle. It’s similar to the constant misuse of the word “ground” for circuits which have absolutely no physical of figurative connection to Earth ground, and where “common” would be a more accurate and less confusing term.

Current sense topology

Using a sense resistor is only the first step in the current-sensing decision. The other part is topology: whether to use high-side sensing with a resistor placed between the source and the load, or low-side sensing where it is placed between the load and ground return, Figure 1.

Figure 1 The relative position of the sense resistor and the load between the power rail and ground are the only topological difference distinguishing high-side sensing (left) from low-side sensing (right), but there are significant circuit and system implementations. Source: Microchip

Tradeoffs

As with so many engineering situations, designers must also consider the tradeoffs when choosing between low-side and high-side current sensing. The relative pros and cons of each topology are a good example of the ongoing challenge of engineering tradeoffs at the intersection of power-related and classic analog circuitry.

With the high-side approach, there’s good news, at least at first glance:

• The load is grounded (a major advantage and often a requirement).
• The load is not energized even if there is a short circuit at the power connection.
• The high current that flows if the load is shorted is easily detected.

On the other hand, the high-side downsides are not trivial:

• The common-mode voltage across the sense resistor can be very high (even dangerous) and requires special consideration; it may even need galvanic isolation.
• The sensed voltage across the resistor needs to be level-shifted down to the system operating voltage to be measured and used.
• In general, increased circuit complexity and cost.

Low-side sensing has its own attributes, again starting with its positive attributes:

• The voltage across the resistor is ground referenced, a major benefit.
• The common-mode voltage is low.
• It’s fairly easy to design into the circuit with a single supply.

But with the good news, there are unavoidable low-side complications:

• The load is no longer grounded, which can have serious system-level implications.
• The load can be activated by accidental short to ground.
• The sensing arrangement can cause ground loops.
• A high load current due to a short circuit will not be detected.

Designers’ choice

In looking at the analog side of schematic diagrams over the past few years (I know, it’s an unusual “hobby”), as well as seeing what others were doing in their design discussions, I assumed that most designers were opting for high-side sensing. They were doing so despite the challenges it brings with respect to common-mode voltage, possible need for galvanic (ohmic) isolation, and other issues, especially because they wanted to keep the load grounded. Many vendors offer appropriate amplifiers, analog and digital isolation options, and subsystems so the “pain” of using high-sigh sensing is greatly reduced, and the benefits it offers were easily retained.

But maybe I am mistaken about designers’ choices. Perhaps the reason that there has been so much discussion of high-side sensing is not necessarily that it is more popular, but because it is more complicated and so needs more explanation of its details. In other words, was I confused about the cause of all this attention with the effect?

My low-side misconception

What made re-think the presumed absence of low-side sensing was the recent release of the TSC1801,  a new amplifier from ST Microelectronics specially targeting low-side sensing. It features high accuracy (0.5%), high bandwidth (2.1 MHz), has a fixed gain of 20 V/V, and is suitable for bidirectional sensing, Figure 2. The accuracy and tracking of the two internal input resistors is critical to performance in this application category.

Figure 2 The block diagram of the TSC1801 low-side current-sensing amplifier is conventional, but it’s the performance that counts; the matching and tracking of the 1-kΩ input-resistor pair is critical. Source: ST Microelectronics

It made me wonder: if only few designers are choosing low-side sensing, and it since it is relatively easy to implement, why would a part like this be needed when there are already many suitable amplifiers available?

The device also challenged another one of my apparent misconceptions: that automotive designs won’t use low-side sensing because their loads must be grounded. If that’s the case, why does ST explicitly call out automotive applications in the part’s collateral (I know, application talk is easy to do) but also provide this part with the automotive AEC-Q100 qualification? Unlike marketing “talk,” that’s a relatively costly step in design and production.

So, my probably unanswerable question is this: what’s the split between use of high-side versus low-side sensing in designs? How does that split vary with end-application? Is some market-research firm willing to look into it for me?

If you want to know more about the two current-sensing options, there are many good sources available online (see References). While there is some overlap among them, as you’d expect, some offer additional interesting perspectives as well based on their products and expertise.

Have you ever had to defend your choice of one or the other in a design? What were the arguments for and against the approach you chose?

Related Content

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• Current-sense resistor brings two related and challenging tradeoffs

References (and there are many more!)

• All About Circuits, “Resistive Current Sensing: Low-Side vs. High-Side Sensing”
• Analog Devices, “ AN-105: Current Sense Circuit Collection: Making Sense of Current”
• Microchip Technology, “High-side versus Low-side Current Sensing”
• Renesas, “Current Sensing with Low-Voltage Precision Op-Amps”
• Rohm, “Low-Side Current Sensing Circuit Design”
• Texas Instruments, “Precision, low-side current measurement”
• Texas Instruments, “An Engineer’s Guide to Current Sensing”
• Texas Instruments, “Low-Side Current Sense Circuit Integration”

The post Do you use low-side current sensing? appeared first on EDN.

250€ later... submitted by /u/FloxiRace [link] [comments]

Beneq of Espoo, Finland says that its Transform atomic layer deposition (ALD) cluster tool has been qualified for volume production of gallium nitride (GaN)-based power devices on 8-inch GaN-on-silicon wafers by a tier-1 GaN power device manufacturer in Asia...

BluGlass Ltd of Silverwater, Australia — which develops and manufactures gallium nitride (GaN) blue laser diodes based on its proprietary low-temperature, low-hydrogen remote-plasma chemical vapor deposition (RPCVD) technology — has received $2.3m in commitments from institutional and sophisticated investors and the board and management via an oversubscribed share placement at an issue price of $0.013 per share. BluGlass is also undertaking a share purchase plan (SPP offer) to enable eligible shareholders in Australia and New Zealand to acquire up to $100,000 worth of shares at the lower of $0.013 or a 2.5% discount to the 5-day volume-weighted average price (VWAP) for shares prior to the closing date for the SPP offer...

A Malaysian semiconductor company has opened a new R&D Innovation Hub in Wales and signalled its intent to work with UK companies on designing next-generation semiconductor chips...

Wolfspeed Inc of Durham, NC, USA — which makes silicon carbide (SiC) materials and power semiconductor devices — has mutually agreed with Neill Reynolds to conclude his role as executive VP & chief financial officer, effective 30 May, to pursue another professional opportunity...

Стажування в компанії Ajax Systems: для чого, для кого і з якими перспективами Інформація КП чт, 05/01/2025 - 08:09

Got tired of manually turning on my laptop cooling pad(IETS600). So I used a leftover Arduino to tap into the PWM pin of the fan motor. Communicate via USB Serial from a c# program that monitors which app is open, and if its a game, will send the instruction to the Arduino to turn on the PWM pin at whatever speed I want :) submitted by /u/SolitaryMassacre [link] [comments]

Machine intelligence enables a new era of productivity and is becoming an integral part of our lives and societies across many disciplines and functions. Machine intelligence relies on computing platforms that execute code, decipher data, and learn from trillions of data points in fractions of a second. The computing hardware for machine intelligence needs to be fast, extremely reliable, and powerful. Designers must combine solid design practices with self-diagnostics and continuous monitoring schemes to prevent or manage potential faults such as data corruption or communication errors in the system.

An essential element in such monitoring systems is the supervision and monitoring of power rails throughout the system. In this article, I’ll examine and describe some of the best practices for designing supply and processor rail-monitoring solutions in enterprise applications.

Understanding power architectures

Enterprise computing relies upon a complex power architecture that delivers energy from AC sources to every point of load in the system. Figure 1 is a high-level illustration of elements in a server rack.

Figure 1 High-level server rack diagram with distributed battery backup units (BBUs) and power supply units (PSUs) connected to a busbar that then distributes AC power thought to the rack. Source: Texas Instruments

A high-efficiency—typically >91% for a titanium-grade design—PSU converts and then distributes AC power (208 V or 240 V) to 48 V throughout the rack. The power distribution board (PDB) then converts DC power to various voltages, typically 12 V, 5 V, and 3.3 V, for feeding to subsystems including the motherboard, storage, network interface cards (NICs), and switches, and system cooling. Each of these subsystems, in turn, has its own locally managed power architecture. A battery backup unit (BBU) maintains system power during any AC line disruptions.

Designing for durability

Each subsystem requires a reliable power design and monitoring. Let’s examine some of these subsystems further.

The PSU

PSUs have several types of monitoring to ensure reliable operation and delivery. They monitor the AC mains’ output voltage while also detecting internal temperature, over- and under-voltage conditions, and short circuits.

Server designs also require N+1 redundancy: “N” represents the minimum number of necessary PSUs to meet server power needs. An additional PSU (“+1”) is available if one of the other PSUs encounters a temporary or permanent fault or failure.

The PDB

As mentioned earlier, the PDB converts a 48-V input to several DC rails, including 12 V, 5 V, and 3.3 V. Although comparators with simple shunt references can be used to monitor each of these rails for overvoltage and undervoltage conditions, modern-day voltage supervisors offer a small footprint and ease of design and provide additional benefits such as hysteresis and input-sense delay for noise immunity, an adjustable output delay to avoid false triggers during power up, and higher accuracy for the highest detection reliability.

Many new voltage supervisors, such as the Texas Instruments (TI) TPS3760, are rated for voltages as high as 70 V, and can monitor 48 V and other bus voltages directly without needing a low-dropout regulator or dedicated power rail. In addition to real-time supervision, advanced monitoring integrated circuits can provide telemetry data on the most vital rail voltages to enable predictive maintenance and historical fault analysis, significantly reducing system downtime.

Another design consideration is early power failure detection. These circuits monitor specific supply rails for sudden voltage drops and alert the host or processor to take swift action in anticipation of a power loss. A high-speed and precise undervoltage supervisor performs this function. Figure 2 illustrates an example of this type of design and its timing diagram.

Figure 2 A voltage supervisor example with a timing diagram, monitoring the 0.85 to 6.0 V supply rail for sudden voltage drops to take action in the event of a power loss. Source: Texas Instruments

The motherboard

Motherboard power rails present designers with a different set of challenges, which I’ll examine in more detail in this section.

Processor rail monitoring

Modern processors are very sensitive to variations in their power supply rails. There are many reasons for this, but it is mostly because these processors operate at voltages as low as 0.7  V with reduced tolerance for voltage fluctuations and utilize features such as dynamic voltage and frequency scaling.

Consequently, the processors require high-precision window voltage supervisors. Window supervisors monitor the supply voltage for both overvoltage and undervoltage conditions. Devices targeted for these applications, such as TI’s TPS389006, have an accuracy of ±6 mV. Designers can adjust the glitch filter up to 650 ns through the I2C registers.

Another essential aspect of power-rail design is the system’s ability to maintain stability during rapid load transients. Modern processors can shift from idle to full load in microseconds, causing sharp voltage droops or overshoots if the power supply and monitoring systems are not designed with fast loop responses and the appropriate output capacitance.

Proper power-up and power-down supply sequencing is also essential for the motherboard and processor. Sequencing ensures proper system initialization—for instance, a processor may require that the memory controller be operational before executing instructions. Sequencing also prevents large inrush currents and voltage spikes during power-up. During power-down, sequencing maintains data integrity by giving memory and storage devices enough time to save data or complete operations before losing power.

Figure 3 provides a design example for the monitoring and sequencing of the supply rails.

Figure 3 Supply-rail monitoring and sequencing examples for proper system initialization. Source: Texas Instruments

Finally, managing inrush current is vital for systems with hot-swappable components to avoid tripping circuit protection or destabilizing the power bus. Hot-swap controllers equipped with integrated current limiting and fault detection ensure smooth insertion and removal without disrupting other active subsystems.

Future trends

The enterprise industry is poised to transition to a 400 VDC power-distribution system, which would increase efficiencies by eliminating redundant power-conversion stages and I²R losses and reduce copper usage and costs. Such high-voltage systems will demand even more high-powered rail monitoring, with faster fault detection and isolation, to maintain safety and system uptime. A new generation of high-voltage monitoring solutions is emerging to address the future design needs in this space.

Compelling power architectures are essential for ensuring reliable and uninterrupted operation in enterprise systems. Combining solid power-design practices with real-time monitoring and early fault detection helps prevent unexpected failures and protects critical workloads. As system complexity grows and power architectures evolve, especially with the shift toward higher voltage distribution, careful planning and rail supervision will continue playing a role in delivering safe and efficient performance.

Masoud Beheshti leads application engineering and marketing for Linear Power at Texas Instruments. He brings extensive experience in power management, having held roles in system engineering, product line management, and marketing and applications leadership. Masoud holds a bachelor’s degree in electrical engineering from Ryerson University and an MBA with concentrations in marketing and finance from Southern Methodist University.

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• Data center power meets rising energy demands amid AI boom
• Data center next generation power supply solutions for improved efficiency
• Optimize data-center power delivery architecture

 

The post Power Tips #140: Designing a data center power architecture with supply and processor rail-monitoring solutions appeared first on EDN.

I’ve been working on an article about vacuum tube triodes. Yes, they’re still being used in the manufacture of high-end audio equipment and in musical instrument amplifiers. A triode has three electrodes: a plate (in American parlance, “anode” in the UK), a control grid, and a cathode.

Figure 1 contains a typical graph of plate currents verses plate voltages for different grid voltages, with grid voltages labeled on each curve as 0, -0.5, -1. 0…-5.0. All voltages are with respect to the cathode. Pretty clear, right?

Figure 1 A typical graph of triode characteristics from a manufacturer’s datasheet.

Part of the article involves measuring triode characteristics and constructing graphs in Excel which display the measured data. Figure 2 shows the first attempt to present this graphically.

Figure 2 A simple display of the acquired data, the colors shown are defaults selected by Excel.

The data for the left-most curve was entered first; the one immediately to the right next, and so on. Excel assigns curve colors in the order shown by default. There doesn’t seem to be any order to the progression of colors that might aid in scanning through the LEGEND table on the right to find a curve’s grid-voltage name.

And some of the colors are so similar that it can be challenging to find the right association. There’s also no easy way to label the LEGEND table to indicate the type of information it contains other than adding a text box to the chart. But if you reposition the chart, the text box must be moved separately.

There must be a better way to convey this information to the reader. Suppose the colors could be changed to a more recognizable progression, such as the visible spectrum-related order of the color bands on a resistor which indicates its resistance. Furthermore, what if this reordering could be automated with a keyboard click for any chart? We’re talking Excel macros, right? We could manually make the change for one graph and record the steps as a macro. But we’d have to know how many curves a particular graph had to use such. Hmmm.

Ok, let’s instead create a macro using the subroutine “sub” feature in Excel’s built-in Visual Basic for Applications (VBA) code. The code should be easily able to handle a chart with any number of curves. Now, I’ve worked with VBA, but I’m no expert. So, when I come across a feature I need but I’m not familiar with, I have to do an online search, find a reference that I can understand, and apply and test it. Rinse and repeat. This is tedious. Is there a work-around for a time-crunched, lazy guy like me? Turns out the answer is yes: AI.

I asked one of these well-known beasts how I might automatically re-order the colors assigned to Excel chart curves. The code it returned in reply worked the first time and came with comments! I’ve made a few changes and added some comments of my own to produce the code listed in Appendix 1. Clicking to select the chart shown in Figure 2 and running this code produces the results seen in Figure 3.

Figure 3 The curve colors progress in the same order as the resistance color-code bands on resistors, and backgrounds were colored for better visibility of the yellow and white curves.

In addition to reordering the colors, the code has thickened the curves and added a background color of light grey for better visibility. All the code is commented, and the background and curve thicknesses can be easily modified. You’ll notice that there are eleven curves but only ten colors, so the -5.0-volt curve is the same color as the 0.0-volt curve; the colors automatically repeat.

But one of the features of the code is its ability to change what’s called the “dashstyle” of the curves each time the colors repeat. I believe that the code is adequately commented to allow a user to locate and modify or eliminate this behavior if desired.

Labeling the curves

I was happy with this until I looked back at the chart in Figure 1. Why refer to a legend on the side of the graph if I could put the grid-voltage curve names right next to the curves themselves? I went back to the AI engine to ask for help. This time, I got code that didn’t work the first time. But that didn’t stop me; when I described the problems I was seeing specifically, I got debugging help! Clicking to select the chart rendered in Figure 2, the Appendix 2 code produced the graph seen in Figure 4.

Figure 4 Each curve’s grid-voltage name is placed next to the end of the curve.

Maybe you’d like to combine effects by running the Appendix 1 code on Figure 4’s chart to produce that seen in Figure 5.

Figure 5 The Appendix 1 and Appendix 2 codes are run sequentially: first the code which appends the curve names near the ends of the curves, and then the code which reorders the curve colors.

There’s no longer any need for the legend box, so I manually deleted it after running the codes.

I found the two VBA programs presented in the first two Appendices to provide a simple, quick, and automatic means to enhance the readability of basic graphs in Excel. I’m keeping them in my Excel toolbox. For those unfamiliar with how to use VBA, Appendix 3 should prove helpful.

Christopher Paul has worked in various engineering positions in the communications industry for over 40 years.

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APPENDIX 1

Code to specify the colors assigned to curves on a chart. Select a chart and run the macro associated with this code.

Sub ApplySpectrumColors() Dim cht As Chart, series As series, i As Integer Dim colors_ As Variant, line_type As Variant, the_weight As Variant ' Define the spectrum colors as RGB values ' (see https://www.teoalida.com/wordpress/wp-content/uploads/Excel-colors-with-RGB-values-by-Teoalida.png) colors_ = Array(RGB(32, 0, 0), RGB(160, 140, 0), RGB(255, 128, 128), RGB(255, 192, 128), RGB(255, 255, 0), RGB(0, 192, 0), _ RGB(96, 255, 255), RGB(176, 96, 255), RGB(211, 211, 211), RGB(255, 255, 255)) ' Define the line types. See https://learn.microsoft.com/en-us/office/vba/api/office.msolinedashstyle line_type = Array(msoLineSolid, msoLineLongDash, msoLineDashDot, msoLineSquareDot) ' Define line_type weights (thicknesses) the_weight = Array(3, 3, 4, 4) ' Reference the active chart On Error Resume Next Set cht = ActiveChart On Error GoTo 0 If cht Is Nothing Then MsgBox "Please select a chart before running this script.", vbExclamation Exit Sub End If ' Loop through each series and assign spectrum colors,line styles and weights i = 0 For Each series In cht.SeriesCollection series.Format.Line.ForeColor.RGB = colors_(i Mod (UBound(colors_) + 1)) series.Format.Line.DashStyle = line_type(Int(i / (UBound(colors_) + 1)) Mod (UBound(line_type) + 1)) series.Format.Line.Weight = the_weight(Int(i / (UBound(colors_) + 1)) Mod (UBound(the_weight) + 1)) i = i + 1 Next series ' Change Plot Area Background Color cht.PlotArea.Format.Fill.ForeColor.RGB = RGB(236, 236, 236) ' Change Legend Background Color cht.Legend.Format.Fill.ForeColor.RGB = RGB(236, 236, 236) MsgBox "Spectrum colors applied successfully!", vbInformation End Sub APPENDIX 2

Code to place the names of each curve next to that curve on a chart. Select a chart and run the macro associated with this code.

Sub LabelCurvesWithStyle() Dim cht As Chart, srs As series, pt As Point, i As Integer, seriesCount As Integer Dim validSeriesCount As Integer, lastValue As Variant On Error Resume Next Set cht = ActiveChart ' Get the active chart On Error GoTo 0 If cht Is Nothing Then ' If no chart is selected MsgBox "No chart is selected. Click on a chart and try again.", vbExclamation, "Error" Exit Sub End If seriesCount = cht.SeriesCollection.Count 'number of series in the chart validSeriesCount = 0 ' Loop through each series in the chart For Each srs In cht.SeriesCollection If srs.Points.Count > 0 Then i = srs.Points.Count ' Last point in the series lastValue = srs.Values(i) ' Get the last Y value ' Check if last value is numeric before labeling If IsNumeric(lastValue) And Not IsEmpty(lastValue) Then Set pt = srs.Points(i) ' Add a label pt.HasDataLabel = True pt.DataLabel.Text = srs.Name pt.DataLabel.Position = xlLabelPositionRight ' for otherlabel positions, see ' https://learn.microsoft.com/en-us/office/vba/api/Excel.XlDataLabelPosition With pt.DataLabel.Font ' Set font styling .Name = "Arial" ' Font type .Size = 10 ' Font size .Bold = True ' Make text bold .Color = RGB(255, 0, 0) ' Font color (Red) '.Italic = True ' Uncomment for italic text End With validSeriesCount = validSeriesCount + 1 Else MsgBox ("Series labeled " & srs.Name & " has non-numeric data.") End If End If Next srs If validSeriesCount < seriesCount Or validSeriesCount = 0 Then MsgBox "Non-numeric data found in at least one series. No labels applied." End If End Sub APPENDIX 3

For those unfamiliar with Excel’s VBA, this AI-generated tutorial should be helpful.

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