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Texas Instruments (TI) is demonstrating new power-management products and designs at the Power Conversion, Intelligent Motion (PCIM) Expo and Conference, May 6-8 in Nuremberg, Germany. At the show, TI is featuring semiconductor advancements for sustainable energy, automotive, USB Type-C and USB Power Delivery (PD), robotics, and motor control, including:

• Industry’s first automotive-qualified inductor-inductor-capacitor (LLC) controller for light electric vehicle charging: TI is debuting its new primary-side LLC controller, the UCC25661-Q1, in a three-stage AC/DC battery charger demonstration for electric two-wheelers. The demonstration showcases how the UCC25661-Q1 controller enables engineers to design a highly efficient and reliable power supply with double the power density using integrated features and TI’s patented Input Power Proportional Control (IPPC).

• 65W dual-port USB PD charger with self-biasing gallium nitride (GaN) flyback: TI is showcasing the industry’s first self-biasing GaN flyback converter, the UCG28826, in a demonstration of its 65W dual-port USB PD charger reference design. Designed for next-generation fast-charging applications, the UCG28826 converter delivers 65W across 90VAC to 264VAC in this reference design, enabling engineers to meet strict efficiency standards, minimize standby power consumption and increase power density.
• Short-circuit detection reference design with Flex: In collaboration with electronics manufacturer Flex, TI is demonstrating a comparison of shunt-based, desaturation and Hall-effect sensor methods for short-circuit detection in automotive onboard chargers and DC/DC converters. Booth visitors will learn how to enhance silicon carbide (SiC) metal-oxide semiconductor field-effect transistor (MOSFET) reliability by optimizing the current-sensing location, method and component selection, and printed circuit board layout to meet end-customer safety requirements.

Why it matters

Rising data consumption levels, shrinking consumer electronics, and a focus on renewable energy and vehicle electrification place unique demands on power engineers to maximize efficiency, push power into smaller spaces, and support higher voltages across all applications.

“TI’s broad portfolio and deep system design expertise on display at PCIM enable power engineers to achieve high performance, reliability and scalability in their next-generation applications,” said Mark Ng, director, Automotive Systems. “In automotive, for example, our power-dense and efficient semiconductors enable nearly every aspect of system design, from improved driving range to optimized charging, and new architectures for a feature-rich experience.”

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Hero MotoCorp, in collaboration with the Automotive Skills Development Council, launched Phase 2 of its flagship CSR initiative, Project Saksham, with a grand Training Inauguration Ceremony.

The initiative, aims to empower 20,000 women across India by providing specialized training for diverse roles in the automotive sector, including sales, service, and emerging areas like Electric Vehicle (EV) maintenance and diagnostics. This Event Was hosted in partnership with NIFA Infocom Services Pvt. Ltd. at the Pradhan Mantri Kaushal Kendra, Agra.

The ceremony was graced by Smt. Hemlata Divakar Kushwaha, Mayor of Agra Municipal Corporation, who served as the Chief Guest. She praised the program’s vision, stating, “Empowering women with technical skills not only benefits them individually but strengthens our economy and community. Initiatives like Project Saksham are crucial steps towards a more inclusive future.”

Adding to the occasion, Mr. Vinkesh Gulati, Vice President, ASDC, emphasized the broader industry impact of the initiative. “The automotive sector is undergoing a major transformation with emerging technologies like EVs. It is vital that women are not just participants but leaders in this evolution. Through Project Saksham, we are committed to building a skilled, gender-diverse workforce ready to meet the demands of the new mobility era,” Mr. Gulati remarked.

Phase 2 of Project Saksham builds on the success of the first phase by expanding its geographic footprint and curriculum. Alongside technical training, the program includes modules on soft skills, workplace readiness, and financial literacy to ensure holistic development.

The NIFA Infocomp-operated centre, Agra will serve as a key hub for delivering this transformative training. With initiatives like Project Saksham, Hero MotoCorp and ASDC reaffirm their dedication to fostering an inclusive, skilled workforce that will shape the future of the Indian automotive industry.

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NUBURU Inc of Centennial, CO, USA — which was founded in 2015 and develops and manufactures high-power industrial blue lasers — has received a notice from NYSE Regulation indicating that it not in compliance with Section 1003(a)(i) of the NYSE American LLC Company Guide, which requires a company to maintain stockholders’ equity of $2m or more if it has reported losses from continuing operations or net losses in two of its three most recent fiscal years...

Analysts estimate that the global market for semiconductors will exceed $600 billion in 2025 and hit the $1 trillion mark by 2030, suggesting a CAGR of over 8%. It’s no surprise that the drivers behind this growth include the semiconductor devices and systems needed to support the rapidly growing segments like artificial intelligence (AI), automotive industries (autonomous driving and EVs), data centers and cloud computing, communications, and consumer electronics.

Electronic design automation (EDA) plays a critical role in the growth of the global semiconductor industry. Yet it’s relatively unknown outside of those who participate directly in the industry. In order to understand the value of EDA, it helps to grasp where EDA fits within the semiconductor supply chain.

Semiconductor value chain

The semiconductor supply chain is both complex and globally distributed. If we consider the portion of the supply chain from design through finished semiconductor products—packaged chips and systems, for example—it comprises the parts shown below.

Figure 1 The semiconductor supply chain encompasses product specification, chip design and verification, manufacturing and assembly, and test and packaging. Source: Bob Smith

Semiconductor companies are the primary users of EDA tools required for designing chips that may contain upward of billions of transistors. In addition to EDA tools, these companies also use semiconductor intellectual property (IP) blocks that are pre-designed and characterized functional blocks to help simplify the design process.

The beginning of the process that feeds the supply chain is the development of new chip designs. Leading into design is the upfront planning, including assessing the target market(s) and market timing requirements—both too early and too late must be avoided—and functional and performance characteristics. Once the plan is in place, the chip design process begins.

Chip design is a complex process that starts with architectural planning and detailed specifications on chip functionality and performance (Figure 2). The next steps take the design through different levels of abstraction and verification. All the blocks in the diagram are served by EDA vendors providing many different EDA products.

Figure 2 Chip design and verification are complex and require several steps before the design can be handed off to manufacturing. Source: Bob Smith

Register transfer level (RTL) design creates a software model of the chip using a hardware description language (HDL) such as Verilog or VHDL. This design must then be rigorously verified using a simulator, and in some cases, the use of hardware-assisted verification known as hardware emulators or FPGA prototypes. Once the software-based design is verified, the next step is another transformation.

Synthesis takes the RTL software design and transforms it into a logic-level netlist. The netlist is a collection of logical components and blocks interconnected to form the circuitry that will perform the chip’s functions. Additional verifications steps are performed after synthesis to ensure that the netlist works as expected.

Once the netlist is verified, the next step is the creation of the actual physical geometries used to define the structures (transistors) and interconnects (wires) that will be manufactured. This step is called place and route. “Place” refers to locating the functional blocks on the chip and “route” speaks to generating the wires that interconnect the blocks.

Physical design is followed by exhaustive verification steps that include checking functionality and timing. Other checks such as power and thermal integrity and design and electrical rule checking assess that requirements for the target semiconductor process have been met. These verification steps are the “gatekeepers” that must be satisfied before the design can be released to manufacturing.

The manufacturing industry includes providers of the equipment and materials that are used to manufacture semiconductor chips. Once manufactured, the fabricated chips are handed off to companies that specialize in the next step of assembly, test, and packaging.

In this final step before the chips can be delivered to market, these companies test the chips and then assemble them into packages. The packaged chips then head to distribution channels that ultimately deliver the chips to product manufacturers to assemble into their products.

The value of EDA

The total revenue contribution of these segments of the supply chain in 2024 was approximately $420 billion. In this same period, the EDA segment generated about $20 billion or ~ 5% of the total revenue. While this sounds like a small piece of the puzzle, the value of EDA goes far beyond what revenue numbers convey.

Where is this “unseen” value in EDA coming from? The answer lies in the complexities of the design process itself, and the driving need to keep up with the competition.

Modern chip design is both complex and challenging. The most sophisticated chips may contain tens of billions of transistors—far beyond the realm of unaided manual design.

Moreover, time to market is everything in the highly competitive market. The ability to design and deliver a new chip to address a market need on time and with the features that will ensure success in the end market is a daunting task. Design teams invest in the EDA and verification tools that help them optimize these tradeoffs.

The cost of designing and verifying a leading-edge chip can be in the hundreds of millions of dollars to go from concept to design completion and release to manufacturing. A design flaw or late delivery can mean the end of a promising new chip and lead to hundreds of millions of dollars or more in unrecoverable costs. Failure is not an option.

EDA tools are the engines that drive the design process and allow semiconductor manufacturers to meet ever-shrinking market windows. The EDA tools themselves and the methodology and flows (“recipes”) that each company develops around them are regarded as highly valuable trade secrets.

While time to market is at the top of the list, there are other considerations that EDA tools also address. These can include product safety, product lifecycle and suitability for specialized applications for markets such as vehicles, medical devices, and defense and aerospace. All these requirements mandate sophisticated design and verification tools that can be applied to ensure designs meet these needs—and deliver on time.

EDA plays another valuable role in the chain as a key driver in bringing new process technologies to market. Development of new semiconductor processes relies on tight partnerships between the process developers and the EDA companies.

It’s expensive to bring a new process to the point where it has been characterized and dialed-in so that it can deliver the yield and performance that potential customers will demand. But to be able to accept designs, semiconductor manufacturing must be able to support the customers with verified EDA tools and flows that will support the new technology. No tool support, no customers.

Semiconductor design is at the front end of the supply chain and the EDA industry provides the tools that are essential for turning out today’s complex chip designs. Without availability of these design automation tools, the new innovations and products that drive the global semiconductor industry forward would come to a screeching halt and the supply chain would wither and atrophy.

Value beyond licensing fee

The insatiable demand for new products from the electronics industry keeps intense pressure on the semiconductor manufacturers to deliver the future. In turn, this demands that the EDA industry continually deliver new tools, technologies and functionality that support the ongoing move to the future. Simply said, there would be no new products or growth in the global electronics market without EDA. Measuring the EDA market solely on revenue contribution vastly understates the value that EDA delivers to the global semiconductor industry.

The ultimate value that the EDA industry delivers to the global semiconductor industry is almost incalculable. Certainly, it is far beyond the licensing and maintenance revenues that the industry generates.

Robert (Bob) Smith is executive director of the ESD Alliance, a SEMI technology community, representing members in the electronic system and semiconductor design ecosystem responsible for its management and operations.

 

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Rohde & Schwarz and industry partners will be providing a virtual platform for RF design engineers to enhance their RF expertise and engage with industry leaders at the forefront of innovation. The online event will feature informative presentations by experts from Rohde & Schwarz, The University of Cardiff, Maury Microwave, Qorvo, MathWorks, Analog Devices and Greenerwave.

At the virtual RF Testing Innovations Forum 2025, taking place from May 20 to 21, 2025, design engineers will be able to gain invaluable insights into the latest advancements in RF testing methodologies and technologies. Led by experts from Rohde & Schwarz and industry partners, the two-day event will explore the critical factors expected to shape the future of RF testing.

Agenda highlights of Session 1

Day one of the two-day online event will start by covering subjects such as how to enhance the accuracy of mmWave non-linear vector network analyzers, which monitor harmonic distortion, intermodulation and other non-linear effects that can influence mmWave system performance.

Participants will discover innovative approaches to wideband modulated load pull including how to address typical limitations. This novel approach to RF front-end testing uses an R&S RTP oscilloscope plus an R&S SMW200A wideband vector signal generator. The experts will then take a look at the importance of achieving stable and accurate test levels using closed-loop power control. Areas covered will include supported signal forms, suitable test instrumentation and what needs to be considered to achieve the best results.

Two further presentations will take place before the first day’s session closes at 1:00 pm. One presentation will explore load pull techniques for next generation sub-THz components while the next will look at how to characterize wideband active RF components using real-world stimulus signals, in particular how using a fully modulated signal can speed up the overall testing process as it offers deep insights in a single measurement.

Agenda highlights of Session 2

Day two will open with a keynote interview exploring the evolution of vector network analyzers, considering growing demand for faster and more accurate test solutions while keeping costs down. RF components are becoming more sophisticated, having more features integrated into them and offering unseen performance and frequency coverage, posing new challenges to RF design engineers.

This will be followed by a presentation on dealing with the challenges of on-wafer characterization of bulk acoustic wave filter harmonics, especially in achieving accurate measurements and minimizing distortions. The speaker will outline how to use an advanced probing technique when characterizing the second harmonic performance of BAW filters.

The next presentation will look at how to accelerate antenna pattern analysis and simulation using MATLAB. There will be a particular focus on building the full 3D radiation pattern from a subset of 2D pattern measurements using analytical methods and AI techniques. Participants will also learn how to integrate the measured data into a system level simulation model for wireless communication and radar systems. A talk on dataset acquisition optimization for AI-controlled electronically steerable antennas will then take place before a break.

The RF Testing Innovations Forum 2025 will conclude with a presentation on advanced measurement techniques for ultra-wideband software-defined radios and an outline of the role of the R&S ZNB3000 VNA in RF front-end production.

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NUBURU Inc of Centennial, CO, USA — which was founded in 2015 and develops and manufactures high-power industrial blue lasers — has initiated a strategic working group dedicated to revitalizing its Blue-Laser business unit. The initiative aims to redefine the company’s approach to leveraging laser technology within the defense sector...

Materials supplier Nitride Global of Wichita, KS, USA says it has been accepted into the Plug and Play Semiconductor Accelerator Program. Out of more than 600 applicants, Nitride Global was selected as one of only 20 standout companies chosen to participate in this year’s cohort, recognized for driving the future of semiconductor innovation...

X Міжнародна науково-практична конференція «Математика в сучасному технічному університеті» kpi вт, 05/06/2025 - 11:37