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Learn how integrated battery monitoring and motor control in outdoor power equipment designs ensure safety, extend battery life, and simplify development with high-voltage integration.

The UK Semiconductor Centre has moved into its next phase of mobilization with the announcement of its newly formed Interim Steering Group...

Hello everyone! Thank you for the incredible support on my first post. For my next project, I built a heart-shaped circuit with 15 LEDs on a zero PCB, designed to have a beautiful fading glow powered by a capacitor bank. I started by simulating everything in Tinkercad to get my component list, which proved to be a lifesaver. The build had its challenges, from getting the heart shape symmetrical to using mismatched capacitors to create the power bank. However, the biggest villain of this project was my 25W soldering iron—it just wasn't hot enough, making soldering a complete disaster. After a desperate Amazon order, a new 60W iron saved the day and made finishing the project a buttery-smooth experience! I'm incredibly proud of what I created. For a future version, I'm thinking of adding a USB-C port for power and finding a way to make the LED glow last much longer. Let me know what you think! submitted by /u/armtech_897 [link] [comments]

Відверта розмова КПІшників з офіцером «Азову» KPI4U-2 чт, 10/16/2025 - 19:37

Infineon Technologies AG of Munich, Germany says that it is supporting the 800V direct current (VDC) power architecture announced by NVIDIA of Santa Clara, CA, USA at Computex 2025 for AI infrastructure...

Covering bandwidths from 100 MHz to 1 GHz, R&S MXO 3 oscilloscopes capture up to 4.5 million waveforms/s with 99% real-time visibility. According to R&S, the 4- and 8-channel models deliver responsive, precise performance in a space-saving form factor at a more accessible price point.

The MXO 3 offers hardware-accelerated zone triggering at up to 600,000 events/s, 50,000 FFTs/s, and 600,000 math operations/s, with a minimum trigger re-arm time of just 21 ns. It resolves small signal changes alongside larger ones with 12-bit vertical resolution at all sample rates, enhanced 18-bit HD mode, 125 Mpoints of standard memory, and a maximum sample rate of 5 Gsamples/s.

Both the 4- and 8-channel scopes come in a portable 5U design, weighing only about 4 kg, and fit easily on benches, even crowded ones. Each includes an 11.6-in. full-HD display with a capacitive touchscreen and intuitive user interface. VESA mounting compatibility allows additional flexibility in engineering environments.

Prices for the MXO3 oscilloscopes start at just over $6000.

MXO 3 product page

Rohde & Schwarz 

The post Fast, compact scopes reveal subtle signal shifts appeared first on EDN.

Three magnet-free inductive position sensors from Renesas provide a cost-effective alternative to magnetic and optical encoders. With different coil architectures, the ICs address a wide range of applications in robotics, medical devices, smart buildings, home appliances, and motor control.

The dual-coil RAA2P3226 uses a Vernier architecture to deliver up to 19-bit resolution and 0.01° absolute accuracy, providing true power-on position feedback for precision robotic joints. The single-coil RAA2P3200 prioritizes high-speed, low-latency operation for motor commutation in e-bikes and cobots, with built-in protection for robust industrial use. Also using single-coil sensing, the RAA2P4200 offers a compact, cost-efficient option for low-speed applications such as service robots, power tools, and medical devices.

All three sensors share a common inductive sensing core that enables accurate, contactless position measurement in harsh industrial environments. Each device supports rotary on-axis, off-axis, arc, and linear configurations, and includes automatic gain control to compensate for air-gap variations. A 16-point linearization feature enhances accuracy.

The sensors are now in volume production, supported by a web-based design tool that automates coil layout, simulation, and tuning.

RAA2P3226 product page 

RAA2P3200 product page 

RAA2P4200 product page 

Renesas Electronics 

The post Inductive sensors broaden motion-control options appeared first on EDN.

GaN and SiC power semiconductors from AOS support NVIDIA’s 800-VDC power architecture for next-gen AI infrastructure, enabling data centers to deploy megawatt-scale racks for rapidly growing workloads. Moving from conventional 54-V distribution to 800 VDC reduces conversion steps, boosting efficiency, cutting copper use, and improving reliability.

The company’s wide-bandgap semiconductors are well-suited for the power conversion stages in AI factory 800‑VDC architectures. Key device roles include:

• High-Voltage Conversion: SiC devices (Gen3 AOM020V120X3, topside-cooled AOGT020V120X2Q) handle high voltages with low losses, supporting power sidecars or single-step conversion from 13.8 kV AC to 800 VDC. This simplifies the power chain and improves efficiency.
• High-Density DC/DC Conversion: 650-V GaN FETs (AOGT035V65GA1) and 100-V GaN FETs (AOFG018V10GA1) convert 800 VDC to GPU voltages at high frequency. Smaller, lighter converters free rack space for compute resources and enhance cooling.
• Packaging Flexibility: 80-V and 100-V stacked-die MOSFETs (AOPL68801) and 100-V GaN FETs share a common footprint, letting designers balance cost and efficiency in secondary LLC stages and 54-V to 12- V bus converters. Stacked-die packages boost secondary-side power density.

AOS power technologies help realize the advantages of 800‑VDC architectures, with up to 5% higher efficiency and 45% less copper. They also reduce maintenance and cooling costs.

Alpha & Omega Semiconductor

The post AOS devices power 800-VDC AI racks appeared first on EDN.

Keysight’s AE6980T Optical Automotive Ethernet Transmitter Test Software qualifies optical transmitters in next-gen nGBASE-AU PHYs for IEEE 802.3cz compliance. The standard defines optical automotive Ethernet (2.5–50 Gbps) over multimode fiber, providing low-latency, EMI-resistant links with high bandwidth, and lighter cabling. Keysight’s platform helps enable faster, more reliable in-vehicle networks for software-defined and autonomous vehicles.

Paired with Keysight’s DCA-M sampling oscilloscope and FlexDCA software, the AE6980T offers Transmitter Distortion Figure of Merit (TDFOM) and TDFOM-assisted measurements, essential for evaluating optical signal quality. Device debugging is simplified through detailed margin and eye-quality evaluations. The compliance application also automates complex test setups and generates HTML reports showing how devices pass or fail against defined limits.

AE6980T software provides full compliance with IEEE 802.3cz-2023, Amendment 7, and Open Alliance TC7 test house specifications. It currently supports 10-Gbps data rates, with 25 Gbps planned for the future.

For more information about Keysight in-vehicle network test solutions and their automotive use cases, visit Streamline In-Vehicle Networking.

AE6980T product page 

Keysight Technologies 

The post Optical Tx tests ensure robust in-vehicle networks appeared first on EDN.

Two half-bridge GaN gate drivers from ST integrate a bootstrap diode and linear regulators to generate high- and low-side 6-V gate signals. The STDRIVEG210 and STDRIVEG211 target systems powered from industrial or telecom bus voltages, 72-V battery systems, and 110-V AC line-powered equipment.

The high-side driver of each device withstands rail voltages up to 220 V and is easily supplied through the embedded bootstrap diode. Separate gate-drive paths can sink 2.4 A and source 1.0 A, ensuring fast switching transitions and straightforward dV/dt tuning. Both devices provider short propagation delay with 10-ns matching for low dead-time operation.

ST’s gate drivers support a broad range of power-conversion applications, including power supplies, chargers, solar systems, lighting, and USB-C sources. The STDRIVEG210 works with both resonant and hard-switching topologies, offering a 300-ns startup time that minimizes wake-up delays in burst-mode operation. The STDRIVEG211 adds overcurrent detection and smart shutdown functions for motor drives in tools, e-bikes, pumps, servos, and class-D audio systems.

Now in production, the STDRIVEG210 and STDRIVEG211 come in 5×4-mm, 18-pin QFN packages. Prices start at $1.22 each in quantities of 1000 units. Evaluation boards are also available.

STDRIVEG210 product page 

STDRIVEG211 product page 

STMicroelectronics

The post Gate drivers tackle 220-V GaN designs appeared first on EDN.

STMicroelectronics of Geneva, Switzerland has unveiled a complete prototype of its new power delivery system as it develops new chip designs supporting the 800VDC power architecture announced by NVIDIA of Santa Clara, CA, USA for next-generation AI data centers...

Massachusetts Institute of Technology (MIT) spin-out Vertical Semiconductor has raised $11m in a seed funding round led by Playground Global of Palo Alto, CA, USA to help accelerate development of vertical gallium nitride (GaN) transistors for AI chips in data centers. Additional investors include JIMCO Technology Ventures, milemark•capital, and Shin-Etsu Chemical...

Випускник КПІ Тарас Остапчук: "Майбутнє українських технологій народжується тут і зараз" Інформація КП чт, 10/16/2025 - 17:22

A month and a few days ago, Apple dedicated an in-person event (albeit with the usual pre-recorded presentations) to launching its latest mainstream and Pro A19 SoCs and the various iPhone 17s containing them, along with associated smart watch and earbuds upgrades. And at the end of my subsequent coverage of Amazon and Google’s in-person events, I alluded to additional Apple announcements that, judging from both leaks (some even straight from the FCC) and historical precedents, might still be on the way.

Well, earlier today (as I write these words on October 15), at least some of those additional announcements just arrived, in the form of the new baseline M5 SoC and the various upgraded systems containing it. But this time, again following historical precedent, they were delivered only in press release form. Any conclusions you might draw as the relative importance within Apple of smartphones versus other aspects of the overall product line are…well…

The M5 SoC

Looking at the historical trends of M-series SoC announcements, you’ll see that the initial >1.5-year latency between the baseline M1 (November 2020) and M2 (June 2022) chips subsequently shrunk to a yearly (plus or minus a few months) cadence. To wit, since the M4 came out last May but the M5 hadn’t yet arrived this year, I was assuming we’d see it soon. Otherwise, its lingering absence would likely be reflective of troubles within Apple’s chip design team and/or longstanding foundry partner TSMC. And indeed, the M5 has finally shown up. But my concerns about development and/or production troubles still aren’t completely alleviated.

Let’s parse through the press release.

Built using third-generation 3-nanometer technology…

This marks the third consecutive generation of M-series CPUs manufactured on a 3-nm litho process (at least for the baseline M5…I’ll delve into higher-end variants next). Consider this in light of Wikipedia’s note that TSMC began risk production on its first 2 nm process mid-last year and was originally scheduled to be in mass production on 2 nm in “2H 2025”. Admittedly, there are 2.5 more months to go until 2025 is over, but Apple would have had to make its process-choice decision for the M5 many months (if not several years) in the past.

Consider, too, that the larger die size Pro and Max (and potentially also Ultra) variants of the M5 haven’t yet arrived. This delay isn’t without precedent; there was a nearly six-month latency between the baseline M4 and its Pro and Max variants, for example. That said, the M4 had shown up in early May, with the Pro and Max following in late October, so they all still arrived in 2024. And here’s an even more notable contrast: all three variants of the M3 were launched concurrently in late October 2023. Consider all of this in the light of persistent rumors that M5 Pro- and Max-based systems may not show up until spring-or-later 2026.

M5 introduces a next-generation 10-core GPU architecture with a Neural Accelerator in each core, enabling GPU-based AI workloads to run dramatically faster, with over 4x the peak GPU compute performance compared to M4. The GPU also offers enhanced graphics capabilities and third-generation ray tracing that combined deliver a graphics performance that is up to 45 percent higher than M4.

Note that these Neural Accelerators are presumably different than those in the dedicated 16-core Neural Engine. The latter historically garnered the bulk of the AI-related press release “ink”, but this time it’s limited to terse “improved” and “faster” descriptions. What does this tell me?

• “Neural Accelerator” is likely a generic term reflective of AI-tailored shader and other functional block enhancements, analogous to the increasingly AI-optimized capabilities of NVIDIA’s various GPU generations.
• The Neural Engine, conversely, is (again, I’m guessing) largely unchanged here from the one in the M4 series, instead indirectly benefiting from a performance standpoint due to the boosted overall SoC-to-external memory bandwidth.

M5 features the world’s fastest performance core, with up to a 10-core CPU made up of six efficiency cores and up to four performance cores. Together, they deliver up to 15 percent faster multithreaded performance over M4.

Core count proportions and totals both match those of the M4. Aside from potential “Neural Accelerator” tweaks such as hardware-accelerated instruction set additions (à la Intel’s MMX and SSE), I suspect they’re largely the same as the prior generation, with any performance uplift resulting from overall external memory bandwidth improvements. Speaking of which…

M5 also features…a nearly 30 percent increase in unified memory bandwidth to 153GB/s.

And later…

M5 offers unified memory bandwidth of 153GB/s, providing a nearly 30 percent increase over M4 and more than 2x over M1. The unified memory architecture enables the entire chip to access a large single pool of memory, which allows MacBook Pro, iPad Pro, and Apple Vision Pro to run larger AI models completely on device. It fuels the faster CPU, GPU, and Neural Engine as well, offering higher multithreaded performance in apps, faster graphics performance in creative apps and games, and faster AI performance running models on the Neural Accelerators in the GPU or the Neural Engine.

The enhanced memory controller is, I suspect, the nexus of overall M4-to-M5 advancements, as well as explaining why Apple’s still able to cost-effectively (i.e., without exploding the total transistor count budget) fabricate the new chip on a legacy 3-nm lithography. How did the company achieve this bandwidth boost? While an even wider bus width than that used with the M4 might conceptually provide at least part of the answer, it’d also both balloon the required SoC pin count and complicate the possible total memory capacity increments. I therefore suspect a simpler approach is at play. The M4 used 7500 Mbps DDR5X SDRAM, while the M4 Pro and Max leveraged the faster 8533 Mbps DDR5X speed bin. But if you look at Samsung’s website (for example), you’ll see an even faster 9600 Mbps speed bin listed. 9600 Mbps is 28% more than 7500 Mbps…voila, there’s your “nearly 30 percent increase”.

There’s one other specification, this time not found in the SoC press release but instead in the announcement for one of the M5-based systems, that I’d like to highlight:

…up to 2x faster storage read and write speeds…

My guess here is that Apple has done a proprietary (or not)-interface equivalent to the industry-standard PCI Express 4.x-to-5.x and UFS 4.x-to-5.x evolutions, which also tout doubled peak transfer rate speeds.

Speaking of speeds…keep in mind when reading about SoC performance claims that they’re based on the chip running at its peak possible clock cadence, not to mention when outfitted with maximum available core counts. An especially power consumption-sensitive tablet computer, for example, might clock-throttle the processor compared to the SoC equivalent in a mobile or (especially) desktop computer. Yield-maximization (translating into cost-minimization) “binning” aspirations are another reason why the SoC in a particular system configuration may not perform to the same level as a processor-focused press release might otherwise suggest. Such schemes are particularly easy for someone like Apple—who doesn’t publish clock speeds anyway—to accomplish.

And speaking of cost minimization, reducing the guaranteed-functional core counts on a chip can significantly boost usable silicon yield, too. To wit, about those M5-based systems…

11” and 13” iPad Pros

Last May’s M4 unveil marked the first time that an iPad, versus a computer, was the initial system to receive a new M-series processor generation. More generally, the fifth-gen iPad Pro introduced in April 2021 was the first iPad to transition from Apple’s A-series SoCs to the M-series (the M1, to be precise). This was significant because, up to that point, M-series chips had been exclusively positioned as for computers, with A-series processors for iPhones and iPads.

This time, both the 11” and 13” iPad Pro get the M5, albeit with inconsistent core counts (and RAM allocations, for that matter) depending on the flash memory storage capacity and resultant price tag. From 9 to 5 Mac’s coverage:

• 256GB storage: 12GB memory, M5 with 9-core CPU, 10-core GPU
• 512GB storage: 12GB memory, M5 with 9-core CPU, 10-core GPU
• 1TB storage: 16GB memory, M5 with 10-core CPU, 10-core GPU
• 2TB storage: 16GB memory, M5 with 10-core CPU, 10-core GPU

It bears noting that the 12 GByte baseline capacity is 4 GBytes above what baseline M4 iPad Pros came with a year-plus ago. Also, the deprecated CPU core in the lower-end variants is one of the four performance cores; CPU efficiency core counts are the same across all models, as are—a pleasant surprise given historical precedents and a likely reflection of TSMC’s process maturity—the graphics core counts. And for the first time, a cellular-equipped iPad has switched from a Qualcomm modem to Apple’s own: the newest C1X, to be precise, along with the N1 for wireless communications, both of which we heard about for the first time just a month ago.

A brief aside: speaking of A-series to M-series iPad Pro transitions, mine is a second-generation 11” model (one of the fourth-generation iPad Pros) dating from March 2020 and based on the A12Z Bionic processor. It’s still running great, but I’ll bet Apple will drop software support for it soon (I’m frankly surprised that it survived this year’s iPadOS 26 cut, to be honest). My wife-and-I have a wedding anniversary next month. Then there’s Christmas. And my 60th birthday next May. So, if you’re reading this, honey…

The 14” MacBook Pro

This one was not-so-subtly foreshadowed by Apple’s marketing VP just yesterday. The big claim here, aside from the inevitable memory bandwidth-induced performance-boost predications, is “phenomenal battery life of up to 24 hours” (your mileage may vary, of course). And it bears noting that, in today’s tariff-rife era, the $1599 entry-level pricing is unchanged from last year.

The Vision Pro

The underlying rationale for the performance boost is more obvious here; the first-generation model teased in June 2023 with sales commencing the following February was based on the three-generations-older M2 SoC. That said, given the rampant rumors that Apple has redirected its ongoing development efforts to smart glasses, I wonder how long we’ll be stuck with this second-generation evolutionary tweak of the VR platform. A redesigned headband promises a more comfortable wearing experience. Apple will also start selling accessories from Logitech (the Muse pencil, available now) and Sony (the PlayStation VR2 Sense controller, next month).

Anything else?

I should note, by the way, that the Beats Powerbeats Fit earbuds that I mentioned a month back, which had been teased over YouTube and elsewhere but were MIA at Apple’s event, were finally released at the end of September. And on that note, other products (some currently with evaporating inventories at retail, another common tipoff that a next-generation device is en route) are rumored candidates for near-future launch:

• Next-gen Apple TV 4K
• HomePod mini 2
• AirTag 2
• One (or multiple) new Apple Studio Display(s)
• (???)

We shall see. Until next time, I welcome your thoughts in the comments!

—Brian Dipert is the Editor-in-Chief of the Edge AI and Vision Alliance, and a Senior Analyst at BDTI and Editor-in-Chief of InsideDSP, the company’s online newsletter.

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The post Apple’s M5: The SoC-and-systems cadence (sorta) continues to thrive appeared first on EDN.

CVD Equipment Corp (CVDE) of Central Islip, NY, USA (a designer and maker of chemical vapor deposition, thermal processing, physical vapor transport, gas and chemical delivery control systems, and other equipment and process solutions for developing and manufacturing materials and coatings) has received an order for two PVT150 physical vapor transport systems from Stony Brook University (SBU) for their new ‘onsemi Silicon Carbide Crystal Growth Center’...

Hello, a little update from my recent post. I tweaked few things and organized a bit better. I also added the remote control. If you could please check and review the boards, it would help me a lot. Thank you in advance Project Description – 24V DC Motor Drive System with BLE Remote Control 1. Overview The project consists of a complete 24 V DC motor control system that integrates: A main control board based on the ESP32-WROOM-32E microcontroller, A high-power Pololu G2 motor driver (21 A version), A BLE remote control module based on the Raytac MDBT42V (nRF52832), And CAN bus communication for external system integration. The system allows: Local control via onboard buttons and sensors, Remote control via Bluetooth Low Energy (BLE), CAN communication for multi-device coordination in industrial or vehicular applications. 2. Main Control Board 2.1 Power Supply Chain Input voltage: +24 V DC from a battery or industrial supply. Protection elements: 5KP30A TVS diode for surge suppression. Fuses (1 A for logic circuit, 15 A for motor branch). Voltage conversion: Buck converter (XL4015) steps down 24 V → 5 V. LDO regulator (AMS1117-3.3) converts 5 V → 3.3 V for ESP32 and CAN transceiver. Filtering: Electrolytic and ceramic capacitors reduce noise and stabilize voltage. 2.2 Motor Control Section Motor driver: Pololu G2 High Power Motor Driver (21 A). Control signals from ESP32: PWM (GPIO27): Controls motor speed. DIR (GPIO23): Controls rotation direction. SLP (GPIO21): Enables/disables the driver. FLT (GPIO22): Fault feedback from driver. The motor driver is powered directly from the 24 V line, while the logic operates at 3.3 V. 2.3 Local User Interface Buttons (GPIO25, GPIO26): Forward / Reverse control for manual operation. Sensors (GPIO34–GPIO39): Four digital inputs for limit switches. Buzzer (GPIO16 + n-MOSFET driver): Audible feedback for warnings, alerts, or connection status. 2.4 Communication and Expansion CAN bus transceiver: SN65HVD230. Connected to ESP32’s internal TWAI controller (GPIO32 TX, GPIO33 RX). Differential signals on CANH/CANL for robust industrial communication. Optional 120 Ω termination resistor. External connectors: 12-pin screw terminal for sensor and Pololu connections. 4-pin power connector (24 V IN, buzzer, GND). 2.5 Programming and Debugging Programming header connected to TXD0/RXD0 (CP2102 bridge). EN and BOOT pins are pulled up with 10 kΩ resistors but no onboard buttons are mounted — programming is done externally. 3. BLE Remote Control Board 3.1 Overview The remote control unit uses the Raytac MDBT42V (nRF52832) module to wirelessly transmit control commands (button presses) to the ESP32 receiver using Bluetooth Low Energy (BLE). 3.2 Hardware Design Power supply: 3 V coin-cell battery (CR2032 or similar). Optional LDO: only used if other peripherals require regulated voltage. Crystal: 32 MHz main crystal + 12–15 pF load capacitors, depending on PCB trace length. Buttons: Two input buttons connected to GPIO6 and GPIO8. Programming interface: SWD (SWDIO, SWCLK, GND, VCC). Grounding: Central ground pad under the module connected to main GND plane. 3.3 BLE Functionality Configured as a BLE Peripheral that advertises only to the ESP32 receiver (not visible to smartphones). Sends short control packets on button press events. Uses low-power advertising mode to preserve battery life. ESP32 acts as the BLE Central, scanning for and decoding packets from the remote. submitted by /u/kustajucan [link] [comments]

Leveraging Synaptics’ partnership with Google Research, the new SoC is positioned between microcontroller-class devices and high-end embedded MPUs.

ams OSRAM GmbH of Premstaetten/Graz, Austria and Munich, Germany and Nichia Corp of Tokushima, Japan have expanded their long-standing collaboration in the field of intellectual property (IP). ams OSRAM’s CEO Aldo Kamper and Nichia’s president Hiroyoshi Ogawa signed a comprehensive cross-license agreement covering thousands of patent-protected innovations in LED and laser technologies...

The supervisory board of ams OSRAM AG of Premstaetten, Austria, and Munich, Germany has approved a new contract with chief financial officer Rainer Irle, running until 15 October 2030. The existing three-year contract would have expired on 30 June 2026...