Feed aggregator

Researchers in Japan have developed ultrathin ferroelectric capacitors that maintain strong polarization at a stack thickness of just 30 nm, including top and bottom electrodes. Using scandium-doped aluminum nitride films sandwiched between platinum electrodes, the team achieved high remanent polarization, demonstrating the potential for high-density, energy-efficient memory in compact electronic devices.

The work, led by Professor Hiroshi Funakubo of Science Tokyo in collaboration with Canon ANELVA, marks a departure from previous approaches that only thinned the ferroelectric layer. By optimizing the full capacitor stack—5-nm platinum bottom electrode, 20-nm (Al0.9Sc0.1)N ferroelectric layer, and 5-nm platinum top electrode—the researchers maintained robust ferroelectric performance while drastically reducing device size.

Key to the success was a post-heat treatment of the bottom platinum electrode at 840°C, which improved its crystal orientation and enhanced polarization switching in the ultrathin films. This process ensures that the scaled-down capacitors remain compatible with semiconductor integration, enabling on-chip embedding alongside logic circuits.

The breakthrough lays the groundwork for compact ferroelectric memories, such as FeRAM and ferroelectric tunnel junctions, for future IoT and mobile electronics. By further exploring alternative electrode materials and processing techniques, the team aims to create even more durable, energy-efficient, and miniaturized on-chip memory devices.

Full details on the research are available here.

Institute of Science Tokyo 

The post Researchers shrink ferroelectric memory stacks appeared first on EDN.

Inturai Ventures, in partnership with cybersecurity firm PQStation, has unveiled quantum-safe encryption for connected devices across the defense, aged care, and home security sectors. Under the agreement, Inturai holds exclusive rights to deploy PQStation’s technology in these markets. The collaboration focused on securing MQTT traffic using post-quantum cryptography (PQC) on the ESP32 platform. Billions of devices worldwide run on the ESP32, a dual-core microcontroller SoC with integrated Wi-Fi and Bluetooth.

Example ESP-32 device that can now run Post Quantum Secure. (CNW Group/Inturai Ventures Corp.)

The encryption was tested in two configurations: one using only post-quantum cryptography and another combining PQC with conventional security. Both approaches maintained strong performance, with low latency and minimal power impact, demonstrating that even small, low-power devices can operate securely against future quantum threats.

Governments across the United States, Canada, Australia, and the European Union are requiring post-quantum security upgrades to begin by 2026. In some jurisdictions, including Australia and the EU, critical sectors such as defense and healthcare must complete the transition as early as 2028.

This joint development with PQStation is central to Inturai’s mission to protect critical data in real-time sensor networks and positions the company to deploy quantum-safe protocols across critical sectors worldwide. Inturai expects significant benefits across its healthcare, drone, and military pipeline from this breakthrough, as the global ESP32 module market is projected to reach $4.6 billion by 2032 (Dataintelo).

Inturai Ventures  

PQStation

The post Inturai launches quantum-safe ESP32 security appeared first on EDN.

Other World Computing (OWC) offers a fully certified 2-meter Thunderbolt 5 (USB-C) cable for both Macs and PCs. Engineered with signal amplification, precision shielding, and end-to-end signal integrity, the cable delivers a long-length solution for workflows that require maximum speed, display performance, and power delivery—along with the full capabilities of Thunderbolt 5.

This extended-length cable joins the company’s lineup of 0.3-meter, 0.8-meter, and 1-meter Thunderbolt 5 cables. It is Thunderbolt-certified and validated by multiple independent testing labs to meet the complete Thunderbolt 5 specification, including:

• Up to 80-Gbps bidirectional data throughput
• Up to 120-Gbps video bandwidth for multi-display, high-performance workflows
• Up to 240-W power delivery
• Supports up to three 8K displays
• Fully compatible with Thunderbolt 5, 4, and 3, as well as USB4 and USB-C devices—universal for virtually any USB-C host or power/charging connection

The 2-meter Thunderbolt 5 cable costs $79.99 and is now available for pre-order, with delivery expected in early January 2026.

Other World Computing 

The post OWC rolls out 2-meter Thunderbolt 5 cable appeared first on EDN.

Pico Technology has released a major upgrade to its PicoScope software, improving waveform capture, analysis, and measurement. Version 7.2 adds built-in features like waveform overlays and advanced serial filtering, enabling faster, clearer, and more efficient control of PicoScope PC-based instruments.

Waveform Overlays is a visualization tool that displays multiple waveform captures stacked in a single view. This feature makes it easier to spot intermittent glitches, jitter, and anomalies often missed in single-shot captures.

New serial decoding filters make it easy to pinpoint specific packets, data types, or date ranges without combing through long serial captures. These advanced filters work seamlessly across all 40 serial protocols supported by PicoScope 7.

To learn more about what’s new in PicoScope 7.2, click here. It is available as a free update for all existing and new PicoScope users on Windows, Mac, and Linux operating systems.

Pico Technology

The post PicoScope 7.2 enables smarter waveform analysis appeared first on EDN.

Based on Qualcomm’s Dragonwing IQ-X platform, Advantech’s three edge AI compute boards deliver up to 45 TOPS of AI acceleration for industrial applications. The AOM-6731 AI module, AIMB-293 mini-ITX motherboard, and SOM-6820 COM Express Type 6 module offer powerful processing alongside robust 5G and Wi-Fi 7 connectivity.

Leveraging Oryon CPUs with up to 12 cores running as fast as 3.4 GHz, Dragonwing IQ-X enables rapid data handling and seamless multitasking while consuming up to three times less power than competing solutions. Single- and multithreaded compute performance is further enhanced by on-device Hexagon NPUs, bolstering AI capabilities. Integrated Adreno VPUs and GPUs support multimedia-intensive applications.

Onboard LPDDR5x memory achieves a 1.3× speed boost—from 6,400 MT/s to 8,533 MT/s—while reducing power consumption by 20% versus standard LPDDR5. UFS 3.1 Gear 4 storage increases data transfer speeds from 1,000 Mbps (PCIe Gen3 NVMe) to 16,000 Mbps. UFS 4.0 is also available for optimal performance in harsh industrial environments. 

Samples of the AOM-6731 AI module and SOM-6820 COM Express module are now available, while the AIMB-293 motherboard will be offered for engineering evaluations starting March 2026.

Advantech

The post Compute modules are built for industrial AI appeared first on EDN.

Older table-top AC-DC radios used a classic line-up of tubes. Think 12SA7, 12SK7,12SQ7, 35Z5GT, and 50L6GT. As I grew into my teens, I got interested in how these radios worked and soon discovered that their vacuum tubes could get very hot, especially the last two, the half-wave rectifier (35Z5GT) and the beam power tetrode audio output stage (50L6GT).

One day, I carelessly allowed a window curtain to brush against a hot 50L6GT, and the fabric of that curtain actually melted. Mom was not thrilled.

With that history still fresh in mind, I later came across another vacuum tube called the 117L7/M7GT whose data sheet looked much like this:

Figure 1 A datasheet for the 117L7/M7GT with the two hottest tube functions from previously studied radios in a single unit. 

This thing was scary!

The two hottest tube functions from the radios I’d been studying were combined into one device. Both functions were placed within a single glass envelope vacuum tube.

Take a look at these guys:

Figure 2 Two 117L7/M7GT tubes combining the heat of the beam power tube and the rectifier tube within a single glass envelope.

Imagine the combined heat of the beam power tube and the rectifier tube within a single glass envelope. If the one tube that damaged Mom’s window curtain was thermally dangerous, I cringe to think how hot these tubes could get and what damage they might be capable of causing.

I still shudder at the thought.

John Dunn is an electronics consultant and a graduate of The Polytechnic Institute of Brooklyn (BSEE) and of New York University (MSEE).

Related Content

• Vacuum tubes are dead; long live vacuum tubes
• Unique vacuum tube benefits from additive manufacturing
• Vacuum tube technology resurrected
• The Mystery of the Vanishing Vacuum Tube
• Is There Still a Vacuum Tube in Your Future?

The post An intimidating vacuum tube appeared first on EDN.

The Ministry of Electronics and IT has supposedly approved 22 new projects under the Electronics Components’ Manufacturing Scheme on January 02, 2026, with a projected investment of ₹41,863 crore and production of ₹2,58,152 crore.

The said proposals include those from Dixon, Samsung Display Noida Pvt Ltd, Foxconn (Yuzhan Technology India Pvt Ltd), and Hindalco Industries. These are expected to provide nearly 33,791 direct employment opportunities. This approval comes after the Ministry approved 24 proposals under the ECMS earlier.

The approval letters were handed directly by Union Minister Ashwini Vaishnav to those part of the above 22 projects on Friday.

As per a background note circulated by the Ministry on the third tranche of approvals, the nod includes the manufacturing of 11 target segment products that have cross-sectoral applications, such as mobile manufacturing, telecom, consumer electronics, strategic electronics, automotive, and IT hardware.

Of 11 products, 5 are bare components such as PCBs, Capacitors, Connectors, Enclosures, and Li-ion Cells; 3 pertain to sub-assemblies such as Camera Modules, Display Modules, and Optical Transceivers; and 3 are supply chain items such as Aluminium Extrusion, Anode Material, and Laminate.

The background note said the approvals aim to significantly strengthen domestic supply chains, reduce import dependence for critical electronic components, and support the growth of high-value manufacturing capabilities in India.

The post Government’s Green Signal to 22 projects under ECMS appeared first on ELE Times.

ST is well known as a global company creating technology and driving innovation. But it’s not just that. Its role extends beyond manufacturing products: the company is committed to inspiring and educating future generations by supporting scientific research, STEM initiatives, and engaging in talent development. This article provides an overview of ST’s recent and ongoing educational activities across key regions, including Italy, France, Singapore, and the United States.

Activities Across STEM, university relations and talent development

ST maintains a strong presence in the communities where it operates, participating in local and national events. Through various initiatives, the company connects with a broad spectrum of audiences, from primary and secondary school students and university graduates to experienced researchers. This commitment is further amplified through the ST Foundation, which leverages technology and education to drive social progress, promoting digital inclusion for disadvantaged communities globally. Regardless of the audience’s level of expertise, ST’s goal remains the same: promoting scientific culture and making the complex processes that lead to the production of our chips understandable.

Recent educational events in Italy

In Italy, ST organises more than 200 events annually, reaching approximately 18,000 students ranging from preschool to high school and university. Below are some of the key initiatives we’ve recently organised.

Neapolis Innovation Summer Campus

Participants at Neapolis Innovation Summer Campus

Between late August and early September, the ST site in Arzano (Naples) hosted the twelfth edition of the Neapolis Innovation Summer Campus in collaboration with five universities in Campania. This annual ten-day training program is intended for bachelor’s and master’s degree students who want to explore the use of 32-bit microcontroller platforms and seek an opportunity to interact with industry experts. The initiative offered intensive, hands-on seminars at the ST site and provided a kit of components for the project work that students presented at the end of the event. Additionally, the event hosted small and medium enterprises and start-ups throughout its entire duration, allowing them to present themselves and build connections with young talent.

Researchers’ Night in Milan

In September 2025, ST took part in the Researchers’ Night in Milan, an event promoted by the European Commission as part of the Marie Skłodowska-Curie Actions, hosting research centres, institutions, universities, and organisations engaged in scientific dissemination. ST showcased its Edge AI technology: one of the demos included the LSM6DSV80X sensor with the STEVAL-MKI247A board, connected to the SensorTile.box PRO, and demonstrated how to monitor high-impact activities in soccer (for example, between the player’s shoe and the ball) and collect valuable information for game analysis.

Maker Faire Rome – European Edition

The STEM student winners of the 12th edition of the Neapolis Innovation Summer Campus 2025 with the smart glove “Hermes’ Hand”.

We also participated in Maker Faire Rome – European edition. This annual event has a varied audience, from school to university students, to startups, companies, and government institutions. Visitors could interact with demos in different fields, such as electronics, augmented reality, artificial intelligence, robotics, gaming, music and art. ST organised workshops covering Edge AI, robotics, and the STM32 Open Development Environment. A highlight was the “Hermes’ Hand”, a smart glove developed by a STEM student of the 12th edition of the Neapolis Innovation Summer Campus 2025. This project uses the STM32G474RE, X-NUCLEO-IKS4A1, and custom-made MEMS sensors to translate one’s voice into sign language in real time, breaking down communication barriers.

Science Festival in Genoa

The “magic” wand demo

Another event held at the end of 2025 and aimed primarily at young students and families was the Science Festival in Genoa. ST presented “AI in your hands”: a magic wand, waved by visitors, demonstrated how the Integrated Signal Processing Unit (ISPU) in MEMS sensors can process movement locally (at the edge). Limited dependence on the cloud ensures high response speed, low power consumption, and greater security. Behind the playfulness and the visitors’ amazement, therefore, there was not magic but rather powerful local data processing.

 

Agreement with Polytechnic University of Turin

Inauguration of ST’s new design centre at the Polytechnic University of Turin. In the picture, Pro-Rector Elena Baralis and CEO of STMicroelectronics Italy Alberto Della Chiesa

To strengthen its ties with universities, in October, ST and the Polytechnic University of Turin renewed their framework agreement for the next four years and celebrated the inauguration of a new ST design centre space. The collaboration focuses on research and training of undergraduate and graduate students, particularly in fast-evolving fields such as cybersecurity, AI, and energy efficiency. Since 2019, STMicroelectronics has hired over 200 graduates (bachelor’s, master’s, and doctoral degrees) from the Polytechnic University of Turin. Many undergraduate and graduate students also work on their theses with the help of ST employees at the Turin centre.

Educational initiatives in France

In France, there is a virtuous example showing how recruitment needs in the field of microelectronics can favour high-level training for students and professionals. ST is one of the actors in the I-NOVMICRO program, a consortium of different companies that promotes microelectronics and electronics careers and provides advanced training in the Southern French Region (Rousset, Toulon, Sophia-Antipolis).

Participants at I-NOVGAME

Launched in 2019, this initiative directly addresses recruitment needs by offering specialised training that qualifies people for technical sectors, particularly manufacturing jobs. Since the beginning of the project, more than 15,000 people have been trained, from secondary schools to baccalaureate level. This program allows students to learn semiconductor manufacturing processes in real-world conditions: facilities include an educational clean room and an educational grey room dedicated to maintenance training. The program also finances and leads a network of 12 Fab Labs in local high schools, coordinated by ST Rousset, and promotes STEM disciplines through school visits. The project’s ambition is to reach out all the whole of France and then expand on a European scale.

I-NOVMICRO also includes:

• I-NOVGAMES, an STM32 engineering and application challenge involving six engineering schools.
• INNOV ISLAND, a dynamic Metaverse offering a digital and 3D environment for training, educational materials, conferences, and job dating for students and employees.

Beyond direct training, ST supports education through donations of unused laboratory equipment, computers and STM32 microcontroller boards every year to schools and partners. Our company also offers career guidance through diverse programs and initiatives, primarily focused on engaging young people and supporting students with disabilities:

• For industrie, l’Univers Extraordinaire is a digital educational event which presents industry professions to young people through video game formats. ST participation includes virtual tours of ST facilities, video interviews with Rousset employees, and live presentations by industry professionals.
• Programs for students with disabilities at the Rousset site. Voyage au cœur de l’entreprise (VACLE) allows eight pupils to explore a dozen different professions over the course of a week, while Mentorat au coeur de l’entreprise (MACLE) is a mentorship program for high school students, where volunteer employees support students throughout their academic career, helping them plan their future, understand corporate culture, and develop their soft skills.

On the left, participants at For industrie. On the right, a videogame screenshot. Open-source and hands-on education with universities and partners in the US

ST products and solutions can be useful for developing open-source programs. In the United States, for example, ST contributes to research and education by developing open-source curricula with a strong emphasis on hands-on learning. Professors at the universities we collaborate with (including MIT, UCLA, UC Berkeley, Rensselaer Polytechnic Institute, UC Santa Cruz, and Santa Clara University) use ST development tools, such as the popular STM32 microcontroller platform, in their courses, which are then publicly available on our website. One main area of development now is to adapt the existing curricula to the AI era, which is strongly affecting the job market and how students interact with hardware and firmware programming. For this reason, ST is working with organisations like the MIT CSAIL Alliances (Computer Science and Artificial Intelligence Laboratory) on research, particularly regarding AI computing on devices at the edge and applications in robotics.

The STEVAL-EDUKIT01

Furthermore, we collaborate with partners who share our vision. With ARM, we have formed an Educational Alliance to support new curricula that will help students gain the necessary skills to become the professionals of the future. Some of these programs were developed in collaboration with the university and published on EdX, reaching over 40,000 enrollments over a four-year period. ST, SparkFun (member of ST Partner Program), DEKA and the Worcester Institute of Technology developed the Experiential Robotics Platform (XRP), an open-source platform for STEM education. Among other things, the XRP is the main provider of educational kits for the FIRST Robotics Competition, the largest STEM competition in the world, which targets primary and secondary schools and registered 785,000 participants in the 2024-25 school year.

Educational initiatives have helped ST products become among the most popular educational products in the United States. The STEVAL-EDUKIT01, developed in collaboration with UCLA, is the first ST development kit designed specifically for education and offers teaching materials for motor control and control systems.

Skills development and positive social impact in Singapore

Participants at the STEM Fest organised by United Women Singapore

In Singapore, ST is adopting an educational approach that spans the entire learning journey, from primary schools to higher education. The goal is to drive a positive social impact and bridge the skills gap in semiconductor manufacturing by aligning education with industry needs. This comprehensive approach also focuses on inclusion addressing gender imbalance in the industry. To this end, ST partners with the United Women Singapore (UWS) to implement STEM initiatives for girls, such as the UWS STEM Fest. These initiatives provide mentorship, coaching, and networking to encourage more women to pursue STEM careers. Furthermore, ST fosters creativity and social responsibility in partnership with the Singapore Institute of Technology through the SIT Community Challenge. This program challenges students to develop sustainable technology solutions addressing real-world community issues such as urban mobility and environmental sustainability, directly supporting Singapore’s Smart Nation goals.

ST collaborates with Universities like the Singapore Institute of Technology (SIT) and the Institute of Technical Education (ITE). Our company develops and reviews curricula in microelectronics and semiconductor manufacturing through faculty exchange programs, ST guest lectures and participation in academic advisory committees to ensure relevance to industry demands. Additionally, ST provides practical experience through extensive vocational training, including the Integrated Work-Study Program (IWSP) in collaboration with SIT and Work-Study Diplomas (WSDip) offered by ITE, which provide students with up to 12 months and two years, respectively, of internship experience alongside ST professionals.

ST also invests in future talents through scholarships, including the Singapore Industry Scholarships (SgIS) and the Engineering and Tech Programme Scholarship (ETPS), which support students from pre-university through tertiary education. The flagship STICan (ST I Can) Work Experience Program (WEP) offers students aged 15 to 22 internships across the semiconductor value chain, from R&D and chip design to wafer fabrication and marketing. The program provides technical exposure and personal development courses to prepare students for university and careers.

Conclusion

ST’s engagement in educational and STEM activities serves a dual purpose: cultivating the next generation of talent while contributing to societal progress. From university partnerships to global outreach events, these initiatives form the foundation of ST’s commitment to driving innovation and developing technology responsibly for the future.

The post Beyond technology: ST’s commitment to educating and inspiring next generation appeared first on ELE Times.

TCL Technology’s Shenzhen-based subsidiary TCL China Star Optoelectronic Technology Co Ltd (TCL CSOT) recently acquired an 80% equity stake — along with creditor rights — in Fujian Prima Optoelectronics Co Ltd (also known as Fujian ZhaoYuan Optoelectronics). This transaction marks TCL CSOT’s formal entry into the LED chip segment. It represents a critical step toward completing a vertically integrated supply chain spanning from LED chips to mini-LED video wall applications, notes market analyst firm TrendForce...

As the electronics industry looks back at 2025, a clear shift toward efficiency, miniaturisation, and—most critically—more deliberate material choices becomes evident. The year stands out as a pivotal phase in the evolution of electronics, enabling systems tailored to the increasingly demanding requirements of data centres, advanced sensing platforms, electrified systems, and next-generation semiconductor packaging. Rather than chasing raw performance, the industry in 2025 was forced to reconcile ambition with practicality—balancing sustainability goals, high-performance demands, and mounting geopolitical pressures.

Escalating power densities driven by AI-centric data centers and electrification, shrinking thermal headroom resulting from aggressive miniaturization and higher levels of integration, and growing material availability constraints shaped by geopolitics and post–Moore’s Law design dependencies collectively emerged as defining parameters in the system architectures of automotive, industrial, and infrastructure electronics. 

“Performance scaling today is increasingly driven by materials-centric advanced packaging,” says Suraj Rengarajan, Head of Semiconductor Product Group, Applied Materials India. As the industry enters a new year, these forces offer a clear lens through which to examine the design choices and innovations that defined electronics in 2025. Further, to give a better idea of how electrical design is changing in its basics, Suraj from Applied Materials India adds that System-level power, performance, area, and cost are now set by co-optimizing the bonding interface, low‑k dielectrics, redistribution-layer etch, barrier/seed, copper fill, and CMP, and thermal interfaces, treating interconnect resistance and heat flux as primary design variables. 

In every aspect that we will be examining in the course of our story, we will try and see how the new dynamics of the industry shaped the preferences of the design engineers to sustain the innovations and applications, including data centres, automotives, and industrial applications. 

Power Efficiency over Capability! 

As the electrification phenomenon rapidly spread its wings, power efficiency, and not power capacity, became the primary constraint. As the demand across the sectors increased, it raised the energy demands significantly while simultaneously tightening thermal and sustainability limits. This realisation brought the power electronics landscape into the core architectural consideration of an electrical design engineer. In such a condition, the industry moved to significantly increase the power handled per unit area- Power Density. 

With AI workloads driving processor currents from a few hundred amperes to well over a thousand—without any meaningful increase in board or package footprint—power efficiency emerged as the only viable path to sustain compute scaling.

This enabled the engineers to focus on more basic and intrinsic aspects of power electronics, which as efficiency, facilitating the same at every level of electronics design. To sustain the new dynamic, the industry moved towards Wide Band-gap (WBG) technologies, including Silicon Carbide (SiC) & Gallium Nitride (GaN). This helped the engineers to prevent switching and conduction losses along with heat generation per unit area, while abiding by tighter thermal and packaging constraints. The WBG technology also pushed the efficiency of the electronic product significantly at the system level. 

As power density increased, thermal removal became progressively harder, creating a self-reinforcing loop in which higher efficiency was required simply to preserve thermal headroom rather than to improve performance.

Application

In data centres, rising compute density is driving demand for compact, high-efficiency power solutions. Gallium nitride–based power supplies are gaining traction by improving efficiency, enabling higher switching frequencies, shrinking passive components, and reducing cooling needs. In some architectures, GaN also allows simplified or single-stage power conversion, lowering losses and bill-of-materials complexity while supporting higher voltages closer to the point of load.

“With AI workloads, processor current levels have scaled from a few hundred amperes to over a thousand amperes, while the physical footprint has remained largely unchanged. This has fundamentally pushed power density and efficiency to the centre of system design,” says Dr Kaushik Basu, Associate Professor at IISC Bangalore. 

Thermal Limits Over Advanced Cooling

As power efficiency improvements enabled higher power densities, overall heat generation continued to rise—driven by increasing absolute power levels and the closer packing of heat sources within shrinking form factors. Under these conditions, heat was generated faster than it could be spread or dissipated, leading to steeper thermal gradients that placed greater stress on materials, interconnects, and interfaces. At the same time, as electronics moved toward more miniaturised, efficient, and reliability-critical designs, the cost, complexity, and reliability penalties associated with ever-more advanced cooling solutions became increasingly prohibitive.

“As power density increases, heat removal becomes increasingly difficult. That is why efficiency is no longer optional—there is simply no thermal headroom to absorb losses,” says Dr Basu.  By 2025, the industry reached a clear realisation: cooling complexity could no longer scale indefinitely to offset rising power density. This marked a fundamental shift in design philosophy, with heat dissipation moving from a downstream mechanical consideration to a primary architectural constraint addressed early in the design cycle. “Designers are increasingly treating materials as first-class design parameters. For advanced nodes, device physics is fundamentally materials physics, ” says Suraj from Applied Materials India. 

The growing adoption of advanced packaging approaches, including  2.5D and 3D packaging, was driven as much by electrical constraints as thermal ones, as rising currents made long power-delivery paths increasingly untenable due to conduction losses and localized heating. It emerged as the first line of defence against thermal stress, playing a critical role in protecting silicon devices while enabling higher levels of integration and system efficiency. Particularly, in vertically stacked 3D architectures, where multiple dies are interconnected using through-silicon vias (TSVs), thermal challenges become particularly acute due to limited heat escape paths and the formation of localised hotspots. 

In such configurations, traditional air- or liquid-based cooling, or the addition of increasingly sophisticated cooling hardware, often proved insufficient, expensive, or impractical—especially in automotive, industrial, and infrastructure applications with stringent reliability and lifetime requirements. While advanced packaging shortened interconnect paths and reduced resistive losses, it also concentrated heat generation within smaller volumes, making thermal constraints more visible rather than eliminating them. “Teams now co‑simulate variability and reliability, electromigration, bias temperature instability, and time‑dependent dielectric breakdown, at the materials level alongside logic and layout,” says Suraj. As a result, thermal-aware system architecture and packaging design became indispensable in sustaining performance and reliability.

“Advanced packaging approaches such as 2.5D and 3D integration are largely driven by the need to minimise current paths and conduction losses by bringing power conversion closer to the load. However, they also make thermal challenges more visible rather than eliminating them,” says Dr Basu. Eventually, to enable the engineers to accurately predict and manage heat generation and dissipation, which is crucial for preventing component failure, optimizing performance, and ensuring safety, Thermal modeling and co-simulation have now become integral to modern electronics design. 

Materials as a Design Constraint, Not a Specification

In 2025, materials in electronics moved beyond being passive specifications and emerged as hard design constraints shaping system architecture from the outset. Persistent supply-chain fragility, geopolitical uncertainty, tightening environmental regulations, and the escalating demands of AI, high-performance computing, and electrification collectively forced designers to treat material selection as a primary limiting factor influencing performance, reliability, and manufacturability.

Midway through the year, the surge in AI, HPC, and electrified platforms imposed unprecedented thermal and electrical stress on electronic systems. Materials able to withstand high power density, heat, and long lifetimes became critical design constraints, shaping device selection, power architecture, and packaging. As advanced nodes and 2.5D/3D integration pushed miniaturisation to its limits, thermal conductivity, mechanical strength, and interconnect reliability emerged as central concerns.

By late 2025, regulatory pressures further reshaped material decisions. Stricter sustainability and environmental compliance requirements, including tighter enforcement of RoHS and REACH norms, transformed lead-free, recyclable, and low-emission materials from preferences into mandatory design conditions. While breakthroughs in advanced materials and AI-driven material informatics offered new optimisation pathways, they also demanded deeper material awareness from system designers.

“We are reaching a point where clever system-level design alone is not sufficient. Addressing today’s power and thermal challenges increasingly requires improvements at the material and device level,” says Dr Basu. 

Together, these forces marked 2025 as the year when material availability, compliance, and physics converged, redefining what was practically achievable in electronics design. Material choice ceased to be a downstream optimisation exercise and instead became a foundational variable that set the limits for efficiency, scalability, and long-term system viability.

Conclusion: Designing Within Limits Became the New Competitive Advantage

Power density, thermal limits, and materials are no longer independent design considerations; in high-performance systems, each now defines the operating boundary of the others. “Thermal management and power density will remain the most difficult challenges in the coming years, while material-level improvements, although critical, will take longer to mature,” says Dr Basu.

The defining lesson of 2025 was rooted in a collective shift in how electronic systems were conceived and engineered. As power efficiency replaced raw capability, thermal limits supplanted aggressive cooling, and materials evolved from passive enablers to active constraints, electronics design entered an era governed less by ambition and more by physical and systemic realities. “Efficiency is being engineered from the materials up, with interconnects, dielectrics, power delivery, cooling, and packaging treated as a coupled system,” says Suraj of Applied Materials India.

Across data centres, automotive platforms, and industrial systems, engineers confronted hard limits of heat, materials, and long-term reliability, making performance something to be balanced rather than maximised. Power electronics moved to the centre of system architecture, packaging became a critical thermal and electrical optimisation layer, and material choices began shaping designs at the architectural stage. Innovation did not slow under these constraints; it became more disciplined, integrated, and system-aware. 

As electronics move forward, the lesson of 2025 is clear: the future belongs not to systems that promise peak performance on paper, but to those engineered with a deep understanding of efficiency, thermal reality, and material limits—marking the year when designing within constraints became a true engineering advantage. In an industry long defined by relentless scaling, 2025 will be remembered as the year when designing within limits became the ultimate engineering advantage.

The post How 2025’s Constraints Became the Blueprint for Electronics System Design in 2026? appeared first on ELE Times.

A year back, this engineer titled his 2024 retrospective “interconnected themes galore”. That said, both new and expanded connections can sometimes lead to chaotic results, yes?

As any of you who’ve already seen my precursor “2026 Look Ahead” piece may remember, we’ve intentionally flipped the ordering of my two end-of-year writeups once again this year. This time, I’ll be looking back over 2025: for historical perspective, here are my prior retrospectives for 2019, 2021, 2022, 2023, and 2024 (we skipped 2020).

As I’ve done in past years, I thought I’d start by scoring the key topics I wrote about a year ago in forecasting the year to come:

• The 2024 United States election (outcome, that is)
• Ongoing unpredictable geopolitical tensions, and
• AI: Will transformation counteract diminishing ROI?

Maybe I’m just biased, but in retrospect, I think I nailed ‘em all as being particularly impactful. In the sections that follow, I’m going to elaborate on several of the above themes, as well as discuss other topics that didn’t make my year-ago forecast but ended up being particularly notable (IMHO, of course).

Tariffs, constrained shipments, and government investments

A significant portion of the initial “2024 United States election outcome” section in my year-back look-ahead piece was devoted to the likely potential for rapidly-announced significant tariffs by the new U.S. administration against various other countries, both import- and export-based in nature, and both “blanket” and product-specific, as well as for predictable reactive tariffs and shipment constraints by those other countries in response.

And indeed this all came to pass, most notably with the “Liberation Day” Executive Order-packaged suite of import duties issued on April 2, 2025, many of which were subsequently amended (multiple times in a number of cases) in the subsequent months in response to other countries’ tit-for-tat reactions, trade agreements, and other détente cooling-off measures, and the like.

My point in bringing this all up, echoing what I wrote a year back (as well as both the month and the year before that), is not to be political. As I’ve written several times before:

I have not (and will not) reveal personal opinions on any of this.

and I will again “stay the course” this time. Whether or not tariffs are wise or, for that matter, were even legally issued as-is are decisions for the Supreme Court (near term) and the voters (eventually) to decide. So then why do I mention it at all? Another requote:

Americans are accused of inappropriately acting as if their country and its citizens are the “center of the world”. That said, the United States’ policies, economy, events, and trends inarguably do notably affect those of its allies, foes and other countries and entities, as well as the world at large, which is why I’m including this particular entry in my list.

This time, I’m going to focus on a couple of different angles on the topic. Maybe your company sells its products and/or services only within the country in which it’s headquartered. Or maybe, on the opposite end of the spectrum, it’s a multinational corporation with divisions scattered around the world. Or any point in between these spectrum extremes.

Regardless (and regardless too of whether or not it’s a U.S.-headquartered company), both the tariff and shipment-restriction policies of the U.S. and other countries will undoubtedly and notably affect your business strategies.

Unfortunately, though, while such tariff and restriction policies can be issued, amended, and rescinded “on a dime”, your company’s strategies inherently can’t be even close to as nimble, no matter how you aspire to both proactively and reactively structure your organization and its associated supply chains.

As I write these words I’m reminded, for example, of a segment I saw in a PBS NewsHour episode last weekend that discussed (among other things) Christmas goods suppliers’ financial results impacts of tariffs, along with the just-in-case speculative stockpiling they began doing a year ago in preparation (conceptually echoing my own “Chi-Fi” pre-tariff purchases at the beginning of 2025):

The other angle on the issue that I’d like to highlight involves the increasingly prevalent direct government involvement in companies’ financial fortunes.

Back in August, for example, just two weeks after initially demanding that Intel’s new CEO resign due to the perception of improper conflicts involving Chinese companies, the Trump administration announced that it was instead converting prior approved CHIPS Act funding for Intel into stock purchases, effectively transforming the U.S. into a ~10% Intel shareholder.

More recently, NVIDIA was once again approved to ship its prior-generation H200 AI accelerators into China…in exchange for the U.S. getting a 25% share of the resultant sales revenue, and following up on broader 15%-revenue-share agreements made by both AMD and NVIDIA back in August in exchange for securing China-export licenses.

And President Trump has already publicly stated that such equity and revenue-sharing arrangements, potentially broadening to also include other U.S. companies, will increasingly be the norm versus the exception in the future. Again, wise or not? I’ll keep my own opinions to myself and rely on time to answer that one. For now, I’ll just say…different.

Robotaxis

Waymo is on a roll. The Google-sibling Alphabet subsidiary now blankets not only San Francisco, California (where its usage by customers is increasingly the norm versus a novelty exception) but large chunks of the broader Silicon Valley region, now including freeways and airports.

It’s also currently offering full service in Los Angeles, Phoenix (AZ), and Austin (TX) as I write these words in late December 2025, with active testing underway in roughly a dozen more U.S. municipalities, plus Japan and the UK, and with already-announced near-term service plans in around a dozen more. As Wikipedia notes:

As of November 2025, Waymo has 2,500 robotaxis in service. As of December 2025, Waymo is offering 450,000 paid rides per week. By the end of 2026, Waymo aims towards increasing this to 1 million taxi rides a week and are laying the groundwork to expand to over 20 cities, including London and Tokyo, up from the current six.

And this is key: these are fully autonomous vehicles, with no human operators inside (albeit still with remote human monitors who can, as needed, take over manual control):

Problem-free? Not exactly. Just in the few weeks prior to my writing these words, several animals have been hit, a Waymo car has wandered into an active police-presence scene, and they more generally haven’t seemingly figured out yet how to appropriately respond to school buses signaling they’re in the process of actively picking up and/or dropping off passengers.

So not perfect: those are the absolute statistics. But what about relative metrics?

Again and again, in data published both by Waymo (therefore understandably suspect) and independent observers and agencies, autonomous vehicles are seen as notably safer, both for occupants and the environment around them, than those piloted by humans…and the disparity is only growing in self-driving vehicles’ favor over time. And in China, for example, the robotaxi programs are, if anything, even more aggressive from both testing and active deployment standpoints.

To that last point, I’ll conclude this section with another note on this topic. In fairness, I feel compelled to give Tesla rare but justified kudos for finally kicking off the rollout of its own robotaxi service mid-year in Austin, after multiple yearly iterations of promises followed by delays.

Just a few days ago, as I write this, in fact, the company began testing without human monitors in the front seats (not that they were effective anyway, in at least one instance).

Agentic AI

In the subhead for my late-May Microsoft Build 2025 conference coverage, I sarcastically noted:

What is “agentic AI”? This engineer says: “I dunno, either.”

Snark aside, I truthfully already had at least some idea of what the “agentic web”, noted in the body text of that same writeup as an example of the trendy lingo that our industry is prone to exuberantly (albeit only impermanently) spew, meant. And I’ve certainly learned much more about it in the intervening months. Here’s what Wikipedia says about AI agents in its topic intro:

In the context of generative artificial intelligence, AI agents (also referred to as compound AI systems or agentic AI) are a class of intelligent agents distinguished by their ability to operate autonomously in complex environments. Agentic AI tools prioritize decision-making over content creation and do not require human prompts or continuous oversight.

And what about the aforementioned broader category of intelligent agents, of which AI agents are a subset? Glad you asked:

In artificial intelligence, an intelligent agent is an entity that perceives its environment, takes actions autonomously to achieve goals, and may improve its performance through machine learning or by acquiring knowledge. AI textbooks define artificial intelligence as the “study and design of intelligent agents,” emphasizing that goal-directed behavior is central to intelligence. A specialized subset of intelligent agents, agentic AI (also known as an AI agent or simply agent), expands this concept by proactively pursuing goals, making decisions, and taking actions over extended periods.

A recent post on Google’s Cloud Blog included, I thought, I concise summary of the aspiration:

“Agentic workflows” represent the next logical step in AI, where models don’t just respond to a single prompt but execute complex, multi-step tasks. An AI agent might be asked to “plan a trip to Paris,” requiring it to perform dozens of interconnected operations: browsing for flights, checking hotel availability, comparing reviews, and mapping locations. Each of these steps is an inference operation, creating a cascade of requests that must be orchestrated across different systems.

Key to the “interconnected operations” that are “orchestrated across different systems” is MCP, the open-source Model Context Protocol, which I highlighted in my late-May coverage. Originally created by two developers at Anthropic and subsequently announced by the company in late 2024, it’s now regularly referred to as “USB-C for AI” and has been broadly embraced and adopted by numerous organizations and their technologies and products.

Long-term trend aside, my decision to include agentic AI in my year-end list was notably influenced by the fact that agents (specifically) and AI chatbots (more generally) are already being widely implemented by developers as well as, notably, adopted by the masses. OpenAI recently added an AI holiday shopping research feature to its ChatGPT chatbot, for example, hot on the heels of competitor Google’s own encouragement to “Let AI do the hard parts of your holiday shopping”. And what of Amazon’s own Rufus AI service? Here’s TechCrunch’s beginning-of-December take on Amazon’s just-announced results:

On Black Friday, Amazon sessions that resulted in a sale were up 100% in the U.S. when the AI chatbot Rufus was used. They only increased by 20% when Rufus wasn’t used. 

Trust a hallucination- and bias-prone deep learning model to pick out presents for myself and others? Not me. But I’m guessing that both to some degree now, and increasingly in the future, I’ll be in the minority.

Humanoid Robots

By now, I’m sure that many of you have already auditioned at least one (and if you’re like me, countless examples) of the entertaining and awe-inspiring videos published by Boston Dynamics over the years (and by the way, if you’ve ever wondered why the company was subsequently acquired by Hyundai, this excellent recent IEEE Spectrum coverage of the company’s increasingly robotics-dominated vehicle manufacturing plant in Georgia is a highly recommended read). While early showcased examples such as Spot were, as its name reflects, reminiscent of dogs and other animals (assuming they had structural relevance to anything at all, that is…hold that thought), the company’s newer Atlas, along with examples from a growing list of other companies, is distinctly humanoid-reminiscent. Quoting from Wikipedia:

A humanoid robot is a robot resembling the human body in shape. The design may be for functional purposes, such as interacting with human tools and environments and working alongside humans, for experimental purposes, such as the study of bipedal locomotion, or for other purposes. In general, humanoid robots have a torso, a head, two arms, and two legs, though some humanoid robots may replicate only part of the body. Androids are humanoid robots built to more closely resemble the human physique. (The term Gynoid is sometimes used for those that resemble women.)

As Wikipedia notes, part of the motivation for this trend is the fact that the modern world has been constructed with the human body in mind, and it’s therefore more straightforward from a robotics-inclusion standpoint to create automotons that mimic their human creators (and forebears?) than to adapt the environment to more optimally suit other robot form factors. Plus, I’m sure that at least some developers are rationalizing that robots that resemble humans are more likely to be accepted alongside humans, both in the workplace and in the home.

Still, I wonder how much sub-optimization of the overall robotic implementation potential is occurring in pursuit of this seeming single-minded human mimicking aspiration. I wonder, too, how much influence early robot examples in entertainment, such as Rosie (or Rosey) from The Jetsons or Gort from The Day the Earth Stood Still, have had in shaping the early thinking of children destined to be engineers when they grew up. And from a practical financial standpoint, given the large number of humanoid robot examples coming from China alone, I can’t help but wonder just how many “androids” (the robot, not the operating system) the world really needs, and how massive the looming corporate weeding-out may be as a result.

Unforeseen acquisitions

This last one might not have been seismically impactful from a broad industry standpoint…or then again, it may end up being so, both for Qualcomm and its competitors. Regardless, I’m including it because it personally rocked me back on my heels when I heard the news. In early October, Qualcomm announced its intention to acquire Arduino. For those of you not already familiar with Arduino, here’s Wikipedia’s intro:

Arduino is an Italian open-source hardware and software company…that designs and manufactures single-board microcontrollers and microcontroller kits for building digital devices. Its hardware products are licensed under a CC BY-SA license, while the software is licensed under the GNU Lesser General Public License (LGPL) or the GNU General Public License (GPL), permitting the manufacture of Arduino boards and software distribution by anyone.

First fruits of the merger are the UNO Q, a “next-generation single board computer featuring a “dual brain” architecture—a Linux Debian-capable microprocessor and a real-time microcontroller—to bridge high-performance computing with real-time control” and “powered by the Qualcomm Dragonwing QRB2210 processor running a full Linux environment”, and the Arduino App Lab, an “integrated development environment built to unify the Arduino development journey across Real-time OS, Linux, Python and AI flows.”

So, what’s the background to my surprise? This excerpt from IEEE Spectrum’s as-usual thorough coverage sums it up nicely: “Even so, the acquisition seems odd at first glance. Qualcomm sells expensive, high-performance SoC designs meant for flagship smartphones and PCs. Arduino sells microcontroller boards that often cost less than a large cheese pizza.”

Not to mention that Qualcomm’s historical customer base is comparatively small in number, large in per-customer volume, and rapid in each customer’s generational-uptake silicon churn, the exact opposite of Arduino’s typical customer profile (or that of Raspberry Pi, for that matter, who’s undoubtedly also “curious” about the acquisition and its outcome).

Auld Lang Syne (again)

I’m writing this in late December 2025. You’ll presumably be reading it sometime in January 2026, given that I’m targeting New Year’s Day publication for it. I’ll split the difference and, as I did last year, wrap up by first wishing you all a Happy New Year!

As usual, I originally planned to cover a number of additional topics in this piece. But (also) as usual, I ended up with more things that I wanted to write about than I had a reasonable wordcount budget to do so. Having just passed through 2,700 words, I’m going to restrain myself and wrap up, saving the additional topics (as well as updates on the ones I’ve explored here) for dedicated blog posts to come in the coming year(s). Let me know your thoughts on my top-topic selections, as well as what your list would have looked like, in the comments!

—Brian Dipert is the Principal at Sierra Media and a former technical editor at EDN Magazine, where he still regularly contributes as a freelancer.

Related Content

• 2024: A year’s worth of interconnected themes galore
• 2023: Is it just me, or was this year especially crazy?
• A tech look back at 2022: We can’t go back (and why would we want to?)
• A 2021 technology retrospective: Strange days indeed
• 10 consumer technology breakthroughs from 2019
• 2026 Look Ahead

The post 2025: A year in which chaos seemingly thrived appeared first on EDN.

submitted by /u/FuzzyBumbler [link] [comments]

Analog video tape to digital transfer! so far it has been a royal pain in my ass lately. From VHS deck issues, capture issues, software for said capture device only supporting PowerPC versions which needs Rosetta in Mac OS X (of which Apple abandoned years ago) all the way to my greatest pet peeve…the VHS-C adaptor. I currently have 3 of them, with another I ordered on eBay. The first adapter I destroyed because it made me mad. The second adapter jams up my deck causing it to have E-5 error code when I fast forward. The 3rd adapter, brand new from Amazon, causes error code E-5 on all deck functions (play, fast forward, rewind, etc). basically unusable. As much I want to destroy that one, I’m going to just return it to Amazon. instead, when I receive the one I ordered on eBay and it works as expected, I will then destroy the second adaptor. Or, I get to have 2 adapter I can destroy if the eBay one doesn’t work. I don’t have VCRs galore to try this on other decks; besides, the one I’m using now I ruled him out as the issue. It plays VHS tapes just fine. Hopefully, the eBay adapter will work out. Since this project deals with clients 3 decades worth of precious memories in the format of VHS-C, Hi8 and MiniDV, I can’t afford to damage anything. I decided to revisit this 1 week into the new year to come back into this thing with good energy and vibes. for now, I’m just pissed off at VHS-C adapters lol submitted by /u/Prijent_Smogonk [link] [comments]

Команда ФБТ перемогла на Global Greenchem Hackathon 2025 kpi ср, 12/31/2025 - 20:00

AXT Inc of Fremont, CA, USA — which makes gallium arsenide (GaAs), indium phosphide (InP) and germanium (Ge) substrates and raw materials at plants in China — has closed its underwritten public offering of 8,163,265 shares of common stock at a price to the public of $12.25 per share, including the full exercise of the underwriters’ option to purchase an additional 1,064,773 shares. The firm received total gross proceeds of about $100m, before deducting the underwriting discounts and commissions and other offering expenses...

Recently, frequent Design Idea (DI) author Christopher Paul showcased an innovative and high performance true-two-wire current source using a depletion mode MOSFET as the pass device in “A precision, voltage-compliant current source.”

In subsequent comments the question arose whether similar performance is possible using a bipolar junction transistor instead of Christopher’s FET in a similar (looking) topology?

Wow the engineering world with your unique design: Design Ideas Submission Guide

It posed an intriguing design problem for which I offer here a possible (if implausible) solution. Bizarrely, it’s (roughly) based on the classic discrete transistor model of an SCR, shown in Figure 1.

Figure 1 SCR positive feedback loop suggests an unlikely basis for a BJT current source.

Figure 2 shows the nonlinear positive feedback loop of the thyristor morphing into a linear current source.

Figure 2 Q1 and Q3 current mirror, regulator Z1, and BJT Q1 comprise precision 2-wire current source. The source current is 1.05 * 1.24/R1, or 1.30/R1. * = 0.1% precision resistor

Shunt regulator Z1 and pass transistor Q2 form a very familiar precision current source circuit. In fact, it looks a lot like the one Christopher Paul uses in his MOSFET-based design. Negative feedback from current sense resistor R1 makes shunt regulator Z1 force Q2 to maintain a constant emitter current of 1.24v/R1.

Also, similar (looking) to Christopher Paul’s topology, bias for Z1 and Q2 is provided by a PNP current mirror. However, unlike the symmetrical mirror in Christopher Paul’s design, this one is made asymmetrical to accommodate Z1’s max recommended current rating.

Significant emitter degeneration (~2.5 volts) is employed to encourage accurate current ratios and keep positive feedback loop gain manageable so Z1 can ride herd on it.

Startup resistor R3 is needed because the bias for the transistors and regulator is provided by the SCR-ish regenerative positive feedback loop. R3 provides a trickle of current, a few hundred nanoamps, sufficient to jumpstart (trigger?) the loop when power is first applied.

To program the source for a chosen output current (Io).

 If Io > 5 mA, then:
R1 = 1.30/Io
R2 = 49.9/Io
R4 = 2.40/Io

 If Io < 5 mA, then:
R1 = 1.55/Io
R2 = 8/Io
R4 = 2/Io

Minimum accurate Io = 500 µA.  Maximum = 200 mA.

And for a finishing touch, frequent commentator Ashutosh points out that it’s good practice to protect loads against erroneous and possibly destructive fault currents. Figure 3 suggests a flexible and highly reliable insurance policy. Wire one of these gems in series with Figure 2 and fault current concerns will vanish.

Figure 3 Accurate, robust, fast acting, self-resetting, fault current limiter where Ilimit = 1.25/R1.

In closing, I leave it to you, the reader, to decide whether Figure 2’s resemblance to Christopher Paul’s design is merely superficial, truly meaningful, outright plagiaristic, or just weird.

Stephen Woodward’s relationship with EDN’s DI column goes back quite a long way. Over 100 submissions have been accepted since his first contribution back in 1974.

 Related Content

• A precision, voltage-compliant current source
• Active current mirror
• A current mirror reduces Early effect
• A two-way mirror—current mirror that is
• A two-way Wilson current mirror

The post SCR topology transmogrifies into BJT two-wire precision current source appeared first on EDN.

Have you ever had a duty-cycle resolution issue in your digitally controlled power supply?

In a digital pulse width modulation (DPWM)-controlled power supply, the duty-cycle adjustment is not continuous, but has a minimum step. This is one significant difference between digital control and analog control.

In order to really understand the resolution issue, let’s look at the exaggerated DPWM waveform in Figure 1.

Figure 1 An exaggerated DPWM waveform where the DPWM is acting as the output by comparing its clock counter with a preset comparison value. Source: Texas Instruments

DPWM is acting as the output by comparing its clock counter with a preset comparison value; when the counter equals the comparison value, it will generate a trigger signal, and flip the PWM outputs. When you adjust the comparison to different values, the flipping edge will act earlier or later. Because the counter value can be the only integer, the minimum adjustment step of the duty cycle is expressed by Equation 1:

Oscillation caused by low duty-cycle resolution

The duty-cycle resolution of DPWM brings a disturbance to power-supply control. If the duty-cycle resolution is too low, it may bring limit cycle oscillations (LCOs) to the control loop and cause output voltage ripple. This problem is more serious in high-switching-frequency systems.

Let’s take a 48-V to 5-V synchronous buck converter as an example, as shown in Figure 2.

Figure 2 A 48-V to 5-V synchronous buck converter example. Source: Texas Instruments

Assuming a 500-kHz switching frequency when using 120-MHz PWM frequency, recalling Equation 1, the minimum duty-cycle step is . The minimum duty-cycle adjustment brings the voltage difference with , which means 4% voltage ripples of the output, shown in Figure 3. This is obviously unacceptable.

Figure 3 A low-resolution duty cycle causes output voltage ripple. Source: Texas Instruments

Increase duty-cycle resolution

The most direct way to resolve this duty-cycle resolution issue is to use high-resolution PWM (HRPWM). HRPWM is a powerful peripheral that can reduce the adjustment step significantly—to the 10ps level—but it is typically only available in high-performance MCUs, which may be too powerful or expensive for the design.

Is there a simple method to resolve the duty-cycle resolution issue without extra cost? Can you increase the duty-cycle resolution by using software, or an algorithm?

Looking again at the DPWM waveform, the duty cycle is generated by two variables: the comparison value and the period value, which Equation 2 calculates as:

The common method of adjusting the duty cycle is changing the comparison value and keeping the ‘Period’ value in constant; in other words, the buck converter is operating in fixed switching frequency. What happens if you adjust the duty-cycle by varying the switching frequency? Mostly, a small variation of the switching frequency is not harmful but helpful to power converters, it will reduce the electromagnetic interference and help to pass the EMI regulations.

If you keep the comparison value unchanged, but adjust one count to the period value, how much is the duty-cycle variation? Is it larger or smaller than adjusting the comparison value? Please look into the Equation 3:

Keeping in mind that, the duty-cycle variation by adjusting the comparison value is , because D is always smaller than 1, and  is nearly equal to , you can see that  will be always smaller than .

Which means, adjusting the period value will generate smaller variation to the duty-cycle than adjusting the comparison value.  The improvement is more significant when the duty cycle is much smaller than 1. If you point out the duty-cycle values on one numerical axis with varying the period value, you will clearly see that, when you adding the period value with fixed comparison value, the duty cycle will reduce with a smaller step, as shown in Figure 4.

Figure 4 Duty-cycle values when varying both period and comparison. Source: Texas Instruments

Varying the frequency

Based on the analysis above, it is possible to generate a higher resolution by adjusting the period value. But, in power converter, the switching frequency generally can’t vary much, otherwise the magnetic component design will become very challenge. So, the next question is, how to generate the expected duty cycle with the combination of these two variables?

The method is, first, decided the comparison value with a preset period value, and then, finetune the period value to get the closed duty cycle. The fine tune process either can by increasing the period value with the larger the comparison value, or by reducing the period value with the smaller the comparison value. Figure 5 shows the flowchart of the software by increasing the period value with the larger comparison value, the decreasing method will be similar to this, just need reverse the calculate direction.

Figure 5 Software flowchart for adjusting both the comparison and period values simultaneously. Source: Texas Instruments

At last, I need to figure out that, this software method is principally independent of HRPWM hardware technology, such as a micro-edge positioner. So it is applicable to a digital control loop with HRPWM peripherals same.

Improvement results

Let’s return to the example of the 48-V to 5-V synchronous buck converter in Figure 2. After adopting this software method, it’s possible to reduce the duty-cycle resolution too; the output voltage ripple drops tremendously to <40 mV, as shown in Figure 6. This is acceptable to most of the electrical appliance.

Figure 6 Improved output voltage ripple using the software method. Source: Texas Instruments

This method doesn’t need to use HRPWM to solve the duty-cycle resolution problem, but slightly increasing the duty-cycle resolution with a software algorithm can make your product more competitive by enabling the use of a low-end MCU.

Furthermore, this method is a purely mathematical algorithm; in other words, it is not limited to low-resolution PWM only but also works for HRPWM. So it can be used in some extremely high requirement conditions to further increase the duty-cycle resolution with HRPWM.

Desheng Guo is a system engineer at Texas Instruments, where he is responsible for developing power solutions as part of the power delivery industrial segment. He created multiple reference designs and is familiar with AC-DC power supply, digital control, and GaN products. He received a master’s degree from the Harbin Institute of Technology in power electronics in 2007, and previously worked for Huawei Technology and Delta Electronics.

Related Content

• Digital PWM Motor Control
• Power Controller with Six DPWM Outputs
• Bus-Compatible DPWM Controller
• High efficiency resonant mode implementation using digital control

The post Power Tips #148: A simple software method to increase the duty-cycle resolution in DPWM appeared first on EDN.

Got a table saw recently so I went a little overboard with the French cleats. I also made a scope cart from the remains of my last desk. Fume extraction is a work in progress and I think I need a bigger flare on the hood. Next steps are better parts storage and filling out the relay rack with test gear. If anyone has any test lead/ cable storage suggestions, I’d love to hear them submitted by /u/jellzey [link] [comments]

From ancient compasses to modern smartphones, magnetometers have quietly shaped how we sense and navigate the world. Let us explore the fundamentals behind these field-detecting devices.

Magnetic fields are all around us, yet invisible to the eye. Magnetometers turn those hidden forces into measurable signals, guiding everything from navigation systems to consumer electronics. Well, let us dive into the principles that allow a simple sensor to translate invisible forces into actionable data.

A magnetometer is a device that measures magnetism: the direction, strength, or relative change of a magnetic field at a given location. Measuring the magnetization of a magnetic material, such as a ferromagnet, is one example. A compass is a simple magnetometer: it detects the direction of the ambient magnetic field, in this case the Earth’s.

The Earth’s magnetic field can be approximated as a dipole, offset by about 440 kilometers from the planet’s center and inclined roughly 11 degrees to its rotational axis. At the surface, its strength averages around 0.4 to 0.5 gauss, about 40–50 microtesla, which is quite small compared to laboratory magnetic fields.

Only a few types of magnetometers are sensitive enough to detect such weak fields, including mechanical compasses, fluxgate sensors, Hall-effect devices, magnetoelastic instruments, and magneto resistive sensors.

One of the landmark magnetoresistive sensors from the 1990s was KMZ51 from Philips. Released in 1996, it offered high sensitivity by exploiting the magnetoresistive effect of thin-film permalloy. At its core, the device integrated a Wheatstone bridge structure, which converted changes in magnetic resistance into measurable signals.

To enhance stability and usability, Philips added built-in compensation and set/reset coils: the compensation coil provided feedback to counter drift, while the set/reset coil re-aligned the sensor’s magnetic domains to maintain accuracy. These design features made KMZ51 particularly effective for electronic compasses, current sensing, and detecting the Earth’s weak magnetic field—applications where precision and reliability were essential. KMZ51 remains a classic example of how clever sensor design can make the invisible measurable.

Figure 1 Simplified circuit diagram of KMZ51 illustrates its Wheatstone bridge and integrated compensation and set/reset coils. Source: Philips

On a related side note, deflection, compass, and fluxgate magnetometers represent three distinct stages in the evolution of magnetic sensing. The deflection magnetometer, essentially a large compass box with a pivoted needle, measures the Earth’s horizontal field by observing how an external magnet deflects the needle under the tangent law. The familiar compass magnetometer, in its simplest form, aligns a magnetic needle with the ambient field to indicate direction, a principle that has been carried forward into modern electronic compasses.

Fluxgate magnetometers, by contrast, employ a soft magnetic core driven into alternating saturation; the resulting signal in a sense coil reveals both the magnitude and direction of the external field with far greater sensitivity. Together, these instruments illustrate the progression from basic mechanical deflection to precise electronic detection, each expanding the engineer’s ability to measure and interpret the invisible lines of magnetism.

Tangent law and Tan B position in compass deflection magnetometers

In the Tan B position, the bar magnet is oriented so that the magnetic field along its equatorial line is perpendicular to the Earth’s horizontal magnetic field component. Under this arrangement, the suspended magnetic needle deflects through an angle β, and the tangent law applies:

Tanβ= B/BH

B is the magnetic field produced at the location of the needle by the bar magnet.

BH is the horizontal component of the Earth’s magnetic field, which tends to align the needle along the geographic north–south direction.

This relationship shows that the deflection angle β depends on the ratio of the magnet’s equatorial field to the Earth’s horizontal field. This simple geometric relationship makes the Tan B position a fundamental method for determining unknown magnetic field strengths, bridging classroom demonstrations with practical magnetic measurements.

Figure 2 The image illustrates magnetometer architectures—from pivoted needle to fluxgate core—across design generations. Source: Author

Quick take: Magnetometers on the workbench

Magnetometers range from fluxgate arrays orbiting in satellites to quantum sensors probing in research labs—but this session is just a quick take. The spotlight here leans toward today’s DIY enthusiasts and benchtop builders, where Hall-effect sensors and MEMS modules serve as practical entry points. Think of it as a wake-up call, sprinkled with a few lively detours, all pointing toward the components that make magnetometers accessible for everyday projects.

Hall-effect sensors remain the most approachable entry point, translating magnetic fields into voltage shifts that DIY-ers can easily measure with a scope or microcontroller. MEMS magnetometers push things further, offering compact three-axis sensing in modules that drop straight into maker projects or wearables.

These devices not only simplify experimentation but also highlight how magnetic sensing has become democratized—no longer confined to aerospace or geophysics labs but are available in breakout boards and low-cost modules.

For the benchtop builder, this means magnetometers can be explored alongside other familiar sensors, integrated into Arduino or Raspberry Pi projects, or used to probe the invisible magnetic environment around everyday circuits. In short, the practical face of magnetometers today is accessible, modular, and ready to be wired into experiments without demanding a physics lab.

Getting started with magnetometers is straightforward, thanks to readily available pre-wired modules. Popular options often incorporate ICs such as the HMC5883L, LIS3MDL, and TLV493D, among others.

Although not for the faint-hearted, it’s indeed possible to build fluxgate magnetometers from scratch. The process, however, demands precision winding of coils, careful core selection, stable drive electronics, and meticulous calibration—all of which can be daunting for DIY enthusiasts. These difficulties often make home-built designs prone to noise, drift, and inconsistent sensitivity.

For those who want reliable results without the engineering overhead, ready-made fluxgate magnetometer modules are a practical choice, offering calibrated performance and ease of integration straight out of the box. A good example is the FG-3+ fluxgate magnetic field sensor from FG Sensors, which provides compact and sensitive measurement capabilities for hobbyist and applied projects.

FG-3+ is a high-sensitivity fluxgate magnetic field sensor capable of measuring Earth’s magnetic field with up to 1,000-fold greater precision than conventional integrated IC solutions. Its output is a stable 5-volt rectangular pulse, with the pulse period directly proportional to the magnetic field strength.

Figure 3 The FG-3+ fluxgate magnetic field sensor integrates seamlessly into both experimental and applied projects. Source: FG Sensors

Closing thoughts

This marks the end of this quick-take post on magnetometers, presented in a deliberately unconventional style. We have only scratched the surface; the field is rich with subtleties and deflections that deserve deeper exploration. If this overview piqued your interest, I encourage you to experiment with sensor modules, study fluxgate designs, and share your findings with the engineering community.

And while magnetometers probably will not help you track UFOs, at least not yet, they remain a fascinating gateway into sensing the invisible forces all around us. The more we build, test, and exchange ideas, the stronger our collective understanding becomes. Onward to the next signal.

T. K. Hareendran is a self-taught electronics enthusiast with a strong passion for innovative circuit design and hands-on technology. He develops both experimental and practical electronic projects, documenting and sharing his work to support fellow tinkerers and learners. Beyond the workbench, he dedicates time to technical writing and hardware evaluations to contribute meaningfully to the maker community.

Related Content

• Tiny magnetometer ups sensitivity
• Fundamentals of digital magnetic sensors
• Differential Magnetic Current and Position Sensing
• Magnetometer basics for mobile phone applications
• Deliberate diamond defect yields ultrasensitive magnetometer

The post Magnetometers: Sensing the invisible fields appeared first on EDN.

Що відкрили для себе студенти КПІ в Національному музеї літератури України kpi ср, 12/31/2025 - 13:00