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A high-performance DAQ system that meets the latest evaluation and test needs in the automotive, mechatronics, and power electronics fields 

Yokogawa Test & Measurement Corporation announces the release of the SL200 High-Speed Data Acquisition Unit, a ScopeCorder series product with a wide range of data logging functionalities for evaluation and test applications, including high-speed sampling and analysis. The SL2000 is a modular platform that combines the functions of a mixed signal oscilloscope and a data acquisition recorder, and is designed to capture fast signal transients and long-term trends. It is suitable for applications such as R&D, validation, and troubleshooting.

The SL2000 can be used separately or in combination with the DL950 ScopeCorder, depending on the application. No other product family on the market offers this level of flexibility in handling multi-channel measurements. With the ScopeCorder product family, Yokogawa provides a multifaceted, total solution for the high-precision mechatronics and electric power markets that is contributing to the advancement and development of new technologies and applications. 

Development Background
In the four years since the DL950 ScopeCorder was first brought to the market by Yokogawa Test & Measurement, there have been many technical advances in the electric vehicle (EV), renewable energy, and other industrial fields. Today, there is an ever-greater requirement for the capability to simultaneously measure multiple parameters and for the systemization of mechatronic measurements in product development. For example, in the development of motors for industrial and EV systems, one essential test for checking and improving a product is the durability test. This test takes a long time to complete and requires a highly reliable measuring instrument and high sampling rates.

Main Features
1. Enabling both high-speed sampling and multi-channel measurement
The SL2000 performs long-duration multi-channel measurements while precisely analyzing even the most detailed aspects of waveforms. With its dual capture function, the SL2000 can perform durability tests over long periods of time at speeds of up to 200 MS/s.

By using the IS8000 integrated software platform, it is easier to perform the long-term measurements required for durability testing, helping to improve the efficiency of product design and evaluation work. In addition, isolation measurement technology ensures the noise resistance required for durability testing in harsh environments.

2. Supporting simultaneous measurement of a wide variety of devices
The SL2000 has eight available slots (with up to 32 channels), for which over 20 types of input modules are available to enable measurements of electrical signals, mechanical performance parameters indicated by sensors, and decoded vehicle serial bus signals. To increase the number of measurement channels, up to five SL2000 and DL950 units can be synchronized.

Major Target Markets
•    Transportation (automotive, rail, aviation, etc.)
•    Power and energy (renewable energy, smart cities/homes, data centers, etc.)
•    Mechatronics, including industrial robots and motors

Applications
•    Durability and reliability testing of components and vehicles that requires high sampling rates and multi-channel simultaneous measurement of analog signals and in-vehicle bus signals such as CAN and CAN FD
•    Simultaneous measurement and evaluation of temperature, vibration, and other mechanical signals that change relatively slowly as well as mechatronic and other such high-speed control signals
•    Electrical analysis and control signal evaluation

The post Yokogawa Test & Measurement Releases SL2000 High-Speed Data Acquisition Unit appeared first on ELE Times.

Industry-first inertial measurement unit (IMU) with dual MEMS accelerometer
and embedded AI measures accurately up to 320g full-scale range

STMicroelectronics, a global semiconductor leader serving customers across the spectrum of electronics applications, has revealed an inertial measurement unit that combines sensors tuned for activity tracking and high-g impact measurement in a single, space-saving package. Devices equipped with this module can allow applications to fully reconstruct any event with high accuracy and so provide more features and superior user experiences. Now that it’s here, markets can expect powerful new capabilities to emerge in mobiles, wearables, and consumer medical products, as well as equipment for smart homes, smart industry, and smart driving.

The new LSM6DSV320X sensor is an industry first in a regular-sized module (3mm x 2.5mm) with embedded AI processing and continuous registration of movements and impacts. Leveraging ST’s sustained investment in micro-electromechanical systems (MEMS) design, the innovative dual-accelerometer device ensures high accuracy for activity tracking up to 16g and impact detection up to 320g.

“We continue to unleash more and more of the potential in our cutting-edge AI MEMS sensors to enhance the performance and energy efficiency of today’s leading smart applications,” said Simone Ferri, APMS Group VP, MEMS Sub-Group General Manager at STMicroelectronics. “Our new inertial module with unique dual-sensing capability enables smarter interactions and brings greater flexibility and precision to devices and applications such as smartphones, wearables, smart tags, asset monitors, event data recorders, and larger infrastructure.” 

The LSM6DSV320X extends the family of sensors that contain ST’s machine-learning core (MLC), the embedded AI processor that handles inference directly in the sensor to lower system power consumption and enhance application performance. It features two accelerometers, designed for coexistence and optimal performance using advanced techniques unique to ST. One of these accelerometers is optimized for best resolution in activity tracking, with maximum range of ±16g, while the other can measure up to ±320g to quantify severe shocks such as collisions or high-impact events.

By covering an extremely wide sensing range with uncompromised accuracy throughout, all in one tiny device, ST’s new AI MEMS sensor will let consumer and IoT devices provide even more features while retaining a stylish or wearable form factor. An activity tracker can provide performance monitoring within normal ranges, as well as measuring high impacts for safety in contact sports, adding value for consumers and professional/semi-pro athletes. Other consumer-market opportunities include gaming controllers, enhancing the user’s experience by detecting rapid movements and impacts, as well as smart tags for attaching to items and recording movement, vibrations, and shocks to ensure their safety, security, and integrity.

With its wide acceleration measurement range, ST’s sensor will also enable new generations of smart devices for sectors such as consumer healthcare and industrial safety. Potential applications include personal protection devices for workers in hazardous environments, assessing the severity of falls or impacts. Other uses include equipment for accurately assessing the health of structures such as buildings and bridges.

The sensor’s high integration simplifies product design and manufacture, enabling advanced monitors to enter their target markets at competitive prices. Designers can create slim, lightweight form factors that are easy to wear or attach to equipment.

The post STMicroelectronics combines activity tracking and high-impact sensing in miniature AI-enabled sensor for personal electronics and IoT appeared first on ELE Times.

Courtesy: Avnet

Myth #1: Demo code is production-ready
AI demos always look impressive but getting that demo into production is an entirely different challenge. Productionizing AI requires effort to ensure it’s secure, optimized for your hardware, and
tailored to meet your specific customer needs.
The gap between a working demonstration and real-world deployment often includes considerations like performance, scalability
and maintainability. One of the biggest hurdles is maintaining AI
models over time, particularly if you need to retrain the application
and update the inference engine across thousands of deployed devices. Ensuring long-term support, handling versioning and managing updates without disrupting service add layers of complexity
that go far beyond an initial demo.
Additionally, the real-world environment for AI applications is dynamic. Data shifts, changing user behavior, and evolving business
needs all require frequent updates and fine-tuning.
Organizations must implement robust pipelines for monitoring
model drift, collecting new data and retraining models in a controlled and scalable way. Without these mechanisms in place, AI
performance can degrade over time, leading to inaccurate or unreliable outputs.
Emerging techniques like federated learning allow decentralized
model updates without sending raw data back to a central server,
helping improve model robustness while maintaining data privacy.

Myth #2: All you need is Python
Python is an excellent tool for rapid prototyping, but its limitations
in embedded systems become apparent when scaling to production.
In resource-constrained environments, languages like C++ or C
often take the lead for their speed, memory efficiency and hardware-level control. While Python has its place in training and experimentation, it rarely powers production systems in embedded
AI applications.
In addition, deploying AI software requires more than just writing
Python scripts. Developers must navigate dependencies, version
mismatches and performance optimizations tailored to the target
hardware.
While Python libraries make development easier, achieving real-time inference or low-latency performance often necessitates
re-implementing critical components in optimized languages like
C++ or even assembly for certain accelerators. ONNX Runtime and
TensorRT provide performance improvements for Python-based AI
models, bridging some of the efficiency gaps without requiring full
rewrites.

Myth #3: Any hardware can run AI
The myth that “any hardware can run AI” is far from reality. The
choice of hardware is deeply intertwined with the software requirements of AI.
High-performance AI algorithms demand specific hardware accelerators, compatibility with toolchains and memory capacity. Choosing mismatched hardware can result in performance bottlenecks or even an inability to deploy your AI model.
For example, deploying deep learning models on edge devices requires selecting chipsets with AI accelerators like GPUs, TPUs or
NPUs. Even with the right hardware, software compatibility issues
can arise, requiring specialized drivers and optimization techniques.
Understanding the balance between processing power, energy consumption, and cost is crucial to building a sustainable AI-powered
solution. While AI is now being optimized for TinyML applications
that run on microcontrollers, these models are significantly scaled
down, requiring frameworks like TensorFlow Lite for Microcontrollers for deployment.

Myth #4: AI is quick to implement
AI frameworks like TensorFlow or PyTorch are powerful, but they
don’t eliminate the steep learning curve or the complexity of real-world applications. If it’s your first AI project, expect delays.
Beyond the framework itself, one of the biggest challenges is creating a toolchain that integrates one of these frameworks with the
IDE for your chosen hardware platform. Ensuring compatibility, optimizing models for edge devices, integrating with legacy systems,
and meeting market-specific requirements all add to the complexity.
For applications outside the smartphone or consumer tech domain,
the lack of pre-existing solutions further increases development
effort.

Myth #5: Any OS can run AI
Operating system choice matters more than you think. Certain AI
platforms work best with specific distributions and can face compatibility issues with others.
The myth that “any OS will do” ignores the complexity of kernel
configurations, driver support and runtime environments. To avoid
costly rework or hardware underutilization, ensure your OS aligns
with both your hardware and AI software stack.
Additionally, real-time AI applications, such as those in automotive
or industrial automation, often require an OS with real-time capabilities. This means selecting an OS that supports deterministic execution, low-latency processing, and security hardening.
Developers must carefully evaluate the trade-offs between flexibility, support, and performance when choosing an OS for AI deployment. Some AI accelerators require specific OS support.

What’s Next for AI at the edge?
We’re already seeing large language models (LLMs) give way to
small language models (SLMs) in constrained devices, putting the
power of generative AI into smaller products. If this is the direction
you’re going, talk to the experts at Witekio.

The post 5 myths about AI from a software standpoint appeared first on ELE Times.

Learning about LLC resonant power supplies and micropython for Pico W. submitted by /u/coderlogic [link] [comments]

🎥 Студенти КПІ відвідали Броварський завод котельного устаткування ARDENZ kpi чт, 05/29/2025 - 22:20

The ESP32 C3 is connected to a DHT11 and a 4x 8x8 MAX7219 LED matrix. The cable management wasn't remotely as relaxing as I imagined it in my fantasy. submitted by /u/satina_nix [link] [comments]

Aeluma Inc of Goleta, CA, USA — which develops compound semiconductor materials on large-diameter substrates — has announced an advance in silicon photonics that could accelerate the adoption of quantum computing and communication at commercial scale, it is reckoned...

Built on a 22-nm process, Silicon Labs’ SiXG301 and SiXG302 wireless SoCs deliver improved compute performance and energy efficiency. As the first members of the Series 3 portfolio, they target both line- and battery-powered IoT devices.

Designed for line-powered applications such as LED smart lighting, the SiXG301 integrates an LED pre-driver and a 32-bit Arm Cortex-M33 processor running at up to 150 MHz. It supports concurrent multiprotocol operation with Bluetooth, Zigbee, and Matter over Thread, and includes 4 MB of flash and 512 kB of RAM. Currently in production with select customers, the SiXG301 is expected to be generally available in Q3 2025.

Extending the Series 3 platform to battery-powered applications, the SiXG302 features a power-efficient architecture that consumes just 15 µA/MHz when active—up to 30% lower than comparable devices. It is well-suited for battery-powered wireless sensors and actuators using Matter or Bluetooth. Sampling is expected to begin in 2026.

The SiXG301 and SiXG302 families will initially include two types of devices: ‘M’ variants (SiMG301 and SiMG302) for multiprotocol support, and ‘B’ variants (SiBG301 and SiBG302) optimized for Bluetooth LE.

Series 3 product page 

Silicon Labs 

The post Wireless SoCs drive IoT efficiency appeared first on EDN.

ST offers three antenna-matching companion chips for STM32WL33 wireless MCUs to help streamline the development of IoT, smart metering, and remote monitoring systems. The MLPF-WL-01D3, MLPF-WL-02D3, and MLPF-WL-04D3 integrate impedance matching and harmonic filtering on a single glass substrate to boost RF performance.

By integrating antenna protection, matching, and filtering, the devices simplify RF routing, improve reliability, and reduce BOM cost by replacing multiple discrete components. The three Series 3 chips will be joined by four new variants, supporting radio optimization across high-band (826–958 MHz) and low-band (413–479 MHz) ranges, high-power (16/20 dBm) and low-power (10 dBm) modes, and 2-layer or 4-layer PCB designs.

The MLPF-WL-01D3, MLPF-WL-02D3, and MLPF-WL-04D3 antenna-matching ICs are available now in 5-bump chip-scale packages, priced from $0.15 each in 1000-unit quantities. Release dates for the additional variants were not available at the time of this announcement.

MLPF-WL-0xD3 product page

STMicroelectronics

The post Antenna-matching ICs cut RF design complexity appeared first on EDN.

The NTAG X DNA from NXP is an ISO/IEC 14443-4 Type 4 NFC tag that enables secure authentication of NFC-enabled mobile devices. It features 16 kB of memory, high-speed data transfer, and Secure Unique NFC (SUN) authentication to protect devices across healthcare, smart home, consumer electronics, and industrial markets.

Supporting device-only, device-to-device, and device-to-cloud authentication, the NTAG X DNA secures data transfer via NFC or I²C interfaces at speeds up to 848 kbps and 1 MHz, respectively. A direct MCU connection enables device diagnostics, while the tag’s memory allows access to stored authentication data—even without power. Sensitive information can also be erased in power-off conditions to protect user privacy.

Designed to combat counterfeits and support Digital Product Passport (DPP) compliance, the NTAG X DNA offers strong security with Common Criteria EAL 6+ certification and PKI-based asymmetric cryptography. It is backed by NXP’s EdgeLock 2GO service for UID and certificate delivery, as well as on-demand certificate generation.

NTAG X DNA product page

NXP Semiconductors 

The post IC safeguards NFC communication appeared first on EDN.

Qorvo’s QPA3311 and QPA3316 hybrid power doubler amplifiers are optimized for DOCSIS 4.0 downstream operations up to 1.8 GHz. They support the transition to Unified DOCSIS and smart amplifier architectures that enhance visibility, efficiency, and adaptability in hybrid fiber-coax (HFC) systems.

Based on a GaAs/GaN die, the devices operate from 45 MHz to 1794 MHz and provide 23 dB of gain. They are well-suited for DOCSIS 4.0 CATV nodes and amplifiers. High total composite power and improved signal integrity reduce cascade requirements and enhance end-of-line performance, helping lower infrastructure costs by eliminating the need for booster amps.

The QPA3311 and QPA3316 power doublers operate from 24-V and 34-V supplies, respectively, with power consumption of 12.5 W and 18 W. At 51 dB CNN, total composite power reaches 74 dBmV for the QPA3311 and over 75 dBmV for the QPA3316.

Both the QPA3311 and QPA3316 power doubler amplifiers are housed in SOT-115J packages and are now in production.

QPA3311 product page

QPA3316 product page 

Qorvo

The post Power doublers enable smooth DOCSIS 4.0 upgrades appeared first on EDN.

Asahi Kasei has developed the Sunfort TA series of dry film photoresist for next-generation semiconductor packages requiring circuit patterns with line/space widths of 2/2 µm or less. The film offers high resolution with conventional stepper and laser direct imaging (LDI) systems—used to transfer circuit patterns onto substrates—enhancing precision in back-end processes.

The TA series supports fine wiring formation in panel-level packages and related applications. It enables patterning with a 1.0-µm resist width using LDI exposure in a 4-µm pitch design, as required for redistribution layer (RDL) formation (Figures a and b). The resulting fine resist pattern can be plated by a semi-additive process, then stripped to yield a 3-µm wide plating pattern within the same 4-µm pitch (Figure c).

Asahi Kasei states that Sunfort dry film photoresist will remain integral to advancing panel-level packaging technology as panel sizes increase. With its ability to achieve finer wiring and improve production efficiency, the TA series addresses the rising demand for advanced semiconductor package substrates and interposers in AI, automotive, communications, and IoT markets.

TA series product page

Asahi Kasei 

The post Dry film photoresist enables fine circuit formation appeared first on EDN.

Макулатура зі змістом: КПІ передає списану літературу на переробку на благо природи та розвитку Університету kpi чт, 05/29/2025 - 18:21

Україна – Європа: жіноче обличчя Інформація КП чт, 05/29/2025 - 17:44

Hi everyone! I'm a second-year Electrical & Electronics Engineering student, and this is my EMG (Electromyography) sensor project, built as part of the Analog System Design course in my curriculum. The circuit is designed to pick up muscle activity using surface electrodes. It starts with a differential amplifier stage using an LF356 op-amp to extract the low-amplitude bioelectric signals I made all the calculations and simulation using an Instrumentation Amplifier but had to change it to this becuse the INA was not remotely available. These signals are then processed through active filters and a precision rectifier using TL084 and TL081 op-amps, ultimately providing a DC output that indicates muscle contraction. The left side three screw terminals are the input from surface electrodes, right side three screw terminals are the power input VDD, VEE and Ground, the double screw terminals is the DC output signal. I soldered the components on a perf board for the first time ever, focusing on compactness, clean signal routing, and minimal noise. Sharing it here to showcase the design and gain insight from the community on areas like soldering quality, layout decisions, and analog design. submitted by /u/TheArtShack-22 [link] [comments]

The code is based on the work of Johnathan Chiu which he posted here. I am using an ESP-32 with a potentiometer joystick, power is supplied trough a 18650 battery and I used a chep USB Type C charging module. I only modified Johnathan Chius code to include a part for reading from the potmeter. My experience with the remote: I built the remote itself about a year ago and since the used it a couple of times, so far without any trouble. Since I didn't add the code necesary to auto-pair the remote to the board, every time I turn on the remote I have to pair it to the board. The banana shape isn't as comfortable to hold as I thought it would be and I have to press on the deadman switch pretty hard, but it looks awesome. If you have any questions I'm glad to answear them! submitted by /u/thebananamanforever [link] [comments]

The typical regulator output network

Many voltage regulator chips, both linear and switching, use the same basic two-resistor network for output voltage programming. Figure 1 illustrates this feature in a typical switching (buck type) regulator, see R1 and R2, where:

Vout = Vsense(R1/R2 + 1) = 0.8v(11.5 + 1) = 10v

Figure 1 A typical regulator output programming network where the Vsense feedback node and values for R1 varies from type to type.

Quantitatively, the Vsense feedback node voltage varies from type to type and recommended values for R1 can vary too, but the topology doesn’t. Most conform faithfully to Figure 1. This de facto uniformity is useful if your application involves PWM control of Vout. 

Wow the engineering world with your unique design: Design Ideas Submission Guide

The three-component PWM-to-regulator solution

Figure 2 shows the simple three-component solution that the above topology makes possible. Note, the PWM duty factor (DF) is from 0 to 1, where:

Vout = Vsense(R1/(R2/DF) + 1) = DF(11.5)0.8 + 0.8 = DF*9.2 + 0.8v

Figure 2 Three parts comprise a circuit for linear regulator programming with PWM.

To introduce linear PWM control to the Figure 1 regulator, all that’s required is to add three discrete components: the PWM switch Q1, and the ripple filter capacitors C1 and C2. Note that Vout will go to Vsense(C1/C2 + 1) = 10v for about 6 ms during power up while C1 and C2 are charging, but that should be okay.

The C2 capacitance required for 1 lsb (0.4%) PWM ripple attenuation is C2 = 2(N-2)/(R1*Fpwm), where N is number of PWM bits, and Fpwm is the PWM frequency (10 kHz illustrated).

Then, to avoid messing with U1’s designed loop gain, possibly reducing stability, C1 = C2*R2/R1. This capacitance ratio also provides protection for U1’s Vsense input, since it ensures that even a sudden short of Vout to ground can’t drive Vsense dangerously negative.

 This combination of time constants yields a first-order 8-bit settling time of T8 = R1C2ln(256) = 37ms. More on this lengthy number shortly.

A cool feature of this simple topology is that, unlike many other schemes for digital power supply control, only the precision of R1, R2, and the regulator’s internal voltage reference matter for regulation accuracy. Precision is therefore independent of external voltage sources, e.g., logic rails. Precision, measured as percentage of Vout, is also independent of Df, and remains equal to Vsense precision (e.g., ±1%) for all output voltages.

Speeding up the settling time

What if a 37-ms settling time is too lengthy for your application? What if you wouldn’t mind investing a couple more parts to speed it up? Figure 3 shows what.

Figure 3 Add R3 and C3 to get analog ripple subtraction, second-order filtering, and a 7-ms settling time. The symbol “*” represents a precision of 1% or better.

First disclosed in EDN Design Idea (DI), “Cancel PWM DAC ripple with analog subtraction,” a thrifty way to implement second-order PWM ripple filtering is through the analog subtraction of the AC component in the logic inverse of the PWM signal from the DC result. Figure 3 shows how that can be accomplished by simply adding R3 and C3 to the Figure 2 topology. Note that the impedance ratios of the added parts are equal to the ratio of the 5-Vpp PWM signal at Q1’s gate to the 0.8-Vpp logic complement at its drain = 5v/0.8v = 6.5.  This is why R3 = 6.5*R2 and C3 = C2/6.5.

In closing: This DI revises an earlier submission, “Three discretes suffice to interface PWM to switching regulators.” My thanks go to commenters oldrev, Ashutosh Sapre, and Val Filimonov for their helpful advice and constructive criticism. And special thanks go to editor Shaukat for her creation of an environment friendly to the DI teamwork that made this possible.

Stephen Woodward’s relationship with EDN’s DI column goes back quite a long way. Over 100 submissions have been accepted since his first contribution back in 1974.

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• Control an LM317T with a PWM signal

The post Revisited: Three discretes suffice to interface PWM to switching regulators appeared first on EDN.

At the IEEE MTT-S International Microwave Symposium (IMS 2025) in Moscone Center, San Francisco, CA, USA (15–20 June), MACOM Technology Solutions Inc of Lowell, MA, USA is showcasing its portfolio of high-performance RF, microwave and millimeter-wave (mmWave) solutions and foundry services, with technical experts available to highlight performance advantages, plus a full lineup of technical presentations throughout the show...

Акредитація освітніх програм КПІ ім. Ігоря Сікорського 2025/05/28 kpi чт, 05/29/2025 - 14:48

Infineon Technologies AG of Munich, Germany has announced the first of a new family of radiation-hardened gallium nitride (GaN) transistors, fabricated at Infineon’s own foundry, based on its proven CoolGan technology. Designed to operate in harsh space environments, the new product is the first in-house-manufactured GaN transistor to earn the highest quality certification of reliability assigned by the US Defense Logistics Agency (DLA) to the Joint Army Navy Space (JANS) Specification MIL-PRF-19500/794...