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By the time you read this, sometime in May, Lent will be over. As I’m writing it in late March, Lent’s ~half over. I’m splitting the difference and going with an Easter theme for this piece.

Back in February 2012, I bought a CyberPower CP825AVRG, one of several UPSs (uninterruptable power supplies) currently inhabiting my abode, on sale from Staples for $54.99. Here are some stock photos of it:

Aside from the inevitable couple of iterations of SLA battery replacements, it’s still going strong more than a decade later, through two subsequent residence (including one time zone) transitions, with one exception, which ironically has nothing to do with its battery-backup power output facilities. The four outlets along the left side in the first two earlier stock photos are both battery-backed and surge protected; the ones along the right only offer surge-protection support. And, unsurprisingly, the one in the lower right corner has seen the most unplug-and-replug use, due to its under-desk proximity-to-me.

The UPS problem

A few months back, I woke up one morning to find my iPad Pro’s battery only partially full, even though I’d as-usual plugged it into its USB-C charger the night before:

As mentioned before, I’ve owned this particular charger since mid-2019, so it wouldn’t have surprised me to learn that it had finally “given up the ghost”. But on a hunch, driven by my admittedly obsessive thriftiness, I carried the charger, USB-C cable and iPad Pro over to an available AC outlet one room over, plugged everything in and…the tablet started charging.

If the problem’s not with the charger, it’s obviously with the outlet the charger’s plugged into instead, right? I confirmed this hypothesis by plugging the charger back into the UPS and wiggling it, wherein I could tell from the telltale “beep” coming from the tablet when charging was (now inconstantly) happening there. At least one of that AC outlet’s contacts buried deep inside the UPS was no longer making a solid connection with whatever was plugged into it.

The short-term solution

My initial workaround employed an intermediary short extension cord plugged into the UPS, with the charger (or anything else I might want to power at the time) plugged into that:

The aspired-for improvement was two-fold; the extension cord’s “female” connector end would bear the brunt of subsequent charger, e.g., unplugs and re-plugs, plus the added “earth ground” NEMA 5-15 prong on the “male” connector end would give the to-UPS connection more rigidity.

And my “hack” worked…for a while. But then the UPS’ AC connection to the extension cord started giving out, too, whenever I’d breathe on it (I’m exaggerating, but only a bit).

Opening the UPS up

At this point, I was about ready to give up on the CP825AVRG; I planned to put duct tape over the flaky AC outlet, along with taping a note to the UPS, and then donate it. After all, those CyberPower LE850G successors I’d mentioned in late 2022 were still sitting in their boxes awaiting their turns in the spotlight, and with slightly higher power output along with two more total outlets (one battery-backed, the other surge-only), to boot:

But like I said earlier, the CP825AVRG was otherwise still chugging along fine; it’s even supported by my Mac mini over USB for running-on-batteries alert purposes (note the connector in the upper right corner of this stock photo):

And have I already mentioned my admittedly obsessive thriftiness? Plus, hey, I’m an engineer; I’ll take any opportunity to tear something apart and satisfy my curiosity. So, one recent evening, I grabbed a screwdriver and, throwing caution to the wind (after unplugging the darn thing and waiting a few minutes for capacitive discharge, of course!), dove in:

Buh-bye, temporarily (hopefully), battery:

In addition to the (already removed) screw that held the battery compartment lid in place, six other deeply recessed ones keep the two case halves together. You know what comes next:

Let’s focus in on the half that we particularly care about:

Brian: My, what a big transformer you have!
UPS: All the better to magnetically voltage-convert with!

Ahem. Today’s attention emphasis is on the left side of the device, associated with the surge-only outlets (since, in contrast to the earlier “stock” shots, the UPS is now upside down). I was initially disheartened, thinking I’d need to disassemble the entire thing to get to them. But then, after moving some wiring out of the way:

I realize that above them was a black plastic panel held in place by three screws:

The culprit

That’s more like it. Our patient is the outlet in the lower left corner. Zooming in, you can see the particular contact (the lowest one) that’s now “stretched” and no longer makes reliable contact with whatever’s plugged into it:

Grab a pair of needle-nose pliers. Squeeze gently. And…voila:

The insides

This is not going to be a full teardown; I wanted to return the UPS to full functionality, after all, not send it to the landfill. But while I had it partially apart, I went ahead and snapped some more photos for your enjoyment. Here’s the right-side vertically-mounted PCB, front-to-back (as oriented in the earlier overview shots), inner side first:

Now for the other (outer) side of that same PCB, in the same front-to-back order:

Now for the inside of the PCB at the back of the device:

And, last but not least, the inside and outside of the PCB in the back left corner:

It’s alive!

All that’s left is to retrace my disassembly steps in reverse, plug everything back in, grab a just-in-case fire extinguisher (kidding…maybe…), hit the power button and…we’re back in business!

Keen-eyed readers may have already noticed, by the way, that I’ve already replaced the elementary diminutive extension cord previously in that lower-right AC outlet with a “splitter”:

similar to two others you’ll see already in use there, for augmented total-available-outlets purposes. And on that note, by the way, I’m not under any delusion that my “fix” will last through the remainder of the UPS’s otherwise-operational lifetime. The metal in that contact is already fatigued; it’s only a matter of time until it stretches back out of reliable-contact place.

“I use everything until it completely falls apart”

That all said, in closing I’ll share the intro to an article on Yvon Chouinard in the latest (as I write this) issue of National Geographic, which I saw the very day after my successful-for-now repair:

Yvon Chouinard laughs when he tries to remember the oldest piece of gear he owns. Perhaps it’s a piton he forged in the late 1950s, after he taught himself blacksmithing and started Chouinard Equipment, Ltd.? Or maybe it’s one of the rugged rugby shirts his next company, Patagonia, made for climbing? Possibly the “fleece” jacket prototype Patagonia built using toilet-seat-cover fabric, which has since become an outdoors icon?

 “Almost everything I have is old,” says Chouinard, 86, grinning. “I use everything until it completely falls apart.” The Patagonia founder glances around the office of his Wyoming ranch—a pinewood house with a view of the Tetons that he and his friends built in 1976—then raises his hands to show that the sleeves of his faded plaid shirt are all in tatters. “My whole life has been pretty simple, really. I’m not a consumer.”

I’m no Yvon Chouinard. My life isn’t simple. And I’m definitely a consumer. But that all said, I’d like to think I still share at least a bit of his longstanding “dirtbag aesthetic”. Agree or disagree? Any other thoughts? Let me know in the comments.

—Brian Dipert is the Editor-in-Chief of the Edge AI and Vision Alliance, and a Senior Analyst at BDTI and Editor-in-Chief of InsideDSP, the company’s online newsletter.

Related Content

• Putting an APC UPS out of its (and my) misery
• Modern UPSs: Their creative control schemes and power sources
• A holiday shopping guide for engineers: 2022 edition
• Ungluing a GaN charger

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Efficient Power Conversion Corp (EPC) of El Segundo, CA, USA — which makes enhancement-mode gallium nitride on silicon (eGaN) power field-effect transistors (FETs) and integrated circuits for power management applications — has announced availability of the EPC2366, a 40V, 0.8mΩ device designed to displace legacy low-voltage silicon MOSFETs in demanding applications such as high-performance DC–DC converters and synchronous rectifiers. Engineering samples are available for qualified designs...

Fabless firm Cambridge GaN Devices Ltd (CGD) — which was spun out of the University of Cambridge in 2016 to design, develop and commercialize power transistors and ICs that use GaN-on-silicon substrates — says that Inventchip of Shanghai, China, a provider of silicon carbide (SiC) power devices and ICs, has demonstrated a 2.5kW GaN-based CCM totem-pole PFC reference design using CGD’s ICeGaN gallium nitride ICs...

As graphics processing units (GPUs) keep getting more powerful, so do the power requirements at the board level. Intermediate bus converters (IBCs) which convert for example a 48 V input voltage to a lower bus voltage are becoming more important for energy efficiency, power density, and thermal performance in AI data centers. Infineon Technologies AG announced that its OptiMOS 6 80V power MOSFETs in a compact 5×6 mm² dual side cooling package have been integrated into the IBC stage of an AI server platform of a leading processor manufacturer. Application tests show an efficiency increase of around 0.4 percent compared to previously used solutions, corresponding to a saving of around 4.3 W per kW of load. At the system level, this leads to significant energy savings when scaled across server racks or entire data centers. For instance, scaling this across a hypothetical hyperscale data center with 2,000 racks would result in over 1.2 MWh in energy savings every hour – the equivalent energy needed to charge 25 small electric vehicles. The implications of this development are substantial, with cost savings and reduced carbon footprint for data center operators.

As the demand for AI computing continues to grow, the need for efficient power management solutions will increase. Infineon’s OptiMOS 6 80V is well-positioned to meet the growing energy-efficiency demand, offering a high-performance solution for AI server IBCs. Infineon’s OptiMOS 6 80V MOSFET in the 5×6 mm² DSC package offers optimized switching performance in hard switching topologies and high energy efficiency due to lower conduction losses. Additionally, the compact package enables cooling on both sides, which contributes to improved thermal management and higher power density – both crucial in AI server environments with limited space.

The OptiMOS 6 80V is part of Infineon’s broad portfolio of silicon power MOSFETs, designed to meet the growing demands for performance, efficiency, and integration in AI server applications. The portfolio leverages the latest MOSFET technology and offers various application-specific variants, optimized for different cooling concepts and system requirements. Infineon silicon power MOSFETs meet the highest quality and protection standards, enabling assured product reliability, dependable system uptime, and proven supply stability.

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Discrete device designer and manufacturer Nexperia of Nijmegen, the Netherlands (which operates wafer fabs in Hamburg, Germany, and Hazel Grove Manchester, UK) has announced a range of highly efficient and robust automotive-qualified silicon carbide (SiC) MOSFETs with on-resistance (RDS(on)) values of 30mΩ, 40mΩ and 60mΩ...

ams OSRAM of Premstaetten, Austria and Munich, Germany is extending its portfolio of high-power lasers: the new cyan-colored laser diode is up to five times brighter than its predecessors...

Deposition equipment maker Aixtron SE of Herzogenrath, near Aachen, Germany is supplying its new G10-AsP metal-organic chemical vapor depositiion (MOCVD) system for high-volume production of GaAs/InP materials to longstanding customer SMART Photonics, enabling it to increase its capacity and capabilities...

Polar Light Technologies AB (PLT) has fabricated its first micro-display prototype built on its proprietary pyramidal micro-LED (µLED), confirming the technology’s ability to integrate the pyramidal micro-LED frontplane onto a CMOS backplane...

As a pioneer in the market introduction of silicon carbide (SiC) power devices and trench technology for SiC MOSFETs (combining what is claimed to be excellent performance with high robustness), Infineon Technologies AG of Munich, Germany says that its CoolSiC product line now spans from 400V to 3.3kV and covers a broad range of applications including automotive drivetrains, EV charging, solar energy systems, energy storage, and high-power traction inverters. Building on a track record in SiC business development and leveraging its position as the innovator of charge-compensating devices in silicon (CoolMOS), Infineon is now introducing a trench-based SiC superjunction (TSJ) technology concept...

To enable the next generation of solid-state power distribution systems, Infineon Technologies AG of Munich, Germany is expanding its silicon carbide (SiC) portfolio with the new CoolSiC JFET product family...

Works every time😂 submitted by /u/Hacker_ZERO [link] [comments]

🔵🟡 ІІІ Всеукраїнська конференція з питань теоретичної і прикладної кібербезпеки TACS-2025 kpi вт, 05/06/2025 - 18:48

In Part 1 of this Design Idea (DI), we saw how a standard electret microphone capsule can be persuaded to detect infrasonic signals down to a fraction of a Hertz by adding some fairly simple equalization. In this second and concluding part, we will improve that circuitry and also add an audio output to allow us to hear the otherwise inaudible.

Wow the engineering world with your unique design: Design Ideas Submission Guide

Figure 1 shows the revised schematic. While the equalization is much the same, the circuitry around the mic itself is more elaborate. Originally, the mic was fed straight from the power rail, potentially causing feedback problems. Now, it is powered from a clean reference source and also enclosed in a feedback loop to help stabilize its operating point.

Figure 1 A new input buffer stabilizes the mic’s operation, while other additions improve the circuit’s performance.

R1 and D1 define a nominal +1.24-V reference supply for the mic’s positive terminal. (D1 is not specified. I used an LM385-1.2, but that family is now obsolete—why?? They seemed trouble-free and well-specified, the -ADJ version being especially useful. But LMV431s or LM4041s look good.) In the absence of any offset, A1’s output rests at -1.24 V, needed for the low end of the mic’s load resistor R4. When everything is set up and stable, the junction of R4 and the mic’s negative terminal is close to 0 V (or common). The mic’s signal rides on that, and is amplified by A2, a portion of it being fed back into A1 by R5 to help to stabilize the mic’s operating point.

Calibration and setting up

All microphones behave slightly differently, mainly owing to the spreads on their internal JFETs, so some initial calibration is needed: the load resistor R4 must be trimmed. Sw1a allows R5 to be open-circuited to speed up this initial adjustment, while Sw1b keeps C2 out of circuit (see below) for the same reason. They are shown in the operating position on the schematic.

Once set, operation will be stabilized by feedback, largely compensating for temperature changes. Without the feedback from A2, the tempco of the voltage across the mic measured around 13 mV/°C; with it, it drops to around 1. R18 trims the residual offset, which can otherwise be up to 200 mV at the output of A4.

C1, at 100n, is enough to hold A1 stable during calibration, but it is C2—10 µF—that defines the low 3-dB point of A1’s circuit, once allowance has been made for the reduction in its effective value by the feedback. If C2 is in circuit at start-up, things take takes ages to settle, so that capacitor is pre-charged and only switched seconds after switch-on. (Charge-injection, as shown in Part 1’s Figure 5, scarcely helped here, perhaps because the feedback neutralizes it.)

U1a generates that delay. C3 and R6 control the period, with R7 and C4 adding positive feedback for a snappy action. U1a then switches U1b to control how C2 is connected. During start-up, C2 is connected between A1’s output (-1.24 V) and the common rail, charging it to its expected operating voltage; during operation, it spans R3, defining the circuit’s time-constant.

That hysteresis is necessary because controlling a ’4053 directly with the slowly changing voltage from an RC network leads to it oscillating (at least with the Motorola and RCA devices to hand; those names alone date them). The chosen delay is longer than strictly necessary, given the values of C1 and R3, but it allows time for the rest of the circuit to settle better. This leaves a spare section of the ’4053; using it to repeat the pre-charging trick on C5 or to short out R14+15 during the start-up period made little difference to the overall settling time.

Acoustically isolating the mic and allowing both it and the circuit to settle properly before calibration is necessary. Temporarily enclosing it in two hollow hemispheres of modeling clay, loosely sealed together, works well. During operation, it should be shielded from any air movements. Even a single sheet of fabric suffices, but a block of open-cell plastic foam or a wodge of acoustic fiber should be even better.

 The rest of the circuit

The circuit around A3 is unchanged except for the added offset-trimming pot R18. A4 adds a two-pole Sallen–Key low-pass filter (f3dB ≈ 12 Hz) to the signal path so that, along with the roll-off from A3, any 50/60 Hz components are attenuated by 35 to 40 dB.

C8 and R14+15 define the overall low-end cut-off which, with the values shown, can vary from about 300 mHz to 1.7 Hz (3 dB points). With R15 maxed out, C1/R3’s time-constant is dominant.

In Part 1, we tried a meter for indication but found it to be rather slow. However, it now becomes a useful add-on, allowing the mic’s load resistance and the offset trim to be set easily. It still indicates the lowest frequencies well.

Figure 2 shows the response to changes in air pressure with R15 set to both its maximum and minimum values. While these are LTspice-derived traces, they closely match the real-world measurements. Compare the top, red trace with Figure 2 in Part 1.

Figure 2 The calculated frequency responses of the circuit with the limiting values of R15.

Actual results are shown in Figure 3. These used the test rig described in Part 1, and were taken with R15 set for maximum bandwidth. Like Part 1’s Figure 5, with which it can be compared, it was scanned manually, so don’t trust the frequency scale to be truly logarithmic. As before, the trace wanders vertically because of flicker or 1/f noise from the JFET, but the overall response and linearity are both clear.

Figure 3 Measured response using a real microphone in the pressure-chamber test rig.

The microphone used was the 10mm-diameter type which was to hand. “Other types are available” but may work differently. Tests using salvaged 5-mm units imply that the sensitivity is roughly proportional to the diaphragm’s area—or the square of its diameter—which seems reasonable. The 5-mm devices were both newer and quieter, presumably like their internal JFETs, so their overall S/N ratios were similar. Use the largest ones you can.

Hearing the infrasound

If we take the infrasonic signals and use them to modulate an audio tone, we can then hear what’s going on, or at least a proxy for it. A recent DI was for a pitch-linear VCO: this DI is of course the project (or gadget) for which that was needed (or wanted).

The oscillator used here is almost identical to one of the variants in that article. It’s shown in Figure 4. We won’t describe its operation here (you can refer back for the details) but there are some changes and additions.

Figure 4 Frequency-modulating an audio tone lets us hear the form of the infrasonics.

As before, the main part of it generates a tone whose frequency is centered at around 500 Hz and which varies by plus or minus an octave—doubling or halving the frequency—for control inputs ranging from plus to minus a volt (roughly), so that it is linear in pitch rather than frequency. That control input is of course the detected infrasonic signal.

Under extreme conditions, that signal can span the power rails—up to ±2.5 V—so it is potted down by R23 and R24. (Something non-linear in place of R24 is tempting but untried. That should allow low-level signals through almost unchanged while compressing the peaks. Perhaps two pairs of back-to-back 1N4148s, with a higher value for R23…)

The audio square wave from U2b feeds R28 and the pair of limiting diodes bridged by C13 and C14 to give a trapezoid of about a volt peak-to-peak. That may be excessive, so C13/14 also pot it down to ~100 mV pk–pk. A8 buffers the signal, R29 providing a ground path while scarcely shunting C14.

For a straightforward ~1 V pk–pk audio output, short out C13, make C14 33 nF, and eliminate R29 and pot R30. Even simpler (and cruder) would be to feed the phones directly from U2 through a 5k pot acting as a volume control. Extra filtering caps across the phones could then be added to taste.

Mixing and matching

We may want that lower signal level because it’s then comparable with the output from A2, which is the mic’s amplified wideband audio signal. R30 lets us cross-fade between that and our tones, should we want to. (And we may, a little later.) The output can now be fed to a power amp (I used a TDA7052A—not shown) and speaker or earphones (with a series resistor). With the left and right ’phones in parallel, the sound is roughly in the middle of your head; connecting them in series (out of phase) gives an “out there” effect, which can be less distracting if you also want to hear the complex soundscape of the planes, trains, and automobiles causing the infrasonics.

While it might be nice to include a sound file here so that you can hear the results, we will have to make do with something visual: a typical trace, showing a passing high-speed train a few hundred meters distant while a couple of planes much further away approach Heathrow Airport.

Figure 5 The effects of a nearby train, a plane or two, and some local traffic can be seen in this trace. Note the x-axis time scale.

Air is not the only element

We mentioned cross-fading earlier, but why might we want it? Two things that I have yet to try will be under the ground and underwater. Sealing a mic in a suitable and appropriately-weighted drinks bottle should make an interesting hydrophone, and the local canal will soon be awash with propeller noises. But will these mainly be directly audible or much lower in frequency? Pressure variations should couple through the bottle walls to the air within and thence to the mic, though probably with low efficiently. Filling the bottle with oil might improve that, at least until it seeps into the mic’s innards.

Another bottle, buried in and grouted into the ground (the local bedrock is chalk, exposed in places) may work as a geophone, not that there should be much audio in that underworld. Seismically quiet it may be round here, but we still get the odd rumble at magnitude 2 or 3.

Final flights of fancy

Wouldn’t it be nice to have a pair of mics, suitably spaced to make a stereo pair and each with its own equalization, perhaps with their summed outputs controlling the tone’s frequency and their individual ones adjusting the relative left–right amplitudes? Control of phase might also be needed, that being the main source of directional information at low frequencies, which could involve some rather complicated voltage-controlled all-pass filtering. Or something. Or a DSP.

If you want to see what electrets can do if customized by serious funding, search for “NASA infrasound” which will produce a slew of fascinating results, spanning environments from the ocean depths to the edge of space. While this DI cannot compete with NASA’s sub-millihertz detection capability, it should be just as much fun and is certainly rather cheaper.

Editor’s Note:

 Part 1 of this DI uses an electret mic to create infrasound. It starts with a basic equalization circuit validated with a DIY test fixture and simulations, and ends with a deeper analysis of the circuit’s real response.

 Part 2 includes refinements to make the circuit more usable while extending its detectable spectrum with an additional technique that allows us to hear the infrasonic signals.

—Nick Cornford built his first crystal set at 10, and since then has designed professional audio equipment, many datacomm products, and technical security kit. He has at last retired. Mostly. Sort of.

 Related Content

• Revealing the infrasonic underworld cheaply, Part 1
• Squashed triangles: sines, but with teeth?
• A pitch-linear VCO, part 1: Getting it going
• Earplugs ready? Let’s make some noise!
• Supersized log-scale audio meter

 

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HARTING India subsidiary of HARTING Technology Group, a leading provider of industrial connectivity solutions, announced the grand opening of its new Technology Centre in Bangalore, often referred to as the Silicon Valley of India. This state-of-the-art facility is a strategically important location designed to foster innovation, enhance research and development, and support the growing demand for advanced connectivity solutions in the region. This location will hold well-trained core Innovation Hub team, Global IT solutions team, and is spread across approx. 7500+ Sq. Ft. area, and is in the industrial zone.

The inauguration took place in presence of some of Mr. Philip Harting, CEO of HARTING Technology Group, and Ms. Mabel Low, APAC Managing Director, along with Mr. Jacob Chandy, Managing Director of HARTING India. Some of the key customers also were present during the inauguration from companies like Schneider, BHEL, Biesse, ALSTOM, Wabtech, WEG, EVERAXIS. The new Technology Centre will serve as a hub for HARTING’s cutting-edge projects, focusing on the development of next-generation connectivity solutions for various industries, including manufacturing, transportation, and telecommunications. With a commitment to driving technological advancements, HARTING India aims to leverage local talent and expertise to create solutions that meet the evolving needs of its customers.

The Technology Centre will feature advanced laboratories, collaborative workspaces, and a dedicated team of engineers and researchers focused on developing innovative products and solutions. HARTING India is committed to investing in the local community and will also provide training and development opportunities for aspiring engineers and technology professionals.

“We are thrilled to establish our Technology Centre in Bangalore, a city known for its vibrant tech ecosystem and skilled workforce,” said Jacob Chandy, Managing Director of HARTING India. “This facility will not only enhance our R&D capabilities but also strengthen our collaboration with local partners and customers. We believe that innovation is key to staying ahead in today’s fast-paced market, and this centre will play a crucial role in our mission to deliver high-quality connectivity solutions.”

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Texas Instruments (TI) is demonstrating new power-management products and designs at the Power Conversion, Intelligent Motion (PCIM) Expo and Conference, May 6-8 in Nuremberg, Germany. At the show, TI is featuring semiconductor advancements for sustainable energy, automotive, USB Type-C and USB Power Delivery (PD), robotics, and motor control, including:

• Industry’s first automotive-qualified inductor-inductor-capacitor (LLC) controller for light electric vehicle charging: TI is debuting its new primary-side LLC controller, the UCC25661-Q1, in a three-stage AC/DC battery charger demonstration for electric two-wheelers. The demonstration showcases how the UCC25661-Q1 controller enables engineers to design a highly efficient and reliable power supply with double the power density using integrated features and TI’s patented Input Power Proportional Control (IPPC).

• 65W dual-port USB PD charger with self-biasing gallium nitride (GaN) flyback: TI is showcasing the industry’s first self-biasing GaN flyback converter, the UCG28826, in a demonstration of its 65W dual-port USB PD charger reference design. Designed for next-generation fast-charging applications, the UCG28826 converter delivers 65W across 90VAC to 264VAC in this reference design, enabling engineers to meet strict efficiency standards, minimize standby power consumption and increase power density.
• Short-circuit detection reference design with Flex: In collaboration with electronics manufacturer Flex, TI is demonstrating a comparison of shunt-based, desaturation and Hall-effect sensor methods for short-circuit detection in automotive onboard chargers and DC/DC converters. Booth visitors will learn how to enhance silicon carbide (SiC) metal-oxide semiconductor field-effect transistor (MOSFET) reliability by optimizing the current-sensing location, method and component selection, and printed circuit board layout to meet end-customer safety requirements.

Why it matters

Rising data consumption levels, shrinking consumer electronics, and a focus on renewable energy and vehicle electrification place unique demands on power engineers to maximize efficiency, push power into smaller spaces, and support higher voltages across all applications.

“TI’s broad portfolio and deep system design expertise on display at PCIM enable power engineers to achieve high performance, reliability and scalability in their next-generation applications,” said Mark Ng, director, Automotive Systems. “In automotive, for example, our power-dense and efficient semiconductors enable nearly every aspect of system design, from improved driving range to optimized charging, and new architectures for a feature-rich experience.”

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Hero MotoCorp, in collaboration with the Automotive Skills Development Council, launched Phase 2 of its flagship CSR initiative, Project Saksham, with a grand Training Inauguration Ceremony.

The initiative, aims to empower 20,000 women across India by providing specialized training for diverse roles in the automotive sector, including sales, service, and emerging areas like Electric Vehicle (EV) maintenance and diagnostics. This Event Was hosted in partnership with NIFA Infocom Services Pvt. Ltd. at the Pradhan Mantri Kaushal Kendra, Agra.

The ceremony was graced by Smt. Hemlata Divakar Kushwaha, Mayor of Agra Municipal Corporation, who served as the Chief Guest. She praised the program’s vision, stating, “Empowering women with technical skills not only benefits them individually but strengthens our economy and community. Initiatives like Project Saksham are crucial steps towards a more inclusive future.”

Adding to the occasion, Mr. Vinkesh Gulati, Vice President, ASDC, emphasized the broader industry impact of the initiative. “The automotive sector is undergoing a major transformation with emerging technologies like EVs. It is vital that women are not just participants but leaders in this evolution. Through Project Saksham, we are committed to building a skilled, gender-diverse workforce ready to meet the demands of the new mobility era,” Mr. Gulati remarked.

Phase 2 of Project Saksham builds on the success of the first phase by expanding its geographic footprint and curriculum. Alongside technical training, the program includes modules on soft skills, workplace readiness, and financial literacy to ensure holistic development.

The NIFA Infocomp-operated centre, Agra will serve as a key hub for delivering this transformative training. With initiatives like Project Saksham, Hero MotoCorp and ASDC reaffirm their dedication to fostering an inclusive, skilled workforce that will shape the future of the Indian automotive industry.

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NUBURU Inc of Centennial, CO, USA — which was founded in 2015 and develops and manufactures high-power industrial blue lasers — has received a notice from NYSE Regulation indicating that it not in compliance with Section 1003(a)(i) of the NYSE American LLC Company Guide, which requires a company to maintain stockholders’ equity of $2m or more if it has reported losses from continuing operations or net losses in two of its three most recent fiscal years...

Analysts estimate that the global market for semiconductors will exceed $600 billion in 2025 and hit the $1 trillion mark by 2030, suggesting a CAGR of over 8%. It’s no surprise that the drivers behind this growth include the semiconductor devices and systems needed to support the rapidly growing segments like artificial intelligence (AI), automotive industries (autonomous driving and EVs), data centers and cloud computing, communications, and consumer electronics.

Electronic design automation (EDA) plays a critical role in the growth of the global semiconductor industry. Yet it’s relatively unknown outside of those who participate directly in the industry. In order to understand the value of EDA, it helps to grasp where EDA fits within the semiconductor supply chain.

Semiconductor value chain

The semiconductor supply chain is both complex and globally distributed. If we consider the portion of the supply chain from design through finished semiconductor products—packaged chips and systems, for example—it comprises the parts shown below.

Figure 1 The semiconductor supply chain encompasses product specification, chip design and verification, manufacturing and assembly, and test and packaging. Source: Bob Smith

Semiconductor companies are the primary users of EDA tools required for designing chips that may contain upward of billions of transistors. In addition to EDA tools, these companies also use semiconductor intellectual property (IP) blocks that are pre-designed and characterized functional blocks to help simplify the design process.

The beginning of the process that feeds the supply chain is the development of new chip designs. Leading into design is the upfront planning, including assessing the target market(s) and market timing requirements—both too early and too late must be avoided—and functional and performance characteristics. Once the plan is in place, the chip design process begins.

Chip design is a complex process that starts with architectural planning and detailed specifications on chip functionality and performance (Figure 2). The next steps take the design through different levels of abstraction and verification. All the blocks in the diagram are served by EDA vendors providing many different EDA products.

Figure 2 Chip design and verification are complex and require several steps before the design can be handed off to manufacturing. Source: Bob Smith

Register transfer level (RTL) design creates a software model of the chip using a hardware description language (HDL) such as Verilog or VHDL. This design must then be rigorously verified using a simulator, and in some cases, the use of hardware-assisted verification known as hardware emulators or FPGA prototypes. Once the software-based design is verified, the next step is another transformation.

Synthesis takes the RTL software design and transforms it into a logic-level netlist. The netlist is a collection of logical components and blocks interconnected to form the circuitry that will perform the chip’s functions. Additional verifications steps are performed after synthesis to ensure that the netlist works as expected.

Once the netlist is verified, the next step is the creation of the actual physical geometries used to define the structures (transistors) and interconnects (wires) that will be manufactured. This step is called place and route. “Place” refers to locating the functional blocks on the chip and “route” speaks to generating the wires that interconnect the blocks.

Physical design is followed by exhaustive verification steps that include checking functionality and timing. Other checks such as power and thermal integrity and design and electrical rule checking assess that requirements for the target semiconductor process have been met. These verification steps are the “gatekeepers” that must be satisfied before the design can be released to manufacturing.

The manufacturing industry includes providers of the equipment and materials that are used to manufacture semiconductor chips. Once manufactured, the fabricated chips are handed off to companies that specialize in the next step of assembly, test, and packaging.

In this final step before the chips can be delivered to market, these companies test the chips and then assemble them into packages. The packaged chips then head to distribution channels that ultimately deliver the chips to product manufacturers to assemble into their products.

The value of EDA

The total revenue contribution of these segments of the supply chain in 2024 was approximately $420 billion. In this same period, the EDA segment generated about $20 billion or ~ 5% of the total revenue. While this sounds like a small piece of the puzzle, the value of EDA goes far beyond what revenue numbers convey.

Where is this “unseen” value in EDA coming from? The answer lies in the complexities of the design process itself, and the driving need to keep up with the competition.

Modern chip design is both complex and challenging. The most sophisticated chips may contain tens of billions of transistors—far beyond the realm of unaided manual design.

Moreover, time to market is everything in the highly competitive market. The ability to design and deliver a new chip to address a market need on time and with the features that will ensure success in the end market is a daunting task. Design teams invest in the EDA and verification tools that help them optimize these tradeoffs.

The cost of designing and verifying a leading-edge chip can be in the hundreds of millions of dollars to go from concept to design completion and release to manufacturing. A design flaw or late delivery can mean the end of a promising new chip and lead to hundreds of millions of dollars or more in unrecoverable costs. Failure is not an option.

EDA tools are the engines that drive the design process and allow semiconductor manufacturers to meet ever-shrinking market windows. The EDA tools themselves and the methodology and flows (“recipes”) that each company develops around them are regarded as highly valuable trade secrets.

While time to market is at the top of the list, there are other considerations that EDA tools also address. These can include product safety, product lifecycle and suitability for specialized applications for markets such as vehicles, medical devices, and defense and aerospace. All these requirements mandate sophisticated design and verification tools that can be applied to ensure designs meet these needs—and deliver on time.

EDA plays another valuable role in the chain as a key driver in bringing new process technologies to market. Development of new semiconductor processes relies on tight partnerships between the process developers and the EDA companies.

It’s expensive to bring a new process to the point where it has been characterized and dialed-in so that it can deliver the yield and performance that potential customers will demand. But to be able to accept designs, semiconductor manufacturing must be able to support the customers with verified EDA tools and flows that will support the new technology. No tool support, no customers.

Semiconductor design is at the front end of the supply chain and the EDA industry provides the tools that are essential for turning out today’s complex chip designs. Without availability of these design automation tools, the new innovations and products that drive the global semiconductor industry forward would come to a screeching halt and the supply chain would wither and atrophy.

Value beyond licensing fee

The insatiable demand for new products from the electronics industry keeps intense pressure on the semiconductor manufacturers to deliver the future. In turn, this demands that the EDA industry continually deliver new tools, technologies and functionality that support the ongoing move to the future. Simply said, there would be no new products or growth in the global electronics market without EDA. Measuring the EDA market solely on revenue contribution vastly understates the value that EDA delivers to the global semiconductor industry.

The ultimate value that the EDA industry delivers to the global semiconductor industry is almost incalculable. Certainly, it is far beyond the licensing and maintenance revenues that the industry generates.

Robert (Bob) Smith is executive director of the ESD Alliance, a SEMI technology community, representing members in the electronic system and semiconductor design ecosystem responsible for its management and operations.

 

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The post A short primer on EDA’s value in IC design appeared first on EDN.

Rohde & Schwarz and industry partners will be providing a virtual platform for RF design engineers to enhance their RF expertise and engage with industry leaders at the forefront of innovation. The online event will feature informative presentations by experts from Rohde & Schwarz, The University of Cardiff, Maury Microwave, Qorvo, MathWorks, Analog Devices and Greenerwave.

At the virtual RF Testing Innovations Forum 2025, taking place from May 20 to 21, 2025, design engineers will be able to gain invaluable insights into the latest advancements in RF testing methodologies and technologies. Led by experts from Rohde & Schwarz and industry partners, the two-day event will explore the critical factors expected to shape the future of RF testing.

Agenda highlights of Session 1

Day one of the two-day online event will start by covering subjects such as how to enhance the accuracy of mmWave non-linear vector network analyzers, which monitor harmonic distortion, intermodulation and other non-linear effects that can influence mmWave system performance.

Participants will discover innovative approaches to wideband modulated load pull including how to address typical limitations. This novel approach to RF front-end testing uses an R&S RTP oscilloscope plus an R&S SMW200A wideband vector signal generator. The experts will then take a look at the importance of achieving stable and accurate test levels using closed-loop power control. Areas covered will include supported signal forms, suitable test instrumentation and what needs to be considered to achieve the best results.

Two further presentations will take place before the first day’s session closes at 1:00 pm. One presentation will explore load pull techniques for next generation sub-THz components while the next will look at how to characterize wideband active RF components using real-world stimulus signals, in particular how using a fully modulated signal can speed up the overall testing process as it offers deep insights in a single measurement.

Agenda highlights of Session 2

Day two will open with a keynote interview exploring the evolution of vector network analyzers, considering growing demand for faster and more accurate test solutions while keeping costs down. RF components are becoming more sophisticated, having more features integrated into them and offering unseen performance and frequency coverage, posing new challenges to RF design engineers.

This will be followed by a presentation on dealing with the challenges of on-wafer characterization of bulk acoustic wave filter harmonics, especially in achieving accurate measurements and minimizing distortions. The speaker will outline how to use an advanced probing technique when characterizing the second harmonic performance of BAW filters.

The next presentation will look at how to accelerate antenna pattern analysis and simulation using MATLAB. There will be a particular focus on building the full 3D radiation pattern from a subset of 2D pattern measurements using analytical methods and AI techniques. Participants will also learn how to integrate the measured data into a system level simulation model for wireless communication and radar systems. A talk on dataset acquisition optimization for AI-controlled electronically steerable antennas will then take place before a break.

The RF Testing Innovations Forum 2025 will conclude with a presentation on advanced measurement techniques for ultra-wideband software-defined radios and an outline of the role of the R&S ZNB3000 VNA in RF front-end production.

The post Rohde & Schwarz hosts RF Testing Innovations Forum 2025, helping design engineers elevate their RF expertise appeared first on ELE Times.

NUBURU Inc of Centennial, CO, USA — which was founded in 2015 and develops and manufactures high-power industrial blue lasers — has initiated a strategic working group dedicated to revitalizing its Blue-Laser business unit. The initiative aims to redefine the company’s approach to leveraging laser technology within the defense sector...