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The typical anti-log circuit

The basic anti-log amplifier looks like the familiar circuit of Figure 1.

Figure 1 The typical anti-log circuit has uncertainties related to the reverse current, Is, and is sensitive to temperature.

Wow the engineering world with your unique design: Design Ideas Submission Guide

The approximate equation for V0 given in Figure 1 comes from the Ebers-Moll model. A more advanced model employed by many modern spice simulators, such as LTspice, is the Gummel-Poon model, which I won’t discuss here. It suffices for discussions in this Design Idea (DI) to work with Ebers-Moll and to let simulations benefit from the Gummel-Poon model.

The simple Figure 1 circuit is sensitive to both temperature and the value of Is. Unfortunately, the value and limits of Is are not specified in datasheets. Interestingly, spice models employ specific parametric values for each transistor, but still say nothing about the limits of these values. Transistors taken from different sections of the same silicon wafer can have different parametric values. The differences between different wafers from the same facility can be greater yet and can be even more noticeable when those from different facilities of the same manufacturer are considered. Factor in the products of the same part number from different manufacturers, and clear, plausible concerns about design repeatability are evident.

Addressing temperature and Is variations

There’s a need for a circuit that addresses these two banes of consistent performance. Fortunately, the circuit of Figure 2 is a known solution to the problem [1].

Figure 2 This circuit addresses variations in both temperature and Is. Key to its successful operation is that Q1a and Q1b constitute a matched pair, taken from adjacent locations on the same silicon wafer. Operating with the same VCEs is also beneficial for matching.

It works as follows. Given that Q1a and Q1b are taken from adjacent locations on the same silicon wafer, their characteristics (and specifically Is) are approximately identical (again, Is isn’t spec’d). And so, we can write that:

It’s also clear that:

Additionally,

So:

Therefore:      

Substituting Ic expressions for the two VBEs,

And here’s some of the circuit’s “magic”: whatever their value, the matched Is’s cancel! From the properties of logarithms,

Again, from the properties of logarithms:     

Exponentiating, substituting for the Ic’s, and solving for V0:

Note that Vi must be negative for proper operation.

Improving temperature compensation

Let’s now turn our attention to using a thermistor to deal with temperature compensation. Those I’m used to dealing with are negative temperature coefficient (NTC) devices. But they’ll do a poor job of canceling the “T” in the denominator of Equation (1). Was there an error in Reference [1]?

I exchanged the positions of R3 and the (NTC) thermistor in the circuit of Figure 2 and added a few resistors in various series and parallel combinations. Trying some resistor values, this met with some success. But the results were far better with the circuit as shown when a positive temperature coefficient (PTC) was used.

I settled on the readily available and inexpensive Vishay TFPT1206L1002FM. These are almost perfectly linear devices, especially in comparison to the highly non-linear NTCs. Figure 3 shows the differences between two such devices with resistances of 10 kΩ at 25°C. It makes sense that a properly situated nearly linear device would do a better job of canceling the linear temperature variation.

Figure 3 A comparison of a highly non-linear NTC and a nearly linear PTC.

To see if it would improve the overall temperature compensation in the Figure 2 circuit, I considered adding a fixed resistor in series with the TFPT1206L1002FM and another in parallel with that series combination.

Thinking intuitively that this three-component combination might work better in the feedback path of an inverting op amp whose input was another fixed resistor, I considered both the original non-inverting and this new inverting configurations. The question became how to find the fixed resistor values.

The argument of the exponent in Equation (1) (exclusive of Vi) provides the transfer function H(T, <resistors, PTC>), which would be ideally invariant with temperature T (with Th1 suitably modified to accommodate the series and parallel resistors).

For any given set of resistor values, the configurations apply some approximate, average attenuation α to the input voltage Vi. We need to find the values of the resistors and of α such that for each temperature Tk over a selected temperature range (I chose to work with the integer temperatures from -40°C to +85°C inclusive and used the PTC’s associated values), the following expression is minimized:

Excel’s Solver was the perfect tool for this job. (Drop me a note in this DI’s comments section if you’re interested in the details.)

The winning result

The configurations were found to work equally well (with different value components.) I chose the inverter because it allows Vi to be a positive voltage. Figure 4 shows the winning result. The average value α was determined to be 1.1996.

Figure 4 The simulated circuit with R2a, R2b, and R3 chosen with the help of Excel’s Solver. A specific matched pair of transistors has been selected, along with values for resistors R1 and Rref, and a voltage source Vref.

For Figure 4, Equation (1) now becomes approximately:

The circuit in Figure 4 was simulated with 10° temperature steps from -40°C to +80°C and values for Vi of 100 µV, 1 mV, 10 mV, 100 mV, 1 V, and 6 V. These V0 values were divided by those given by Equation (2), which are the expected results for this circuit.

Over the industrial range of operating temperatures and more than four orders of magnitude of input voltages, Figure 5 shows a worst-case error of -4.5% / +1.0%.

Figure 5 Over the industrial range of operating temperatures and over 4.5 orders of magnitude of input voltages from 100 µV to 6 V, the Figure 4 circuit shows a worst-case error of better than  -5.0% / + 1.0%. V0 ranges from 2.5 mV to 3 V.

Bonus

With a minor addition, this circuit can also support a current source output. Simply split Figure 4’s R1 into two resistors in series and add the circuit of Figure 6.

Figure 6 Split R1 of Figure 4 into R1a and R1b; also add U4, Rsense, and a 2N5089 transistor to produce a current source output.

Caveats

 With all of this, the simulation does not account for variations between the IS’s of a matched pair’s transistors; I’m unaware of a source for any such information. I’ve not specified op-amps for this circuit, but they will require positive and negative supplies and should be able to swing at least 1-V negative with respect to and have a common-mode input range that includes ground. Bias currents should not exceed 10 nA, and sub-1 mV offset voltages are recommended.

Temperature compensation for anti-log amp

Excel’s Solver has been used to design a temperature-compensation network for an anti-log amplifier around a nearly linear PTC thermistor. The circuit exhibits good temperature compensation over the industrial range. It operates within a signal range of more than three orders of magnitude. Voltage and current outputs are available.

References

1. Jain, M. K. (n.d.). Antilog amplifiers. https://udrc.lkouniv.ac.in/Content/DepartmentContent/SM_6aac9272-bddd-4108-96ba-00a485a00155_57.pdf

Related Content

• Gain control
• Why modulate a power amplifier?—and how to do it
• Power amplifiers that oscillate—deliberately. Part 1: A simple start.
• Log and limiting amps tame rowdy communications signals
• Mutant op amp becomes instrumentation amp

The post A temperature-compensated, calibration-free anti-log amplifier appeared first on EDN.

До 100-річчя першого польоту українського пасажирського літака К-1 Інформація КП ср, 09/03/2025 - 16:14

In late September, Japan-based KIOXIA Iwate Corp will begin evaluating a gallium nitride (GaN)-based electron-beam technology developed through joint research between Nagoya University spinoff Photo electron Soul Inc (PeS) and the Amano–Honda Laboratory at Nagoya University...

Tata Electronics Private Limited has signed a strategic Memorandum of Understanding (MoU) with Merck, a global leader in science and technology, to accelerate the development of India’s semiconductor ecosystem. The agreement, finalized, underscores a joint commitment to building robust capabilities in materials, fabrication, and supply chain infrastructure.

Under the partnership, Merck will prepare a full suite of advanced solutions for Tata Electronics, including high-purity electronic materials, advanced gas and chemical delivery systems, and turnkey fabrication infrastructure services. Merck’s AI-enhanced Material Intelligence solutions will also aid operations at Tata’s Semiconductor Fabrication Plant in Dholera, Gujarat.

The partnership encompasses more than just the transfer of technology. Merck will provide guidance on safety and production excellence practices and grant access to Athinia, a secure data analytics platform that enables collaboration at scale. The contract also foresees the establishment of local warehouses, the development of raw material supply chain, and talent development programs, all aimed at bolstering India’s position in the semiconductor sector in the world.

Tata Electronics has promised to invest ₹91,000 crore ($11 billion) in creating the Dholera semiconductor fabrication plant, the first of its kind in India. Once operational, the fab will manufacture chips for applications ranging from automotive and mobile devices to artificial intelligence and advanced computing, catering to both domestic and international markets.

This partnership is viewed as a major step in furthering the goals of the India Semiconductor Mission, establishing Merck and Tata Electronics as important figures in determining the future of high-tech production in the nation.

The post Tata–Merck MoU to Accelerate Chip Manufacturing Infrastructure in India appeared first on ELE Times.

The Uttar Pradesh government has introduced a draft policy aimed at strengthening electronics and smartphone manufacturing in the state, with a particular focus on the Noida region. The initiative is part of the state’s broader goal of becoming a $1 trillion economy by 2030.

The draft policy titled “UP Electronics Component Manufacturing Policy 2025” has a goal of providing an ecosystem to nurture domestic and international investors. A variety of incentives, such as capital investment subsidies, stamp and electricity duty waivers, and participation interest grants are proposed to gain more participants.

The state’s IT and electronics department confirmed that the policy was approved by the cabinet in September 2025 and has been made effective retrospectively from April 1, 2025.

The policy aims to achieve $50 billion worth of electronics production within the next five years. Electronics production from U.P. is expected to grow, attracting serious investment, creating massive employment, and cementing the state’s position as a major player in India’s U.P. electronics manufacturing is expected to grow multi-fold within that period.

With Noida as a confirmed centre for electronics and smartphone production, the policy is expected to enhance the state’s role in global supply chains supporting the greater vision of India as a hub for electronics manufacturing.

The post UP Electronics Policy Draft to Boost Smartphone and Electronics Manufacturing appeared first on ELE Times.

Prime Minister Narendra Modi inaugurated Semicon India 2025, positioning India as a rising powerhouse in the global semiconductor industry. Addressing the summit, he said the world now looks to India not only as a trusted partner but as a future leader in chip innovation.

“Oil has been referred to as black gold in the semiconductor industry, but chips are the digital diamonds,” Modi said, highlighting India’s determination to become a full-stack semiconductor nation. Even though we started our trip later than others, we are now unstoppable. The world’s largest revolution will soon be made possible by India’s smallest chip.

Under the Atmanirbhar Bharat vision, the Prime Minister underlined that India’s efforts go beyond chip production and instead concentrate on creating a comprehensive semiconductor ecosystem that boosts competitiveness and self-reliance.

He further elaborated on the Indian semiconductor plan by connecting the dots with India’s stronger economic output. “GDP figures released for the first quarter indicate that India’s GDP is growing at a remarkable 7.8 percent. The growth is seen in every sector of the economy,” he said, putting semiconductor development into the picture of the national economy.

The summit came after Modi’s trip to Japan, where he visited Tokyo Electron Miyagi Ltd., a notable company in semiconductor technology. He explained the complementary relationship between Japan’s advanced technology and India’s nascent semiconductor manufacturing ecosystem and implied that there is more collaboration from other countries to come.

India’s semiconductor market, estimated to be worth between $45 and $50 billion in FY2024–2025, is expected to more than double to $100–110 billion by 2030, according to industry projections presented at the event. Together with international collaborations and regulatory backing, this quick growth is anticipated to solidify India’s position as one of the world’s most important chip-making destinations.

The post Semicon India 2025: PM Modi Says India’s Semiconductor Revolution Will Shape Global Future appeared first on ELE Times.

Metallium Ltd of Subiaco, Western Australia says that its US subsidiary Flash Metals USA Inc off Houston, TX, USA has been awarded a Phase I Small Business Innovation Research (SBIR) contract by the US Department of Defense (DoD) through the Defense Logistics Agency. Valued at AUS$100,000, the award will apply Metallium’s proprietary Flash Joule Heating (FJH) process to recover gallium from waste streams, including LED scrap and gallium-rich waste streams. These feedstocks also contain germanium and other valuable metals, broadening the project’s strategic impact. The work is expected to be completed within six months...

In the heart of India’s rapidly transforming digital economy, a silent revolution is underway women are stepping into the circuits and chips of the electronics industry, carving out spaces in labs, production floors, design centers, and boardrooms. Once considered a male-dominated field, the Indian electronics sector is now increasingly recognizing the power of diversity, and women are playing a key role in this evolution.

From the factory lines in Noida to innovation hubs in Bengaluru, women are taking up the soldering iron, the oscilloscope, and the executive chair. And at the heart of this transformation is the Electronics Sector Skills Council of India (ESSCI)—a catalyst for empowering women through targeted skilling and industry-aligned training.

The Expanding Electronics Landscape

India’s electronics industry is expected to surpass USD 300 billion by 2026, fuelled by global shifts in supply chains, robust government incentives like the Production Linked Incentive (PLI) scheme, and rising domestic consumption of electronic goods. As India moves towards becoming a global hub for electronics manufacturing and design, the demand for a skilled, innovative, and diverse workforce is growing exponentially.

This surge brings with it immense career opportunities for women, especially in:

• Electronics Manufacturing Services (EMS)
• Semiconductor design and embedded systems
• Mobile and consumer electronics repair
• PCB assembly and quality control
• IoT, Robotics, and Automation
• Solar electronics and green energy solutions

The industry’s demand for precision, discipline, and focus makes women particularly well-suited for many of these roles. However, to fully harness this potential, skilling and upskilling are non-negotiable—and that’s where ESSCI plays a pivotal role.

ESSCI: The Enabler Behind the Change

Established under the Ministry of Skill Development and Entrepreneurship (MSDE), ESSCI is the nodal body dedicated to creating a skilled ecosystem for the electronics sector. With over 75 job roles developed and aligned to National Skill Qualification Framework (NSQF), ESSCI has been instrumental in mainstreaming women into electronics-related job roles.

Key Initiatives Include:

• Women-Centric Skilling Programs for roles like LED assembly, mobile repair, solar installations, and PCB soldering.
• Industry-Academia Partnerships to ensure real-world exposure and better placement outcomes.
• National Apprenticeship Promotion Scheme (NAPS) facilitation to integrate women into mainstream apprenticeships.
• Train-the-Trainer Models to build a strong base of female instructors, creating ripple effects in communities.

How to Get Started

1. Education: Pursue a B.Tech/B.E. in Electronics and Communication Engineering, Electrical Engineering, or related fields from private institutions. Specialized courses in VLSI, IoT, or embedded systems enhance employability.
2. Certifications: Enroll in ESSCI courses for industry-recognized certifications in semiconductor design, IoT, and AI.

Career Paths Open to Women

Whether a woman is a school dropout, an ITI student, or an engineering graduate, the electronics sector has space for everyone:

1. Skilled Technicians and Operators

Women are increasingly hired in electronics factories for their dexterity, precision, and focus, particularly in roles like soldering, assembling, testing, and quality control for products like smartphones, consumer durables, and electric vehicles (EVs). For example, Tata Motors employs 1,500 women in its SUV production line, and MG Motor India has 37% women on its shop floor.

Women with short-term skill training can begin careers in:

• Electronic assembly
• PCB soldering
• Component testing
• Quality inspection

These roles are in high demand in electronics manufacturing clusters like Sriperumbudur, Noida, and Pune.

2. Mid-Level Technical Jobs

Diploma holders and trained candidates can explore:

• Service and repair of smartphones, TVs, and consumer electronics
• Solar system installation and maintenance
• EV charging station technicians
• Automation and IoT device installation

3. Engineering and R&D Careers

Women are excelling in chip design, verification, and testing. The semiconductor industry is projected to grow significantly, with women’s participation expected to rise from 24–28% in 2020 to over 30% by 2027. Roles include VLSI design engineer and semiconductor manufacturing engineer. For B.Tech or M.Tech graduates in ECE or related fields, opportunities lie in:

• VLSI and embedded systems
• Hardware design and validation
• Product testing and compliance
• Robotics and sensor integration

With remote work and flexible hours becoming more acceptable, women engineers can balance family responsibilities and professional growth effectively.

4. Entrepreneurship

Skilled women are also turning into job creators by starting:

• LED bulb manufacturing units
• Repair centers for electronics and white goods
• Retail of components and accessories
• Local e-waste collection and recycling businesses

ESSCI supports such ventures by linking women to funding agencies, mentoring, and digital platforms.

Industry Trends Supporting Women

• Growth of the Electronics Sector: India’s electronics industry is projected to grow significantly, with the semiconductor market alone expected to reach $100–110 billion by 2030, driven by technologies like AI, IoT, 5G, and EVs. This creates a high demand for skilled professionals, including women.
• Gender Diversity Initiatives: Companies like Micron (28% women workforce) and NXP (24% women workforce) are fostering inclusive environments with flexible work policies, maternity benefits, and return-ship programs for women re-entering the workforce.
• Government Support:
  • Science and Technology for Women Program promotes women’s participation in STEM through research and skill development.
  • Skill India Initiatives provide training in VLSI, AI, and IoT, targeting women to bridge the skill gap.
  • The 2017 Maternity Bill and policies addressing workplace safety support women’s retention in the workforce.

High-Demand Roles and Salaries

• VLSI Design Engineer: ₹5–10 LPA (entry-level), ₹15–20 LPA (senior).
• Embedded Systems Engineer: ₹5–8 LPA (entry-level), ₹10–15 LPA (mid-level).
• PCB Design Engineer: ₹4–7 LPA (fresher), up to ₹12 LPA (experienced).
• Semiconductor Manufacturing Engineer: ₹6–10 LPA (entry-level), ₹15 LPA+ (senior).

Conclusion: 

The journey for women in electronics has just begun, and the signal is strong: India’s electronics industry needs women—not just as workers, but as leaders, innovators, and entrepreneurs. With the right mix of policy support, industry collaboration, and targeted skilling initiatives like those from ESSCI, the future circuit boards of India will not only carry current—they’ll carry the hopes of empowered women everywhere.

The post Career Opportunities for Women in India’s Electronics Industry appeared first on ELE Times.

Kaynes Semicon Private Limited, a pioneering Indian semiconductor manufacturer and Infineon, a global leader in semiconductor solutions, has signed a Memorandum of Understanding (MoU) to explore strategic collaboration opportunities in India’s fast- growing semiconductor market.

Strengthening India’s Semiconductor Supply Chain

This collaboration will add a significant milestone with the launch of the first Kaynes Semicon MEMs Microphone, featuring Infineon’s reliable and market proven bare die, a breakthrough in domestic semiconductor module manufacturing. This “Made in India” MEMs Microphone will target for especially TWS earbuds, positioning Kaynes Semicon at the forefront of next generation wearable tech.

Additionally, Infineon will supply high-performance power solution bare die wafers to Kaynes Semicon, which will package them into discrete and module semiconductor products tailored for Indian customers.

By combining Infineon’s leadership with Kaynes Semicon’s advanced semiconductor packaging expertise, the two companies aim to strengthen India’s domestic reach and its global supply chain position. This collaboration will ensure a cost-optimized, locally integrated supply chain that delivers high-performance, reliable, and energy-efficient solutions with significantly reduced lead times for customers.

Driving Innovation Across Key Industries

By working together, Infineon and Kaynes Semicon will address critical semiconductor needs across various sectors, including:

• Energy Semiconductors & Renewable Solutions – Delivering high-efficiency technologies for solar, wind, and energy management applications.
• Industrial & Consumer Applications – Enhancing energy efficiency and performance in smart appliances and manufacturing processes.

With the Indian government prioritizing semiconductor self- reliance, this collaboration supports India’s goal of strengthening local production and reducing import dependency. It also lays the foundation for future innovation and deeper engagement in advanced semiconductor technologies, catering to India’s evolving needs in next-generation electronics.

“Infineon’s industry-leading solutions are known for its high performance, efficiency, and reliability across various applications, including automotive, consumer, industrial, renewable energy and data centers. By bringing together our know-how in semiconductors, with the semiconductor packaging and supply chain expertise of Kaynes Semicon, we are confident this partnership will drive India’s high-tech manufacturing push to greater heights. Congratulations to Kaynes Semicon on the opening of their new Gujarat plant, and we look forward to closer collaboration in the future,” said CS Chua, President and Managing Director, Infineon Technologies Asia Pacific.

“The launch of our first ‘Made in India’ MEMs Microphone, powered by Infineon’s technology, is a milestone moment for the Indian semiconductor industry. We are proud to be enabling next-gen innovations across wearable tech, renewables, and industrial sectors with a trusted global leader.” said Mr. Raghu Panicker, CEO, Kaynes Semicon.

The post Infineon Technologies Partners with Kaynes Semicon to Drive India’s First MEMs Microphone and Advanced Semiconductor Package Manufacturing appeared first on ELE Times.

Delta, a global leader in power management and smart green solutions, unveiled a comprehensive portfolio of next-generation innovations at SEMICON India 2025, inaugurated by the Hon’ble Prime Minister of India, Shri Narendra Modi. The showcase features Delta’s Collaborative Robot, the DIATwin Virtual Machine Development Platform, advanced Smart Screwdriving System and Semiconductor Assembly Solutions, and an integrated Smart Manufacturing Architecture. Delta also demonstrated its Smart Green Facility Monitoring & Control Systems and Energy Management Solutions, along with SEMI E187 cybersecurity certification, reinforcing its commitment to advancing India’s semiconductor ecosystem with precision, resilience, and sustainability.

Speaking on India’s semiconductor journey, the Hon’ble Prime Minister said,“Semiconductor factories are coming up in India, and the country will see its first domestically made chip in the market by the end of 2025. Work is also progressing rapidly on developing a ‘Made in India’ 6G network.”

Aligning with this vision, Benjamin Lin, President, Delta Electronics India, said, “India is at the cusp of a semiconductor and electronics revolution, and Delta is proud to contribute to this transformation with future-ready technologies. By combining our deep global expertise with localized innovation, we aim to empower manufacturers with reliable, secure, and intelligent solutions that strengthen competitiveness and create long-term value for India’s high-tech ecosystem. Our efforts are deeply aligned with the Government’s Semiconductor Mission and Make in India initiative.”

Delta’s Collaborative Robot boasts payloads from 6 to30 kg, reach ranges from 800–1,800 mm, and IP66-rated protection. Equipped with Reflex Safety for instant stoppage on contact and the AI Cognitive Module kit for intuitive interaction via speech, gesture, and 3D object recognition.  In addition, the DIATwin Virtual Machine Development Platform shortens new product development by 20%, linking virtual production lines with real data to enable high-fidelity simulation and improved first-pass yield.

Niranjan Nayak, Managing Director, Delta Electronics India, added, “At Delta, we believe India’s journey to becoming a global semiconductor powerhouse will be driven by a strong digital and sustainable backbone. Through investments in collaborative robotics, digital twins, and green technologies, we are ensuring that India’s manufacturing ecosystem is not only competitive but also resilient and sustainable. Delta’s vision is to stand alongside India as it accelerates toward this milestone.”

Highlights of Delta’s booth at SEMICON India 2025 include:

• The showcase includes a Silicon Die Handling Solution for heterogeneous integration, a high-speed wafer feeder, and the High-Speed Die Pick-and-Place Solution powered by CODESYS controllers, enabling high-precision semiconductor assembly.
• Smart Screwdriving System – Torque up to 7.5 N·m, dual-tool capability (one controller managing two screwdrivers), and storage of 200,000 tightening results, ensuring unmatched assembly accuracy across automotive, aerospace, electronics, and medical sectors.
• Smart Manufacturing Architecture – Integrates OT and IT through DIASECS Semiconductor Equipment Standard Communication and Control Application Software), DIAEAP+ Equipment Automation Program, DIASPC Statistical Process Control, and DIAWMS Warehouse Management System, enabling predictive maintenance, process optimization, and seamless factory digitalization.
• Smart Green Facility Monitoring & Control Systems and Energy Management Solutions – Enable enterprises to optimize operations, reduce energy costs, and embed sustainability into production systems.

Dr Sanjeev Srivastava, Business Head- Industrial Automation SBP, Delta Electronics India, said, “India’s Semiconductor Mission and Make in India program are bold and visionary initiatives, and achieving them requires robust digital and automation backbones. With Digital Twin, Smart Manufacturing, and precision robotics, Delta is helping manufacturers move from concept to execution faster, safer, and more efficiently—positioning India as a global hub for high-tech manufacturing.”

Alongside its hardware innovations, Delta also showcased its software portfolio, including DIASECS Semiconductor Equipment Standard Communication and Control Application Software for standardized equipment communication, DIAWMS Warehouse Management System, DIAEAP+ Equipment Automation Program for efficient data collection, and DIASPC Statistical Process Control. Together, these platforms enable seamless integration, higher operational efficiency, and quality assurance while adhering to global semiconductor industry standards.

Anil Chaudhry, Head of Robotics & IA Solutions, Delta Electronics India, added, “Our technologies are not just about automation they are about resilience, agility, and long-term growth. By bridging IT and OT, we help companies break down silos, predict challenges, and adapt seamlessly to market volatility. This is the future of intelligent manufacturing, and we are proud to bring it to India under the vision of the Semiconductor Mission and Make in India.”

Delta is also setting a new benchmark in semiconductor equipment cybersecurity by adopting the SEMI E187 certification, ensuring greater reliability, resilience, and trust for customers operating critical manufacturing platforms.

The post Delta Presents Next-Generation Digital Twins, Cobots, and a Full Range of Smart Manufacturing Solutions as Hon’ble PM Shri Narendra Modi Inaugurates SEMICON India 2025 appeared first on ELE Times.

Конкурс інноваційних стартапів Defense Tech Demo Day у КПІ kpi ср, 09/03/2025 - 04:45

I have been looking for larger quality boards for some time now and I just picked these up today! I was so excited to get them at that price I felt like I had to share! submitted by /u/hockpunk426 [link] [comments]

It's been a busy summer of partnerships, acquisitions, and fab expansions for GlobalFoundries. What does this say about the company's silicon roadmap?

I am currently taking this course from IIT madras by professor hashtag#DrAnanthKrishnan to deepen my understanding on TL theory and how EM waves behaves inside a Transmission Line Theory. TL theory is actually what all the physics and electronics goes behind PCB traces, PCB traces are actually strip/microstrip transmission line.. and this lecture on NPTEL https://lnkd.in/d5kqdT_2 is one of the best lecture for developing understanding of TL & EM waves from India's one of the best professors... I recommend this course to engineering students and freshies who are willing to build career in High Speed PCB designs. hashtag#Learning hashtag#IITM hashtag#EngineeringBasics hashtag#Electronics PS:- unfortunately this subject was not thought to us properly by my professors, but now this is what I have to deal with everyday, so every lecture in engineering college is important and it will help you someday, when your simulation tool is not working and you have to belive in your engineering intutions. don't miss your lectures submitted by /u/Hot_Zookeepergame620 [link] [comments]

❤️ Запрошуємо переглянути експозицію мистецького проєкту «Об'єднані перемогами» kpi вт, 09/02/2025 - 20:15

Vannevar Bush shaped how the United States builds, funds, and thinks about technology. As both inventor and institutional architect, his work laid the foundations for digital logic, wartime research coordination, and the entire modern R&D landscape.

I recently published a simple design for a platinum resistance detector (PRTD) 4 to 20mA transmitter circuit, illustrated in Figure 1.

Figure 1 The PRTD 4 to 20 mA loop transmitter with constant current PRTD excitation that relies on 2nd order software nonlinearity correction math, ToC= (-u + (u2 – 4wx)1/2)/(2w).

Wow the engineering world with your unique design: Design Ideas Submission Guide

The simplicity of Figure 1’s circuitry is somewhat compromised, however, by its need for PRTD nonlinearity correction in software:

u and w constant and x = RPRTD@0oC – RPRTD@0oT
ToC= (-u + (u2 – 4wx)1/2)/(2w)

Unfortunately, implementing such quadratic floating-point arithmetic in a small system might be inconveniently costly in code complexity, program memory requirements, and processing time.

But fortunately, there’s a cool, clever, comparably accurate, code-ware-lite, and still (reasonably) uncomplicated alternative (analog) solution. It’s explained in this article “Design Note 45: Signal Conditioning for Platinum Temperature Transducers,” by (whom else?) famed designer Jim Williams.

Figure 2, shamelessly copied from William’s article, showcases his analog solution to PRTD nonlinearity.

Figure 2 A platinum RTD bridge where feedback to the bridge from A3 linearizes the circuit. Source: Jim Williams

Williams explains: The nonlinearity could cause several degrees of error over the circuit’s 0°C to 400°C operating range. The bridge’s output is fed to instrumentation amplifier A3, which provides differential gain while simultaneously supplying nonlinearity correction. The correction is implemented by feeding a portion of A3’s output back to A1’s input via the 10k to 250k divider. This causes the current supplied to Rp to slightly shift with its operating point, compensating sensor nonlinearity to within ±0.05°C.

Figure 3 shows William’s basic idea melded onto Figure 1’s current transmitter concept.

Figure 3 A PRTD transmitter based on the classic LM10 op-amp plus a 200 mV precision reference combo.

R5 provides PRTD-linearizing positive feedback to sensor excitation over the temperature range of -130 °C to +380 °C.

Here, linearity correction is routed through R5 to the LM10 internal voltage reference, where it is inverted to become positive feedback. The resulting “slight shift in operating point” (about 4% over the full temperature range) duplicates William’s basic idea to achieve the measurement linearity plotted in Figure 4.

Figure 4 Positive feedback reduces linearity error to < ±0.05 oC over -127 oC to +380 oC. The x-axis = Io (mA),  left y-axis = PRTD temperature, right y-axis = linearity error. T oC = 31.7(Io – 8mA).

Of course, to consistently achieve this ppm level of accuracy and linearity probably needs an iterative calibration process like the one William’s describes. Figure 5 shows the modified circuit from Figure 3, which includes three additional trims to enable post-assembly tweaking using his procedure.

Figure 5 Linearized temperature transmitter modified for a post-assembly tweaking using his procedure.

Substituting selected precision resistors for the PRTD at chosen calibration points is vital to making the round-robin process feasible. Using actual variable temperatures would take impossibly long! Unfortunately, super precise decade boxes like the one William’s describes are also super scarce commodities. So, three suitable standard value resistors, along with the corresponding simulated temperatures and 4-20 mA loop currents, are suggested in Figure 5.  They are:

51.7 Ω = -121 oC = 4.183 mA
100 Ω = 0 oC = 8.000 mA
237 Ω = 371 oC = 19.70 mA

Happy tweaking!

Oh yeah, to avoid overheating in Q1, it should ideally be in a TO-220 or similar package if Vloop > 15 V.

Related Content

• Simple but accurate 4 to 20 mA two-wire transmitter for PRTDs
• The power of practical positive feedback to perfect PRTDs
• Improved PRTD circuit is product of EDN DI teamwork
• Platinum-RTD-based circuit provides high performance with few components
• DIY RTD for a DMM

The post Positive analog feedback linearizes 4 to 20 mA PRTD transmitter appeared first on EDN.

Hi firstly ım 15 thats my full adder and it works ım very happy rn ı bought pcb from jlcpcb and ı use zipties to organize the cables , and ı use my ardunio to power up this thing so thats all you can ask questions and you can see everything on the photos submitted by /u/Careful-Rich9823 [link] [comments]

It finished and it work im proud of it and ım 15 submitted by /u/Careful-Rich9823 [link] [comments]