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Підписано меморандум про співпрацю у сфері кібербезпеки та цифровізації kpi чт, 07/17/2025 - 02:31

The MT72xx family combines high EMC resilience and functional safety with a two-wire interface.

My First Post (So don't mind the presentation 😅) Hi, Aadit Sharma here 👋 I'm 18 and about to begin my journey in Electronics and Communication Engineering. This is my ongoing personal project — a 4-bit transistor-level computer built entirely from scratch, using only discrete components on breadboards. No microcontrollers, no ICs — just hundreds of 2N2222A transistors, resistors, and wires! So far, I've used around 600 transistors (and counting). Completed modules: ALU Registers Memory Opcode Decoder Clock Circuit This project is my way of understanding how computers work from the ground up — one gate, one wire at a time. As far as progress goes, 60% has been built in last 2 months, I have estimated 2 months more for completion. This has 5 instruction set as of now, which are - (Halt, Add, Sub, Out, Clear) 🔧 Inspired from - Global Science Network(YT channel) More updates would be done according to progress Stay tuned! submitted by /u/Aadit21 [link] [comments]

Nanotechnology firm UbiQD Inc of Los Alamos, NM, USA has entered into an exclusive, multi-year agreement to supply its proprietary fluorescent quantum dot (QD) technology to cadmium telluride (CdTe) thin-film photovoltaic (PV) module maker First Solar Inc of Tempe, AZ, USA. The agreement paves the way for the incorporation of QD technology into First Solar’s thin-film bifacial photovoltaic (PV) solar panels...

Learn how application-specific integrated circuits can enable companies to leverage their key IP and distinguish themselves from competitors who use off-the-shelf ICs.

Why does the task of circuit debugging keep getting complex year by year? It’s no longer looking at the schematic diagram and sorting out the signal flow path from input to output. Here is a sneak peek at the factors leading to a steady increase in challenges in debugging electronics circuits. It shows how the intermingled software/hardware approach has made prototyping electronic designs so complex.

Read the full blog on EDN’s sister publication, Planet Analog.

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• Debugging: Skill, persistence, luck, and discipline
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The post What makes today’s design debugging so complex appeared first on EDN.

From January 5, 2024, please see: “The dangers of light glare from high-brightness LEDs.”

I have just become aware that at least one state has wisely chosen to address the safety issue of automotive headlight glare. As to the remaining forty-nine states, I have not yet seen any indication(s) of similar statutes. Now please see the following screenshots and links:

One question at hand of course is how well the Massachusetts statute will be enforced. What may be on the books is one thing but what will happen on the road remains to be seen.

I am hopeful.

John Dunn is an electronics consultant, and a graduate of The Polytechnic Institute of Brooklyn (BSEE) and of New York University (MSEE).

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• The headlights and turn signal design blunder
• The dangers of light glare from high-brightness LEDs
• Headlights and turn signals, part two
• LED headlights: Thank goodness for the bright(nes)s

The post Headlights In Massachusetts appeared first on EDN.

Сергій Бойченко: У науці більшість проєктів, що отримують фінансування, повинні мати проривні ідеї, технологічну цінність kpi ср, 07/16/2025 - 16:25

The synthesis of silicon carbide (SiC) requires high temperatures and significant power, posing challenges in reducing the environmental impact of the manufacturing process...

Як народився "РаніоПак": інновація з ароматом хмелю Інформація КП ср, 07/16/2025 - 10:54

Keysight Technologies held its flagship Keysight World Tech Day India on July 8, 2025, at The Leela Palace, Bengaluru, bringing together CXOs, engineers, researchers, and innovators from the electronics and high-tech sectors. The event showcased key technologies shaping the future across multiple industries including telecom, AI, and automotive, offering attendees expert-led sessions, live demonstrations, and in-depth technical tracks designed to accelerate innovation and market readiness in a rapidly evolving technology landscape.

The event also highlighted four key domains shaping the future of technology: 6G and Wireless, AI Infrastructure, Automotive, and AI Networks. Industry experts joined Keysight to explore AI-native 6G networks, THz communication, non-terrestrial networks (NTN), and digital twin-based design for ultra-fast, intelligent connectivity. Experts also discussed advancements in AI infrastructure highlighting compute fabrics, chiplets, optical interconnects, memory, and PCIe Gen7, which are critical enablers of next-gen AI. The automotive segment covered EV battery testing, V2X, autonomous driving, and cybersecurity for smarter mobility and finally AI Networks focused on network emulation, multi-cloud testing, and cybersecurity validation.

Keysight World Tech Day India 2025 brought together professionals from companies working on deep tech offering a unique platform for networking, knowledge sharing, and experiencing next-gen innovations that empower the electronics and high-tech community to stay ahead in a complex ecosystem.

The post Keysight World Tech Day India: Annual Conference Highlights Future-Defining Innovations in 6G, AI, Automotive, and Network Technologies appeared first on ELE Times.

submitted by /u/Linker3000 [link] [comments]

So i have these 230VAC to 5V DC power modules that i took six of and parallel connected the AC side of all six, then i series connected the output of 3 of them 2 times so that I had 2 groups of 3 in series, then i series connected those 2 groups to become this dual rail ±15v Module by using the series connection as ground 0V, negative - on one group became -15V and positive + became +15V. Don't try this if you don't know what you are doing as you can't do this with just any power source and it will burn down your house, zap you, explode possibly harmoni eyes, cause a fire. So don't play with this if you do not know what you are doing. submitted by /u/Whyjustwhydothat [link] [comments]

Announced today, the new device challenges the assumption that Ethernet can't support small packet sizes or optimized transport paths.

In collaboration with Gyeonggi-based Wavice Inc, South Korea’s Electronics and Telecommunications Research Institute (ETRI) has developed localization technology for gallium nitride (GaN) monolithic microwave integrated circuits (MMICs) used in transmit/receive modules for military radars and satellites for the first time in Korea using fab-based technology. This is expected to significantly contribute to defense technology self-reliance by enabling the localization of key components not only for military radars but also for high-resolution synthetic aperture radar (SAR) systems...

Integrating ADCs that provide accurate results without requiring a precision integrator capacitor has been around for a long time. A venerable example is that multimeter favorite, the dual-slope ADC. That classic topology uses just one integrator to alternately accumulate both incoming signal and complementary voltage references with the same RC time constant. It thus automatically ratios out time constant tolerance. Slick. 

This Design Idea (DI) will describe a (possibly) new integrating converter that reaches a similar goal of accurate conversions without needing an accurate capacitor. But it gets there via a significantly different route. Along the route, it picks up some advantageous wrinkles.

Wow the engineering world with your unique design: Design Ideas Submission Guide

As Figure 1 shows, the design starts off with an old friend, the 555-analog timer.

Figure 1 Op-amp A1 continuously integrates the incoming Vin signal, thus minimizing noise. Conversion occurs in alternating phases, T- and T+. The T-/T+ phase duration ratio is independent of the RC time constant, is therefore insensitive to C1 tolerance, and contains both Vin magnitude and polarity information.

Incoming signal Vin is summed with the voltage at node X and accumulated by differential integrator A1. A conversion cycle begins when A1’s output (node Y) reaches 4.096 V and lifts timer U1’s threshold pin (Thr) through the R2/R3 divider to the 2.048-V reference supplied by voltage reference Z1. This switches on U1’s Dch pin, grounding A1’s noninverting input through the R4/R5 divider, outputs a zero to the GPIO bit (node Z), and begins the T- phase as A1’s output ramps down. The duration of this T- phase is given by:

T- = R1C1/(1 + Vin/Vfullscale)

Vfullscale = ±2.048v(R1/R6) = ±0.683v

The T- phase ends when A1’s output reaches U1’s trigger (Trg) voltage set to 1.024 V by Z1 and U1’s internal 2:1 divider. See the LMC555 datasheet for the gritty details.

This starts the T+ conversion phase with an output of one on the GPIO bit, and the release of Dch by U1, which drives A1’s noninverting input to 1.024 V, set by Z1 and the R4/R5 divider. The T+ positive-going ramp continues until A1’s output reaches the 4.096 VThr threshold described above and initiates the next conversion cycle. 

T+ phase duration is:

T+ = R1C1/(1 – Vin/Vfullscale)

 This frenetic frenzy of activity is summarized in Figure 2.

Figure 2 Various conversion signals found at circuit nodes X, Y, and Z.

Meanwhile, the GPIO pin is assumed to be connected to a suitable microcontroller counter/time peripheral that is accumulating T- and T+ durations for a chosen resolution and conversion rate. Something between 1 µs and 100 ns should work for the subsequent Vin calculation. This brings up that claim of immunity to integrator capacitor tolerance you might be wondering about.

The durations of the T+ and T- ramps are proportional to C1, as shown in Figure 3.

Figure 3 Black = Vin, Red = T+ duration in ms, Blue = T- duration, C1 = 0.001 µF.

However, software arithmetic saves the day (and maybe even my reputation!) because recovery of Vin from the raw phase duration timeouts involves a bit of divide-and-conquer.

Vin = Vfullscale ((1 – (T-/T+))/(1 + (T-/T+)))

And, of course, when T- is divided by T+, the R1C1 terms conveniently disappear, taking sensitivity to C1 tolerance away with them!

A final word about Vfullscale. The ±0.683 V figure derived above is a minimum value, but any larger span can be easily accommodated by adding one resistor (R8) and changing another (R1). Here’s the scale-changing arithmetic:

R1 = 1M * Vfullscale/0.683

R8 = 1/(1/1M – 1/R1)

 For example, ±10 V is illustrated in Figure 4.

Figure 4 A ±10-V Vin span is easily accommodated – if you can find a 15 MΩ precision resistor.

Note that R1 would probably need to be a series string to get to 15 MΩ using OTS resistors.

Stephen Woodward’s relationship with EDN’s DI column goes back quite a long way. Over 100 submissions have been accepted since his first contribution back in 1974.

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The post Another weird 555 ADC appeared first on EDN.

Major players are reshaping the semiconductor map: TSMC exits GaN, Infineon scales it up, GlobalFoundries goes vertical with MIPS, and TI backs U.S. fabs with $60B.

Analog designers often need matched resistors for their circuits [1]. The best solution is to buy integrated resistor networks [2], but what can you do if the parts vendors do not offer the desired values or matching grade?

Wow the engineering world with your unique design: Design Ideas Submission Guide

The circuit in Figure 1 can help. It is made of two voltage dividers (a Wheatstone bridge) followed by an instrumentation amplifier, IA, with a gain of 160. R3 is the reference resistor, and R4 is its match. The circuit subtracts the voltages coming out of the two dividers and amplifies the difference.

Figure 1 The intuitive solution is a circuit made of a Wheatstone bridge and an instrumentation amplifier.

Calculations show that the circuit provides a perfectly linear response between output voltage and resistor mismatch (see Figure 2). The slope of the line is 1 V per 1% of resistor mismatch; for example, a Vout of -1 V means -1% deviation between R3 and R4.

Figure 2 Circuit response is perfectly linear with a 1:1 ratio between output voltage and resistor mismatch.

A possible drawback is the price: instrumentation amplifiers with a power supply of ±5 V and more start at about 6.20 USD. Figure 3 shows another circuit using a dual op-amp, which is 2.6 times cheaper than the cheapest instrumentation amplifier.

Figure 3 This circuit also provides a perfect 1:1 response, but at a lower cost.

The transfer function is:

Assuming,

converts the transfer function into the form,

If the term within the brackets equals unity and R5 equals R6, the transfer function becomesIn other words, the output voltage equals the percentage deviation of R4 with respect to R3. This voltage can be positive, negative, or, in the case of a perfect match between R3 and R4, zero.

The circuit is tested for R3 = 10.001 kΩ and R4 = 10 kΩ ±1%. As Figure 4 shows, the transfer function is perfectly linear (the R2 factor equals unity) and provides a one-to-one relation between output voltage and resistor mismatch. The slope of the line is adjusted to unity using potentiometer R2 and the two end values of R4. A minor offset is present due to the imperfect match between R5 and R6 and the offset voltage VIO of the op-amps.  

Figure 4 The transfer function provides a convenient one-to-one reading.

A funny detail is that the circuit can be used to find a pair of matched resistors, R5 and R6, for itself. As mentioned before, it is better to buy a network of matched resistors. It may look expensive, but it is worth the money.

Equation 3 shows that circuit sensitivity can be increased by increasing R7 and/or VREF. For example, if R7 goes up to 402 kΩ, the slope of the response line will increase to 10 V per 1% of resistor mismatch. A mismatch of 0.01% will generate an output voltage of 100 mV, which can be measured with high confidence.

Watch the current capacity of VREF and op-amps when you deal with small resistors. A reference resistor of 100 Ω, for example, will draw 25 mA from VREF into the output of the first op-amp. Another 2.5 mA will flow through R5.

Jordan Dimitrov is an electrical engineer & PhD with 30 years of experience. Currently, he teaches electrical and electronics courses at a Toronto community college.

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• Getting an audio signal with a THD < 0.0002% made easy
• RMS stands for: Remember, RMS measurements are slippery

References

1. Bill Schweber. The why and how of matched resistors (a two part series). https://www.powerelectronictips.com/the-why-and-how-of-matched-resistors-part-1/.
2. Art Kay. Should you use discrete resistors or a resistor network? https://www.planetanalog.com/should-you-use-discrete-resistors-or-a-resistor-network/ .

The post Circuits to help verify matched resistors appeared first on EDN.

Power Integrations Inc of San Jose, CA, USA (which provides high-voltage integrated circuits for energy-efficient power conversion) says that Jennifer A. Lloyd PhD will be its next chief executive officer, succeeding Balu Balakrishnan, who has been CEO since 2002. A former member of Power Integrations’ board of directors, Lloyd has been reappointed to the board. Both appointments are effective from 21 July...