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Taiwan Semiconductor offers two series of high-voltage rectifiers, both manufactured to AEC-Q101 standards for reliable automotive performance. The fast-recovery HS1Q series provides a repetitive peak reverse voltage of 1200 V, a forward current of 1 A, and a reverse recovery time of 75 ns. The standard-recovery SxY series includes 1600-V rectifiers with forward currents of 1 A (S1Y) and 2 A (S2Y). Both series are also available in commercial-grade versions.

These devices operate within a junction temperature range of -40°C to +175°C and feature a low forward voltage drop and high surge current capability. They are well-suited for bootstrap, freewheeling, and desaturation functions in IGBT, MOSFET, and wide-bandgap gate drivers, particularly in electric vehicles and high-voltage battery systems.

The HS1Q and SxY rectifiers are available from distributors, including Mouser, Arrow Electronics, and DigiKey. Lead time for production quantities is 8 to 14 weeks. Production part approval process (PPAP) documentation is available.

HS1Q product page

S1Y product page  

S2Y product page  

Taiwan Semiconductor 

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The EDA trio—Cadence, Siemens EDA, and Synopsys—was prominent at the Intel Foundry Direct Connect 2025 while lining up AI-driven analog and digital design flows for Intel’s 18A process node. The offerings also included IPs ranging from SerDes to DDR5 to Universal Chiplet Interconnect Express (UCIe).

Next, these EDA outfits inked advanced packaging partnerships by offering workflows for Intel Foundry’s Embedded Multi-die Interconnect Bridge-T (EMIB-T) technology, which combines the benefits of EMIB 2.5D and Foveros 3D packaging technologies for high interconnect densities at die sizes beyond the reticle limit.

Let’s start with EDA flows.

Cadence has certified its RTL-to-GDS flow for 18A process design kit (PDK), which includes the Cerebrus Intelligent Chip Explorer, Genus Synthesis solution, Innovus Implementation System, Quantus Extraction solution, Quantus Field Solver, Tempus Timing solution, and Pegasus Verification System.

Siemens EDA has certified its Calibre nmPlatform sign-off tool and Solido SPICE and Analog FastSPICE (AFS) software tools for 18A production PDK. Likewise, the qualification of Calibre nmPlatform and Solido Simulation Suite offerings for the Intel 18A-P process node is now underway. These EDA tools are also part of the Intel 14A-E process definition and early runsets already available.

Figure 1 Synopsys unveiled an EDA and IP collaboration roadmap with Intel Foundry at the event.

IP and advanced packaging liaison

Cadence has announced a broad range of IPs for the 18A process node. That includes 112G extended long-reach SerDes, 64G MP PHY for PCIe 6.0, CXL 3.0, and 56G Ethernet, LPDDR5X/5 – 8533 Mbps with multi-standard support, and UCIe 1.0 16G for advanced packaging.

Besides IP offerings, Cadence is partnering with Intel Foundry to develop an advanced packaging workflow to leverage EMIB-T technology. This workflow will streamline the integration of complex multi-chiplet architectures while complying with standards.

Figure 2 Cadence is certifying EDA toolsets and IPs for Intel’s 18A process node.

Meanwhile, Siemens EDA has announced the certification of a reference workflow for EMIB-T technology using through silicon via (TSV) technique. It’s driven by the company’s Innovator3D IC solution, which provides a consolidated cockpit for constructing a digital twin. It also features a unified data model for design planning, prototyping, and predictive analysis of complete package assembly.

Synopsys is also employing its 3DIC Compiler to facilitate a reference workflow that enables efficient EMIB-T designs with early bump and TSV planning and optimization. It also features automated UCIe and HBM routing for high quality of results and fast 3D heterogeneous integration. Here, the 3DIC Compiler facilitates feasibility and partitioning, prototyping and floorplanning, and multiphysics signoff in a single environment.

Related Content

• Intel: Gelsinger’s foundry gamble enters crunch
• Intel Financial Risks, Layoffs, Foundry Ambitions
• Intel 18A Advanced Packaging is Key to Tech Leadership
• Partners Applaud Intel Foundry’s Wider Ecosystem Approach
• Intel comes down to earth after CPUs and foundry business review

The post EDA powerhouses align offerings with Intel’s 18A node appeared first on EDN.

Sensing of current going to a load is a critical and often mandatory requirement in many designs. While there are many contact and non-contact ways to accomplish this sensing, such as using Hall-effect devices, current transformers (for AC only, of course), Rogowski coils, fluxgate sensors, among others, the in-line resistor is among the most popular due to its small size, low cost, and overall convenience. The concept is simple: measure the voltage across an accurate, known resistor, and use Ohm’s law to determine the current; this can be done with analog circuitry or digital computation.

Terminology

A quick terminology note: this inline resistor is almost always called a “shunt” resistor in application notes and data sheets, but that is a misnomer. The reason is that to “shunt” means to divert some of the current around the point being measured, and that was done is some current-measurement arrangements, especially for power in the pre-electronics era. However, the sensor resistor here is in series, so all the current flows through it.

This misleading terminology has become such an embedded part of our established verbiage that I won’t try to fight that battle. It’s similar to the constant misuse of the word “ground” for circuits which have absolutely no physical of figurative connection to Earth ground, and where “common” would be a more accurate and less confusing term.

Current sense topology

Using a sense resistor is only the first step in the current-sensing decision. The other part is topology: whether to use high-side sensing with a resistor placed between the source and the load, or low-side sensing where it is placed between the load and ground return, Figure 1.

Figure 1 The relative position of the sense resistor and the load between the power rail and ground are the only topological difference distinguishing high-side sensing (left) from low-side sensing (right), but there are significant circuit and system implementations. Source: Microchip

Tradeoffs

As with so many engineering situations, designers must also consider the tradeoffs when choosing between low-side and high-side current sensing. The relative pros and cons of each topology are a good example of the ongoing challenge of engineering tradeoffs at the intersection of power-related and classic analog circuitry.

With the high-side approach, there’s good news, at least at first glance:

• The load is grounded (a major advantage and often a requirement).
• The load is not energized even if there is a short circuit at the power connection.
• The high current that flows if the load is shorted is easily detected.

On the other hand, the high-side downsides are not trivial:

• The common-mode voltage across the sense resistor can be very high (even dangerous) and requires special consideration; it may even need galvanic isolation.
• The sensed voltage across the resistor needs to be level-shifted down to the system operating voltage to be measured and used.
• In general, increased circuit complexity and cost.

Low-side sensing has its own attributes, again starting with its positive attributes:

• The voltage across the resistor is ground referenced, a major benefit.
• The common-mode voltage is low.
• It’s fairly easy to design into the circuit with a single supply.

But with the good news, there are unavoidable low-side complications:

• The load is no longer grounded, which can have serious system-level implications.
• The load can be activated by accidental short to ground.
• The sensing arrangement can cause ground loops.
• A high load current due to a short circuit will not be detected.

Designers’ choice

In looking at the analog side of schematic diagrams over the past few years (I know, it’s an unusual “hobby”), as well as seeing what others were doing in their design discussions, I assumed that most designers were opting for high-side sensing. They were doing so despite the challenges it brings with respect to common-mode voltage, possible need for galvanic (ohmic) isolation, and other issues, especially because they wanted to keep the load grounded. Many vendors offer appropriate amplifiers, analog and digital isolation options, and subsystems so the “pain” of using high-sigh sensing is greatly reduced, and the benefits it offers were easily retained.

But maybe I am mistaken about designers’ choices. Perhaps the reason that there has been so much discussion of high-side sensing is not necessarily that it is more popular, but because it is more complicated and so needs more explanation of its details. In other words, was I confused about the cause of all this attention with the effect?

My low-side misconception

What made re-think the presumed absence of low-side sensing was the recent release of the TSC1801,  a new amplifier from ST Microelectronics specially targeting low-side sensing. It features high accuracy (0.5%), high bandwidth (2.1 MHz), has a fixed gain of 20 V/V, and is suitable for bidirectional sensing, Figure 2. The accuracy and tracking of the two internal input resistors is critical to performance in this application category.

Figure 2 The block diagram of the TSC1801 low-side current-sensing amplifier is conventional, but it’s the performance that counts; the matching and tracking of the 1-kΩ input-resistor pair is critical. Source: ST Microelectronics

It made me wonder: if only few designers are choosing low-side sensing, and it since it is relatively easy to implement, why would a part like this be needed when there are already many suitable amplifiers available?

The device also challenged another one of my apparent misconceptions: that automotive designs won’t use low-side sensing because their loads must be grounded. If that’s the case, why does ST explicitly call out automotive applications in the part’s collateral (I know, application talk is easy to do) but also provide this part with the automotive AEC-Q100 qualification? Unlike marketing “talk,” that’s a relatively costly step in design and production.

So, my probably unanswerable question is this: what’s the split between use of high-side versus low-side sensing in designs? How does that split vary with end-application? Is some market-research firm willing to look into it for me?

If you want to know more about the two current-sensing options, there are many good sources available online (see References). While there is some overlap among them, as you’d expect, some offer additional interesting perspectives as well based on their products and expertise.

Have you ever had to defend your choice of one or the other in a design? What were the arguments for and against the approach you chose?

Related Content

• The self-powered current loop: Still a viable transducer-interface option
• E-fuses: warming up to higher-current applications
• Sub-milliohm resistors bring current-sense benefits but also challenges
• Use optical fiber as an isolated current sensor?
• Current-sense resistor brings two related and challenging tradeoffs

References (and there are many more!)

• All About Circuits, “Resistive Current Sensing: Low-Side vs. High-Side Sensing”
• Analog Devices, “ AN-105: Current Sense Circuit Collection: Making Sense of Current”
• Microchip Technology, “High-side versus Low-side Current Sensing”
• Renesas, “Current Sensing with Low-Voltage Precision Op-Amps”
• Rohm, “Low-Side Current Sensing Circuit Design”
• Texas Instruments, “Precision, low-side current measurement”
• Texas Instruments, “An Engineer’s Guide to Current Sensing”
• Texas Instruments, “Low-Side Current Sense Circuit Integration”

The post Do you use low-side current sensing? appeared first on EDN.

250€ later... submitted by /u/FloxiRace [link] [comments]

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Стажування в компанії Ajax Systems: для чого, для кого і з якими перспективами Інформація КП чт, 05/01/2025 - 08:09

Got tired of manually turning on my laptop cooling pad(IETS600). So I used a leftover Arduino to tap into the PWM pin of the fan motor. Communicate via USB Serial from a c# program that monitors which app is open, and if its a game, will send the instruction to the Arduino to turn on the PWM pin at whatever speed I want :) submitted by /u/SolitaryMassacre [link] [comments]