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InPHRED expands into data-center optical interconnect market with InP VCSEL and micro-RC-LED solutions
My First attiny85 project: a 12 key piano
| I made this little piano using an ATtiny85 and a some push buttons. All 12 keys are read through a single ADC pin using a resistor-ladder voltage divider. Each button taps a different point in the chain, so the voltage tells the chip which key is down. Functional but quite limited as only one key really works at a time. This was my first project to learn the ATtiny85 and I'm happy with how it turned out. Sounds pretty rough though. [link] [comments] |
Insanely dense FPGA Board
| submitted by /u/ruumoo [link] [comments] |
AOI adding manufacturing capacity in Houston area
AOI receives new $71m upsized order for 800G data-center transceivers
AI optical transceiver market to grow 57% to US$26bn in 2026
UK Semiconductor Centre appoints director of international partnerships
Took apart a rechargeable battery (Venom Xbox battery) to have a look at the charging circuit
| Tried to use it to light some LED’s though I think the circuit expects a battery voltage to use as feedback as it has very low output current otherwise. Short circuit current was 300mA [link] [comments] |
I tried building a Flipper Zero myself… this is what I ended up with 😅 details in comments
| Current setup 😅 ESP32 + RFID + SDR + random modules Not sure if this will fully work yet… But it’s getting interesting 👀 Any ideas what I should add next? [link] [comments] |
EPROM UV erasing setup
| There must be a T48 UV erasing addon with the EPROM blank check. 270-280nm 800mW diode. [link] [comments] |
KiCad Netclass sizes
| I have been designing PCBs to carry a small microcontroller, an RS485 transceiver, an LED and the associated balance of plant required to make lights for my ROV. Space is at a premium, so track sizes are being chosen to minimise real estate used. KiCad has a netclasses setup page that uses IPC 2221 requirements and PCBway capabilities. I have come up with a sensible set of pre-defined values [link] [comments] |
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To see the newest posts, sort the comments by "new" (instead of "best" or "top").
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Infineon’s rad-hard devices used aboard NASA’s Artemis II Orion capsule
Nuvoton releases 4.5W 402nm violet laser, boosting power output by 1.5x
40 років Чорнобильської катастрофи: реалії сьогодення та виклики майбутнього
☑️ Київська політехніка взяла участь у слуханнях Комітету Верховної Ради України з питань соціальної політики та захисту прав ветеранів на тему «40 років Чорнобильської катастрофи: реалії сьогодення та виклики майбутнього».
⭐ Запрошуємо на презентацію дуальної освіти КПІ ім. Ігоря Сікорського та Melexis Academy
На презентації дуальної освіти КПІ ім. Ігоря Сікорського та Melexis Academy команда Melexis розповість про всі можливості магістратури за спеціальністю G5 «Електроніка, електронні комунікації, приладобудування та радіотехніка».
Teradyne snaps up TestInsight to boost ATE for semiconductors

Automated test equipment (ATE) supplier Teradyne is bolstering its test solutions for semiconductor design by acquiring TestInsight, a provider of test program creation, pattern conversion, and pre-silicon validation tools used across ATE platforms and semiconductor design environments.
By acquiring a supplier of semiconductor test development, validation, and conversion software, Teradyne aims to scale its next generation of pre-silicon validation and automated pattern generation technologies. That strengthens Teradyne’s ability to support semiconductor design-in activities to accelerate time-to-market in the emerging AI and data center markets.

Here is how pattern conversion across multiple cores and CPUs accelerates the test program. Source: TestInsight
Greg Smith, president and CEO of Teradyne, calls TestInsight’s tools foundational to modern test program development. “By integrating the TestInsight team into Teradyne, we enhance our ability to help customers achieve silicon readiness faster and with greater confidence.”
The acquisition will allow Teradyne to combine its ATE platforms with TestInsight’s tightly integrated design-to-test workflow, thereby reducing debug cycles, improving coverage, and enabling earlier test program readiness. In short, the acquisition of a design-to-test software firm will help Teradyne close the gap between design and test in semiconductor design environments.
TestInsight announced that it will continue to support its existing customers across all ATE platforms.
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The post Teradyne snaps up TestInsight to boost ATE for semiconductors appeared first on EDN.
👍 Запрошуємо на вебінар "Ліцензії Creative Commons: шлях до відкритої науки для українських авторів та видавців"
Бібліотека КПІ запрошує дослідників КПІ ім. Ігоря Сікорського та усіх охочих долучитися до міжнародного онлайн заходу “Ліцензії Creative Commons: шлях до відкритої науки для українських авторів та видавців”, організованого спільно з фахівцями Creative Commons.
💢 Онлайн-лекція “OpenAlex – найбільша відкрита база наукових робіт”
Бібліотека КПІ запрошує дослідників КПІ ім. Ігоря Сікорського та усіх охочих долучитися до онлайн лекції “OpenAlex – найбільша відкрита база наукових робіт”.
Aliasing, the bane of sampled data systems

Aliasing is thankfully becoming a less frequent problem due to improved instrument designs. Users should still be aware of it to prevent time- and money-costly errors.
Aliasing is an ever-present potential problem in sampled data acquisition systems. It occurs when input signals are sampled at a sample rate that is too low. If you haven’t been bamboozled by an aliased signal, you are extremely lucky.
Sampled data instruments, such as digitizers and digital oscilloscopes, must sample their input signals at a rate greater than twice the highest frequency component present in the input signal. If this criterion is not met, then aliasing can occur. Figure 1 shows an example of aliasing.

Figure 1 In this example of aliasing, a 50MHz sine wave was acquired at sampling rates of 1 Giga samples per second (GS/s) and 55 Mega samples per second (MS/s). The 55 MS/s acquisition is aliased and displayed as a 5 MHz waveform.
Source: Art Pini
A 50 MHz sine wave was acquired at both 1 GS/s and 55 MS/s. The waveform acquired at 1 GS/s has the correct frequency of 50 MHz as shown in the frequency parameter P1. The waveform acquired at 55 MS/s is aliased and has a frequency of 5 MHz as reported in parameter readout P2. The alias waveform will appear as having a different frequency than the correctly sampled waveform. This can be a significant problem that can be costly if not addressed carefully.
Let’s look into aliasing and learn how to deal with it. Sampling is a mixing process. When you apply an input signal to a sampler, the resulting output from the sampler contains the original waveforms, the sampling waveform, and the sum and difference frequencies, including the harmonics of the sampling signal. This is illustrated in Figure 2.

Figure 2 Sampling is a mixing or multiplicative process. The baseband frequency spectrum of the acquired signal appears as the upper and lower sidebands about the sampling frequency and all its harmonics.
Source: Art Pini
A correctly sampled waveform will have more than two samples per cycle at the bandwidth limit. In the sampler output, the baseband frequency spectrum of the input signal will appear as upper and lower sidebands about the sampling frequency and its harmonics. The right-hand graphs show the output spectrum of the sampler for the correct sampling rate (upper) and the undersampled case (lower). As the sampling frequency is decreased below twice the input signal bandwidth, the lower sideband of the sampling frequency interferes with the baseband signal, resulting in aliasing.
In the time-domain view (left-hand graphs), the aliased signal lacks sufficient time resolution to track the input waveform. Returning to the example in Figure 1, the 50 MHz input sampled at 55 MS/s will result in sum and difference image frequencies that are above and below the 55 MS/s sampling frequency. The lower sideband image falls into the baseband region of the spectrum and is the source of the 5 MHz alias signal.
Current digital instrument designs generally use sampling rates much higher than the instrument’s analog bandwidth. Some instruments may use sharp-cutoff anti-aliasing low-pass filters to limit the input bandwidth and control the instrument’s frequency response. These techniques, combined with long acquisition memories, also minimize this classic problem. Still, users should be aware of aliasing.
Recognizing AliasingIt is good practice to determine the frequency of the measured signal and verify that it has not been aliased. If the characteristics of the input signal are unknown, it is good practice to view the signal at the highest available sample rate, then decrease the sampling rate as needed. If aliasing occurs, you will see the signal’s frequency change as you select a lower sampling rate.
Another hint that a signal is an alias is that it will appear to have an unstable trigger and will jump erratically in time. This occurs because the instrument is triggered by the signal, and the alias, with fewer samples, may not display the trigger point. The instrument displays the nearest sample, which varies from one acquisition to the next, causing instability.
Aliasing can also be recognized by observing the effect on the input signal’s frequency-domain spectrum as the signal’s frequency is varied. A spectral component that shows a decrease in frequency when the input signal’s frequency is increased, a reversal of direction, is an alias. As the frequency of a sine wave increases, the spectral line corresponding to that sine wave will move to the right until it hits the Nyquist frequency of one-half the sample rate.
As the frequency increases above Nyquist, an aliased image from the lower sideband about the sampling frequency will fold back into the baseband spectrum, moving downward in frequency. The lower-sideband images for each harmonic of the sampling frequency show this reversal. Upper sideband images will move in the correct direction. This phenomenon is called spectral folding.
A helpful technique to view an aliased signalIf the signal is a relatively simple periodic waveform, such as the example sine wave, then enabling infinite display persistence will show the underlying waveform, as shown in Figure 3.

Figure 3 The aliased signal (upper trace) and the same signal displayed with infinite persistence turned on (lower trace). The persistence display accumulates all the sample values showing the original 50 MHz waveform.
Source: Art Pini
All sample points in the aliased waveform are real. If infinite persistence is enabled, all samples are accumulated on the persistence display, and the original unaliased waveform is eventually recovered. This technique won’t work for complex signals such as non-return-to-zero (NRZ) data or broadband signals.
Using aliased waveformsGiven that aliased signals are made up of real samples, an aliased signal can be used in measurements, as long as the signal’s frequency is not being measured. Consider measuring the output of a remote keyless entry transmitter. This device outputs a pulse-modulated RF signal with a carrier frequency of 433MHz. This signal has a relatively narrow bandwidth about the carrier frequency. The information being transmitted is encoded in a 400 ms pulse pattern.
Two measurement scenarios are needed. The first is to characterize the RF signal. Parameters like frequency. Also, the shape of the RF envelope affects the purity of the transmitted signal. The second measurement would involve decoding the information content. Using an oscilloscope with a 20 Mega sample (MS) memory at a horizontal scale setting of 100 ms per division (1 second acquisition time), the sampling rate would be 20 MS/s. Figure 4 shows the two measurement processes for both the RF and Data decoding measurements.

Figure 4 Measurements on a remote keyless entry transmitter use an aliased signal to decode digital data.
Source: Art Pini
The traces on the left side of the screen show the RF measurements. The signal is acquired at 20 GS/s, and its leading edge is captured. The oscilloscope measures the RF carrier frequency at 433.9 MHz. The envelope of the RF carrier is extracted by applying the absolute value function, followed by a low-pass filter to create a peak detector. Trace F1 (bottom) shows the envelope. A copy (Trace F3) of the Envelope is also overlaid on a horizontally expanded zoom view (Trace Z1) of the leading edge of the signal. The envelope can be used to measure the envelope’s rise time.
The right side of the display shows the data decoding process. The entire data packet is acquired on a 100-ms-per-division horizontal scale. The sampling rate is 20 MS/s. The RF carrier is aliased down to 6.13 MHz as measured in parameter P2. The aliased frequency of the carrier is the result of mixing the twenty-second harmonic of the sampling rate with the 433.9 MHz carrier. The same envelope detection technique is applied to the entire packet, rendering the data content as an NRZ signal. Aliasing has enabled the acquisition of the entire signal data packet.
ConclusionAliasing in digital instruments is a digitizer characteristic that is becoming less frequent a problem due to improved instrument designs, including anti-aliasing filters, oversampling, and very long acquisition memories. Users should still be aware of aliasing to prevent errors that cost time and money.
Arthur Pini is a technical support specialist and electrical engineer with over 50 years of experience in electronics test and measurement.
Related Content
- Sampling and aliasing
- Using oscilloscope filters for better measurements
- Combating noise and interference in oscilloscopes and digitizers
- Building a low-cost, precision digital oscilloscope—Part 1
- Building a low-cost, precision digital oscilloscope – Part 2
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