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Editor’s note: This is a multi-part series on how to design a digital-controlled PFC: 

• How to design a digital-controlled PFC, Part 1
• How to design a digital-controlled PFC, Part 2
• How to design a digital-controlled PFC, Part 3

Total harmonic distortion (THD) and power factor are two major criteria used to evaluate power factor correction (PFC) performance. Meeting strict THD and power factor requirements is always a challenge for PFC designs. In this third installment of the series, I will introduce a set of digital methods to reduce THD and improve the power factor.

THD definition

THD is the total harmonic distortion present in a signal, defined as the ratio of the root-mean-square (RMS) amplitude of the total higher harmonic frequencies to the RMS amplitude of the fundamental frequency. Equation 1 expresses THD:

where Vn is the RMS value of the nth harmonic, and V1 is the RMS value of the fundamental component.

THD requirements have become stricter, especially in server applications, but meeting low THD requirements is more difficult than ever. The following methods can help reduce THD.

Make sure that the sensed signals are clean

To reduce THD, the first thing is to make sure that all of the sensed signals are clean. Because the sensed AC input voltage modulates the current reference, any spikes on the sensed AC signal will cause current reference distortion and affect THD. 

One common practice is to put a decoupling capacitor close to the analog-to-digital converter (ADC) pin of the controller and set the resistor-capacitor filter cutoff frequency about 10 times higher than the frequency you are interested in. If the sensed AC voltage is still noisy, you can use a software phase-locked loop (SPLL) [1] to generate an internal sine-wave signal in phase with the AC voltage, and then use that generated sine-wave signal to modulate the current reference. Since the SPLL-generated sine wave is clean, even if there is some noise on the sensed AC voltage, the current loop reference will still be clean.

For VOUT sensing, you can use a digital infinite impulse response filter, as shown in Equation 2, to process the sensed VOUT to further reduce noise; because the PFC voltage loop is slow, the extra delay caused by this digital filter is acceptable.

where k<1.

Oversampling

The PFC inductor current has switching ripples. The current-sensing circuit may not provide sufficient attenuation to this current ripple. If you sample this signal only once in each switching period, there is no perfect, fixed location where the signal represents the average current all of the time. To get a more accurate feedback signal, consider using an oversampling mechanism.

Figure 1 shows an example that evenly samples the current feedback signal eight times in every switching cycle, averages the results, and sends them to the control loop. This oversampling effectively averages the current ripple out such that the measured current signal gets closer to the average current value. Also, the controller becomes less sensitive to noise.

Figure 1 Oversampling eight times in every switching cycle to average the current ripple out in order to allow the measured current signal to get closer to the average current value. (Source: Texas Instruments)

Reduce the current spikes at AC zero crossing

Current spikes at AC zero crossing are an inherent issue for totem-pole bridgeless PFC. These spikes can be so big that it becomes impossible to pass THD specifications. Reference [2] analyzes the root cause of these spikes and provides a PWM soft-start algorithm to effectively reduce them, as shown in Figure 2.

Figure 2 PWM soft start after AC zero crossing to prevent current spikes common to totem-pole brideless PFCs.(Source: Texas Instruments)

In this algorithm, when VAC changes from a negative to a positive cycle after AC zero crossing, boost switch Q2 turns on first with a very small pulse width, then gradually increases to the duty cycle (D) generated by the control loop. A soft start on Q2 gradually discharges the switch-node drain-to-source voltage (VDS) to zero. Once Q2 soft start is complete, synchronous transistor Q1 starts to turn on. It begins with a tiny pulse width and gradually increases until the pulse width reaches 1–D. When Q2 soft start is complete and Q1 soft start begins, the low-frequency switch Q4 turns on.

The transition from the AC positive cycle to the negative cycle is similar. Turning off all of the switches at the end of each half AC cycle leaves a small dead zone at AC zero crossing. Figure 3 shows the test result.

Figure 3 Current waveforms without and with a PWM soft start: the traditional control method (a); PWM soft start (b). (Source: Texas Instruments)

Reduce voltage-loop effects

The PFC output voltage has double-line frequency ripples. Although the voltage loop compensator can reduce these ripples, it cannot totally remove them; there are still some ripples coupled to the current reference that then affect THD.

One way to reduce the effect of these ripples is to add a digital notch (band-stop) filter between the VOUT sensed signal and the voltage loop. This notch filter can effectively attenuate the double-line frequency ripple while still passing all other frequency signals, including the sudden VOUT change caused by the transient load. The load transient response will not be affected.

Another approach is to use VOUT at the AC zero-crossing value, or VOUT_ZC(t), as a voltage feedback signal; see Figure 4. Since VOUT_ZC(t) equals the average value of VOUT, and since it is a “constant” in steady state, using it as feedback signal can eliminate the double-line frequency ripple.

Figure 4 VOUT at the AC zero-crossing instant, using this method can eliminate the double-line frequency ripple. (Source: Texas Instruments)

To handle the load transient, use the voltage loop control law shown in Figure 5.

Figure 5 Using VOUT_ZC(t) as a feedback signal in the steady state. (Source: Texas Instruments)

If the instantaneous error is small, use the value at the AC zero-crossing instance, which is VOUT_ZC, and a small Kp, Ki for the voltage loop compensator Gv. When a load transient occurs, causing an instantaneous VOUT error greater than the threshold, use the instantaneous VOUT value and a large Kp, Ki for Gv to rapidly bring VOUT back to its nominal value.

Duty-ratio feedforward control

As the name suggests, duty-ratio feedforward control precalculates a duty ratio, then adds this duty ratio to the feedback controller. For a boost topology operating in continuous conduction mode, Equation 3 gives the duty ratio feedforward (dFF) as:

Figure 6 depicts the resulting control scheme. After using Equation 3 to calculate dFF, add dFF to the traditional average current-mode control output (dI). Then use the final duty ratio (d) to generate a PWM waveform to control PFC.

Figure 6 Average current-mode control with dFF. (Source: Texas Instruments)

Since dFF generates the majority of the duty cycle, the control loop only adjusts the calculated duty slightly. This technique can help improve THD for applications with a limited controller loop bandwidth.

Harmonic injection

In cases where a specific order of harmonics is too high, and the methods I’ve described still cannot meet the THD specification, a harmonic injection method [3] may resolve the problem. The basic idea of this method is to generate a sinusoidal signal with the same order of the harmonic that you want to compensate, and inject this signal into the PFC current control loop to compensate for that harmonic.

There are two ways to generate a sinusoidal signal. The first method is to use an SPLL to track the AC voltage and then generate the corresponding high-order harmonics. The second method is to generate a sine-wave table and then read the table element at a different speed to obtain different orders of sine waves [3]. Figure 7 shows a test result on a PFC that initially has high third- and fifth-order harmonics.

Figure 7 Harmonic injection to reduce third- and fifth-order harmonics. (Source: Texas Instruments)

Power factor definition

The power factor is the ratio of real power in watts to apparent power, which is the product of the RMS current and RMS voltage in volt amperes, as shown in Equation 4:

Ideally, the power factor should be 1; the load will then appear as a resistor to the AC source. In the real world, however, electrical loads not only cause distortions in AC current waveforms but also make the AC current either lead or lag with respect to the AC voltage, resulting in a poor power factor. For this reason, Equation 5 calculates the power factor by multiplying the distortion power factor by the displacement power factor:

where φ is the phase angle between the current and voltage, and THD is the total harmonic distortion of the current.

Equation 5 also shows that to improve the power factor, the first thing to do is to reduce THD. However, low THD does not necessarily mean that the power factor is high. If the PFC AC input current and AC input voltage are not in phase, even if the current is a perfect sine wave (low THD), φ will result in a power factor less than 1.

The phase difference between the input current and input voltage is mainly caused by the electromagnetic interference (EMI) filter used in the PFC. Figure 8 shows a typical PFC circuit diagram that consists of three major parts: an EMI filter, a diode bridge rectifier, and a boost converter.

Figure 8 Circuit diagram of a typical PFC comprising an EMI filter, a diode bridge rectifier, and a boost converter. (Source: Texas Instruments)

In Figure 8, C1, C2, C3 and C4 are EMI X-capacitors. Simplifying Figure 8 results in Figure 9, where C is now a combination of C1, C2, C3, and C4.

Figure 9 Simplified EMI filter combining the capacitances shown in Figure 8. (Source: Texas Instruments)

The X-capacitor causes the AC input current to lead the AC voltage, as shown in Figure 10. The PFC inductor current is , the input voltage is , and the X-capacitor reactive current is . The total PFC input current is , which is also the current from where the power factor is measured. Although the PFC current control loop forces to follow , the reactive current of leads by 90 degrees, which causes to lead . The result is a poor power factor.

This effect is amplified at a light load and high line, as takes more weight in the total current. As a result, it is difficult for the power factor to meet a rigorous specification.

Figure 10 X-capacitor causes the AC current to lead the AC voltage. (Source: Texas Instruments)

Fortunately, with a digital controller, you can resolve this problem with one of the following methods.

Delay the current reference

Since makes the total current lead the input voltage, you can force to lag  by some degree, as shown in Figure 11. The total current will then be in phase with the input voltage, improving the power factor.

Figure 11 Forcing to lag . (Source: Texas Instruments)

Since the current loop forces the inductor current to follow its reference, to let lag , the current reference needs to lag . To delay the current reference, a circulate buffer stores the measurement VAC results. Then, instead of using the newest input voltage VAC data, use previously stored VAC data to calculate the current reference for the present moment. The current reference will lag ; the current loop will then make  lag . This can compensate the leading X-capacitor  and improve the power factor.

The delay period needs dynamic adjustment based on the input voltage and output load. The lower the input voltage and the heavier the load, the shorter the delay needed. Otherwise will be over delayed, making the power factor worse than if there were no delay at all. To resolve this problem, use a look-up table to precisely and dynamically adjust the delay time based on the operating condition.

Subtract from the current reference

Since a poor power factor is caused mainly by the EMI X-capacitor , if you calculate  for a given X-capacitor value and input voltage and then subtract  from the total ideal input current to form a new current reference for the PFC current loop, you will get a better total input current that is in phase with the input voltage and can achieve a good power factor.

To explain in more detail, for a PFC with a unity power factor of 1, is in phase with . Equation 6 expresses the input voltage:

where VAC is the AC input peak value, and f is the AC frequency. The ideal input current then needs to be totally in phase with the input voltage, expressed by Equation 7:

where IAC is the input current peak value.

Equation 8 expresses the capacitor current:

Equation 9 comes from Figure 9:

Combining Equation 7, Equation 8, and Equation 9 results in Equation 10:

If you use Equation 10 as the current reference for the PFC current loop, you can fully compensate the EMI X-capacitor , achieving a unity power factor. In Figure 12, the blue curve is the waveform of the preferred input current, iAC(t), which is in phase with . The green curve is the capacitor current, iC(t), which leads  by 90 degrees. The red curve is iAC(t) ‒ iC(t). In theory, if the PFC current loop uses this red curve as its reference, you can fully compensate the EMI X-capacitor  and increase the power factor.

Figure 12 New current reference. (Source: Texas Instruments)

Equation 10 requires a cosine waveform cos (2πƒt). To get this cosine waveform, use an SPLL to generate an internal sine wave synchronized with the input voltage. For microcontrollers that cannot perform trigonometric calculations, reference [4] describes another way to calculate iC(t).

Reduce THD and improve PF

If you need to reduce THD and improve the power factor, choose one or a combination of the methods discussed here. In the next installment of this series, I will talk about how to improve efficiency, limit re-rush current, implement e-metering, and reduce PFC bulk cap with a baby boost converter.

Related Content

• How to design a digital-controlled PFC, Part 1
• How to design a digital-controlled PFC, Part 2
• Power Tips #116: How to reduce THD of a PFC
• Power Tips #124: How to improve the power factor of a PFC

References

1. Bhardwaj, Manish. “Software Phase Locked Loop Design Using C2000 Microcontrollers for Single Phase Grid Connected Inverter.” Texas Instruments application report, literature No. SPRABT3A, July 2017.
2. Sun, Bosheng. “How to Reduce Current Spikes at AC Zero Crossing for Totem-Pole PFC.” Texas Instruments Analog Design Journal article, literature No. SLYT650, 4Q 2015.
3. Sun, Bosheng. “A Harmonic Injection Method to Reduce Harmonics and THD for PFC.” Power Electronics News, Nov. 20, 2023.
4. Sun, Bosheng. “Increase power factor by digitally compensating for PFC EMI-capacitor reactive current.” Texas Instruments Analog Design Journal article, literature No. SLYT673, 2Q 2016.

The post How to design a digital-controlled PFC, Part 3 appeared first on EDN.

Sharing this as a heads-up for anyone considering JLCPCB's assembly service. JLCPCB lost parts I pre-purchased through their own platform, produced boards with cold solder defects, then shipped the defective incomplete boards two days after I explicitly told them not to ship. Three weeks later I still have no working product. Their support has been like talking to a bot. I've been asked three times to arrange a local repair despite explaining each time that it's not possible — they never populated an SMD component that they lost, and you can't fix that with a soldering iron. Each response only acknowledges one issue and ignores the rest. When I asked for a replacement order, I was told it "goes beyond their normal compensation policy" because of their internal material costs and production backlogs. Every reply is vague — they "may" arrange a return, they "may" apply for a coupon. No commitments, no timeline, nothing concrete. I'm also now sitting with £81 in import charges on a defective package I never asked to receive, currently stuck in a courier warehouse because nobody knows what to do with it. Their bare PCB service is fine. But if you're relying on their assembly service for anything with a real deadline, understand that when they make a mistake, their process is designed to exhaust you into accepting it rather than actually fixing it. submitted by /u/gogosomewhere [link] [comments]

After years of having my multimeters die exactly when I most need then, I finally made good use of a vape battery, a TP4056 charger, a 9v boost and a female usb-c on a cheap red multimeter. Not ready to do on my good meter, but I am very happy with this little mod. submitted by /u/nomoreimfull [link] [comments]

Efficient Power Conversion Corp (EPC) of El Segundo, CA, USA — which makes enhancement-mode gallium nitride on silicon (eGaN) power field-effect transistors (FETs) and integrated circuits for power management applications — has launched a new generation of 100V integrated GaN power-stage ICs (EPC23108, EPC23109, EPC23110 and EPC23111) targeting high-performance motion and power systems such as humanoid robots, drones, and other compact battery-powered platforms. The devices are designed to simplify implementation and improve operational robustness in real-world environments while preserving the efficiency and power density advantages typical of integrated GaN technology...

💡 Вебінар «Актуалізація профілів авторів у цифровому середовищі» kpi пт, 04/03/2026 - 12:32

Візит експрем’єр-міністра Республіки Болгарія Кирила Петкова kpi пт, 04/03/2026 - 11:48

Краса та ніжність на виставці у ЦКМ Інформація КП пт, 04/03/2026 - 10:00

submitted by /u/AdiDevMC [link] [comments]

Hello everyone, this is the first version of my function generator. I'm looking for recommendations! Before you comment: - I made it out of discrete parts because the goal was learning more than immediate results. - I'm a second year ECE so many mistakes will be expected. I'm still in Electronics I and learning about DC/low frequency circuits. - I plan to use 50Ohm input impendance but need a beefier power supply and maybe transistors. (currently using 2 9V rechargable batteris for sine and 1 for square) - I only have that oscilloscope - I'll only use it - Used a Pi Pico W in order to add in the future more functions. - Code was ai generated with my tweaks and fixes on it. As much as it hurts to say it's the truth as I preferred to work on hardware for now. I do know C++ and will learn it better. - KiCad files don't include the square circuit as it's not yet perfect*. Project Goals (v1.0): - Arbitrary wave generation (left it behind for now as it's just another R-2R - Sinewave and squarewave generation up to 1MHz. - 1k Ohm input impendance * Sadly I don't have a square wave photo (and won't be home for 2 weeks) but it was perfect up to 200kHz. After that the duty cycle got smaller but in terms of noise/rounding it was pretty good. Plus the rise time at 1MHz wasn't perfect but pretty okay. If anyone has any ideas lmk. Way it works: - Sine: R-2R -> active filter -> 3RC LPF and one RC HPF for dc cutoff -> Amp (+9V, -9V) -> Buffer - Square: PWM on/off -> amp & buffer (9V, 0V) Images: Sinewave physical circuit Sinewave output Squarewave circuit (input is 3.3v square pwm) Sinewave schematic For way more info: GitHub repo Edit: Not sure why Vpp is 120V pretty sure had x1 on the oscilloscope or something. submitted by /u/S4vDs [link] [comments]

submitted by /u/sjgallagher2
[link] [comments]

submitted by /u/1Davide [link] [comments]

The rapid integration of artificial intelligence (AI) and machine learning (ML) into safety-critical systems is one of the most significant engineering challenges of our time. Whether it’s a medical device diagnosing an anomaly, an autonomous robot on a factory floor, or a train’s obstacle detection system, the question is no longer if we will use AI, but how can we guarantee its safe operation?

Enter ISO/PAS 8800, a new specification focused on the safety of AI applications in road vehicles. At first glance, the title implies that it’s solely for the automotive industry. However, for engineers in medical devices, industrial automation, rail, aerospace, and defense, dismissing this document as “just for cars” would be a missed opportunity.

Figure 1 ISO/PAS 8800 provides consensus-based framework for managing the unique risks of AI. Source: Parasoft

While ISO/PAS 8800 is tailored for the automotive V-cycle and references standards like ISO 26262, its core principles are fundamentally architecture- and domain-agnostic. It provides the most comprehensive, consensus-based framework to date for managing the unique risks of AI, such as nondeterministic behavior, data-driven bias, and performance degradation when systems encounter scenarios not represented in training data.

For example, in safety-critical systems, AI models used for perception or decision-making may behave unpredictably when exposed to rare or previously unseen conditions, potentially leading to incorrect or unsafe system responses if not properly validated and constrained. By understanding ISO/PAS 8800, engineers in other sectors can reinterpret its guidance to complement and enhance their existing safety standards, such as IEC 62304 (medical), IEC 61508 (industrial), EN 50716 (rail), and DO-178C (aerospace).

Here’s how the key principles of ISO/PAS 8800 can be adopted as a universal blueprint for AI safety.

The foundational shift: From “failure” to “insufficiency”

Traditional functional safety standards are built on a deterministic model: a component fails, and that failure must be managed. But AI/ML systems don’t “fail” in the traditional sense.

They can operate exactly as designed yet still be considered unsafe due to a lack of understanding the difference between a systematic fault (a bug in the C/C++ code) and a functional insufficiency (an AI model misclassifying a pedestrian because its training data lacked sufficient night-time examples). This is the single most important concept introduced in ISO/PAS 8800.

Figure 2 Here is how an AI model can misclassify a pedestrian because its training data lack sufficient night-time examples. Source: Parasoft

• For the medical device engineer (IEC 62304): This reframes how to validate diagnostic AI. The software units may be perfectly coded, but the model’s safety must be argued based on the sufficiency of its training data across diverse patient populations, not just its lack of software bugs.
• For the industrial robot integrator (IEC 61508): A collaborative robot’s safety function isn’t just about the hardware stopping in time. Its AI-based perception system might fail to detect a human in low light due to data insufficiency. ISO/PAS 8800 provides the language to specify and verify the “safety of the intended functionality” for AI, a concept that goes beyond traditional hardware/software failure rates.

AI is a system problem, not a model problem

The specification is adamant that an AI model is not a standalone “item.” It’s a component within a larger system. Clause 6 breaks down an AI system into three parts: pre-processing, the AI model, and post-processing. Safety, it argues, must be designed into the entire pipeline.

• For the aerospace engineer (DO-178C/DO-254): This aligns perfectly with the systems engineering approach of ARP4754A. AI-based object detection for a taxiing aircraft isn’t just the job of a neural network. It’s the image signal processor (pre-processing) and the voting logic that cross-checks the AI’s output with a LiDAR (post-processing). The “assurance argument” required by Clause 8 of ISO/PAS 8800 forces a look at the entire data and control path, not just the model’s inference accuracy.
• For the defense contractor (Def Stan 00-055): In a complex battlespace management system, the AI might propose courses of action. ISO/PAS 8800’s logic suggests that safety isn’t just about the AI’s recommendation, but about the “post-processing” layer, the human-machine interface and the rules of engagement that act as a final plausibility check before any action is taken.

The assurance argument: Moving beyond metrics

Clause 8 is the heart of the standard. It states that you cannot prove AI is “safe” simply by saying it is 99.9% accurate. Instead, you must build a structured assurance argument that combines quantitative data with qualitative reasoning.

An assurance argument must state a claim, provide evidence, and explain the reasoning that links them. For AI, the evidence requirement is multi-faceted:

• Data coverage: Is the dataset representative of the real world? (Clause 11)
• Robustness testing: How does the model perform under noisy or adversarial conditions? (Clause 12)
• Architectural mitigations: Are there redundant sensors, model monitors, or out-of-distribution detectors? (Clause 10)
• For the rail engineer (EN 50716 / CENELEC): Instead of just specifying an SIL rating for an AI-based track intrusion system, you would build an argument. The claim is “the system will detect an obstacle on the tracks.” The evidence includes: (1) traceability of the training data to a specification of the operational environment (for instance, all types of weather, debris, and times of day), (2) results from injection of anomalous sensor data to test robustness, and (3) the existence of a fallback to a traditional radar system if the AI’s confidence drops. This structured approach satisfies the rigorous traceability demands of rail safety.

Data as a safety-critical artifact

Clause 11 is revolutionary for its explicit treatment of data. In traditional software safety, the “code” is the master. In AI, the dataset is part of the specification. The standard mandates a full dataset lifecycle, from requirements definition to verification, validation, and maintenance.

• For the medical device engineer: This maps directly onto the need for diverse, high-quality clinical data. Clause 11 requires active management of datasets for gaps and biases. If an AI for tumor detection was trained only on specific age demographics, the standard mandates this be treated as a safety gap that must be mitigated, either by expanding the dataset or restricting the device’s intended use (Clause 9).

Confidence in tools and underlying code

Finally, Clause 15 reminds us that all AI systems are built on a software foundation, often C and C++. The most sophisticated AI model is useless if the C++ function that executes its safe-state monitor has a memory leak. The standard requires confidence in the development of the toolchain itself, from training pipelines to compilers.

This is where traditional software testing practices become the bedrock of AI safety. The “guardrails” that catch AI errors, the fallback logic, the monitors, and the plausibility checks must all be verified to the highest integrity levels using methods like static analysis, unit testing, and integration testing.

Figure 3 Robust software testing is critical in ISO/PAS 8800 implementation. Source: Parasoft

Just as ISO 26262 relies on robust software engineering, so too does ISO/PAS 8800. The principles of shift-left testing, automated unit testing, and CI/CD integration remain nonnegotiable, regardless of the final application domain.

A universal language for AI risk

ISO/PAS 8800 is more than an automotive standard—it’s a Rosetta Stone for translating the abstract risks of AI into the concrete language of safety engineering. It’s a vocabulary for discussing insufficiencies, a structure for building assurance arguments, and a lifecycle for managing data as a critical component.

For engineers in medical, industrial, rail, and aerospace sectors, the path to certifying AI-enabled systems will not require reinventing the wheel. It will require adopting and adapting the principles of ISO/PAS 8800 to a domain that complements existing standards like IEC 62304, IEC 61508, and DO-178C. By doing so, the navigation of AI complexities can be done with a proven framework, ensuring that as systems become smarter, they remain unshakably safe.

Ricardo Camacho is director of product strategy for embedded and safety critical compliance at Parasoft.

 

 

Related Content

• AI Safety Moves to the Forefront
• Specifying Objectives is Key to AI Safety
• Can We Trust AI in Safety Critical Systems?
• Safe Automated Driving Starts with Architecture
• The impact of AI/ML on qualifying safety-critical software

The post Why ISO/PAS 8800 is the new blueprint for AI safety in all critical industries appeared first on EDN.

Why does one battery (or a few) in a multi-battery pack always seem to drain faster than others, and how does this outcome affect both its siblings and the system they jointly power? Read on.

A recent teardown noted a surprisingly (at least to me) common occurrence that I’ve repeatedly experienced: a tendency for an Amazon Echo smart speaker (or other similarly powered device, for that matter) to functionally fail due to the demise (specifically: droop or other DC output voltage compromise under high load, I’m assuming) of an easily replaceable AC power adapter:

I’ve had a few second-generation “Dot” devices’ external power supplies fail in the past; the end result is either a flat-out refusal to start at all or a perpetual repetition of partial boots followed by abrupt restarts. In those cases, the consistent “fix” was straightforward and non-wasteful. Since the AC/DC converter with USB-A output was distinct from the USB-A to microUSB cable that fed the device, I could just swap in a replacement for the former and be up and running again in no time. Every time I did this, by the way, I wondered how many Echo Dots prematurely ended up in the landfill due to typical-consumer ignorance of both the exhibited issue’s root cause and simple resolution solution.

An oldie-but-goodie

In this post, I’ll cover another situation that I come across a higher-than-expected percentage of the time, whenever a multi-battery-powered device goes down for the count. To begin, I’d like to introduce you to a long-time, frequent-use friend of mine, my BT-168 battery tester:

I was happily surprised, while researching the BT-168 online just now while writing, to come across a link to a colleague’s review and teardown of it from a few years back:

Within his writeup, T.K also briefly mentioned a digital display-based successor, the BT-168D, whose existence I wasn’t aware of until now but which is apparently less accurate than my “old school” original analog version due to a comparative applied-load deficit:

I have no idea how long I’ve owned it, or for that matter, how it originally came into my possession. That said, it’s still available for sale (variously company-name branded by multiple retail sources) at Amazon and other distribution intermediaries, as is the follow-on BT-168D.

What’s this got to do with “single-battery failures in multi-battery arrangements”? Well, whenever a two-AA-powered remote control, for example, or a three-AAA-based bathroom scale:

or an LED flashlight, or even (an extreme example) the six-AAA-each (!!!) LED illumination-augmented automatic salt and pepper grinders we recently received as a gift:

functionally fades, I never reflexively slot all the batteries in a charger for refresh or toss ‘em all in the trash (depending, duh, on whether they’re rechargeable). Instead, I sequentially stick each of them in the BT-168 and see what remaining-charge level each reads. Invariably, one is significantly more “dead” than the other(s), even if they were all brand-new when originally installed. Replacing only the drained one more cost-effectively (for non-rechargeables) gets the gear going again, not to mention a reduced landfill payload…until the next one inevitably fails.

Organization determines compromise-outcome specifics

Why, though, does this operating-life inconsistency occur at all? I’d long been aware that batteries’ initial from-factory charges, therefore measured voltages, were predominantly-to-completely a function of their inherent chemical processes. To wit, so-called “precharged” rechargeable batteries are fundamentally just a marketing-driven relabel of low self-discharge, therefore longer-than-otherwise shelf life, battery chemistries and internal architectures.

But I admittedly didn’t fully realize until researching this writeup just how inconsistent battery-to-battery internal resistance can be, even within a common chemistry-and-architecture combination, both manufacturing batch-to-batch and even within a given batch. To be clear, Ohm’s Law, which I learned way back in my first semester of electrical engineering at university, has long informed me of the effects of higher-than-normal resistance: greater “waste” heat output, reduced current output and lower voltage, especially under load. And I also had some inkling of the fact that for a given battery, resistance also evolves over time and use, typically increasing (unless, of course, the battery develops an internal short). But notable battery-to-battery variability even fresh from the factory? That was, I confess, news to me, although in retrospect I shouldn’t have been surprised, especially for off brand, “cheap” battery options.

The resultant effects of internal resistance variability on multi-battery combos, as suggested by my research results along with another set of fundamental electronics laws, this time from Kirchhoff, are intriguing (IMHO, at least). For multiple batteries connected in series, as I’ve recently editorially inferred by analogy to solar panel connections, the outcomes of a higher-than-spec internal resistance for one of them are reduced aggregate output voltage along with bottlenecked peak current flow. Speaking of current, and on the other hand, batteries connected in parallel—where incremental peak current output potential is one key motivation for this organization, along with increased aggregate charge capacity—are hampered in both of these regards when one of the batteries is high resistance-compromised.

Multi-cell battery pack structures that connect their contents both in serial and parallel are increasingly common, both to boost the effective voltage (serial) and increase overall system runtime (parallel). As I was writing this post, for example, I came across editorial coverage of a YouTuber’s (modestly successful) project to power a (modestly equipped) desktop PC motherboard using only AA batteries:

You’ll see that he has four rows of 16 batteries each. Do the math and you’ll conclude, as I did (unless my methodology was flawed, which is always a possibility; if so, let me know in the comments) that each 16-battery bank is serially tethered (to generate ~25 V) and the four banks then connect in parallel (to boost capacity, therefore runtime). Battery degradation anywhere within the series/parallel cluster will thus result in both voltage and capacity compromises.

The YouTuber’s commentary, elementary as it may be, also makes important points about the importance of robust wiring and connectors, both topics which an excellent white paper (PDF) I came across in my research, published by Victron Energy, discusses at length. While both wiring and connectors, along with the batteries themselves, have resistances typically measured in dozens to hundreds of mΩ (that’s milli, not Mega), none is a perfect conductor. Use, for example, excessively thin wire, and you’ll end up with performance-degrading current flow constraints (along with maybe a fire). The same goes for a corroded battery contact, as anyone who’s dealt with a geriatric vehicle battery likely already knows. And each wiring run’s length is also a critical factor; if one span of a multi-battery parallel configuration is notably longer than the other(s), the resultant (slightly, but still) higher resistance will act akin to higher-than-average resistance in the battery itself.

More to say (but not today)

With brevity in mind, I’m only focusing here on the more common case of higher-than-average internal battery resistance (initially and, especially, over time). That said, as I already alluded to with my earlier “internal short” comments, resistance can also both inherently exist and evolve over time in the opposite (lower) direction. Such a situation is, perhaps obviously, particularly problematic in a multi-battery parallel configuration, both for the affected battery, the others in the parallel bank, and whatever they’re commonly powering.

For similar brevity reasons, I’m also covering today only situations where the installed batteries are either non-rechargeable or are removed for recharging. Multi-battery packs recharged in situ (while installed inside a portable power unit, for example) translate to an even more complicated scenario involving, among other factors, the critical importance (and difficulty) of balancing the various cells within the likely series/parallel cluster. The earlier-mentioned Vitron Energy white paper also explores this topic at length. More generally, I also found the various resources at Cadex Electronics’ Battery University quite helpful. And I’ll likely have more to say about these topics in future posts as well. Until then, and as always, I welcome your thoughts in the comments!

—Brian Dipert is the Principal at Sierra Media and a former technical editor at EDN Magazine, where he still regularly contributes as a freelancer.

Related Content

• Inside the battery: A quick look at internal resistance 
• Cell balancing maximizes the capacity of multi-cell batteries
• Active balancing: How it works and what are its advantages
• Internal Resistance Tester for Batteries

The post Single-battery failures in multi-battery arrangements: diagnosing selective cell derangements appeared first on EDN.

In a move that cements India’s transition from a consumer to a producer in the global silicon race, Prime Minister Narendra Modi officially inaugurated the Kaynes Semicon OSAT (Outsourced Semiconductor Assembly and Test) facility on March 31, 2026.

The ₹3,300 crore plant, located in the industrial heart of Sanand, marks the second major semiconductor unit to go operational in Gujarat within 900 days, following the earlier launch of the Micron facility. This rapid execution underscores the momentum of the India Semiconductor Mission (ISM) 2.0, as the country aggressively pursues a slice of the $110 billion global chip market.

A Global Export Hub

While domestic self-reliance is a key driver, the Kaynes plant is looking outward. During the ceremony, the first batch of Intelligent Power Modules (IPMs), sophisticated components that integrate 17 individual chips, was presented to Stephen Chang, CEO of Alpha & Omega Semiconductor, a California-based anchor customer.

“Today, a new bridge has been formed between Sanand and Silicon Valley,” the Prime Minister stated during his address. “The modules made here will reach American companies and, from there, power the world.”

Key Specifications of the Sanand Plant

The facility is designed for high-volume, high-precision manufacturing, focusing on sectors that are currently seeing explosive growth:

Feature	Details
Investment	₹3,300 Crore
Production Capacity	Approx. 6.3 Million chips per day
Primary Products	Intelligent Power Modules (IPMs), Multi-chip modules
Target Industries	Electric Vehicles (EVs), Industrial Automation, 5G Infrastructure
Timeline	From Cabinet approval to production in 14 months

The “Techade” Vision

The inauguration is more than just a corporate milestone; it is a strategic piece of the “India Techade” vision. Unlike traditional manufacturing, the Kaynes plant focuses on the back-end of the semiconductor value chain, like assembly, testing, and packaging, which has historically been a bottleneck for Indian electronics.

Union IT Minister Ashwini Vaishnaw highlighted the speed of the project, noting that the plant moved from foundation-laying to commercial production in record time. He also pointed to the growing “Sanand-Dholera” cluster, which is being modelled after global hubs like Hsinchu in Taiwan and Gyeonggi in South Korea.

Building the Talent Pipeline

To sustain this growth, Kaynes Semicon announced a memorandum of understanding with SVNIT Surat to develop a specialised workforce. This partnership aims to bridge the gap between academic theory and the rigorous standards of semiconductor cleanrooms, ensuring a steady stream of engineers for the 10 major chip projects currently approved across six Indian states.

As the ribbon was cut in Sanand, the message to the global tech community was clear: India is no longer just waiting for the future of hardware; it is assembling it.

The facility has already reported early execution success, having shipped approximately 900 multi-chip modules (IPM5) just days before the formal inauguration, signalling high operational readiness for its export commitments.

By: Shreya Bansal, Sub-Editor

The post Why Every EV & 5G Phone Could Soon Be Powered by Gujarat appeared first on ELE Times.

Intelligent power and sensing technology firm onsemi of Scottsdale, AZ, USA says that its hybrid power integrated modules (PIMs) will be featured in Sineng Electric’s next-generation 430kW liquid-cooled string energy storage systems (ESS) and 320kW utility-scale solar inverter. The design win builds upon the long-standing collaboration between onsemi and Sineng to deliver high-performance, future-ready solutions in the growing renewable energy and AI infrastructure markets...

Студенти ФСП відвідали місто Славутич Інформація КП чт, 04/02/2026 - 10:54

Alligator Automations India Pvt. Ltd., a manufacturer of end-of-line packaging automation systems, has reduced engineering effort in electrical design by around 50% by implementing WSCAD’s E-CAD solution.

The company’s ten-person electrical engineering team now uses WSCAD for creating electrical schematics, control cabinet design, and project documentation. Previously, tasks such as wire numbering, device grouping, and bill-of-materials generation had to be performed manually, resulting in project delays and an increased risk of errors. After switching to WSCAD, many of these steps are now automated, significantly improving both efficiency and design accuracy.

“Tasks that previously required manual work are now automated,” says Sagar Bhavsar, Control Engineering Manager at Alligator Automations. “Wire numbering alone now takes roughly half the time, allowing our team to focus more on complex design and optimisation tasks.”

Alligator Automations develops customised automation solutions, including robotic palletising systems, packaging automation, automatic loading systems, and intralogistics conveyor technology. Projects cover the entire value chain – from design and development to manufacturing, installation, commissioning, and long-term support for customers in industries such as food & beverage, paint & cement, fertiliser & petrochemicals, as well as tyre and agro industries.

“Automation projects are becoming increasingly complex while engineering timelines continue to shrink,” says Dr Axel Zein, CEO of WSCAD. “At the same time, AI is fundamentally changing how electrical engineering is performed. By automating documentation, verification, and knowledge retrieval, engineers can focus more on system design and optimisation instead of repetitive tasks. The Alligator Automations example demonstrates how standardising the E-CAD environment can significantly increase engineering efficiency.”

Beyond schematic creation, WSCAD supports precise 2D and 3D control cabinet layouts, automatic wire routing, and direct data transfer to cabinet manufacturing systems. This eliminates media discontinuities and reduces sources of error. AI-supported design, documentation, and multilingual translation capabilities further accelerate project delivery while ensuring compliance and data quality.

The post WSCAD ELECTRIX AI Cuts 50% Engineering Effort For Alligator Automations appeared first on ELE Times.

Vishay Intertechnology has introduced a new Automotive Grade photovoltaic MOSFET driver that is the first such device in the compact SMD-4 package to provide a creepage distance of 8 mm and mould compound with a comparative tracking index (CTI) of 600. Designed to increase safety and reliability in high voltage automotive applications — while simplifying designs and reducing costs — the Vishay Semiconductors VODA1275 features the industry’s fastest turn-on times and the highest open circuit voltage and short circuit current in its class.

Classified as providing reinforced isolation, the device delivers an open circuit voltage of 20 V typical, short circuit current of 20 μA, and turn-on time of 80 μs, which is three times faster than competing devices. These characteristics enable quicker and more reliable driving of MOSFETs and IGBTs in high-voltage systems. In addition, the device’s working isolation voltage of 1260 Vpeak and isolation test voltage of 5300 VRMS make it ideal for 800 V+ battery systems.

AEC-Q102 qualified, the VODA1275 is intended for use in pre-charge circuits, wall chargers, and battery management systems (BMS) for electric (EV) and hybrid electric (HEV) vehicles. While designers previously had to use two MOSFET drivers in series to generate the higher voltages required in these applications, the device’s high open-circuit output voltage allows them to use just one, saving space and lowering costs. In addition, the driver enables the creation of custom solid-state relays to replace legacy electromechanical relays in next-generation vehicles.

The optically isolated VODA1275 draws all the current required to drive its internal circuitry from an infrared emitter on the low-voltage side of the isolation barrier. This construction simplifies designs and lowers costs by eliminating the need for an external power supply. The MOSFET driver is RoHS-compliant, halogen-free, and Vishay Green.

The post Vishay Intertechnology Automotive Grade Photovoltaic MOSFET Driver Boosts Reliability and Lowers Costs in High Voltage Systems appeared first on ELE Times.

Two TVS diode series from Littelfuse provide DO-160 Waveform 5A Level 5 lightning protection for avionics, military, and other mission-critical systems. The SM15KPA-HR/HRA and SM30KPA-HR/HRA offer peak pulse power ratings of 15 kW and 30 kW (10/1000 µs), respectively, protecting I/O lines, power buses, and sensitive electronics from lightning-induced transients and high-energy surges.

Both families offer fast response times—typically less than 1 ps from 0 V to VBR minimum—30-kV ESD protection per IEC 61000-4-2 on data lines, and low incremental surge resistance. The devices remain stable across a junction temperature range of –55°C to +150°C. While all diodes undergo high-reliability 100% screening tests, the HR versions additionally pass MIL-STD-750 Group B tests for extra test rigor and extended reliability margins.

The TVS diodes come in compact SPD4-1 surface-mount packages compatible with automated assembly. These packages reduce weight and board space while eliminating the through-hole mounting typically required for high-energy TVS components.

The SM15KPA-HR, SM15KPA-HRA, SM30KPA-HR, and SM30KPA-HRA series are available in tape-and-reel format in quantities of 500. Samples can be requested through authorized Littelfuse distributors worldwide.

Littelfuse

The post Lightning-resistant TVS diodes safeguard avionics appeared first on EDN.

Infineon’s TDM24745T quad-phase power module with trans-inductor voltage regulator (TLVR) magnetics provides high current density for AI workloads. Integrating four power stages, proprietary magnetics, and decoupling capacitors in a compact 9×10×5-mm package, the module achieves 2 A/mm² and delivers up to 320 A peak.

The device optimizes transient response and supports the high-current core rails required by advanced GPU and AI processors in both lateral and vertical power delivery configurations. Powered by OptiMOS-6 MOSFETs, it offers enhanced efficiency and thermal performance in dense AI server designs. The TLVR architecture further improves transient performance while reducing required output capacitance by up to 50%.

The TDM24745T power module integrates with Infineon’s end-to-end AI server power delivery ecosystem. Availability was not disclosed at the time of this announcement. For more information about Infineon’s voltage regulation solutions for AI and data centers, click here.

Infineon Technologies 

The post TLVR power module supplies 320 A for AI processors appeared first on EDN.