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​Semicon 2.0 is the next phase of India Semiconductor Mission (ISM) approved by the Union Cabinet with the primary goal of expanding domestic chip design, manufacturing, advanced packaging, research and talent development. Prime Minister Narendra Modi highlighted the transition to Semicon 2.0 by stating the ambition of the semiconductor ecosystem that “India’s chip will go out to the world” as India is emerging as a major source of developing semiconductor value chain.

Under Semicon 2.0, the government is targeting at least 200 startups and companies involved in chip design in India to scale up domestic semiconductor capabilities. This will build momentum with already 105 startups who have started developing chips and received access to industry-grade EDA tools. Electronics and IT Minister Ashwini Vaishnaw at SEMOCON India, 2026 said that 20 of those 105 startups have secured venture-capital funding, and the government wants to expand this ecosystem to at least 200 startups and companies.

The programme is structured into six broad focus areas covering chip design, semiconductor machinery and materials, additional fabrication facilities, advanced packaging and testing, research and development, and talent development. This approach aims to take India’s semiconductor ecosystem beyond the initial foundation created under Semicon 1.0 to a more complete production facility.

Talent development is another major focus of this initiative. The IT Minister also stated that around 70,000 semiconductor design engineers have been trained as part of India’s accelerated talent development to strengthen its home-grown chip-design ecosystem under the India Semiconductor Mission​.

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Uttar Pradesh Government has attracted more than Rs 43,000 crore in investment across the electronics and semiconductor sector, aiming to transform the state into India’s leading semiconductor manufacturing hub. This industrial scheme aligns with the vision of  ‘Make in India,’ scaling local production and thereby reducing import dependence on foreign countries.

More than 200 companies operating in the state’s electronics ecosystem can increase their supply chains, access new customers, lower operating costs, and manufacture new equipment to expand electronics-component manufacturing.

According to the state government, more than 55% of mobile phones produced in India are manufactured in Uttar Pradesh. The expansion of electronics manufacturing ecosystem will go beyond mobile phones into tablets, laptops, consumer electronics, home appliances, solar cells, defence and logistics drones, promoting the state as a rapidly emerging manufacturing hub for electronics and semiconductors.

Leading the Semiconductor Growth Trajectory

Gautam Buddh Nagar has emerged as central place for manufacturing electronic components, consisting of two manufacturing clusters and housing major companies like Samsung, LG, Haier, Dixon, Addverb, Raphe, and Bhagwati. These clusters are laying the foundation for the electronics manufacturing ecosystem.

Uttar Pradesh is also emerging as a key hub for semiconductor packaging and testing. Sector 28 of the Yamuna Expressway under the Yamuna Expressway Industrial Development Authority (YEIDA) hosts India’s newly approved, high-tech semiconductor ecosystem featuring a Centre-approved assembly, Testing, Marking, and Packaging (ATMP) facility.

A state government is seeking to build a broader technology ecosystem connecting electronics manufacturing with semiconductors, AI, robotics, and deep-tech. The member of the state government confirmed that the focus is on developing a complete value chain covering components, chip design, packaging, testing, devices, data centres and AI and robotics applications.

The post Uttar Pradesh Attracts Rs 43,000 Crore Investment in Electronics and Semiconductor Sector appeared first on ELE Times.

Cadence has added an agent for RTL generation to its ChipStack AI Super Agent platform for front-end silicon design and verification. The new agent extends ChipStack’s autonomous verification and debugging capabilities to PPA-driven spec-to-RTL generation, RTL analysis, and refinement—all from natural language prompts.

In early evaluations, the RTL Generation Agent delivers an average 24% reduction in area and 18% reduction in power versus pure foundation-model code generation, while producing 100% functionally accurate RTL. In addition to RTL creation, existing RTL can be updated based on new requirements. The upgrade flow applies AI automation to RTL revision, enabling customers to adapt legacy RTL to new architecture requirements, PPA targets, and functional requirements.

Early collaborations with Honda R&D demonstrate the use of these AI capabilities for PPA and productivity improvements on next-generation SoCs. Honda is evaluating the RTL Generation Agent on advanced automotive SoCs, where safety-critical requirements and tight power and cost constraints demand highly optimized RTL.

The expanded ChipStack AI Super Agent is expected to become available to select early-access customers in the fourth quarter of 2026.

Cadence

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Omnivision’s OAX7700 ultra-low-power ASIC is an always-on vision AI companion processor for vehicle security systems, supporting sensor resolutions up to 720p. An integrated neural processing unit (NPU) allows designers to develop custom algorithms for human presence detection, object classification, and distance measurement. The ASIC can upgrade existing exterior camera solutions, such as surround-view systems and edge AI-based parking surveillance systems.

In always-on mode, the camera continuously monitors the vehicle’s surroundings, consuming minimal power until an event triggers it to switch to normal mode. It records up to 10 seconds of pre-roll video that the ECU analyzes to validate the trigger before activating an alarm, if required. This helps the system avoid false triggers from wind, birds, or other non-threatening motion.

According to Omnivision, parking surveillance systems equipped with the OAX7700 ASIC consume 97% less power than existing solutions. The chip also reduces the processing burden on the central compute platform, enabling more efficient decision-making at the edge.

The OAX7700 integrates stacked PSRAM and flash memory in its 60-pin BGA package. Samples are available now, with production scheduled for the first quarter of 2027.

OAX7700 product page 

Omnivision

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Eggtronic has announced a 140-W USB-C Power Delivery (PD) 3.1 AC/DC reference design for notebook adapters and other USB-C powered devices. The evaluation board combines Eggtronic’s EPIC dual-controller chipset with Renesas’ TP70H150G4LSG 700-V, 150-mΩ SuperGaN FET, achieving 95.5% peak efficiency and more than 92% efficiency at light loads.

Unlike conventional USB-C adapters that rely on costly LLC, AHB, or ACF topologies, the EPIC-based design retains the simplicity and BOM cost of a QR flyback converter. The primary-side controller (EPIC2ACB04) manages both the active totem-pole PFC front end and QuarEgg ZVS flyback switching stage, while the secondary-side companion controller (EPIC2ACQ07) handles synchronous rectification, output-voltage regulation, and USB PD 3.1 protocol management.

Operating from a universal input of 90 VAC to 264 VAC, the system provides an output of up to 28 V at 5 A. It also features optoless digital isolation, replacing optocouplers and digital isolators with an integrated high-speed, ultra-low-latency digital feedback loop for improved transient response and reliability.

The 140-W USB-C PD 3.1 reference design is available now.

Eggtronic

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The Melexis MLX91224 and MLX91225 isolated Hall current sensors measure up to 100 ARMS in automotive and energy applications. Offered in three compact SOIC packages, each device integrates a current conductor, sensing element, signal conditioning, and galvanic isolation. This integration minimizes ohmic losses and simplifies designs for EV powertrains, DC/DC converters, chargers, and solar systems.

The integrated current path runs directly through the package’s low-impedance lead frame, while two sets of Hall plates differentially sense the magnetic flux generated by the current. Differential sensing minimizes disturbance from external magnetic fields and enables a high-speed linear analog output proportional to the measured current. Package-dependent isolation ratings allow working voltages up to 1640 VRMS.

Developed as an ISO 26262 ASIL B Safety Element out of Context (SEooC), the sensors support safety-related current measurement in high-voltage automotive systems. The MLX91224 is designed for 5-V systems, while the MLX91225 is designed for 3.3-V systems. Both devices offer AC and DC current measurement, bipolar or unipolar sensing, and ratiometric or fixed output configurations.

Engineering samples of the MLX91224 and MLX91225 are available in limited quantities.

Melexis

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Powered by BrainChip’s AKD1500 edge AI coprocessor, the AKD1500 PCIe development card enables developers to run models built with existing AI frameworks. The card plugs into a standard PCIe slot in a desktop, workstation, industrial PC, or single-board computer, providing access to the AKD1500’s self-learning capabilities for edge AI development.

The AKD1500 coprocessor chip uses the Akida neuromorphic processing engine to deliver up to 800 effective GOPS at <1 mW/GOP for low-power AI neural network acceleration. Its built-in capacity for on-device learning allows for secure application personalization without needing a cloud connection or extensive retraining.

The PCIe development card complements the AKD1500’s other deployment options, including an M.2 module, packaged and unpackaged silicon, and licensable IP. Developers can test their own models with streaming data on a PC, then deploy the validated models on AKD1500 hardware without modification.

Available through BrainChip’s online store, the AKD1500 PCIe development card is priced at $149.

AKD1500 PCIe product page

BrainChip Holdings 

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Working in a power electronics lab has exposed me to some of the most ridiculously oversized passive components out there. Sometimes it feels like I’m in those early electrical experiment demonstrations in the 18th-19th century with how big the parts can get. Anyone else work around this sort of gear? submitted by /u/squonktearz [link] [comments]

For decades, polyethylene naphthalate (PEN) held a small but critical place in high-performance capacitors. It was never the volume material that biaxially oriented polypropylene (BOPP) is, since cost and production capacity kept it niche. But capacitor engineers reached for PEN when BOPP ran out of room: when temperatures climbed, when packages had to shrink, or when a higher dielectric constant was the only way to hit the energy target.

Now capacitor-grade PEN is disappearing. Major suppliers are signaling PEN end-of-life, and capacitor manufacturers serving aerospace, defense, power grids, transportation, and industrial power electronics are asking what comes next.

It’s tempting to treat this as a sourcing problem. In other words, find a comparable dielectric, drop it into the existing capacitor, qualify it, and move on. But that instinct is wrong.

The product you build to replace a PEN capacitor should not be a like-for-like copy with a different dielectric inside. It should be a better capacitor, because major applications are pushing every power electronic component beyond legacy use, and capacitors desperately need to keep up.

Component under the most pressure

AI compute, data center buildout, and electrified transport have driven the most disruptive shift in power demand in generations. Forecasts are rewritten quarterly, interconnection queues are stacking up, and hyperscalers are standing up their own power generation to avoid the wait.

These trends converge on a single component. Capacitors are being asked to handle higher voltages, cycle faster, and survive more thermal stress for decades without drifting out of spec. When program teams walk through where a design holds up or starts to compromise, the conversation lands on the capacitor, its energy density, its footprint and mass, its thermal behavior, and how long it survives the duty cycle.

That conversation is happening earlier in the design cycle than it used to. The capacitor manufacturers responding to these demands earliest are the ones getting designed in.

What PEN capacitor actually did

PEN is at the end-of-life stage, and the capacitors that depend on it can’t just swap in a substitute film and move on. It did two different jobs, and they belong to two different capacitors.

In aerospace pulse power, hardened defense systems, and directed-energy applications, PEN was a high-voltage, energy-dense enabler for rapid discharge. It let designers pack more energy into a smaller capacitor at a given voltage rating.

In EV power electronics, grid subsystems, and rail traction, PEN was chosen not for peak energy density, but for its ability to sustain intense duty cycles and thermal stress, often with a DC bias. A capacitor that functions without derating under all use-scenarios is invaluable to final product design.

Treating those as one problem is what makes PEN replacement feel impossible. It attempts to solve two separate capacitor-design problems, energy density under pulse and thermal stability under load, which should lead to separate design answers.

HDC: Rebuilding the energy-dense capacitor

The first job, exemplified by uses in aerospace, pulse power, hardened defense systems, and fusion, gets picked up by a different class of material entirely. Where PEN was used to shrink a capacitor and push its energy density, the successor is a high dielectric constant (HDC) material, which changes what the capacitor can do, not just what is wound inside it.

Film developers have begun introducing nanolayered metamaterial dielectrics, built from hundreds to thousands of alternating polymer layers, with dielectric constants in the 3.7 to 4.7 range, well above BOPP and many PEN grades, and breakdown strengths of 790 to 820 V/µm. In a finished part, that can mean up to 4× the energy storage in as little as half the footprint of a conventional film capacitor, with improved thermal stability and longer operational life. For a pulse module, a Marx bank, or a grid capacitor competing for volume and mass, is a smaller, lighter, more robust component, not just a spec-sheet footnote.

The trade-off is real and worth stating plainly to a design audience: HDC carries a higher dissipation factor than the lowest-loss dielectrics, so more energy shows up as heat. That constrains how fast and how often the capacitor can be cycled, which is why HDC belongs in energy-density and pulse-duty capacitors—defense pulse modules, mass-constrained aerospace systems, fusion driver banks, and intermittent-duty transportation electronics—rather than continuous switching.

LDF: A lower loss and faster switching capacitor

For the other PEN job—continuous cycling at high repetition rate over decades—the answer is a low dissipation factor (LDF) dielectric, which trades some energy density for very low loss and long thermal endurance in grid inverters, FACTS devices, and industrial drives. This lower dissipation factor means there is less self-heating, greater efficiency of energy transfer, and less stress on components, leading to more reliable and longer lifetimes.

PEN also functions at environmental temperatures above traditional BOPP but below far more expensive alternatives. Due to nanolayering, LDF can incorporate stabilizing layers, which ensure enhanced functionality rivaling PEN, while reducing thermal expansion and device derating. This results in finished capacitors that can be used in hotter or high energy environments without massively increasing component cost.

What capacitor manufacturers should do

PEN’s disappearance marks an inflection point. The capacitor architecture chosen now gets locked in for the life of the platform—30 years or more on the grid and in aerospace. Four moves separate the winners.

1. Stop hunting for a one-to-one PEN part

There is no universal replacement capacitor. Segment the installed PEN base by what each capacitor was actually doing—energy density and volume route to HDC, lifetime and efficiency route to LDF—and qualify against that. The segmentation work up-front is what accelerates qualification.

2. Design the capacitor for the duty cycle, not the datasheet

AI data centers, EV powertrains, fusion supplies, and grid assets load capacitors differently. A manufacturer who can build to more than one duty cycle expands its addressable market; one who can serve only a single profile gets squeezed.

3. Treat heat as a capacitor-and-system problem

HDC trades efficiency for energy density, and that only works if the surrounding power electronics remove the heat. Pair capacitor selection with explicit thermal models and validated test data, and qualifications go faster with fewer field failures.

4. Make provenance part of the product

More than 70% of conventional capacitor film originates in China. Buyers hardening the grid, defense platforms, and AI infrastructure are increasingly unwilling to carry that concentration risk. A documented U.S. or allied-nation supply chain is a procurement advantage, and it drops into standard metallizing and winding lines, so qualifying it does not require retooling.

First to qualify, first to win

Those four moves take time to execute, and time is the one input nobody can manufacture more of. Capacitor qualification takes 12 to 24 months. The clock is already running. The manufacturers who commit now to the right capacitor, not the cheapest lookalike, get designed into a decade of rising power demand. Those who requalify a copy of the PEN part will spend that decade watching competitors take the design wins.

Alec Laws is senior product manager for dielectric films at Peak Nano.

Related Content

• Trends in capacitors
• Capacitor matchmaker
• Getting Familiar with Capacitors
• Selecting and Applying Film Capacitors
• Film capacitors: Characteristics and uses in power applications

The post With PEN nearing end-of-life, capacitors built on it must change appeared first on EDN.

DOOM runs on an ESP32-P4 embedded board, and an artificial intelligence plays it by watching the screen, just as a person would. Andrea Ricci’s project uses the SCINTIX P4 board, with a 7-inch MIPI-DSI display and an ESP32-C6 wireless coprocessor. The Claude Sonnet language model controls the game through an MCP interface, without ever accessing the engine’s internal state. The AI only sees what a human player sees: a fan of 51 depth rays, enemies in line of sight, and an ASCII map of already-discovered walls.

The result is an AI gaming experience much closer to a human one. The model doesn’t know the position of demons behind walls, doesn’t know what’s in the next room. It has to explore, remember, and make mistakes. This unusual approach to AI is the heart of the project, and all the source code is in Andrea Ricci’s repository.

Rendering and scaling with the PPA

DOOM runs entirely on the board, with software rendering at 320×200. The ESP32-P4’s Pixel Processing Accelerator (PPA) does hardware scaling up to 1024×600, the display’s resolution. Scaling time per frame drops from about 24.5 ms with the CPU to about 9 ms with the PPA. DOOM’s software renderer takes about 25 ms per frame, and the game tick runs at 35 Hz (TICRATE). The game maintains about 30 FPS.

The board has 32 MB of PSRAM and 32 MB of flash, with a SPIFFS storage partition of about 12 MB. The 7-inch display is connected via MIPI-DSI, driven by the ST7701S controller. Sound effects audio goes through the ES8311 codec over I2S, with clock derived from SCLK and amplifier disabled via the PI4IOE5V6408 I/O expander.

The MCP server and lockstep

The game is exposed through a ‘lockstep’ WebSocket server. The model sends an action, the game advances a few ticks and returns a structured JSON observation. Then it stops and waits for the next action. An MCP server (tools/doom_mcp_server.py) wraps the WebSocket and registers the game as tools for MCP-compatible clients like Claude Code.

The available tools are: observe, move, shoot, open, select weapon, and map. The observation given to the model is limited to what a player sees: the 51 depth rays, enemies in line of sight (never through walls), the ASCII map, and hints about doors and blocks. Audio is played through the ES8311 codec, with I2C address 0x18, and the I/O expander has address 0x43.

Input and Wi-Fi configuration

The board supports USB input, both keyboard and gamepad. On first power-up, it configures via Wi-Fi with a captive portal. The software uses ESP-IDF v5.5.x, doomgeneric, esp_hosted, and the PPA APIs. The ESP32-C6 coprocessor handles wireless connectivity, while the ESP32-P4 does everything else.

For those who want to get closer to this world, a development board like the ESP32 board with Wi-Fi and Bluetooth can be a first step to experiment with embedded projects. Also, those starting from scratch can use the ESP32-C6-Zero kit to learn the basics of wireless connectivity, before tackling a complex system like this one.

Source: https://github.com/relocsrl/scintix-p4-playing-doom

The post DOOM on ESP32-P4: AI plays like a human appeared first on Open Electronics.

This versatile Design Idea survives and reports open- and short-circuits, not to mention multiplying efficiencies.

Generally accepted tech folklore says that after you drive relays and solenoids into full actuation, only half as much coil voltage and current—and therefore only a fourth as much power—is needed to hold them there. Consequently, driver designs that continuously apply full voltage burn four times the power and heat the coil four times hotter than the job really requires.

Wow the engineering world with your unique design: Design Ideas Submission Guide

Figure 1’s driver circuit employs pulse width modulation (PWM) to dramatically diminish post-pull-in power waste. As an extra added bonus, it also survives and reports open- and short-circuit faults on the GPI status bit.

Figure 1 In this circuit, driver transistor Q2’s PWM duty cycle varies from 100% at actuation to a power saving 50% sustain. It can accommodate load currents up to half an amp. R5 protects current limiter Q3’s base-emitter junction from destruction by over-current events. And Q1 detects coil opens and shorts.

Here’s how it works.

The PWM signal on the general-purpose output (GPO) bit sets Q2’s conduction duty cycle from 0% to 100% to ~50%, from off to full voltage pull-in to quarter-power sustain. Q3 protects Q1 from over-current resulting from shorted coil faults. And Q1 utilizes relay/solenoid coil L1’s inductive “kickback” to detect correct driver operation and report it as a logic “1” on the general purpose input (GPI) pin…or, if kickback is absent (meaning the coil is open or shorted), its logical opposite, “0”.

Figure 2 not-to-scale sketches the driver timing.

Figure 2 In this timing diagram, T1 = timeout to first fault check = L1/R timeconstant = ~500us. T2 = ~100% PWM duty cycle to power initial actuation = ~10ms. T3 = ~50% sustain duty cycle for as long as application requires. And T4 = PWM sustain cycle = ~100us = 10kHz.

In summary, Figure 1’s circuit neither squanders power nor requires changing component values to accommodate different supply voltages. And it’s simple. Along with, dare I say, beautiful? I guess I just did!

Stephen Woodward‘s relationship with EDN’s DI column goes back quite a long way. Over 200 submissions have been accepted since his first contribution back in 1974.  They have included best Design Idea of the year in 1974 and 2001.

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The post 8 to 48 volt PWM relay/solenoid driver finds fault, pinches power appeared first on EDN.

By Meryem Berrada, Product Marketing Engineer, Keysight Technologies

Modern 5G network testing depends on real-time spectrum analysis to detect transient RF interference that traditional swept spectrum analysers often miss. As RF environments become denser with 5G, IoT, radar systems, and autonomous infrastructure, engineers increasingly rely on handheld spectrum analysers and spectrum management software to identify, localise, and mitigate interference in real time.

The wireless world is not just getting faster. It is getting denser. As global infrastructure shifts toward 5G, massive IoT, and autonomous systems, the RF spectrum is becoming an increasingly crowded and contested space. What once appeared as occasional interference is now evolving into something far more consequential: an invisible gridlock forming across the airwaves. This shift fundamentally changes the nature of the problem.

Interference is no longer a minor inconvenience behind a dropped call. It is a systemic risk capable of disrupting critical operations. Maintaining network integrity now requires more than simply detecting signals. It demands real-time, intelligent awareness of spectrum behaviour as it unfolds. Several key shifts show just how much the RF landscape has changed.

Why Is RF Interference Detection Critical for Safe 5G Network Testing?

The transition to 5G does not just improve performance. It raises the stakes. Networks are moving from human-driven communication toward machine-to-machine ecosystems, where reliability is directly tied to physical outcomes. In this environment, RF interference detection affects far more than connectivity. It can directly impact systems such as autonomous vehicle navigation, public safety communications, and radar and defence infrastructure.

In these contexts, failure is not measured in inconvenience. It is measured in consequence. A momentary disruption can cascade into a critical system failure, leaving little to no margin for error. Interference is no longer something networks can simply tolerate. It is something they must actively anticipate and mitigate during 5G network testing and deployment.

Why Do Traditional Spectrum Analysers Miss Modern RF Interference?

Conventional swept-tuned spectrum analysers were designed for a very different RF environment, one where signals were relatively stable, predictable, and easier to isolate. Today’s signals behave differently. They are often transient, lasting only milliseconds. They can be intermittent in nature and increasingly dense, overlapping within the same spectral space. Traditional swept spectrum analysers measure frequencies sequentially.

That sweep-based approach can provide useful snapshots of RF activity, but it can also miss short-duration events that occur between sweeps. Real-time spectrum analysis changes that perspective. Instead of sampling the spectrum in slices, it continuously captures and processes RF activity across a defined bandwidth without gaps in observation. This makes it better suited to detecting transient, burst, and intermittent signals that are common in modern 5G and dense RF environments.

With modern tools, engineers can visualise RF behaviour using spectrograms and waterfall displays. These views reveal short-duration transients, overlapping emitters, and time-varying interference patterns that would otherwise remain invisible. Capturing this kind of wideband, time-sensitive activity is no longer a specialised capability. It is becoming a baseline requirement for modern RF interference detection.

Traditional vs. Real-Time Spectrum Analysis: Key Differences for 5G and RF Interference Detection

Understanding the difference between traditional and real-time spectrum analysis is critical for engineers performing RF interference detection and 5G network testing in modern environments.

Table 1. Comparison of traditional swept spectrum analysis and real-time spectrum analysis for modern RF interference detection and 5G network testing. How Are Real-Time Spectrum Analysis Workflows Changing Field Testing?

The traditional model of RF troubleshooting, dispatching teams to investigate issues on-site, is rapidly becoming unsustainable. Historically, diagnosing problems in the “last mile” required manual drive testing, consuming significant time, labour, and operational resources. That model is now shifting toward centralised, software-driven workflows.

By combining ruggedised handheld spectrum analysers with centralised analysis platforms, engineers can remotely control distributed test assets, monitor multiple sites simultaneously, and stream live measurement data back to centralised teams. This creates a fundamentally different workflow: capture, stream, analyse, and act. Engineers no longer need to be physically present at every field location. Instead, units can remain deployed at the edge while analysis happens centrally, powered by high-fidelity, wideband IQ data delivered in real time.

How Does Real-Time RF Interference Detection Use TDoA Localisation?

The classic “fox hunt,” tracking interference sources with directional antennas, was built for a slower and simpler RF environment. In today’s dense 5G deployments, where interference sources can appear and disappear in milliseconds, manual methods struggle to keep pace. The modern approach shifts the problem from physical pursuit to mathematical computation. Time Difference of Arrival, or TDoA, techniques use multiple GPS-synchronised receivers to measure the precise arrival time of a signal across different locations.

Because RF propagation speed is constant, software can calculate the emitter’s position based on the difference in arrival times. This approach reduces reliance on slow, manual triangulation and enables rapid, wide-area localisation that scales with the complexity of modern networks. RF interference detection is no longer only a field exercise. It is increasingly a data-driven problem solved through coordinated measurement and computation.

Figure 2. Distributed field measurements combined with TDoA processing enable rapid, wide-area localisation of interference sources How Are Handheld Spectrum Analysers Closing the Gap Between Field and Lab Testing?

For years, RF engineers had to choose between portability and performance. Handheld spectrum analysers offered convenience in the field but often lacked the depth required for advanced analysis. Benchtop instruments delivered precision, but at the cost of mobility. That trade-off is now changing.

Modern handheld analysers can enable wideband real-time IQ streaming, representing a significant leap from previous limitations and changing what can be achieved outside the lab. This capability is especially important for 5G New Radio, where channel bandwidths can reach up to 100 MHz in sub-6 GHz bands. Without wideband capture, engineers may be forced to stitch together narrower measurements, losing critical time-domain behaviour in the process. With wideband streaming, entire 5G channels can be captured in a single acquisition, preserving signal behaviour and enabling integration into centralised analysis workflows. In practical terms, the boundary between field and lab is becoming less rigid. More advanced analysis can now be brought closer to where the RF problem actually occurs.

Why Real-Time Spectrum Analysis Is Becoming Essential for 5G Network Testing

Spectrum management is undergoing a fundamental transformation. Detecting signals is no longer sufficient. Engineers must now be able to capture transient, wideband RF activity in real time, stream and classify that data within centralised systems, precisely locate interference sources, and act before disruptions escalate into failures.

The wideband reality is already here. With 5G NR channel bandwidths reaching up to 100 MHz in sub-6 GHz bands, real-time wideband capture is not just a forward-looking requirement. It is an immediate need for modern 5G network testing. The question is no longer whether interference will occur. The question is whether your tools can see it in time.

The post The 5G Radio Fog: Why Traditional Spectrum Analysers Miss Modern RF Interference appeared first on ELE Times.

SYSGO, a leading European supplier of real-time operating systems and hypervisors for safety and security-critical embedded applications, and Kontron, a global provider of IoT/Embedded Computing Technology (ECT), have announced the availability of a validated Board Support Package (BSP) for the rugged VPX Kontron VX3060 board, based on 11th generation Intel® Core processors. The new BSP extends the long-standing collaboration between the two companies, providing a reliable European hardware and software foundation for safety, security and mission-critical embedded applications.

Designed for demanding markets such as defence, transportation and industrial automation, the combined solution helps system developers speed up platform integration, taking advantage of PikeOS’s advanced virtualization and separation capabilities on a proven VPX computing platform.

A platform ready for critical systems

Developers can immediately deploy PikeOS on the Kontron VX3060 or on Kontron systems such as HARAKAN-F2 that integrate the VX3060, using a fully supported BSP, significantly reducing platform integration effort and accelerating the development of safe and mixed-criticality embedded systems. The BSP supports the board’s key features, including Ethernet, UART, thermal sensors, voltage monitoring sensors and mass storage interfaces. Additional platform security capabilities such as Trusted Platform Module (TPM) integration and Secure Boot are available on customer request to meet cyber resilience challenges and platform integrity requirements. The availability of the BSP accelerates time-to-market, shortens software bring-up times and gives developers a robust starting point for building certified and security-critical systems.

Mixed-criticality support and secure virtualization

The Kontron VX3060 and the HARAKAN-F systems based on it are designed to operate in harsh operating environments and are suitable for transportation, defence, industrial automation and other applications that require rugged computing platforms. With PikeOS support, customers can immediately take advantage of PikeOS’s advanced partitioning and virtualization capabilities on the platform. PikeOS can operate as a secure hypervisor and as a combined hypervisor and real-time operating system, all in a single product. This flexibility allows developers to consolidate multiple applications with different criticality levels on a single hardware platform while maintaining strict separation between workloads. Critical real-time functions can run alongside Linux, middleware or application environments, enabling efficient mixed-criticality architectures that reduce system complexity, size, weight, power consumption and lifecycle costs.

Strengthening a European technology ecosystem

As demand for reliable European technologies continues to grow in critical sectors, the collaboration between SYSGO and Kontron offers customers an integrated technology stack, combining proven embedded hardware, real-time virtualization and advanced cybersecurity capabilities.

“Our customers increasingly expect embedded computing platforms to be backed by mature software ecosystems,” said Sébastien Vitre, Product Manager at Kontron. “By extending PikeOS support to the VX3060, we give developers a validated hardware and software platform that reduces integration effort and enables faster deployment of secure and mixed-criticality applications.”

“The availability of PikeOS on the Kontron VX3060 demonstrates the continued success of our cooperation with Kontron,” said Carsten Beck, Partner Management at SYSGO. “Together we provide customers with a European technology stack that combines rugged hardware, advanced virtualization, real-time capabilities and the security features needed for next-generation embedded systems.”

The BSP is available immediately and includes support for the main hardware interfaces needed for system boot and application development. Additional security features, including TPM-based trusted computing and Secure Boot, can be integrated according to customer requirements.

The post PikeOS adds support for the rugged Kontron VX3060 board appeared first on Open Electronics.

✅ Оголошується конкурс на заміщення посад kpi ср, 09/23/2026 - 12:00

NDA LAB KPI на Радіотехнічному факультеті kpi ср, 09/23/2026 - 11:10

RobDevBuilds has built a MOD player that reads music data printed on paper. The project uses two cameras and stepper motors for optical reading. The goal is to preserve the Amiga’s legacy on a paper medium that could last longer than optical M-Disk discs. The MOD player is not a simple experiment: it is a complete system that plays MOD files by reading paper.

The paper disc and optical reading

The paper disc contains the MOD file’s patterns printed line by line, like in a tracker program. Each voice or instrument has columns of hexadecimal numbers. The back of the disc contains the audio samples and other necessary information, such as metadata and pattern sequence, encoded in a series of barcodes similar to QR codes.

The player uses two cameras, one for each side of the disc. Stepper motors move the cameras like a linear-tracking turntable. The front is read via OCR of the modified Amiga ‘Topaz’ font. The back contains the first 1084 bytes of the MOD file in an inspired QR format created by RobDevBuilds.

The project is documented on the Hackaday.io project page, where RobDevBuilds describes the building process and technical choices. Those who want to dig deeper can check the Hackaday.io project page to see the details of how it works.

Current limits and prospects

The player currently cannot skip between patterns on the disc as quickly as some MOD files require. This is a known limitation of the project, which RobDevBuilds is addressing. Optical reading of paper is nonetheless a step forward for music file preservation.

The project proposes a method to preserve Amiga MOD files on paper, a medium that could last longer than optical M-Disk discs. Paper is durable and requires no electronics to be stored. Moreover, the printed format is readable even without the player, with OCR or by eye.

To recreate the project you need few components: two cameras, stepper motors, a control system, and a printed paper disc. The most delicate part is printing the patterns and QR codes, which must be precise for optical reading. The rest is mechanics and software, as in many maker projects.

• Two cameras to read the front and back of the disc
• Stepper motors for linear movement of the cameras
• OCR of the Amiga ‘Topaz’ font for the front
• Inspired QR format for the back with the first 1084 bytes of the MOD file
• Paper disc with patterns printed line by line

The paper MOD player is a project that combines music, retrocomputing, and printing. It is not a simple toy: it is a system that could ensure the survival of MOD files for decades, without needing specific hardware to read them. Paper is a medium that does not fear technological obsolescence.

Source: https://hackaday.io/contests

The post Paper MOD Player: The Amiga Never Dies appeared first on Open Electronics.

STMicroelectronics, a global semiconductor leader serving customers across the spectrum of electronics applications, today introduced ST SafeSense VD56GA, a 1.1 MP automotive image sensor for infrared in-cabin sensing. The sensor enables OEMs and Tier 1 suppliers to scale driver and occupant monitoring across vehicle lines while balancing performance, integration, and cost.

As driver and occupant monitoring expands across a broader range of vehicle platforms, automakers and suppliers are looking for imaging solutions that can deliver strong in-cabin performance without adding unnecessary system cost or design complexity. The VD56GA image sensor addresses this need with a compact sensor architecture, high infrared sensitivity, and embedded image-processing capabilities. This combination is designed to provide the image quality required for driver and occupant monitoring while maintaining the size and cost advantages of a compact sensor format. In many in-cabin applications, the VD56GA can help customers meet performance targets without requiring a larger and more expensive sensor.

“In-cabin sensing is moving beyond premium platforms, and carmakers need cost-effective solutions they can deploy broadly,” said Alexandre Balmefrezol, Executive Vice President and General Manager of the Imaging Sub-Group at STMicroelectronics. “With VD56GA, we focused on the system-level tradeoffs that matter most: image quality in infrared conditions, compact integration, and a cost structure that supports high-volume programs. Equally important, the sensor benefits from ST’s Integrated Device Manufacturer model, with front-end manufacturing in Crolles, France, giving customers greater supply-chain resilience, quality control, and long-term support for automotive programs.”

“As driver and occupant monitoring systems move into a broader range of vehicle platforms, OEMs are increasingly focused on solutions that can be deployed at scale, with volumes set to exceed 70 million units by 2031. Success in this market depends not only on imaging performance, but also on reducing system cost, simplifying integration, and enabling adoption across high-volume vehicle programs,” (*) underlined Anas Chalak, Market & Technology Analyst, Imaging at Yole Group.

Helping carmakers scale driver and occupant monitoring

VD56GA is designed to help reduce the cost of the complete camera module. Its imaging performance enables the use of lower-cost optics, simplified infrared illumination, less demanding optical filtering, and no external image-processing. For OEMs and Tier 1s, that can translate into a more cost-effective path to deploying driver and occupant monitoring across a broader range of vehicle programs.

The sensor leverages a new backside-illuminated pixel architecture, called ST DeepNIR, optimized for infrared imaging. With 35% higher modulation transfer function (MTF) sharpness and nearly 60% higher quantum efficiency than the previous generation, VD56GA is currently the only sensor in its class to achieve this level of combined optical resolution and infrared sensitivity, helping in challenging conditions like under display camera.

By extracting more performance from a compact 1.1 MP architecture, VD56GA helps automotive designers achieve the image quality required for advanced sensing functions, while benefiting from the integration and cost advantages of a compact sensor architecture.

Compact integration with embedded image processing

Designed for modern automotive camera modules, VD56GA is housed in a compact 3.7 mm x 3.2 mm CSP package, making it suitable for space-constrained installations and next-generation in-cabin camera designs.

The device also integrates a range of embedded image-processing functions, including mirror, crop, dark calibration, auto exposure, and piecewise-linear processing. These features remove the need for external image-processing resources, simplify camera design and speed development.

Support for both RAW and YUV output formats give OEMs and Tier 1 suppliers flexibility across different electronic architectures and software environments, making it easier to adapt the device to a broad range of implementation strategies.

Building on ST’s automotive imaging leadership

VD56GA builds on ST’s established presence in automotive imaging and in-cabin sensing. Earlier this year, ST announced shipment of its 10 millionth automotive of SafeSense by ST image sensors, reflecting broad adoption across key automotive regions, including Europe, Asia, and the United States.

Customers benefit from ST’s vertically integrated manufacturing model and secure supply chain, with front-end manufacturing of VD56GA takes place at ST’s facility in Crolles, France and packaging in Asia; reinforcing the company’s focus on industrial resilience, product quality, and supply continuity for automotive customers worldwide.

The post STMicroelectronics Introduces 1.1 MP Automotive Image Sensor for Affordable In-Cabin Sensing appeared first on ELE Times.

Emerson on 22nd of September, 2026, announced a 50% expansion of its test and measurement research and development (R&D) centre in Bengaluru. The expansion strengthens the facility’s capacity to develop AI-enabled engineering, test software and validation technologies, helping customers address increasing product and validation complexity through more intelligent and software-defined testing approaches.

The site also serves as Emerson’s NI Software Center of Excellence and is the company’s second-largest test and measurement R&D centre globally. Engineering teams in Bengaluru develop and support key test software platforms, AI-enabled capabilities, systems engineering technologies and RF test software for global customers across sectors including semiconductors, aerospace and defence, transportation, life sciences, industrial manufacturing, and research and academia. The expansion further advances the site’s transformation from a global capability centre into a global test and measurement innovation centre with global product responsibility.

“Bangalore plays an increasingly strategic role in Emerson’s global test innovation network,” said Ritu Favre, president of Emerson’s Test & Measurement business. “The site combines deep expertise in test software and AI-enabled engineering and validation technologies with close connections to rapidly evolving industries. This investment helps customers manage growing product complexity, streamline validation and bring new innovations to market faster.”

As test systems become increasingly software-driven and AI-enabled, engineers must validate more complex products within shorter development cycles. The expanded Bangalore hub will provide additional capacity to advance automated validation workflows, AI-enabled test engineering and integrated test and measurement platforms for customers worldwide.

India’s continued growth in semiconductors, electric mobility, aerospace and defense is also increasing demand for sophisticated testing and validation. Market development associated with initiatives such as the India Semiconductor Mission and the National Electric Mobility Mission Plan creates opportunities for companies developing, manufacturing and validating new technologies. Emerson is responding to these evolving market needs by expanding its test and measurement R&D capabilities and strengthening its connection to customers and engineering talent in India.

Emerson operates two test and measurement locations in Bangalore: the R&D center and a second site providing application engineering, calibration, sales and customer support. Together, the locations connect global technology development with local market expertise.

The post Emerson Expands Bengaluru Test and Measurement R&D Hub by 50% for AI-Driven Engineering appeared first on ELE Times.

Before anyone starts cursing me out for how it is made please know that I am extremely new at electronics and this is just to share something I enjoyed making, but also a cry for help. I'm aware this looks and probably is terrible, but I'd love to improve! If you have any advice or studying material I would be very grateful! Anyways. This is a virtual pet simulator, it's portable thanks to the 160mah Lipo battery with the tp4056 charging module and does little sounds and blinking lights :) submitted by /u/IamNotAnNormie [link] [comments]