Збирач потоків

Global smartphone production in second-quarter 2026 reached 275 million units, down 8% year-on-year, according to market research firm TrendForce. The decline was narrower than previously forecast, resulting in better-than-expected overall performance...

Aheesa Digital Innovations, a DLI-scheme backed fabless semiconductor company headquartered in Chennai, has signed a Memorandum of Understanding (MoU) with Optilink Networks Pvt. Ltd., onboarding the company as its packaging partner for VIHAAN-I, Aheesa’s indigenous RISC-V broadband networking System-on-Chip (SoC). The partnership marks another step towards commercialising VIHAAN-I, strengthening the pathway from indigenous chip design and silicon validation to packaging, distribution and market deployment.

The partnership brings together two complementary parts of the broadband technology ecosystem. Optilink has supported the VIHAAN-I journey through testing, validation and engineering support, with its in-house capabilities across product design, firmware development and hardware integration. Under the MoU, Optilink will support end-to-end product development from prototyping to packaging, while the companies work towards developing, qualifying and commercialising ONT/CPE products based on the VIHAAN-I chipset. The collaboration is aimed at delivering solutions that are cost-efficient and comply with Indian and global standards, while accelerating commercialisation through Optilink’s engineering and manufacturing expertise.

This further advances Aheesa’s ambition to establish itself as a semiconductor design house with a portfolio of Indian-designed chips serving both domestic and global markets. With design, silicon validation, packaging and distribution capabilities progressively coming together, Aheesa is now leaping towards commercial deployment in early 2027.

The partnership comes in a landmark year for Aheesa. VIHAAN-I achieved tape-out on Republic Day 2026, followed by Aheesa securing investment from the Tamil Nadu Infrastructure Fund Management Corporation (TNIFMC) through the Tamil Nadu Emerging Sector Seed Fund. On this Independence Day, the chip achieved first-pass silicon success on its very first attempt.

Commenting on the partnership, Sridharan Mani, Founder and CEO, Aheesa Digital Innovations, said, “Building a chip is only half the journey as the real test is turning that silicon into a product people can use. No semiconductor ecosystem thrives on the strength of one player alone; it takes multiple partners, each doing their part, to carry a design to the consumer and make this sector succeed. With Optilink joining us for packaging, VIHAAN-I takes a step closer to that reality. We have spent years estabilishing that world-class semiconductor design can happen in India. Now with Optilink, we’re building the pathway to take it from systems to scale.”

Devchand Haria, Managing Director, Optilink Networks Pvt. Ltd said, “At Optilink, we’ve spent close to two decades building the networking hardware that connects Indian homes from fiber access to broadband CPE. Partnering with Aheesa for VIHAAN-I lets us bring that same experience to an Indian-designed chip, taking it from silicon to the products that will actually sit in Indian households. This is exactly the kind of collaboration our sector needs, that is Indian design and Indian manufacturing expertise working together to put homegrown silicon inside the devices people use every day.”

Founded in 2005 and headquartered in Mumbai, Optilink Networks Pvt. Ltd. is an Indian Original Equipment Manufacturer (OEM) that designs, manufactures and distributes IP-based networking hardware, Fiber-to-the-Home (FTTH) solutions and IP Television (IPTV) technologies. Serving ISPs, telecom operators, cable and MSO networks, enterprises and government customers, Optilink has built a strong B2B presence through its channel partners, distributors and system integrators across India.

Aheesa’s work spans indigenous semiconductor and networking technologies across telecom, broadband, cybersecurity and edge computing. This partnership now reflects the wider momentum in India’s semiconductor design ecosystem, now scaling under Semicon 2.0 — the ₹1,27,500 crore programme approved in July 2026 to build a globally competitive supply chain across chip design, manufacturing, packaging and materials. As indigenous designs move from validation towards commercial adoption, it is partnerships like this, pairing Indian chip design with the reach to deploy it, that will help define how homegrown silicon scales.

The post From Silicon to Scale: Aheesa Signs Packaging MoU with Optilink Networks appeared first on ELE Times.

Infineon Technologies AG introduces the TDA235E5 and TDA235E0, a dual-phase smart power stage family designed to meet the rapidly growing power density requirements of next-generation AI accelerators and vertical power delivery modules. Integrating Infineon’s OptiMOS 6 MOSFETs and a dual-phase driver IC in a compact 6 x 6 x 0.8 mm³ package, the new family delivers benchmark power density exceeding 2 A/mm², setting a new reference point for power stage performance in high current AI processor applications. As hyperscalers and datacenter operators continue to scale AI infrastructure, the demand for power delivery solutions that combine higher current capability with shrinking physical footprints is becoming a critical bottleneck.

“Infineon customers are designing AI systems that will define the next decade of computing infrastructure,” said Rakesh Renganathan, Vice President Power ICs at Infineon. “The TDA235E5 and TDA235E0 power stages give designers the power density, thermal performance, and design flexibility to move faster and build with confidence, backed by Infineon’s full AI server power delivery ecosystem.”

The two devices support up to 300 A peak current and 120 A total design current (TDC), making them well suited for next generation AI xPU accelerators as well as conventional server CPUs in datacenter environments. Both lateral and vertical power delivery configurations are supported, providing the design flexibility required as the industry transitions toward vertical power module architectures in advanced AI processor packages. Superior thermal impedance from junction to top side enables efficient liquid cooling integration, a characteristic that is increasingly important as power levels per processor socket continue to rise and traditional air-cooled thermal budgets are exhausted. Combined with Infineon’s digital multiphase controllers, the power stages support flexible, scalable multi-rail architectures that reduce time to deployment in fast-evolving AI server platforms.

The TDA235E5 and TDA235E0 integrate into Infineon’s end-to-end AI server power delivery ecosystem, spanning the full power chain from grid interface to processor core rails. By combining the complementary strengths of silicon, silicon carbide, and gallium nitride, Infineon provides datacenter customers with a proven, scalable path to the highest efficiency, robustness, and power density available for AI-optimized infrastructure. The datacenter power delivery market is one of the semiconductor industry’s fastest-growing demand segments, driving Infineon’s continued product investment to serve this opportunity at the component level where power density requirements are most critical. 

The post Infineon Sets New Power Benchmark for AI accelerators and Vertical Power Delivery with 2 A/mm² Dual-Phase Smart Power Stages appeared first on ELE Times.

Hello everyone, Six months ago I set upon the journey of making my own AWG, with frequencies of up to 1MHz. 6 months later I present you my very own awg. Full Repo I set out to build my own function generator after finding commercial units both too expensive and more general-purpose than I needed, and it looked like a good excuse to work through analog synthesis, filtering, and mixed-signal PCB design end to end. The sine path is an 8-bit R-2R ladder driven by a Raspberry Pi Pico W (overclocked to 225MHz) generating samples via a DDS phase accumulator; the square wave comes from the same chip’s PIO hardware. I started off with a breadboard and tried sallen key filters for noise but they amplified the noise aswell. I also tried discrete components for the sauare wave before replacing it outright with a TC4427 gate driver. The sine chain settled on a 5th-order doubly-terminated LC Butterworth reconstruction filter, replacing an earlier cascaded-RC design that was capping amplitude, followed by LM318 gain and buffer stages. Three PCBs went out; two came back dead. V1.0 was completely non-functional because a BOM matcher substituted 2.21Ω resistors for 2.21kΩ across the entire R-2R ladder. V1.1 moved to an all-SMD board with the LC Butterworth filter but came up dead silent; testing the square path first (it worked) narrowed the fault to the sine chain, which traced to a KiCad-to-Altium migration that had silently shorted two LM318 input pins onto one net. V1.2 fixed that short, soldered the Pico directly to the board in place of a socket, and came up working: sine characterised from 0Hz to 1MHz and square to 2MHz, with AM, FM, and noise modes added on top in firmware, all controllable from a Python desktop UI over USB. Looking at it now, a redesign with some improvements (better op-amps and also fewer) would be better but I also want to work on other stuff, so for now this is it. To be clear, I made every schematic and protoype and thought up everything myself. As such this may not be the best way to do this. My main goal, was experience after all. full webpage submitted by /u/S4vDs [link] [comments]

In Yole Group’s White Paper ‘Photonics at the Speed of AI’ (part of the firm’s AI White Papers Collection), it argues that optical transceivers — once a supporting piece of data-center infrastructure — have become a system-level requirement for scaling artificial intelligence...

Заслужений професор КПІ Юрій Лукач. До 100-річчя від дня народження Інформація КП пн, 09/07/2026 - 17:00

Here is my project repo https://github.com/fredriknk/chatgpt_astra_test2 I saw the Chatgpt Astra kicad demo, and wanted to try it out myself and im pretty damn impressed...! I only have a openai 20$/mo plus subscription so i had to use the lowest setting, but i got this design in 3 hours with 5 prompts in total and ate up my 3 usage resets. My only contributions to the design was to create the empty kicad template project, and the initial prompt: "Lets test a esp32 design with a 24v input voltage which can output and read 4-20ma signals. Lets start planning!" All design choices, component choices, design, schematics and, layout and documentation was done by the chatgpt astra 6 low through codex cli. So final verdict? Its actually pretty damn usable.... Like, its not perfect by any means. some examples: There are a quite a few routing decisions i dont agree with, especially the USB routing and unneccesarry internal layer routing. The schematics are very hard to read as it doesnt use GND/Power symbols, and only use global labels instead of wires. But as far as i can tell from the schematic, this is a working design and i do agree with a lot of its component choices. I feel it is pretty much where AI coding was in around 2024 (on its lowest setting), so im wondering where this will be in a year or two..! submitted by /u/Gjfiyfyifiyf [link] [comments]

Synopsys, COEP Technological University and CADFEM India have setup the “Ansys Digital Twin & Multiphysics Lab” on the COEP campus, Pune to support advanced engineering education, research, and strengthen the industry-academia partnerships. This program holds huge significance in an ecosystem for automotive and electrical vehicle industry which utilizes the technologies for vehicle system’s product development and validation processes.

The laboratory was established as a part of Memorandum of Understanding (MoU) signed during the 2026 Symposium. It will provide students, researchers, and faculty members access to Ansys digital-twin technologies and advanced high-end multiphysics simulation tool that have been acquired by Synopsis. The lab will host industry training and certification, technical seminars and research.

Multiphysics simulation has a potential role in analysis of different physics domains in development process of the vehicle or component within EV industry. Engineers are able to investigate on battery thermals, electric motor efficiencies, power electronics functionality, structural strength, electromagnetic phenomenon and thermal management by simulation work-flows prior build physical prototype. Digital-twin methodology can create bridge between physics-based models and actual data taken from sensors and operation data so to monitor and predict system behaviours.

The post Synopsys, COEP Tech University and CADFEM Establish Digital Twin and Multiphysics Lab in Pune appeared first on ELE Times.

«Драйвова осінь» 2026 kpi пн, 09/07/2026 - 14:42

​India’s rapidly growing EV industry faces a capability gap in developing and producing high-technology components that can meet modern technology demands because about 80% of component manufacturers are small businesses built for traditional mechanical parts rather than advanced electronics and software. The capability gap involves areas such as batteries, power electronics, embedded software, advanced electronics, and system integration.

India is shifting more towards electric vehicles as its automotive supply chain expands. Original Equipment Manufacturer (OEM) sourcing of auto-components is expected to increase by 16% to 6.6 lakh crore by FY26 against components’ exports valued at around 2.1 lakh crore. However, import charges rise at a greater rate, with China covering about 36% of all the auto component imports India uses.

The capability challenge is particularly significant for small and medium-scale enterprises (MSMEs), which constitute almost 80% of Indian auto-parts producers. Though electronics, embedded software, advanced engineering, and system integration are key factors for competitiveness, a lesser than half the small and medium scale enterprises lack the capabilities required to develop and manufacture components as per the modern industry demands. Embedded software capability is estimated to be found in only 10% of domestic suppliers, whereas system integration, and product-development capabilities are around 14%.

The post India’s EV Component Industry Faces Technology Capability Gap as Imports Rise appeared first on ELE Times.

There is growing demand from Indian electronics manufacturers for alternatives to expensive copper such as aluminium, and a more widespread adoption of other cheaper materials due to increased cost pressure and lower profit margins as copper prices rocket. Companies are also encouraged to boost domestic procurement and re-engineer product and component designs to reduce dependence on these raw materials.

Copper is widely used across the electronics industry because of its electrical conductivity, robustness, and reliability. Due to recent surge in copper prices has increased manufacturing costs, creating challenges for companies especially those already facing a competitive market that might not be able to fully pass the rising input costs to consumers.

A recent report stated that the copper price has risen by around 45%, thereby decreasing manufacturers’ profit. Because of this, some Indian electronics manufacturers are now considering aluminium as an alternative to copper in applications whether it’s electrical, mechanical, and thermal properties are highly required to meet product specifications. Aluminium is being considered as a substitute of copper because it is lighter and cheaper.

The product design needs modification when using aluminium as a substitute to achieve performance comparable to that of copper. Using aluminium as a substitute for copper is not easy to practically implemented across all electronics applications. It is important for manufacturers to consider properties like electrical conductivity, thermal performance, resistance to corrosion, joining techniques, and product lifespan before adopting alternate materials.

The post Indian Electronics Makers Turn to Aluminium as Rising Copper Costs Squeeze Margins appeared first on ELE Times.

Pi-Ener-lite is a compact UPS for Raspberry Pi Zero with a CW2015 fuel gauge, DS1307 RTC, and 18650 battery support, all connected via spring-loaded pogo pins.

Electronics will make up 50% to 55% of a car’s total manufacturing cost by 2030, growing significantly from 30% to 35% in 2020, creating a growth opportunity for Indian automotive component manufacturers in high-value electronic systems, according to a recent report by the Boston Consulting Group (BCG) and the Automotive Component Manufacturers Association of India (ACMA).

As per the report, increasing adoption of ADAS, infotainment, connected vehicle technologies, sensors, and ECUs in both ICE and EV vehicles are driving higher content of electronics.

However, India’s electrical and electronics segment was expected to be around 12% of domestic component supply in FY2025, highlighting significant scope for localization. Indian suppliers could capture a share of this emerging value pool, while also developing new capabilities in automotive electronics and other associated technologies.

Some technologies such as sensors, Electronic Control Units (ECUs), power electronics, connectivity systems, and Battery Management Systems (BMS) are gaining more consumer attraction as cars evolve into software-defined and highly connected products.

To capture this localisation opportunity, Indian component manufacturers need to move beyond traditional mechanical and manufacturing capabilities. They need to invest more in engineering, research and development, electronics design, software, testing, and technology development to compete in advanced technology that can be easily adopted by consumer mature automotive supply chains.

The post ​Automotive Electronics Could Account for 50–55% of Car Cost by 2030, Enhancing Localisation Opportunities appeared first on ELE Times.

The defence minister, Rajnath Singh, has authorized the transfer of technologies, including conventional missile systems developed by DRDO, to eligible Indian defence manufacturers to set up indigenous production. In this process, mature and proven missile technologies are being moved from development to industrial-level mass production. The manufacturers will need to have applicable technical qualifications, certification levels, and regulatory requirements in place.

The scope for wider participation in the missile production chain would occur to some extent also due to technology transfer, where state-owned manufacturers, private firms, MSMEs & specialized manufacturers could develop expertise and participate in components and sub-components, electronics, propellants, guidance systems and associated mechanisms, launch systems and integration with greater depth.

There is scope for increased industrial involvement, which could bring about a higher level of domestic production and value addition, thereby lowering defence imports reliance. Increased industrial involvement could enable DRDO labs to focus more on research in newer and advanced technologies, while existing and developed systems may be produced industrially. A drastic policy shift, as it marks a change in treating private Indian companies as long-term technology and production partners in defence manufacturing. Its success hinges on technological absorption capability, quality testing procedures, test facilities, and orders.

The post India Approves Industry Production of DRDO-Developed Missile Systems appeared first on ELE Times.

The Indian Navy commissioned INS NIPUN, the second ‘Nistar’ class Diving Support Vessel (DSV), at the Naval Dockyard. Mumbai on 31st August 2026. This is considered a great boon to our Navy’s underwater diving, underwater intervention, and submarine rescue capabilities. The first-ever indigenously developed and built vessel designed and built at Hindustan Shipyard Ltd. Visakhapatnam has sophisticated underwater-diving facilities for personnel, capable of submergence in adverse environments and pressures of the high seas. It can perform tasks such as inspection, maintenance, salvage, among others while it stays at sea, far away from shore for long periods.

It will provide increased capabilities in support of submarine-rescue operations- a vital skill that will protect crews and response personnel in submerged situations. Vessels like this are used to embark divers, remote systems and specialist rescue gear to operate as afloat platforms.

Induction of INS Nipun showcases the growing Indian capacity in indigenous design and manufacture of complex naval platforms, and it further bolsters the overall defence-shipbuilding industry in India through the contribution of Indian shipyards, equipment providers & supporting industries. She makes inroads into the Navy at a time when underwater surveillance, operation of submarines, and security of sea-based infrastructure are assuming prime importance.

The post Indian Navy Commissions Indigenous Diving Support Vessel INS Nipun appeared first on ELE Times.

Garden Reach Shipbuilders & Engineers has recently signed two international contracts to boost its digital shipbuilding and marine-engineering activities. Both contracts were signed on September 2, 2026, at SMM, the maritime trade fair that was held in Hamburg, Germany. The signing was completed when the Indian defence shipbuilder and the Norway-based classification and assurance organization DNV signed their first Memorandum of Understanding. The partnership is said to seek digital shipbuilding and development in areas of green technologies, training, and leading technical marine engineering.

GRSE further signed its second accord with the Netherlands-based Damen Technical Cooperation to provide technical and commercial cooperation for the design and construction of high-end dredges in India, reinforcing an existing relationship and boosting India’s capability to manufacture specific vessel types in the future. Digital shipbuilding encompasses the use of an interconnected design platform, data-centric engineering, and 3-D models for developing, constructing, and maintaining a vessel throughout its life cycle.

This process helps identify design challenges early in development and allows predicting maintenance needs on vessel parts. These joint ventures may facilitate GRSE in upgrading its shipyard, attaining foreign technology, and thereby increasing opportunities to participate in overseas tenders, along with augmenting India’s indigenous capabilities for construction of advanced warships and commercial ships.

The post GRSE Expands Digital Shipbuilding Through New International Partnerships appeared first on ELE Times.

The 16th edition of Aero India, the aerospace and defence manufacturing exhibition, is being organized by the Ministry of Defence from 8-12 February, 2027 at the Air Force Station Yelahanka in Bengaluru. Military officials, defence policy planners and policy formers, defence technology experts, as well as foreign investors are said to visit the show; the exhibition will aim to exhibit combat aircraft, helicopters, unmanned aerial systems, avionics, propulsion systems, electronic warfare and air defence technologies. The defence show of Aero India is managed by the Department of Defence Production. A flying display along with a technology exhibition will also be organized.

The event will also offer a platform for Indian defence manufacturing companies, start-ups, and MSMEs for forming manufacturing alliances and becoming an integral part of the global supply chains. The business meetings are anticipated to deliberate on technology transfer, co-development, co-production and defence exports. The announcement assumes significance at a time when India aims to give impetus to aerospace manufacturing indigenization and cut reliance on imports for its defence equipment needs. Aero India 2027 will hence not merely be an Air Show but a catalyst in enabling India’s Make in India, Make for the World defence manufacturing story.

The post Aero India 2027 Announced for February 8–12 in Bengaluru appeared first on ELE Times.

The 66th Annual Convention of The Society of Indian Automobile Manufacturers (SIAM) was recently held in New Delhi. Addressing the event, Indian PM Narendra Modi shared a special message at the convention. He stated, “India’s automobile industry is well placed to further expand its global presence as the country’s mobility ecosystem undergoes a fundamental transformation. Continued innovation, pursuit of excellence and a bold pathway towards Viksit Bharat will unlock transformative opportunities for the sector and accelerate the journey towards a faster, greener and self-reliant future.”

Chief Guest Nitin Gadkari, Hon’ble Union Minister of Road Transport & Highways, Government of India, mentioned, “With quality, innovation, research and competitive pricing, India has the potential to become the largest automobile industry in the world, with the sector playing a key role in Viksit Bharat. We should also encourage the expansion of driver training centres, vehicle fitness centres and vehicle scrapping centres, which can contribute to the economy as well.”

In a video message, Guest of Honour H. D. Kumaraswamy, Union Minister of Heavy Industries and Steel, Government of India, said, “The Indian automobile industry is strengthening its domestic capabilities and advancing vehicle technologies, creating a strong foundation to transform the local market into a global hub. The sector will continue to grow as a cleaner, more inclusive and globally competitive industry, contributing meaningfully to the Viksit Bharat 2047 goal.”

Riding on Indigenous Innovation at the SIAM Annual Convention

Sharing his views, Shailesh Chandra, President, SIAM and Managing Director & CEO, Tata Motors Passenger Vehicle Ltd. added, “The Indian Automobile Industry continues to play a defining role in shaping India’s Amrit Kaal, contributing significantly to realising the vision of a Viksit Bharat by 2047. Alongside this progress, India has made significant strides in aligning with global and national priorities of sustainability, decarbonisation, and safety.”

Addressing the automobile fraternity, Shenu Agarwal, Vice President, SIAM and Managing Director & CEO, Ashok Leyland Ltd., highlighted, “The Indian automobile industry has demonstrated remarkable resilience, and India can simultaneously become a large mobility market, a global manufacturing hub and a technology leader. But the next phase of this journey will require looking beyond growth alone, with sustainability and resilience going hand in hand.”

The SIAM Annual Convention session concluded with a shared commitment to building resilience in sustainable mobility, harnessing technology to strengthen global competitiveness and advancing India’s journey towards Viksit Bharat.

The post The 66th SIAM Annual Convention: PM Modi Wants Auto Industry to Augment ‘Viksit Bharat’ appeared first on ELE Times.

Modelithics Inc of Tampa, FL, USA, which provides RF and microwave simulation models for electronic design automation (EDA), has released the Modelithics Qorvo GaN Library v26.5.11. For more than 12 years, the Modelithics Qorvo GaN Library has provided RF and microwave engineers with up-to-date, highly accurate, measurement-based nonlinear models that accelerate design cycles, improve first-pass success and reduce development costs...