Збирач потоків

The generation of single sideband (SSB) signals first came to my attention via ham radio back in the early 1960s. My call was then and still is WA2IBH. The best phonetic I had for that call sign was “WA2 I’ve Been Had” but that’s merely a side note.

Most voice communication through ham radio back then was done by amplitude modulation or AM signals. When you heard someone on the air with an AM signal, the voice quality was usually pretty good. As I recall, the E.F. Johnson Viking Ranger transmitter was thought of as having the very best audio quality. Of course, when you had many signals on the air at the same time with different carrier frequencies, heterodyne squeals were an unpleasant fact of life which often degraded the intelligibility of the person whom you wanted to hear.

Enter into service, SSB.

To demodulate an SSB signal, a receiver needs to reinsert a carrier signal to replace the carrier signal that the sender is NOT transmitting. The resultant sound is intelligible, but the idea of audio quality is a lost cause. A human voice in a demodulated SSB transmission is difficult to linguistically describe. Perhaps it might be thought of as listening to a cross between Donald Duck and Mickey Mouse. A big improvement, though, is that there are no heterodyne squeals. All you hear from multiple signals coming through at the same time are distorted but intelligible voices. This is a MAJOR improvement. However, the acceptance of SSB in ham radio was not universally enthusiastic.

Short-wave receivers produced up through the 1950s would have automatic gain control (AGC) built in, but the response times of the AGC function were not well suited to SSB service. Modern AGC designs have “fast attack and slow decay,” meaning that the receiver gain is reduced very quickly upon arrival of an overly strong signal and that receiver gain is subsequently restored slowly. Since SSB signals have amplitudes that are “spiky,” meaning high peak amplitude to average amplitude ratios, the AGC circuits of these older receivers could be “pumped” by SSB signals, even if the receiver were not tuned exactly to the SSB signal’s exact frequency. Reception of pretty much anything else could and often was very badly affected. Modern AGC control is much better.

Many non-SSB users confronted by AGC pumping incorrectly assumed that SSB users were guilty of “splatter,” the descriptive term for the spectral spread of an overmodulated (> 100%) AM transmission. Derogatory terms such as “splatter sideband” and “silly sideband” were in common use.

Today, ham radio voice communication is dominated by SSB.

John Dunn is an electronics consultant, and a graduate of The Polytechnic Institute of Brooklyn (BSEE) and of New York University (MSEE).

Related Content

• Single sideband generation
• SSB modulator covers HF band
• Ham radio in the 21st century
• Amateur and ham radio

The post Single sideband generation, Part 2 appeared first on EDN.

With the rapid growth of AI data centers, the increasing adoption of electric vehicles, and the ongoing trends in global digitalization and reindustrialization, global electricity demand is expected to surge...

The STGAP4S galvanically isolated automotive gate driver from ST connects to an external MOSFET-based push-pull buffer to scale gate current capability. This architecture enables control of inverters with varying power ratings, including high-power designs with multiple parallel power switches.

The STGAP4S can deliver gate drive currents in the tens of amperes using small external MOSFETs and handles operating voltages up to 1200 V. It integrates an ADC, a flyback controller, programmable protections, and comprehensive diagnostics. The device is AEC-Q100 and ISO 26262 qualified, supporting system designs up to ASIL D.

Advanced diagnostics in the STGAP4S include self-checks for connections, gate-drive voltages, and internal circuitry such as desaturation and overcurrent detection. Faults are reported via SPI and two diagnostic pins. Protections like active Miller clamping, UVLO, OVLO, desaturation, overcurrent, and over-temperature detection ensure robust designs. Configurable thresholds, deadtime, and deglitch filters—programmable through SPI—enable flexibility while meeting ISO 26262 up to ASIL D.

Now in production, the STGAP4S is available in a SO-36W wide-body DIP, priced from $4.66 each in lots of 1000 units.

STGAP4S product page

STMicroelectronics

The post Gate driver enables flexible EV inverter design appeared first on EDN.

In booth 657 (Hall 7) at the Power Electronics, Intelligent Motion, Renewable Energy and Energy Management (PCIM 2025) Expo & Conference in Nuremberg, Germany (6–8 May), fabless firm Cambridge GaN Devices Ltd (CGD) — which was spun out of the University of Cambridge in 2016 to design, develop and commercialize power transistors and ICs that use GaN-on-silicon substrates — is demonstrating how gallium nitride (GaN) technology is delivering improved performance in higher-power applications...

submitted by /u/juladuni69 [link] [comments]

Навчальний практикум-тренінг «Монтаж теплових насосів» у рамках проєкту з GIZ kpi пт, 05/02/2025 - 16:26

Gallium nitride (GaN) power IC and silicon carbide (SiC) technology firm Navitas Semiconductor Corp of Torrance, CA, USA has announced a new family of GaNSense Motor Drive ICs targeting home appliances and industrial drives up to 600W...

Supply chain solutions firm Partstat of Winter Springs, FL, USA (which specializes in semiconductor storage and inventory ownership) has announced a strategic partnership with WIN Semiconductors Corp of Taoyuan City, Taiwan — which provides pure-play gallium arsenide (GaAs) and gallium nitride (GaN) wafer foundry services for the wireless, infrastructure and networking markets. The collaboration aims to provide comprehensive long-term storage solutions for semiconductors, including die and wafer banking...

In the ever-dynamic and fast-moving world of semiconductors, why do some old transistors like 2N3904 keep on going for decades? Bill Schweber takes a closer look at this remarkable premise while analyzing why design engineers still prefer these tried-and-tested devices to reduce risk, cost, and sourcing hassles.

Read the full story at EDN’s sister publication, Planet Analog.

Related Content

• Goodbye, FR-4, we’re going to miss you
• Just give me a decent data sheet, please
• Can Analog’s Reality Chill Today’s Mega-Hype?
• Old vs. New Transistor Radio Exemplifies Advances

The post Why is the 2N3904 transistor still up after 60 years? appeared first on EDN.

Sixteen planar Schottky diodes for automotive and industrial use are now available from Nexperia in compact CFP2-HP packages. These clip-bonded FlatPower (CFP) packages offer a smaller, high-performance alternative to legacy SMA, SMB, and SMC packages, delivering improved heat dissipation while maintaining a compact 3.45 mm² footprint—particularly in space-constrained automotive designs.

This portfolio extension includes eight industrial-grade parts, such as the PMEG6010EXD, and eight AEC-Q101 qualified automotive-grade parts, such as the PMEG4010EXD-Q. The Schottky diodes provide reverse voltages ranging from 20 V to 60 V and average forward currents of 1 A and 2 A. 

Rated for junction temperatures up to 175°C, the CFP2-HP package combines an exposed heatsink and copper clip to enhance thermal performance in a small 2.65×1.3×0.68-mm (including leads) form factor. An optimized lead design ensures consistent solder joints suitable for automated optical inspection.

To learn more about Nexperia’s planar Schottky diodes in CFP2-HP packaging, click here.

Nexperia

The post Nexperia shrinks Schottky footprint with CFP2-HP appeared first on EDN.

Infineon’s 750-V CoolSiC G2 MOSFETs enhance system efficiency and power density in automotive and industrial power conversion. The second-generation G2 technology provides typical on-resistance values up to 60 mΩ, supporting a wide range of applications such as onboard chargers, DC/DC converters, xEV auxiliaries, and solar inverters. A best-in-class RDS(on) of 4 mΩ is available in the top-side cooled Q-DPAK package, which delivers strong thermal performance and reliability.

G2 technology also offers low RDS(on) × Qoss and RDS(on) × Qfr values, reducing switching losses in both hard- and soft-switching topologies, with strong efficiency in hard-switching use cases. Lower gate charge enables faster switching and reduces gate drive losses, improving performance in high-frequency applications.

The 750-V MOSFETs provide a high VGS(th) of 4.5 V and a low QGD/QGS ratio, enhancing protection against parasitic turn-on. They also support gate voltages down to -11 V, offering extended design margins and improved compatibility with other devices.

Samples of the 750-V CoolSiC G2 MOSFETs in Q-DPAK packages, with RDS(on) values of 4 mΩ, 7 mΩ, 16 mΩ, 25 mΩ, and 60 mΩ, are now available for order. For more information, click here.

Infineon Technologies 

The post SiC MOSFETs trim on-resistance and gate losses appeared first on EDN.

Murata has begun mass production of the Type 2FY combo module featuring 2.4-GHz, 5-GHz, and 6-GHz Wi-Fi 6E and Bluetooth LE 5.4. Built on Infineon’s CYW55513 combo chipset, the Type 2FY dual-radio module combines a compact form factor with low power consumption to suit space-constrained IoT devices.

The Bluetooth subsystem of the Type 2FY wireless module—supporting BR, EDR, and LE—enables LE Audio, Advanced Audio Distribution Profile (A2DP), and Hands-Free Profile (HFP) for high-quality audio streaming. It delivers PHY data rates up to 3 Mbps for Bluetooth and 2 Mbps for Bluetooth LE. The WLAN subsystem complies with 802.11a/b/g/n/ac/ax standards and achieves PHY data rates up to 143 Mbps. It uses an SDIO 3.0 interface, while the Bluetooth section connects via a high-speed 4-wire UART and PCM for audio data.

Pin-compatible with Murata’s Type 1MW (CYW43455), the Type 2FY offers a drop-in upgrade that requires no hardware redesign. Its compact 7.9×7.3×1.1-mm form factor is made possible by Murata’s proprietary packaging technology. Although based on the Wi-Fi 6E standard, the module limits bandwidth to 20 MHz to reduce cost.

To learn more about the Type 2FY wireless combo module, click here.

Murata Manufacturing  

The post Module combines triband Wi-Fi 6E with BLE appeared first on EDN.

Taiwan Semiconductor offers two series of high-voltage rectifiers, both manufactured to AEC-Q101 standards for reliable automotive performance. The fast-recovery HS1Q series provides a repetitive peak reverse voltage of 1200 V, a forward current of 1 A, and a reverse recovery time of 75 ns. The standard-recovery SxY series includes 1600-V rectifiers with forward currents of 1 A (S1Y) and 2 A (S2Y). Both series are also available in commercial-grade versions.

These devices operate within a junction temperature range of -40°C to +175°C and feature a low forward voltage drop and high surge current capability. They are well-suited for bootstrap, freewheeling, and desaturation functions in IGBT, MOSFET, and wide-bandgap gate drivers, particularly in electric vehicles and high-voltage battery systems.

The HS1Q and SxY rectifiers are available from distributors, including Mouser, Arrow Electronics, and DigiKey. Lead time for production quantities is 8 to 14 weeks. Production part approval process (PPAP) documentation is available.

HS1Q product page

S1Y product page  

S2Y product page  

Taiwan Semiconductor 

The post Rectifiers meet automotive quality standards appeared first on EDN.

The EDA trio—Cadence, Siemens EDA, and Synopsys—was prominent at the Intel Foundry Direct Connect 2025 while lining up AI-driven analog and digital design flows for Intel’s 18A process node. The offerings also included IPs ranging from SerDes to DDR5 to Universal Chiplet Interconnect Express (UCIe).

Next, these EDA outfits inked advanced packaging partnerships by offering workflows for Intel Foundry’s Embedded Multi-die Interconnect Bridge-T (EMIB-T) technology, which combines the benefits of EMIB 2.5D and Foveros 3D packaging technologies for high interconnect densities at die sizes beyond the reticle limit.

Let’s start with EDA flows.

Cadence has certified its RTL-to-GDS flow for 18A process design kit (PDK), which includes the Cerebrus Intelligent Chip Explorer, Genus Synthesis solution, Innovus Implementation System, Quantus Extraction solution, Quantus Field Solver, Tempus Timing solution, and Pegasus Verification System.

Siemens EDA has certified its Calibre nmPlatform sign-off tool and Solido SPICE and Analog FastSPICE (AFS) software tools for 18A production PDK. Likewise, the qualification of Calibre nmPlatform and Solido Simulation Suite offerings for the Intel 18A-P process node is now underway. These EDA tools are also part of the Intel 14A-E process definition and early runsets already available.

Figure 1 Synopsys unveiled an EDA and IP collaboration roadmap with Intel Foundry at the event.

IP and advanced packaging liaison

Cadence has announced a broad range of IPs for the 18A process node. That includes 112G extended long-reach SerDes, 64G MP PHY for PCIe 6.0, CXL 3.0, and 56G Ethernet, LPDDR5X/5 – 8533 Mbps with multi-standard support, and UCIe 1.0 16G for advanced packaging.

Besides IP offerings, Cadence is partnering with Intel Foundry to develop an advanced packaging workflow to leverage EMIB-T technology. This workflow will streamline the integration of complex multi-chiplet architectures while complying with standards.

Figure 2 Cadence is certifying EDA toolsets and IPs for Intel’s 18A process node.

Meanwhile, Siemens EDA has announced the certification of a reference workflow for EMIB-T technology using through silicon via (TSV) technique. It’s driven by the company’s Innovator3D IC solution, which provides a consolidated cockpit for constructing a digital twin. It also features a unified data model for design planning, prototyping, and predictive analysis of complete package assembly.

Synopsys is also employing its 3DIC Compiler to facilitate a reference workflow that enables efficient EMIB-T designs with early bump and TSV planning and optimization. It also features automated UCIe and HBM routing for high quality of results and fast 3D heterogeneous integration. Here, the 3DIC Compiler facilitates feasibility and partitioning, prototyping and floorplanning, and multiphysics signoff in a single environment.

Related Content

• Intel: Gelsinger’s foundry gamble enters crunch
• Intel Financial Risks, Layoffs, Foundry Ambitions
• Intel 18A Advanced Packaging is Key to Tech Leadership
• Partners Applaud Intel Foundry’s Wider Ecosystem Approach
• Intel comes down to earth after CPUs and foundry business review

The post EDA powerhouses align offerings with Intel’s 18A node appeared first on EDN.

Sensing of current going to a load is a critical and often mandatory requirement in many designs. While there are many contact and non-contact ways to accomplish this sensing, such as using Hall-effect devices, current transformers (for AC only, of course), Rogowski coils, fluxgate sensors, among others, the in-line resistor is among the most popular due to its small size, low cost, and overall convenience. The concept is simple: measure the voltage across an accurate, known resistor, and use Ohm’s law to determine the current; this can be done with analog circuitry or digital computation.

Terminology

A quick terminology note: this inline resistor is almost always called a “shunt” resistor in application notes and data sheets, but that is a misnomer. The reason is that to “shunt” means to divert some of the current around the point being measured, and that was done is some current-measurement arrangements, especially for power in the pre-electronics era. However, the sensor resistor here is in series, so all the current flows through it.

This misleading terminology has become such an embedded part of our established verbiage that I won’t try to fight that battle. It’s similar to the constant misuse of the word “ground” for circuits which have absolutely no physical of figurative connection to Earth ground, and where “common” would be a more accurate and less confusing term.

Current sense topology

Using a sense resistor is only the first step in the current-sensing decision. The other part is topology: whether to use high-side sensing with a resistor placed between the source and the load, or low-side sensing where it is placed between the load and ground return, Figure 1.

Figure 1 The relative position of the sense resistor and the load between the power rail and ground are the only topological difference distinguishing high-side sensing (left) from low-side sensing (right), but there are significant circuit and system implementations. Source: Microchip

Tradeoffs

As with so many engineering situations, designers must also consider the tradeoffs when choosing between low-side and high-side current sensing. The relative pros and cons of each topology are a good example of the ongoing challenge of engineering tradeoffs at the intersection of power-related and classic analog circuitry.

With the high-side approach, there’s good news, at least at first glance:

• The load is grounded (a major advantage and often a requirement).
• The load is not energized even if there is a short circuit at the power connection.
• The high current that flows if the load is shorted is easily detected.

On the other hand, the high-side downsides are not trivial:

• The common-mode voltage across the sense resistor can be very high (even dangerous) and requires special consideration; it may even need galvanic isolation.
• The sensed voltage across the resistor needs to be level-shifted down to the system operating voltage to be measured and used.
• In general, increased circuit complexity and cost.

Low-side sensing has its own attributes, again starting with its positive attributes:

• The voltage across the resistor is ground referenced, a major benefit.
• The common-mode voltage is low.
• It’s fairly easy to design into the circuit with a single supply.

But with the good news, there are unavoidable low-side complications:

• The load is no longer grounded, which can have serious system-level implications.
• The load can be activated by accidental short to ground.
• The sensing arrangement can cause ground loops.
• A high load current due to a short circuit will not be detected.

Designers’ choice

In looking at the analog side of schematic diagrams over the past few years (I know, it’s an unusual “hobby”), as well as seeing what others were doing in their design discussions, I assumed that most designers were opting for high-side sensing. They were doing so despite the challenges it brings with respect to common-mode voltage, possible need for galvanic (ohmic) isolation, and other issues, especially because they wanted to keep the load grounded. Many vendors offer appropriate amplifiers, analog and digital isolation options, and subsystems so the “pain” of using high-sigh sensing is greatly reduced, and the benefits it offers were easily retained.

But maybe I am mistaken about designers’ choices. Perhaps the reason that there has been so much discussion of high-side sensing is not necessarily that it is more popular, but because it is more complicated and so needs more explanation of its details. In other words, was I confused about the cause of all this attention with the effect?

My low-side misconception

What made re-think the presumed absence of low-side sensing was the recent release of the TSC1801,  a new amplifier from ST Microelectronics specially targeting low-side sensing. It features high accuracy (0.5%), high bandwidth (2.1 MHz), has a fixed gain of 20 V/V, and is suitable for bidirectional sensing, Figure 2. The accuracy and tracking of the two internal input resistors is critical to performance in this application category.

Figure 2 The block diagram of the TSC1801 low-side current-sensing amplifier is conventional, but it’s the performance that counts; the matching and tracking of the 1-kΩ input-resistor pair is critical. Source: ST Microelectronics

It made me wonder: if only few designers are choosing low-side sensing, and it since it is relatively easy to implement, why would a part like this be needed when there are already many suitable amplifiers available?

The device also challenged another one of my apparent misconceptions: that automotive designs won’t use low-side sensing because their loads must be grounded. If that’s the case, why does ST explicitly call out automotive applications in the part’s collateral (I know, application talk is easy to do) but also provide this part with the automotive AEC-Q100 qualification? Unlike marketing “talk,” that’s a relatively costly step in design and production.

So, my probably unanswerable question is this: what’s the split between use of high-side versus low-side sensing in designs? How does that split vary with end-application? Is some market-research firm willing to look into it for me?

If you want to know more about the two current-sensing options, there are many good sources available online (see References). While there is some overlap among them, as you’d expect, some offer additional interesting perspectives as well based on their products and expertise.

Have you ever had to defend your choice of one or the other in a design? What were the arguments for and against the approach you chose?

Related Content

• The self-powered current loop: Still a viable transducer-interface option
• E-fuses: warming up to higher-current applications
• Sub-milliohm resistors bring current-sense benefits but also challenges
• Use optical fiber as an isolated current sensor?
• Current-sense resistor brings two related and challenging tradeoffs

References (and there are many more!)

• All About Circuits, “Resistive Current Sensing: Low-Side vs. High-Side Sensing”
• Analog Devices, “ AN-105: Current Sense Circuit Collection: Making Sense of Current”
• Microchip Technology, “High-side versus Low-side Current Sensing”
• Renesas, “Current Sensing with Low-Voltage Precision Op-Amps”
• Rohm, “Low-Side Current Sensing Circuit Design”
• Texas Instruments, “Precision, low-side current measurement”
• Texas Instruments, “An Engineer’s Guide to Current Sensing”
• Texas Instruments, “Low-Side Current Sense Circuit Integration”

The post Do you use low-side current sensing? appeared first on EDN.

250€ later... submitted by /u/FloxiRace [link] [comments]

Beneq of Espoo, Finland says that its Transform atomic layer deposition (ALD) cluster tool has been qualified for volume production of gallium nitride (GaN)-based power devices on 8-inch GaN-on-silicon wafers by a tier-1 GaN power device manufacturer in Asia...

BluGlass Ltd of Silverwater, Australia — which develops and manufactures gallium nitride (GaN) blue laser diodes based on its proprietary low-temperature, low-hydrogen remote-plasma chemical vapor deposition (RPCVD) technology — has received $2.3m in commitments from institutional and sophisticated investors and the board and management via an oversubscribed share placement at an issue price of $0.013 per share. BluGlass is also undertaking a share purchase plan (SPP offer) to enable eligible shareholders in Australia and New Zealand to acquire up to $100,000 worth of shares at the lower of $0.013 or a 2.5% discount to the 5-day volume-weighted average price (VWAP) for shares prior to the closing date for the SPP offer...

A Malaysian semiconductor company has opened a new R&D Innovation Hub in Wales and signalled its intent to work with UK companies on designing next-generation semiconductor chips...

Wolfspeed Inc of Durham, NC, USA — which makes silicon carbide (SiC) materials and power semiconductor devices — has mutually agreed with Neill Reynolds to conclude his role as executive VP & chief financial officer, effective 30 May, to pursue another professional opportunity...