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Wolfspeed Inc of Durham, NC, USA — which makes silicon carbide (SiC) materials and power semiconductor devices — has appointed Daniel (Dan) Whalen as vice president, investor relations, leading investor relations strategy and engagement with the financial community as the firm continues to advance its long-term strategic and operational priorities...

Epiwafer and substrate maker IQE plc of Cardiff, Wales, UK and specialty analog foundry Tower Semiconductor Ltd of Migdal Haemek, Israel have announced a multi-year agreement for the supply of indium phosphide (InP) epiwafers for optical connectivity solutions serving AI-driven data-center infrastructure...

The search for novel ways to treat cognitive, sensory, and motor disorders, and their associated impairments—from restoring movement in people with paralysis, and enabling intuitive control of prosthetic limbs, to re-establishing speech and vision—is in full swing. In parallel, neuroscience is pushing for more powerful tools to probe neural dynamics and unravel the mechanisms underlying cognition.

These advances are increasingly driven by brain-computer interfaces (BCIs), which directly connect the brain to electronic systems and hold enormous promise for both transformative therapies and deeper scientific insight.

Cortical BCIs—systems that record electrical activity from the cortex—come in a variety of flavors. Intracortical BCIs (iBCIs), for instance, employ microelectrode arrays (MEAs) implanted within the cerebral cortex, while electrocorticography (ECoG)-based systems place electrodes on the cortical surface, between the skull and the brain tissue. Despite their differences, both aim to capture fine-grained electrical activity from large populations of neurons. But as the number of underlying recording channels increases, so does the volume of neural data that must be transmitted and processed.

The challenge: this data surge drives up power consumption and, consequently, heat generation—while even small temperature increases can irreversibly damage neurons. As a result, lossless data reduction and compression become essential, cutting the number of transmitted bits without compromising the fidelity of the underlying neural information.

Why ‘simply’ increasing MEA recording channels and bandwidth isn’t enough

Scaling BCIs is a deeply complex, system‑level challenge. Let’s take iBCIs as an example. First, at the recording front-end, MEA neural probes must continue to grow in channel count to eventually reach several thousand parallel electrodes—well beyond the 1,536 channels offered by today’s Neuropixels 2.0 Quad Base (QB).

At the opposite end of the system, iBCIs must sustain high-bandwidth, low-latency communication with (external) decoding and processing hubs. Here, impulse-radio ultra-wideband (IR-UWB) has emerged as a promising technology. Beyond eliminating the usability and comfort constraints of wired links, IR-UWB combines electromagnetic regulatory compliance with data rates above 124 Mbps over distances of tens to hundreds of centimeters, low power (roughly 30m W, which is around 10x lower than Wi-Fi), strong interference resilience, and inherent physical-layer security.

Still, even the most advanced UWB links cannot meet the bandwidth requirements imposed by future, high-density MEAs. Streaming raw data from an existing 1,500-channel probe such as the Neuropixels 2.0 QB demands throughputs well over 500 Mbps, far beyond UWB’s practical operating range. Pushing toward 10,000+ parallel channels only widens this gap.

These bottlenecks shift the pressure onto the on-chip compression technology that bridges the MEAs (or any other recording devices) and the wireless interface. Concretely, it will need to incorporate advanced, lossless data reduction to dramatically shrink data volume while preserving the full dynamic range and information content of the recorded signals. Unfortunately, conventional strategies rely on large memory buffers, heavy digital logic, or lossy approximations, rendering them unsuitable for use in heavily constrained iBCIs.

An NCT chip for lossless data reduction

To meet the data-rate, power, and thermal constraints of next-generation iBCIs, imec has developed a new neuromorphic compressive telemetry (NCT) chip for lossless, real-time data reduction. The architecture is built around two key innovations.

• Send-on-delta signal acquisition, replacing traditional Nyquist-rate sampling with an event-‑driven scheme that produces data only when the neural signal changes.
• A ternary packet-based AER serializer (eSER), which groups these events into compact packets for efficient serialization and deterministic transmission.

Together, these building blocks allow the NCT to eliminate redundant data, thus lowering iBCIs’ power and bandwidth requirements, while preserving all the information needed for high-fidelity spike reconstruction.

Send-on-delta encoding for lossless, event-driven signal acquisition

Most cortical neurons fire surprisingly infrequently, typically less than 10 hertz, meaning just a few dozen spikes per second (and often even less). This inherent sparsity presents a major opportunity for data compression and reduction.

Traditional Nyquist-rate sampling captures signals at a fixed frequency—commonly 20-30 kHz for neural sensing—regardless of whether any neural event or spike is actually occurring. This produces a continuous stream of samples, the vast majority of which are redundant (when neurons are silent).

Imec’s send-on-delta sampling/encoding approach takes a fundamentally different path. Instead of sampling at fixed intervals, send-on-delta proposes an event-based, signal-dependent temporal sampling scheme: data is generated only when a signal changes by more than a predefined threshold (Δ). Thus, the output is not a dense waveform, but a sparse stream of information-rich events.

This brings several advantages: drastically fewer data points (often by an order of magnitude), significantly lower power consumption, and much lower bandwidth needs, while all spikes are captured with high fidelity.

A key improvement in imec’s latest (second-generation) send-on-delta mechanism is that the encoding now operates fully in the digital domain. Instead of starting from raw analog voltages passing through a power-hungry send-on-delta analog-to-digital converter (ADC), the system works with a digital-state representation that reflects meaningful changes in the neural signal. In simple terms, send-on-delta digitally detects when the signal changes, and then decides what to do with the underlying data.

A ternary packet-based AER protocol for advanced packetization and serialization

While imec’s send-on-delta approach effectively exploits the sparsity of neural activity, it naturally produces spike-driven data streams (only when neural signals change, not at fixed intervals). This is desirable to achieve power savings, but it requires a communication method that can handle irregular, spike-driven data.

Address-event representation (AER) protocols are a common solution for spike-driven event communication. However, existing AER schemes show several limitations when applied to high-density neural recordings. For example, when multiple readout channels generate events at the same time, classical AER relies on event arbitration or acknowledgement-based handshaking, which does not scale well to large channel counts and introduces unpredictable latency.

In addition, neural spikes exhibit strong spatial correlation—a single spike may appear across several adjacent electrodes—yet traditional AER methods packetize and serialize each event independently, repeatedly transmitting redundant address information and incurring unnecessary protocol overhead.

To overcome these limitations, imec developed an event-based serializer (eSER) that combines send-on-delta with a ternary packet-based AER protocol, which is purpose-built for neural telemetry. Imec’s design introduces several key advantages:

• Event-driven serial transmission only when neural activity occurs.
• Spatial grouping of correlated events, sending one compact packet instead of many little messages, which eliminates redundant metadata and reduces protocol overhead by up to a factor of two.
• No need for arbitration or collision-handling logic; rather than arbitrating between simultaneous events, the eSER first collects all Δ outputs and then emits one packet in a controlled sequence. This completely avoids the event collisions, while removing the need for complex arbitration circuitry with indeterministic latency, a major bottleneck in conventional AER.
• With rich, multi-bit (ternary) encoding for lossless reconstruction, imec’s AER packets contain Δ values, direction of change, and the channel ID to enable lossless spike waveform reconstruction (even for low amplitude spikes down to ~31 µV).

As such, imec’s AER solves the scalability, complexity, overhead, indeterministic latency, and power concerns of traditional implementations by aligning communication with the true nature of neural signals—sparse, bursty, and spatially correlated. By intelligently grouping events, encoding richer Δ information, and activating the serializer only when needed (when Δ does not equal zero), the system filters out redundant data at the source and achieves dramatically higher compression and ultra-low power operation.

Validating high‑fidelity, low‑power telemetry using neural recordings

To evaluate its performance, imec tested its NCT chip—fabricated on 65-nm CMOS—using in-vivo neural recordings from high-density datasets.

In these experiments, the system successfully digitized, compressed, packetized, serialized, and reconstructed neural activity from 384 recording channels in real time. Powered by imec’s send-on-delta approach and ternary packet-based AER scheme, the chip consistently achieved more than a ten-fold reduction in data volume, even after accounting for the packetization overhead.

Crucially, this level of compression was achieved without compromising spike fidelity. The system preserved spikes with amplitudes down to 31 µV, reconstructing them with <23% normalized RMS error, equivalent to a signal-to-noise and distortion ratio (SNDR) of 12.7 dB, which is well in line with the commonly accepted threshold for reliable spike sorting. In other words, the compressed, serialized data stream retained all waveform features essential for downstream neural decoding (and analysis).

The complete NCT telemetry chain operates at exceptionally low power (consuming just 0.1 µW per channel) and demonstrates record-breaking silicon efficiency, requiring only 27 bits of memory per channel, a 55-fold reduction compared to epoch-based compression schemes that rely on kilobits of buffer memory. This dramatically smaller memory footprint minimizes silicon area, lowers both leakage and dynamic power, and helps keep implant temperatures safely within clinical limits.

Importance of deterministic latency in distributed neural implants

Neural spikes are extremely brief—often well under 200 µs in duration—with their precise timing carrying essential information about how the brain encodes movement, perception, and intent. In distributed (intra) cortical systems, where multiple recording channels record from different cortical regions at once, even small variations in transmission delay can distort the temporal relationships between spikes. To preserve these relationships, the telemetry system must maintain deterministic latency, with timing uncertainty kept to just a few microseconds.

Imec’s NCT architecture achieves this requirement by design. By eliminating arbitration delays, and avoiding global clock distribution, the system ensures that data from each sensor unit is aligned in real time. Measurements show a latency variation well below 10 µs, comfortably meeting the microsecond-level precision needed for distributed spike-timing analysis. As recording channels scale and become increasingly spatially distributed, this deterministic timing ensures that neural activity can be reconstructed accurately across thousands of channels, without temporal drift or distortion.

Next step: Scaling toward 10,000 channels

Imec’s most recent results show that its neuromorphic compressive telemetry architecture can already scale to 1,500 channels—on par with today’s highest-density MEA platforms—while delivering a 10x data reduction and maintaining high-fidelity spike reconstruction. This confirms that the core principles—the event-driven ‘send-on-delta’ signal acquisition, and ternary AER packetization/linearization—extend far beyond the initial 384-channel tests.

As a next step, the team is now complementing the NCT chip with an AI-enhanced auto encoder to identify the ~1% of neural events that carry the most behavioral or clinical relevance. By selectively encoding and transmitting only this most informative subset, imec’s NCT architecture is projected to reach a 100x data reduction, unlocking practical scaling toward 10,000 recording channels.

Yao-Hong Liu, scientific director at imec, is a recipient of European Research Council (ERC) Consolidator grant. He is also a guest professor at Delft University of Technology. His current research focuses on wireless communication and neuromorphic compression for implantable brain computer interfaces (BCIs) and robotic sensing applications.

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The post Neural telemetry: New chip delivers 10x compression while preserving signal integrity appeared first on EDN.

Got lightning? A bidirectional RJ45/SFP intermediary can, by “taking one for the team”, keep it from propagating through the remainder of your network.

Back in November 2024, I detailed my initial attempts (with underwhelming results) to figure out some way to avoid using the two lightning-prone spans of Ethernet cable running around outside my house (which I’d inherited when I bought the place, mind you; the bad idea wasn’t mine in the first place!) and without replacing them with expensive- and complicated-to-install alternative cable runs inside the house. And speaking of lightning, we’re nearing the start of Monsoon Season 2026 as I write these words in mid-May…

…but I won’t be gritting my teeth quite so intensely this year, thanks to reader Steve Strobel:

You don’t need fiber from your ISP to protect 99% of your equipment from surges on their connection. After their modem/router, you can convert to fiber, back to Ethernet, then go to the rest of your network. A pair of gigabit Ethernet/fiber media converters (for example, TP-Link MC220L, about $21 each) and a foot of fiber should do the job. Or if your switch has a SFP port, drop an SFP fiber transceiver in that and you need only one converter.

Here’s my response:

You are brilliant! What I’ve just realized thanks to your comments is that if I put a pair of these at each of the endpoints of each of the two external Ethernet spans (eight media converters total), along with four short spans of SFP cable (one per endpoint, spanning each pair of media converters), I can electrically isolate the Ethernet switches (and wired LAN clients connected to them) at each endpoint from any lightning-induced EMI that the external Ethernet spans might pick up. And all for ~$250 total. Thank you! Off to order now…

Transceiver sacrifice

And that’s exactly what I did, initially alluded to in the comments of a teardown (of one of the devices that died in the October 2024 lightning debacle) published the following May. I promised a teardown back then, and although it took me a bit longer than planned to actualize that particular aspiration, you’ll be getting one today.

First off, here’s what one of the four paired TP-Link MC220L Gigabit SFP Media Converter clusters looks like in action, in my furnace room.

One of the only-slightly-quirky devices is Ethernet-fed by the eight-port GbE switch (not shown) next to it. The other one connects to the Ethernet cable that then heads outside and around the west and north sides of the house, where it re-enters at the master bedroom. There’s another two-device cluster there, of course. Two more clusters handle the Ethernet span running between the west and east sides of the house. And interconnecting each two-device cluster is a 0.3 meter strand of SFP fiber optic cable (or so I thought at the time…keep reading).

All nine devices (including a spare) were factory-refurbished, came with multi-year warranties, and cost me less than $20 each (four of them less than $15 each) on eBay. And the cable four-pack from Amazon cost me less than $28. This isn’t a foolproof fix, mind you, but it’s a cost-effective workaround. Even if I need to replace all four external-facing transceivers each time, there’s a monsoon “event”. It’s less than $100 out of pocket (not to mention only a five-minute replacement job), a much less costly outlay than when multiple much more expensive LAN gadgets had gotten fried. In practical preparation, in fact, I’ve already bought six more spares, this time from StarTech (and sourced from Woot) and setting me back only $5 each:

Add fiber to your packet diet

Enough of the background chatter; let’s get to tearing down. The device you’ll be looking at today is not one of the nine TP-Link devices I’ve already mentioned. Nor is it one of the six StarTech ones. It’s a tenth TP-Link MC220L, again from eBay, but this time used and missing a power supply (but still functional? Dunno). I’ll start with a stock shot.

And now some photos of our actual patient, as usual accompanied by a 0.75″ (19.1 mm) diameter U.S. penny for size comparison purposes.

Used, like I said!

No wireless capabilities, thus a rare teardown device absent an FCC certification ID on the label.

Now for the sides (in clockwise order):

Before proceeding further, I grabbed the wall wart and paperwork (PDF) from the spare functional unit, to share some photos of them with you, too.

Protocol conversion here: media conversion elsewhere

I anticipated that getting inside would be relatively straightforward, and I wasn’t disappointed. You probably already noticed the four total screw heads, two each on two of the sides. You know what comes next, right?

And…open sesame:

Two more screws to go:

And the PCB is free:

The design is quite simple; the notable topside contents include a Realtek RTL8367S layer-2 managed 5+2-port 10/100/1000M switch controller and a Group-Tek HST-2027DAR (PDF) dual-port 10/100 BASE-T Ethernet isolation transformer module.

I was initially baffled as to where the optical/wired bidirectional conversion circuitry was located, until I realized that it was at both ends of the cable itself. Unfortunately, I don’t have a spare available to dissect, so you and I will both need to satisfy ourselves with others’ analyses, such as this one, which showcases a module based on an Atheros (now Qualcomm Atheros) AR8033 Ethernet transceiver and two SwapNet NS681679 LAN transformer modules.

And on the other side of the PCB? Nothing but solder points and embedded traces:

I’ll wrap up with a set of side shots:

and turn it over to you for your thoughts in the comments!

Coda

Subsequent to doing the teardown and writing the previous prose, I revisited the SFP cable page at Amazon’s website to purchase another cable for future module teardown purposes and first-time noticed the word “Copper” in the product title. With no shortage of embarrassment, I must admit that the whole time I’d had the media converters active in my network to that point, they’d not been providing any meaningful degree of galvanic isolation after all. I quickly sourced true fiber interconnect, 0.5 meter multimode active optical cables (AOC) to be exact:

and installed them in place of the direct-attach copper (DAC) predecessors I’d been naïvely using up to that point. Although, in my slight defense, I had long been wondering why they’d been so inexpensive. The AOCs, which weren’t that much pricier especially in the ultra-short lengths I needed, work great.

Although in a final twist to this tale, I subsequently learned that (strictly speaking, at least) they shouldn’t be working—at all, actually—since the media converters are SFP-lineage but the cables (and their endpoint transceiver modules) implement the successor SFP+ standard.

That SFP (port)-vs-SFP+ (module) protocol incompatibility exists in contrast to the physical compatibility between SFP and SFP+ connectors and modules is mind-blowing to me. I’m guessing that this mismatch has also caused no shortage of headaches for multi-generation SFP technology suppliers and implementers alike, and that vendors have in response come up with above-and-beyond-the-spec workarounds that support full backwards-compatibility such as the one I thankfully experienced.

I’ll save further discussion for a near-future planned dedicated post on the topic, but felt it was important to do an initial fess-up here.

—Brian Dipert is the associate editor, as well as a contributing editor, at EDN.

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The post TP-Link MC220L: Media conversion keeps the network well appeared first on EDN.

Ерготерапія без кордонів – шведський досвід кафедри біобезпеки і здоров'я людини Інформація КП пн, 06/15/2026 - 14:16

NUBURU Inc of Centennial, CO, USA (a dual-use defense & security integrated platform company focused on non-kinetic effects and directed-energy technologies, electronic warfare and defense mobility programs, software-orchestrated defense systems and advanced manufacturing) has signed a binding head of terms with SunCubes S.r.l., an Italian developer of laser-based wireless power transmission, beam-control, pointing, tracking and safety technologies...

In the latest update of KnowMade’s monthly GaN research, technology, and patent landscape monitoring, new scientific breakthroughs, patent activity and industrial announcements confirm that the global gallium nitride (GaN) ecosystem continues to gain momentum as the technology moves deeper into mainstream semiconductor roadmaps, becoming a strategic semiconductor platform across computing, communications, energy and defense applications. The latest monthly R&D activity highlights an industry rapidly evolving beyond its historical positioning in LEDs and RF power devices toward a much broader role spanning AI data centers, optical interconnects, advanced displays, high-voltage power conversion and next-generation communication systems...

China-based Innoscience (Suzhou) Technology Holding Co Ltd, which manufactures GaN-on-silicon power chips on 8” silicon wafers, says that the Supreme People’s Court of China has officially issued a final review decision sustaining a sales injunction against Infineon Technologies AG of Munich, Germany. So, effective immediately, Infineon is prohibited from selling its relevant gallium nitride (GaN) products within mainland China...

In early 2026, a team at Fraunhofer Institute for Solar Energy Systems ISE of Freiburg, Germany working on the project Vorfahrt (Cost Reduction of III–V Cells and Modules for Aircraft and Vehicle Applications) fabricated an 833cm2 photovoltaic (PV) solar module with record energy conversion efficiency of 34.2%. The module consists of triple III–V germanium solar cells originally optimized for space applications, which project coordinator AZUR SPACE Solar Power GmbH of Heilbronn, Germany further developed by adapting them to the terrestrial solar spectrum, enabling them to be produced in comparable quantities and on the same wafer formats...

Surface resistance and resistivity testers are essential tools for evaluating materials used in electrostatic discharge (ESD) control. By quantifying how surfaces resist or conduct electrical charge, they enable engineers to verify compliance with industry standards and safeguard sensitive electronic components.

Because these measurements define whether a material behaves as conductive, dissipative, or insulative, they are central to effective ESD control and protection of high-value electronics.

Surface resistivity vs. surface resistance

It’s easy to confuse surface resistivity testers with surface resistance testers, but in principle they measure different properties. Surface resistivity testers determine a material’s inherent ability to resist charge flow, expressed in ohms per square (Ω/□), and are typically used for material characterization in laboratories.

Surface resistance testers, by contrast, measure the actual resistance between two points or between a surface and ground, expressed in ohms (Ω), making them more common in field audits of ESD workstations, mats, and floors. Recognizing this distinction ensures accurate measurements, proper classification of materials, and effective ESD program control.

In practice, the terms surface resistance and surface resistivity are often used interchangeably in device descriptions because both relate to how materials impede electrical charge across their surfaces. The overlap in measurement setups, industry shorthand, and the focus on ESD compliance ranges (10³–10¹² Ω) all contribute to this blurred usage. What matters most to engineers is whether a material or surface falls within conductive, dissipative, or insulative ranges, not the precise terminology.

This is where surface resistance test kits become especially significant: they provide portable, standardized tools for field audits of ESD workstations, mats, floors, and packaging, ensuring that surfaces meet compliance requirements and offer safe discharge paths for static electricity. By bridging laboratory concepts with real-world checks, these kits make ESD control practical and reliable.

Figure 1 This portable tester—Z203-100—measures surface resistivity and resistance in ESD applications. Source: Zeebeetronics

Sidenote: In ESD protection, surface resistivity (Ω/□) reflects a material’s intrinsic “DNA”—its inherent electrical properties independent of size. Surface resistance (Ω), by contrast, captures “real‑world” performance, shaped by geometry, installation, and grounding. Simply put, resistivity identifies the material; resistance verifies the protection.

The role of probe geometry

Getting again into the distinction between surface resistance and surface resistivity, the technical divergence often comes down to the test probe geometry used during the audit.

In a practical setting, a surface resistance tester is the essential “boots on the ground” tool for verifying if an ESD mat is functional. Unlike lab-based resistivity tests, it measures the actual path a charge takes from point A to point B (or to ground), accounting for real-world variables like surface wear, contamination, and grounding connections. While compact handheld meters are convenient for quick checks, official ANSI/ESD S20.20 audits require the superior accuracy of heavy, “5-pound weight” megohmmeter probes to ensure the environment is truly safe for sensitive electronics.

While a field technician might use two 5-pound weighted electrodes (pucks) to measure the point-to-point resistance of a specific floor or mat, a materials scientist might opt for a concentric ring probe to determine the material’s inherent resistivity.

Because the concentric ring’s circular design ensures the distance between electrodes is mathematically proportional to their size, the units of measurement effectively cancel out, leaving a value in ohms per square. This allows the meter to provide a reading that remains constant regardless of the material’s total surface area, whereas the 5-pound pucks provide a “real-world” measurement of how much resistance a charge actually encounters between two specific points.

Figure 2 Concentric ring probe measuring surface resistance; the geometric constant converts the value to surface resistivity. Source: Desco Europe

A practical pointer: when converting resistance measurements from the concentric ring probe method to equivalent resistivity, multiply the result by the conversion factor specified in the probe’s datasheet. This factor is derived from the specific geometry of the electrode assembly. Note, however, that these conversions may be invalid for non-homogeneous materials, such as those that are laminated, plated, or metallized with conductive layers.

So, while standard 5-pound weighted electrodes are used to measure point-to-point resistance, the concentric ring probe is the gold standard for measuring surface resistivity because its unique geometry—a center electrode surrounded by a circular outer ring—neutralizes surface area variables and orientation. By applying uniform pressure across a fixed distance, this probe allows a resistance tester to calculate true ohms per square (Ω/□), providing a precise material characterization that standard cylinders cannot.

Ultimately, in a professional audit, the 5-pound cylinders verify that the installed mat effectively dissipates charge to ground, while the concentric ring probe confirms that the material itself meets the manufacturer’s specific electrical requirements.

Applied test voltage and electrification period

The applied voltage functions as the electrical pressure that drives current across a material’s surface. On highly conductive surfaces, a 10-V output combined with a brief electrification period (typically around 15 seconds) is sufficient to establish a stable reading without overstressing the sample. As materials shift into dissipative or insulative ranges—where molecular structure resists electron flow—10 V lacks the drive needed to overcome surface impedance.

In these cases, the meter automatically steps up to 100 V, maintaining the same electrification period to ensure the signal penetrates the higher resistance and produces a reliable data point. Without this higher voltage, the instrument could misclassify a dissipative surface as a complete insulator (open circuit). The dual-voltage design, coupled with controlled electrification time, ensures that measurements reflect the material’s true protective properties rather than a limitation of the tester itself.

Note at this point that compliance standards require a 15-second electrification period to ensure stabilized readings. In contrast, many portable field meters are optimized for convenience, displaying results in as little as 2–5 seconds. While suitable for quick checks, these faster readings do not substitute for compliance-grade measurements.

Resistance ranges and material classification

Surface resistance values are categorized into three broad ranges that dictate a material’s electrostatic behavior. Conductive materials (10^3–10^6 Ω) allow charges to move freely, facilitating rapid equalization across the surface. Dissipative materials (10^6–10^11 Ω) provide a controlled pathway that regulates charge decay, preventing the danger of sudden discharge.

Conversely, insulative materials (>10^12 Ω) inhibit electron flow, causing charges to remain trapped on the surface. This framework ensures that test results serve as functional indicators of material performance in sensitive environments.

Maintenance, calibration, and environmental factors

To maintain precise measurements, the electrodes or weighted probes of a surface resistance or resistivity meter must be kept free of contaminants like oils, dust, or skin residue. Cleaning should be performed using a lint-free cloth moistened with 99% isopropyl alcohol, followed by sufficient time to allow the probes to dry completely to prevent solvent-induced measurement errors.

Beyond routine cleaning, periodic calibration—typically on an annual basis—is necessary to verify that the internal circuitry remains within the manufacturer’s specified tolerance using a high-megohm resistance box.

Furthermore, because relative humidity (RH) significantly influences surface resistance by creating a microscopic conductive layer on many materials that can artificially lower readings, it’s critical to always record the ambient RH alongside every measurement for proper context.

Scratching surface, revealing science

That is all for now. Obviously, we just scratched the resistive surface—and much remains hidden in the interplay of surfaces and charge.

In electronics and materials science, surface resistance and resistivity testers are indispensable for gauging reliability, safety, and performance. They help practitioners clearly distinguish between insulating, conductive, and static-dissipative surfaces.

For keen experimenters, building prototypes of such testers does not demand exotic or costly components. With curiosity and patience, the analog and digital design ideas are well within reach. When time permits, I intend to explore these concepts further—and perhaps craft a design of my own.

Now it’s your turn: share your design ideas, prototypes, and experiments—let us advance practical measurements together. Scratch the surface, reveal the science!

T. K. Hareendran is a self-taught electronics enthusiast with a strong passion for innovative circuit design and hands-on technology. He develops both experimental and practical electronic projects, documenting and sharing his work to support fellow tinkerers and learners. Beyond the workbench, he dedicates time to technical writing and hardware evaluations to contribute meaningfully to the maker community.

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• High-speed automotive electronics needs high-performance ESD protection

The post Surface resistance and resistivity testers for ESD applications appeared first on EDN.

I made up a schematic of the division unit for my recent calculator project, with some adjustments. I switched out a few chips with ones from the same family, but I tried to keep it as close to the original as I could. The original also only took 7 bits for the divisor as it only took up to 99 as an input due to the interface of the calculator. Definitely could be optimized. This is my first time translating a circuit of this size to a schematic, so it might be... messy. Hopefully I didn't miss anything; I checked it over a few times. A few adjustments might be required. "Start" must remain low until dividend and divisor are inputted. This signal must remain high until the XOR signal, from carryout and OR, is high, which then tells the circuit that the result is negative and to stop subtracting the divisor. I have a video of the division unit from when i was still testing it as well. I plan and am working on creating a whole schematic of my calculator without any changes, but do beware that my demonstration of the unit isn't 1:1 as it's from early on in testing, same with the second photo. https://youtu.be/GKElo5Bfb7c submitted by /u/duckquackquack__ [link] [comments]

First time trying something like this! submitted by /u/darthB4s [link] [comments]

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I'm a high school student who has an interest in point clouds and spatial data, so I made my own LiDAR scanner! This was my first time making a PCB, and the scanner runs on an esp32 & TMC2209 stepper drivers. You can see my Github with the KiCAD project files here. submitted by /u/thatonebckid [link] [comments]

Конкурс "Інтелект молоді. Раціональне природокористування та новітні енергоефективні технології" KPI4U-1 сб, 06/13/2026 - 00:09

У КПІ відкрили меморіальну дошку Герою України Андрію Гуцалу kpi пт, 06/12/2026 - 23:29

As one of like 3 people who absolutely loves cat whiskers when I stumbled upon a paper from the 1920s known as “the Crystodyne principle” I got real excited, then I realized I don’t own zincite and ya I know the paper itself says you can use galena and fools gold but I’ve over used fools gold and if I’m gonna buy galena why not spend that money on zincite, but then I had a genius idea “what if I made the crystal!” So then I got to work (spent like 5minutes finding out how zincite forms) and discovered it’s just the mineral equivalent to zinc oxide so I heat treated some zinc WITH A MASK NO ONE WANTS ZINC PLATED LUNGS, and to my surprise it worked 2nd try. The hardest part had to be actually making the circuit because “the Crystodyne principle” doesn’t tell you how to make an amplifier only that you can so like any responsible science fella I just started shoving crap together based on half complete knowledge till it worked and then when I got it to work I needed to figure out how to A. Remove unnecessary components B. Increase volume C. Decrease static. And this is the circuit I came up with. To test it I put the earpiece in my ear under a pair of headphones and tapped the mic against an auto transformer. I also managed to use it to amplify an electric kazoo. submitted by /u/antthatisverycool [link] [comments]

Upside-down mounting can deliver inductance upsides for surface mount passives and other components.

Please visualize the structure of a surface mount resistor as shown in the following Figure 1:

Figure 1 Surface mount resistor constituents include this writeup’s showcase electrical contacts.

Normally this part would be installed on a circuit board with the outer coating visible for inspection and with the substrate adjacent to the circuit board’s surface. However, if the circuit board’s goodies are operating at microwave frequencies, this might not be the best idea.

There is an alternative, however, as shown in Figure 2:

Figure 2 A surface mount resistor in its normal-service mounting orientation (a) may be re-positioned for optimal microwave-service operation (b).

If the surface mount resistor is installed on the circuit board “upside down”, the inductances presented by the electrical contacts will be much reduced versus that of the usual mounting. At microwave frequencies this can be significant, especially if the resistance is 50Ω in a matched impedance application.

John Dunn is an electronics consultant and a graduate of The Polytechnic Institute of Brooklyn (BSEE) and of New York University (MSEE).

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🧐 Конкурс учнівських проєктів “Автоматизація навколо нас” kpi пт, 06/12/2026 - 12:45