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This is one of the crazier things I've ever seen. Someone (apparently?!) took a $9 IKEA smart button, reverse engineered the PCB in order to spin their own custom form factor board that fits inside their specific wall switch buttons and then transfers all the components from the original PCB to their custom one by hand. source: https://www.reddit.com/r/tradfri/comments/1pnil9l/custom_button_converted_ikea_somrig/ submitted by /u/winston109 [link] [comments]

Sometimes, when an audio component dies, the root cause is something electrical. Other times, the issue instead ends up being fundamentally mechanical.

Delta sigma modulation-based digital-to-analog conversion (DAC) circuitry dominates the modern high-volume audio market by virtue of its ability (among other factors) to harness the high sample rate potential of modern fast-switching and otherwise enhanced semiconductor processes. Quoting from Wikipedia’s introduction to the as-usual informative entry on the topic (which, as you’ll soon see, also encompasses analog-to-digital converters, i.e., ADCs):

Delta-sigma modulation is an oversampling method for encoding signals into low bit depth digital signals at a very high sample-frequency as part of the process of delta-sigma analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). Delta-sigma modulation achieves high quality by utilizing a negative feedback loop during quantization to the lower bit depth that continuously corrects quantization errors and moves quantization noise to higher frequencies well above the original signal’s bandwidth. Subsequent low-pass filtering for demodulation easily removes this high frequency noise and time averages to achieve high accuracy in amplitude, which can be ultimately encoded as pulse-code modulation (PCM).

 Both ADCs and DACs can employ delta-sigma modulation. A delta-sigma ADC encodes an analog signal using high-frequency delta-sigma modulation and then applies a digital filter to demodulate it to a high-bit digital output at a lower sampling-frequency. A delta-sigma DAC encodes a high-resolution digital input signal into a lower-resolution but higher sample-frequency signal that may then be mapped to voltages and smoothed with an analog filter for demodulation. In both cases, the temporary use of a low bit depth signal at a higher sampling frequency simplifies circuit design and takes advantage of the efficiency and high accuracy in time of digital electronics.

Primarily because of its cost efficiency and reduced circuit complexity, this technique has found increasing use in modern electronic components such as DACs, ADCs, frequency synthesizers, switched-mode power supplies and motor controllers. The coarsely-quantized output of a delta-sigma ADC is occasionally used directly in signal processing or as a representation for signal storage (e.g., Super Audio CD stores the raw output of a 1-bit delta-sigma modulator).

Oversampled interpolation vs quantization noise shaping

That said, plenty of audio purists object to the inherent interpolation involved in the delta-sigma oversampling process. Take, for example, this excerpt from the press release announcing Schiit’s $249 first-generation Modi Multibit DAC, today’s teardown patient, back in mid-2016:

Multibit DACs differ from the vast majority of DACs in that they use true 16-20 bit D/A converters [editor note: also known as resistor ladder, specifically R-2R, D/A converters] that can reproduce the exact level of every digital audio sample. Most DACs use inexpensive delta-sigma technology with a bit depth of only 1-5 bits to approximate the level of every digital audio sample, based on the values of the samples that precede and follow it.

Here’s more on the Modi Multibit 1 bill of materials, from the manufacturer:

Modi Multibit is built on Schiit’s proprietary multibit DAC architecture, featuring Schiit’s unique closed-form digital filter on an Analog Devices SHARC DSP processor. For D/A conversion, it uses a medical/military grade, true multibit converter specified down to 1/2LSB linearity, the Analog Devices AD5547CRUZ.

That said, however, plenty of other audio purists object to the seemingly inferior lab testing results for multibit DACs versus delta-sigma alternatives (including those from Schiit itself), particularly in the context of notably higher comparative prices of multibit offerings. Those same detractors, exemplifying one end of the “objectivist” vs “subjectivist” opinion spectrum, would likely find it appropriate that in the “Schiit stack” whose photo I first shared a few months ago (and which I’ll discuss in detail in another post to come shortly):

I coupled a first-generation Modi Multibit (bottom) with a Vali 2++ tube-based headphone amplifier (top), both Schiit devices delivering either “enhanced musicality” (if you’re a subjectivist) or “desultory distortion” (for objectivists). For what it’s worth, I don’t consistently align with either camp; I was just curious to audition the gear and compare the results against more traditional delta-sigma DAC and discrete- or op amp-based amplifier alternatives!

A sideways wiggle did the trick

That said, I almost didn’t succeed in getting the Modi Multibit into the setup at all. My wife had bought it for me off eBay as a Valentine’s Day gift in (claimed gently) used condition back in late January; it took me a few more months to get around to pressing it into service. Cosmetically, it indeed looked nearly brand new. But when I flipped the backside power switch…nothing. This in spite of the fact that the AC transformer feeding the device still seemed to be functioning fine:

The Modi Multibit was beyond the return-for-refund point, and although the seller told me it had been working fine when originally shipped to us, I resigned myself to the seemingly likely reality that it’d end up being nothing more than a teardown candidate. But after subsequently disassembling it, I found nothing scorched or otherwise obviously fried inside. So, on a hunch and after snapping a bunch of dissection photos and then putting it back together and reaching out to the manufacturer to see if it was still out-of-warranty repairable (it was), I plugged it back into the AC transformer and wiggled the power switch back and forth sideways. Bingo; it fired right up! I’m now leaving the power switch in the permanently “on” position and managing AC control to it and other devices in the setup via a separately switchable multi-plug mini-strip:

What follows are the photos I’d snapped when I originally took the Modi Multibit apart, starting with some outside-chassis shots and as-usual accompanied by a 0.75″ (19.1 mm) diameter U.S. penny for size comparison purposes. Front first; that round button, when pressed, transitions between the USB, optical S/PDIF, and RCA (“coaxial”) S/PDIF inputs you’ll see shortly, selectively illuminating the associated front panel LED-of-three to the right of the button at the same time:

Left side:

Back, left-to-right are the:

• Unbalanced right and left channel analog audio outputs
• RCA (“coaxial”) digital S/PDIF input
• Optical digital S/PDIF input
• USB digital input
• The aforementioned flaky power switch, and
• 16V AC input

Transformers vs voltage converters

Before continuing, a few words about the “wall wart”. It’s not, if you haven’t yet caught this nuance, a typical full AC-to-DC converter. Instead, it steps down the premises AC voltage to either 16V (which is actually, you may have noticed from the earlier multimeter photo, more like 20V unloaded) for the Modi Multibit or 24V for the Vali 2++, with the remainder of the power supply circuitry located within the audio component itself:

Fortunately, since the 16V and 24V transformer output plugs are dissimilar, there’s no chance you’ll inadvertently blow up the Modi Multibit by plugging the Vali 2++ wall wart into it!

Onward, right side:

Bottom:

And last but not least, the top, including the distinctive “Multibit” logo, perhaps obviously not also found on delta-sigma-implementing Schiit DACs:

Let’s start here, with those four screw heads you see, one in each corner:

With them removed, the aluminum top piece pops right off:

Next up, the two screw heads on the back panel:

And finally, the three at the steel bottom plate:

At this point, the PCB slides out, although you need to be a bit careful in doing so to prevent the steel frame’s top bracket from colliding with tall components along the PCB’s left edge:

Firmware fixes

Here’s a close-up of the PCB topside’s left half:

AC-to-DC conversion circuitry dominates the far left portion of the PCB. The large IC at the center is C-Media Electronics’ CM6631A (PDF) USB 2.0 high-speed true HD audio processor. Below it is the associated firmware chip, with an “MD218” sticker on top. The original firmware, absent the sticker, had a minor (and effectively inaudible, but you know how picky audiophiles can be) MSB zero-crossing glitch artifact that Schiit subsequently fixed, also sending replacement firmware chips to existing device owners (or alternatively updating them in-house for non-DIYers).

And here’s the PCB topside’s right half:

Now for the other side:

In the bottom left quadrant are two On Semiconductor MC74HC595A (PDF) 8-bit serial-input/serial or parallel-output shift registers with latched 3-state outputs. Above them is the aforementioned “resistor ladder DAC”, Analog Devices’ AD5547. Above it and to either side are a pair of Analog Devices AD8512A (PDF) dual precision JFET amplifiers. And above them is STMicroelectronics’ TL082ID dual op amp.

Shift your eyes to the right, and you’ll not be able to miss the largest IC on this side of the PCB. It’s the Analog Devices ADSP-21478 SHARC DSP, also called out previously in Schiit’s press release. Above it is an AKM Semiconductor AK4113 six-channel 24-bit stereo digital audio receiver chip for the Modi Multibit’s two S/PDIF inputs. And on the other side…

is a SST (now Microchip Technology) 39LF010 1Mbit parallel flash memory, presumably housing the SHARC DSP firmware.

Wrapping up, here are some horizontal perspectives of the front, back, and left-and-right sides:

And that’s “all” I’ve got for you today! In the future, I plan to compare the first-generation Modi Multibit against its second-generation successor, which switches to a Schiit-developed USB interface, branded as Unison and based on a Microchip Technologies controller, and also includes a NOS (non-oversampling) mode option, along with stacking it up against several of Schiit’s delta-sigma DAC counterparts. Until then, let me know your thoughts in the comments!

—Brian Dipert is the Principal at Sierra Media and a former technical editor at EDN Magazine, where he still regularly contributes as a freelancer.

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• A holiday shopping guide for engineers: 2025 edition
• Audio Amplifiers from Class A, B, D to T

The post The Schiit Modi Multibit: A little wiggling ensures this DAC won’t quit appeared first on EDN.

Advances in the automotive industry continue to make cars safer, more efficient, and more reliable than ever. As motor vehicles become more advanced, so do the silicon components that serve as the backbone of their advanced features. Case in point: the requirement for and proliferation of data logging systems is an item that has become increasingly prevalent.

In particular, event data recorder (EDR) and data storage system for autonomous driving (DSSAD) have been the source of significant attention due to recent worldwide legislation. While both systems function to provide safe and reliable storage of driving data, there are a few key distinctions (Table 1).

Table 1 Here is a comparison between EDR and DSSAD data loggers. Source: Infineon

As regulations governing automotive data logging evolve, so do the specifications for the associated memory that stores the data. For instance, in the United States, these storage requirements were recently revised to “extend the EDR recording period for timed data metrics from 5 seconds of pre-crash data at a frequency of 2 Hz to 20 seconds of pre-crash data at a frequency of 10 Hz”. These effects will be enforced on September 1, 2027, for most manufacturers with a few exceptions for altered vehicles and small-volume production lines.

Regulations such as these are not unique to the United States but rather echoed worldwide. Recently, the United Nations Economic Commission for Europe (UNECE) has sought to standardize automotive data logging requirements across its constituents with key pieces of regulation. These regulations provide guidelines for EDR in passenger vehicles, heavy-duty vehicles, and DSSAD as it pertains to Automated Lane Keeping Systems (ALKS). As these regulations grow and are adopted by constituents, the demand for hardware storage systems becomes paramount in the automotive industry.

Data storage requirements

The National Highway Traffic Safety Administration (NHTSA) in the United States gives insight into existing EDR solutions, describing them as having “a random-access memory (RAM) buffer the size of one EDR record to locally store data before the data is written to memory. The data is typically stored using electrically erasable programmable read-only memory (EEPROM) or data flash memory”.

This document also provides an overview of concerns and industry feedback regarding the requirement changes. The feedback indicated that “while the proposed 20 seconds of pre-crash data could be recorded by EDRs, some EDRs may require significant hardware and software changes to meet these demands”.

On the other hand, DSSAD requires storage of all events over a set period. While the previously referenced NHTSA document applies only to EDR, a similar solution could fulfill these requirements by buffering incoming signals before transferring them to long-term storage in a non-volatile memory.

Given the strain on current systems from growth in requirements, the quest for an optimized solution becomes pertinent. All things considered, the ideal system must provide power-loss robustness for buffered data and enough space for long-term storage. With these requirements in mind, this article will discuss how using F-RAM and NOR flash together meets the modern challenges of data logging.

Flash F-RAM combo

Ferroelectric random-access memory (F-RAM) stores information in a ferroelectric capacitor. The dipoles within this material—oriented based on the direction of applied charge—maintain their orientation after power is no longer applied. This type of memory is characterized by fast write speeds and high endurance (~1014 cycles).

These characteristics give F-RAM a unique advantage over other non-volatile memory technologies. However, densities for F-RAM are low, ranging from a few kilobits to tens of megabits, limiting its scope for high density applications.

NOR flash is another type of memory which uses a MOSFET to store electric charge within a non-metallic region of the transistor’s gate. This memory is typically more complex in its operation—for instance, the necessity of an erase operation—than F-RAM and may offer additional features such as password protection or a one-time programmable secure silicon region. NOR flash offers small-granular random access for reading but requires large-granular access to write operations.

Multiple bits must be erased simultaneously and then programmed in order to “write” to the device. Thus, timing for device operations is generally slower compared to F-RAM, and endurance is comparatively limited (~106 cycles). However, NOR flash holds the advantage of a larger storage size, with ranges up to a few gigabits.

This article will showcase how F-RAM + NOR flash compares to RAM + NOR flash as a solution for EDR and DSSAD. For this analysis, data was logged in a ring buffer within the front-end device continuously. During event triggers for EDR or conditions where the buffer filled for DSSAD, the information was transferred to the back-end device, where the data was held in long term storage (Figure 1).

Figure 1 The block diagram shows front-end and back-end storage in a logging operation. Source: Infineon

To evaluate performance, Table 2 below uses requirements from both EDR and DSSAD for the comparison. These specifications for EDR and DSSAD were based on the UN regulations for heavy duty vehicles and for ALKS DSSAD requirements, respectively. To discuss how these systems work, it’s important to review the specifications from these documents and highlight the assumptions made by the comparison.

Table 2 The performance comparison between EDR and DSSAD is conducted across multiple technologies. Source: Infineon

For logging systems that use EDR, data elements are required to be logged continuously and transferred to long term storage solely in the case of an event, such as a car accident. A ring buffer in the front-end device accomplishes this effectively. To determine the size of this buffer, the expected EDR data rate is needed alongside the storage time requirements.

From the legislation, required parameters were used as a part of the calculation. The relevant time interval (commonly 20 seconds pre-crash data, 10 seconds post-crash data) and logging frequency (4 Hz, 10 Hz, or single instance) were also utilized for calculations. One important assumption was a fixed EDR data packet size of 12 Bytes.

The UNECE document has no requirement for using a set number of bytes for storage or for storing any information outside of the parameter data. This comparison assumes an 8-byte time stamp of metadata will be included alongside an estimated 3 bytes for parameter data and 1 byte for parameter identification. Using the previous calculations and assumptions, the expected buffer size was calculated to be 790 Kbits.

In the case of the event, the entire buffer would be transferred to the back-end storage. It is required that “the EDR non-volatile memory buffer shall accommodate the data related to at least five different events”. Thus, five events worth of storage were allocated, resulting in a back-end EDR buffer size of 3.95 Mbits.

On the other hand, DSSAD requires all data elements to be stored rather than a set amount of data within an event window. Therefore, a relatively small buffer can be used on the front-end which can be migrated to the back-end device once filled. It was assumed that the buffer must be large enough to store all events if a sector erase is in progress and must be completed before transferring the data to NOR flash.

For this analysis, the maximum DSSAD rate is assumed to be 10 events/second. Furthermore, each packet was estimated to be a fixed size of 25 bytes. This would include the time and date stamp (estimated as 8 bytes) and parameter data (estimated as 1 byte) which are required in the regulation, alongside the GPS coordinates (estimated as 16 bytes), which are not required but are included as metadata in this analysis. This results in a front-end DSSAD buffer size of 5.3 Kbits.

Meanwhile, for the back-end device, an assumption of 6 months of DSSAD data storage was implemented. The size of the back-end buffer is determined by the average expected DSSAD rate multiplied by the 6-month period. Using an estimated DSSAD rate 4 events/minute and the fixed 25-byte packet size, the back-end buffer was calculated to be 210 Mbits.

Memory endurance characteristics

The sum of the buffer sizes determined the required densities for each of the components in Table 2. For this analysis, the F-RAM and NOR flash endurance characteristics were demonstrated by Infineon’s SEMPER NOR flash and EXCELON F-RAM devices. Endurance was assumed to be infinite for the front-end SRAM device, but data packets are considered lost during a power failure as this is a volatile memory.

This comparison model attempted to find the smallest density that could meet a life expectancy endurance requirement of 20 years.  The results of this comparison are shown in Table 2.

As shown in the table, the critical F-RAM + NOR flash solution advantage is in the case of a power loss situation. The worst-case scenario is in a situation where buffered information in volatile RAM without using a back-up battery would result in the loss of significant vehicle data during a crash.

In this case, if an erase is required at the start of an event, the system could lose all 20 seconds of pre-crash data plus the 2.68 seconds of time it takes to perform an erase on a 256-Mb SEMPER NOR device if the power is lost as the erase is completed. The corresponding data lost is calculated based on the assumed EDR and DSSAD data rates over this time.

Despite the high rate of cycling through the ring buffer, the EXCELON F-RAM was able to meet the endurance requirements and match the life expectancy of the RAM + SEMPER NOR flash solution.

As far as other potential front-end solutions, it should be noted that using other non-volatile technologies for the front-end such as EEPROM or RRAM would potentially require higher density requirements due to the lower endurance capabilities compared to F-RAM. Furthermore, the fast write time of EXCELON F-RAM provides proper storage for data packets sent to the front-end device in the immediate time frame prior to a power loss.

Why memory matters in data logging

Given the growth of EDR and DSSAD and the legal implications associated with these systems, reliable data storage is paramount and therefore reflected in legislative requirements. For instance, the requirement of “adequate protection against manipulation like data erasure of stored data such as anti-tampering design”. While there are different ways to secure the logged data on a system, a simple and robust method involves hardware.

The future of autonomous driving depends on logging for legal records, safety, and cutting-edge features. As systems become more complex, memory technologies are frequently challenged for performance, requiring creative solutions to satisfy the requirements.

Kyle Holub is applications engineer at Infineon Technologies.

Related Content

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• 7 Ways a Data Logger Can Save You Money
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• Why FRAM memories are suitable for data logging in ADAS designs

The post Building automotive data logging with F-RAM flash combo appeared first on EDN.

Дякуємо Товариству Червоного Хреста України! kpi пн, 12/15/2025 - 14:05

Студент НН ІТС Данііл Потомахін – віце-чемпіон Європи з пауерліфтингу Інформація КП пн, 12/15/2025 - 13:01

At the 71st IEEE International Electron Devices Meeting (IEDM 2025) in San Francisco (6–10 December), micro/nanotechnology R&D center CEA-Leti of Grenoble, France and STMicroelectronics of Geneva, Switzerland presented results showcasing key enablers for a new high-performance and versatile RF silicon platform cointegrating best-in-class active and passive devices used in RF and optical front-end modules (FEM). Their paper details 3D sequential integration of silicon-germanium (SiGe) heterojunction bipolar transistors (HBT), RF silicon-on-insulator (SOI) switches, and high-quality passives on a single wafer — opening a path to highly integrated, low parasitic, and targeting cost-efficient systems for next-generation wireless and wireline communications...

At the 71st IEEE International Electron Devices Meeting (IEDM 2025) in San Francisco (6–10 December), nanoelectronics research center imec of Leuven, Belgium, presented what it claims is breakthrough performance of (with Imax as high as 690µA/µm) for p-type FETs with monolayer tungsten diselenide (WSe2) channels, and improved fab-compatible modules for source/drain contact formation and gate stack integration...

At the 71st IEEE International Electron Devices Meeting (IEDM 2025) in San Francisco on 10 December, Japan’s NTT Inc of Tokyo, Japan presented what it it claims is the first amplification of millimeter-wave high-frequency signals used in wireless communications in aluminium nitride (AlN)-based transistors (Kawasaki et al, ‘First RF Operation of AlGaN-channel Polarization-Doped FETs with Average Al-content Over 0.75’). It has achieved this by designing a low-resistance structure...

Semiconductor and photonics manufacturer CHIPX of Dublin, Ireland plans to establish an 8-inch wafer fabrication facility in Malaysia, the first of its kind in the ASEAN (Association of Southeast Asian Nations) region. The facility will introduce gallium nitride on silicon carbide (GaN/SiC) manufacturing, driving Malaysia’s entry into front-end semiconductor production and accelerating domestic capability in photonics, high-bandwidth optical interconnects, and advanced materials engineering essential to next-generation AI and high-performance compute systems...

As the rupee continues to depreciate, crossing the magical figure of 90, the electronics manufacturing industry in India is set to take a blow. As India imports nearly 70 percent of the components used in TVs, whether Open Cell Panels or glass substrates, and even the memory Chips, a continued rise in the prices of memory chips along with depreciating rupees beyond 90 is set to impact the TV prices by around 3-4 percent by January 2026. The situation is further aggravated by the rising demand for High-Bandwidth Memory (HBM) for AI servers, which is driving a global chip shortage. 

Also, the chipmakers are largely focusing on the high-profit AI chips, lowering the supply of chips for legacy devices like TVs. Like any high-end device, Smart TVs are also heavily dependent on memory chips for various reasons, ranging from storing preferences to facilitating services. 

What are Memory Chips? 

Memory Chips are integrated chips used in TVs that store firmware, settings, apps, and user data, primarily using Electrically Erasable Programmable Read-Only Memory (EEPROM) for basic adjustments (like picture settings) and modern eMMC flash memory (like in smartphones) for smart TV OS, apps, and video buffering. The EEPROM mode allows the memory to retain data even when power is off and makes it essential for storing data like configuration settings and the system’s fundamental settings. 

Why is it so important? 

Since the chip stores such minimal yet crucial data, important for the functioning of smart TVs, they act as the brains of the TV’s memory.  Most importantly, these not only hold data, but also ensure that the TVs start up correctly and store the TV’s Operating system and Software. In crux, it is an integrated memory that, like any memory, runs smart features, remembers preferences, and displays content smoothly. 

7-10 % Price Hike 

According to media reports, Super Plastronics Pvt Ltd (SPPL)—a TV manufacturing company that holds licences for several global brands, including Thomson, Kodak and Blaupunkt—has said that memory chip prices have surged by nearly 500 per cent over the past three months. The company’s CEO, Avneet Singh Marwah, added that television prices could rise by 7–10 per cent from January, driven largely by the memory chip crunch and the impact of a depreciating rupee.

According to a recent Counterpoint Research report, India’s smart TV shipments fell 4 per cent year-on-year in Q2 2025, weighed down by saturation in the smaller-screen segment, a lack of fresh demand drivers, and subdued consumer spending.

The post What Are Memory Chips—and Why They Could Drive TV Prices Higher From 2026 appeared first on ELE Times.

ANRITSU CORPORATION and HEAD acoustics have jointly launched of an advanced acoustic evaluation solution for next-generation automotive emergency call systems (“NG eCall”).

The new solution is compliant with ITU-T Recommendation P.1140, enabling precise assessment of voice communication quality between vehicle occupants and Public Safety Answering Points (PSAPs), supporting faster and more effective emergency response.

With NG eCall over 4G (LTE) and 5G (NR) now mandatory in Europe as of 1 January, 2026, ensuring high-quality, low-latency voice communication during vehicle emergencies has become essential. After a collision, calls are conducted hands-free inside the vehicle cabin, where high noise levels, echoes, and other acoustic challenges can significantly degrade speech clarity. Reliable voice performance is therefore critical to accurately conveying the situation and enabling rapid rescue operations.

The solution integrates Anritsu’s MD8475B (for 4G LTE base-station simulation) or MT8000A (for both 4G LTE and 5G NR simulation) with HEAD acoustics’ ACQUA voice quality analysis platform. This combination enables comprehensive evaluation of transmitted (microphone) and received (speaker) audio under a wide range of realistic operating conditions.

Example Evaluation Scenarios
• Echo and double-talk situations where speaker output re-enters the microphone or simultaneous speech may affect intelligibility
• Cabin noise simulations representing real driving environments, including road, wind, and engine noise
By delivering a reliable and repeatable approach to voice-quality assessment, Anritsu reinforces its commitment to supporting automotive manufacturers and suppliers in the development of NG eCall and advanced in-vehicle audio systems, contributing to a safer and more secure mobility ecosystem.

The post Anritsu & HEAD Launch Acoustic Evaluation Solution for Next-Gen Automotive eCall Systems appeared first on ELE Times.

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Last year at a social get-together, I got immensely bored and heard a fire truck siren in the distance. I began brainstorming ways to model the ramping-up and ramping-down of the Q-siren and came up with this simple VCO design and a large capacitor. Like the physical sirens, the circuit has a power button (to ramp up the frequency) and a brake button (to quickly reduce the frequency. A fun side effect of the way I designed the controls is that when both buttons are depressed, the steady state frequency falls somewhere lower than it otherwise would, which mimics what would probably happen if you tried accelerating the turbine while the brake was engaged. (I have never heard this actually happen, but it’s a fun thought.) I’m sad that I’m not allowed to post a video on here, but if someone asks for one I’ll figure out a way to share it. submitted by /u/Nissingmo [link] [comments]

The temperature sensor of the heating station gave up and now it heats up indefinitely. Perfect for making your PCBs very crispy and crunchy. submitted by /u/Mmichex [link] [comments]

I am offered a huge lot of electronic components from a former TV repair shop that was active from 1973 - 2015. Resistors, capacitors, transistors, IC's and many other components. HV transformers (TV), switches, knobs, inductors, subassemblies, ... Most of it is sorted in over 40 Raaco bins, and the rest is partially sorted/unsorted. They are asking 400 euro and I have to decide tomorrow by noon. I think I will buy it, but it will take time to move it all and sort it again. submitted by /u/Few_Hornet5864 [link] [comments]

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Black thermoset resin packaging is probably far superior from an industrial standpoint, but I’m in love with the beauty of white ceramic IC packages from around the 1970s. submitted by /u/NEET_FACT0RY [link] [comments]

Пішов з життя професор Віктор Демидович Романенко kpi сб, 12/13/2025 - 13:32

This is in response to "light them up" from mr. blueball. Finally figured out how to light it up with a AA battery. These are RED led's. Please forgive me for any sacred electronic transgressions I may have committed in making this picture, I did not intend to harm or decrease the value of these amazing objects, I am a biologist dammit, not an engineer. In 1972, I visited my father's lab. After turning off the lights, he started turning on rows and rows of red, green and yellow LED's. It was an amazing sight. Thank you to all commentors for the great information and feedback on my first post titled: Interesting old Monsanto LED's 1972. submitted by /u/DuffmeisterBee [link] [comments]