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Microchip Technology has expanded its L-Series timing product portfolio with the launch of the LX-820 Radiation-Tolerant Quartz Oscillator for Low Earth Orbit (LEO) satellites and other space applications. The L-Series offers satellite developers different types of oscillators with varying levels of frequency stability, phase noise, power consumption and size, allowing them to choose the right solution for their specific mission requirements.

The L-Series sits between standard commercial oscillators and traditional high-reliability space products. It combines commercial- or military-grade components with additional inspections, electrical and thermal testing, and specialised manufacturing processes to meet the needs of space applications. The oscillators have undergone radiation testing as complete, working devices to check their ability to withstand Total Ionizing Dose (TID) and Single-Event Latchup (SEL). They offer radiation tolerance of up to 50 krad and have been tested for SEL at 40 MeV·cm²/mg. Most L-Series products also use specially processed quartz crystals to reduce changes in frequency caused by radiation. The L-Series oven controlled crystal oscillators (OCXOs) feature a rugged design and four-point crystal mounts to withstand launch conditions and the demands of their intended missions.

Designed to address two persistent challenges for satellite developers, the L-Series helps ease supply chain constraints while reducing budget pressure. Many timing solutions qualified for space environments have extended lead times and significant procurement costs. The L-Series is designed to provide a more accessible alternative, with many configurations available from stock or with lead times of less than 20 weeks. Additionally, the L-Series oscillators may lower overall program costs by reducing the need for the component pedigree, documentation requirements and inspection overhead that are typically associated with traditional high-reliability space-grade timing products.

“Satellite developers should not have to choose between dependable precision timing and the cost and schedule requirements of their mission,” said Randy Brudzinski, corporate vice president of Microchip’s frequency and time systems business unit. “Our L-Series oscillators bring together the performance, radiation tolerance and supply availability our customers need to confidently deploy their New Space applications using a precision timing solution that helps reduce both schedule and mission risk.”

The new LX-820 is available in a compact 3.2 mm × 2.5 mm surface-mount package and is designed to operate across a wide temperature range from -55°C to 125°C. The rugged device is engineered to meet MIL-PRF-55310 Level B and provides ±100 ppm performance. Additionally, the LX-820 supports CMOS output frequencies from 1.25 MHz to 135 MHz and low-voltage differential signalling (LVDS) output frequencies from 100 MHz to 250 MHz.

Modern satellite systems rely on highly accurate timing references to support communications, navigation, Earth observation, mapping and emerging lunar missions. As these applications can have different timing requirements, Microchip’s L-Series encompasses crystal oscillators (XOs), temperature-compensated crystal oscillators (TCXOs), oven controlled crystal oscillators (OCXOs) and a pulse-per-second (PPS) disciplined oscillator. These products allow developers to use compact XOs where size and broad frequency coverage are priorities, TCXOs where tighter temperature stability and lower power are needed, OCXOs for more demanding stability and phase-noise requirements, and a disciplined oscillator where PPS synchronization and holdovers are required.

Microchip offers an extensive portfolio of clock and timing systems, ranging from miniature component oscillators, to small plug-in timing server cards, to atomic clocks and multi-rack time scale systems. As a primary contributor to the world’s time, Microchip’s timing solutions are trusted, reliable and resilient. For more information, visit Microchip’s clock and timing solutions webpage.

The post Microchip Launches LX-820 Radiation-Tolerant Quartz Oscillator for LEO Satellites appeared first on ELE Times.

Mouser Electronics, Inc., the authorised global distributor of the newest electronic components and industrial automation products, announces a new global distribution agreement with Amphenol CDI. Customers can now buy Amphenol CDI’s rugged RF connectors, high-performance RF cable assemblies, aerospace interconnect solutions and more through Mouser’s global distribution network. Mouser now stocks products from more than 60 Amphenol divisions.

RF connectors for defence applications

Amphenol CDI’s RF connectors for defence applications feature a compact design engineered to optimise assembly density. These connectors are built to meet stringent industry standards, letting designers improve electrical performance while minimising overall system complexity. Designed for robustness and high tolerance to radial and axial misalignment, Amphenol CDI’s military-grade RF connectors deliver reliable blind-mate performance. Thanks to their durability and reliability, these connectors withstand frequent mating cycles without compromising signal integrity, providing dependable performance in demanding defence and aerospace environments.

Right-angle RF connectors with swept output

Amphenol CDI’s right-angle RF connectors with swept output are designed for high-frequency applications that demand low loss and high signal integrity. The right-angle design simplifies cable routing while ensuring reliable RF connectivity in the most critical designs. Typical applications for these connectors include aerospace, defence and space systems, as well as industrial platforms where durability and signal integrity are essential.

RF cable assemblies for defence applications

Amphenol CDI’s RF cable assemblies for defence applications are a high-performance alternative to traditional semi-rigid coaxial solutions, delivering comparable electrical performance with greater installation flexibility. Designed for RF and microwave systems with high component density, these hand-formable cable assemblies can be easily routed inside enclosures and connected to external equipment while preserving signal integrity. Their construction combines a tinned copper braid, an inner layer of rugged metallic foil shielding, and a high-precision dielectric and centre conductor. A flexible outer jacket allows tight bends, excellent shape retention and fast, efficient field installation.

Precision RF adapters up to 110 GHz

Designed for frequencies up to 110 GHz, Amphenol CDI’s precision RF adapters offer low insertion loss and reliable performance in demanding RF environments. The many interface and mounting options, including solder-mount and field-replaceable versions, let designers optimise PCB layouts and signal paths. Available in side-entry, vertical, angled and narrow-body configurations, these adapters support optimal RF transitions and efficient integration into systems. Precision manufacturing, controlled-impedance design and high ruggedness ensure stable performance in aerospace systems, semiconductor test equipment, advanced instrumentation and other high-frequency applications.

To learn more about the Amphenol CDI products available from Mouser, visit the Amphenol CDI page.

For more news about Mouser and our latest product releases, visit the Mouser newsroom.

Mouser technical resources and support

As an authorised global distributor, Mouser offers the widest selection of semiconductors, next-generation electronic components and the newest industrial automation products. Mouser customers can count on original, 100% certified and fully traceable products from every one of its partner manufacturers. To help speed up customer designs, Mouser’s website hosts a vast library of technical resources, including a Technical Resource Centre, and offers product datasheets, supplier-specific reference designs, application notes, design technical data, engineering tools and other useful information.

Thanks to Mouser’s free newsletter, engineers can keep up with the latest news on products, technologies and applications. Mouser’s email news and reference resource subscriptions can be customised to match customers’ and subscribers’ specific and changing project needs. No other distributor gives engineers this level of customisation and control over the information they receive. Discover emerging technologies, product trends and much more by signing up today.

Mouser offers thousands of industrial automation products, available in stock and ready for immediate shipment. From predictive maintenance devices and control panels to a full range of industrial power, sensor and safety products, Mouser’s portfolio is there for customers to help them design, build and maintain complete automation solutions. For more information, visit the industrial automation solutions page and follow Mouser on social media.

For more information about Mouser Electronics, visit mouser.it.

The post Mouser and Amphenol CDI Sign Global Distribution Agreement for RF Connectors appeared first on Open Electronics.

Left: my old tip35c Right: my new “tip35c” submitted by /u/Jack_Hinrichs [link] [comments]

Microchip Technology and Marelli have announced a new solution that allows graphics and video generated by the vehicle’s central computer to be accessed directly from the displays via ASA Motion Link (ASA-ML), an open standard for automotive video connectivity. The demonstrator of this solution helps vehicle manufacturers simplify display architectures, optimise system costs and increase sourcing flexibility, while supporting the transition to software-defined vehicles (SDVs).

ASA Motion Link: an open standard for video connectivity

ASA Motion Link is an open standard for automotive video connectivity and SerDes (serializer-deserializer) communication, defined by the Automotive SerDes Alliance (ASA), a global consortium of vehicle manufacturers, Tier 1 suppliers and semiconductor companies. By enabling secure, high-speed video and graphics transmission between products from multiple technology vendors, the standard supports greater compatibility across the automotive ecosystem and offers a scalable alternative to proprietary video transmission technologies.

As a founding member of ASA, Microchip is driving the automotive industry’s transition from proprietary connectivity technologies to open, interoperable standards, and has demonstrated broad interoperability with its camera solutions, now extending these solutions to enable display connectivity.

The joint solution for centralised architectures

As vehicle architectures evolve toward centralised computing and software-defined vehicles (SDVs), vehicle manufacturers are looking for connectivity solutions that can support growing performance demands while reducing complexity, controlling costs and enabling scalable vehicle electronic architectures. In the joint demonstration solution, graphics and video content generated by the vehicle’s central computer is processed and transmitted through Microchip’s ASA-ML VS7000 chipset over a standardised high-speed link.

Marelli is a pioneer in display-side integration of the technology, enabling configuration and optimisation of the ASA-ML deserializer to decode standardised video streams directly on the display. This ensures accurate reception, synchronisation and distribution of centrally generated content, including camera feeds, navigation maps, infotainment graphics and vehicle control interfaces, while enabling simplified electronic architectures on the display side.

What the protagonists say

“The transition to software-defined vehicles is fuelling demand for more open, flexible and scalable electronic architectures,” said Kelei Shen, president of Marelli Electronics Business. “As an integrator within the automotive ecosystem, Marelli brings together best-in-class technologies from different partners to deliver complete solutions to vehicle manufacturers. This collaboration highlights how open standards can accelerate innovation while delivering the interoperability needed for the next generation of vehicles.”

“Open standards play a fundamental role in accelerating innovation by reducing dependence on proprietary technologies,” said Kevin So, Vice President of Communications Business Unit at Microchip. “Our collaboration with Marelli demonstrates how ASA Motion Link gives automotive manufacturers a secure, interoperable and scalable connectivity solution that simplifies integration across the ecosystem.”

Technical strengths

• Open interoperability enabling seamless connectivity between cockpit systems and displays from different technology vendors.
• Greater supplier flexibility thanks to open protocol specifications supported across the automotive ecosystem.
• Built-in security with link-level authentication and encryption integrated into the communication channel.
• Robust data transmission with lossless communication and high immunity to electromagnetic noise.
• Scalable performance supporting data rates up to 16 Gbps to meet a range of display needs.
• Optimised efficiency made possible by integrated Time Division Duplex (TDD) functionality and simplified Forward Error Correction (FEC), helping to lower power consumption.
• Paths toward progressively more Ethernet-centric architectures that contribute to ever lower power consumption.

The collaboration demonstrates how open-standard connectivity supports the vehicle’s on-board network and electronics by enabling secure communication between centralised computing systems and displays. It also reflects Marelli’s broader commitment to adopting open standards that help simplify development, optimise system costs and foster a more open automotive ecosystem.

For more information on Microchip’s ASA-ML solutions, visit the dedicated website.

The post Microchip and Marelli: Open-Standard Display Connectivity for Software-Defined Vehicles appeared first on Open Electronics.

The next phase of AI evolution moves from fact-finding chatbots to a learnable system that can plan tasks, invoke tools, search, and take various steps (workflows). On the leading edge of this evolution are AI agents that utilize LLMs, tools, and context to move toward an explicit goal. When adopting agentic AI, a key architectural decision concerns whether to operate a single agent or manage many specialised agents.

Single Agent vs Multi Agent AI Systems allows organisations to determine the best architecture for their day-to-day activities. Single-agent systems are easier to manage and keep simple, though multi-agent system architectures help split larger workflows among different agents. That said, some people think more agents don’t necessarily mean better results. It all comes down to task type, security, lag, and cost.

Understanding Single-Agent AI Systems

A single-agent AI system has a single primary agent. That agent accepts input, decides what action to take, chooses a tool, and produces an ending result. It can interact with databases, utilize an application programming interface, invoke enterprise knowledge systems, or execute any of the others as it operates. Its architecture includes a language model, the system instructions, the tools you might have, and a context manager. It receives a request, decides what to do next, and observes the result.

For example, a customer service person might check the status of an order, refer to a database of delivery schedules, explain the reason for a delay, and write a response- all in the same conversation without transferring the conversation between different AI agents. The major benefit of single-agent AI design is that it is simple. Developers can tweak the main system prompt, adjust the tool authorizations, trial the model’s behaviour, and observe how it makes decisions.

Although a single-agent approach is preferable when it is capable of fulfilling the requirements, Google Cloud advises deploying a single agent. It can regress when one agent needs to handle too many tools, tasks, or conflicting prompts. These limitations may make it necessary to utilize multi-agent architecture.

What Are Multi-Agent AI Systems?

Multi-agent AI is when multiple agents work together to cooperate on a shared goal. Each of the individual agents might be given different source material, instructions, scope, and access to different tools, and therefore one may do one step. For example, in the flow of a piece of enterprise research, each of the agents might be given a job such as finding info, fact-checking the technical points, assessing the impact on the market, and then writing up the report.

This method is based on AI agent orchestration- initiating tasks, disseminating data, defining interdependencies, and consolidating the results. It is possible to guide the approach or use it on demand, where agents determine their next action.

These patterns are popular:

1. Sequential Orchestration: The agents follow a predetermined order, and one agent makes use of the output of the previous one.
2. Parallel execution: Completing various components simultaneously could decrease the amount of time to complete the task.
3. Coordinate-based architecture: A central agent assigns tasks to specialised agents and pools their results.
4. Hierarchical task decomposition: A lead agent breaks down a complex goal into a number of simple goals (possible till being simple enough to be assigned to low agents).
5. Collaborative or group-chat architecture: The agent shares outputs, challenges concepts, and iterates on a shared product.

The AI agent’s approach to orchestration explains these patterns and provides an example of how a trade-off exists in terms of the level of coordination, speed, and flexibility for any given deployment.

Single-Agent vs Multi-Agent AI Systems: Key Architectural Differences

The primary difference is in how you slice and dice each responsibility and what decision you’re making. In a single agent design, a single agent takes care of the complete workflow, even when talking to more than one tool. In a multi agent AI system, a set of agents are divided between responsibilities and communicate with each other through orchestration.

Task complexity is also important. Many structured tasks like answering customer questions, summarising documents, information retrieval, and the majority of data analysis can be achieved quickly by a single agent. Multi-agent systems are better if a workflow requires clear specialist roles, planning, or individual investigations.

The scalability and maintenance are also different. Adding new features and new tools can make a single agent system too complex to be manageable. Multi-agent modular systems will allow developers to change a single agent without causing all these implications in the system, as long as the interface or port to the agent is well specified. But multi agent systems also add the problem of additional communication, states, testing, and monitoring.

Cost also matters. A single-agent workflow might be able to use fewer model calls, but a multi-agent workflow could lead to the usage of more tokens and greater computing power. Parallel execution might lower the time taken for completing the task, but will bump up the peak resource consumption. Therefore, organisations need to assess single agent vs multi-agent architecture with actual task success rates, response times, and cost failure rates.

Real-World Use Cases of Single-Agent AI Systems

Single-agent AI use cases are more interesting if that one agent can do a workflow with only a few tools and KBs. Customer service: A single agent could answer a question about a product, find an order, and suggest troubleshooting steps. Productivity tools- summarize a document, search enterprise KBs, prepare for a meeting.

A further application is software development. A coding agent can examine a code repository, create code, execute tests using authorized applications, and make recommendations for repairs. An IT support agent could explore common problems, query monitoring systems, and make recommendations. These applications could take advantage of a fairly simple control structure. Organisations could set up rules for permissions, examine results, and incorporate human approval for critical actions without having to coordinate a large network of agents.

Multi-Agent AI Use Cases Across Industries

Multi-agent use cases are especially valuable when a business process can be achieved using multiple different functionalities. Within financial markets, various specialised agents can gather market information, monitor the risk profile of the portfolio, perform rule checks and make suggestions for actions. Financial transactions and other large transactions should still be subject to correct authorisation and regulation.

Functions might also be linked to, for example, watch sensor data from machinery, view your maintenance history, inventories of spare parts, and support fixing. A chain like this to combine functions would foretell failure and avoid downtime, yet to be safe, devices require suitable deterministic controls with people involved. For instance, one actor reacts to a security alarm, while another deals with connected phenomena, while the other starts compiling a report. Controls will need to restrict and authenticate access, because a wrong conclusion might cause a negative reaction to the incident.

The consequences might be beneficial for other links in the supply chain, too. For example, each agent could review inventory, track records of their suppliers, delays in shipping, and demand forecasts before producing the suggestion to human planners. For publishing and research, agents could handle source discovery, fact-checking, analysis, and writing. The results, however, still need human review, particularly if there are technical claims or fast-charging data.

Challenges, Security and Governance

However, multi-agent AI systems also pose new risks which organisations need to manage before deploying. For example, agents may generate inaccurate information, misinterpret commands, or deliver substandard results to other agents. The presence of several different elements can also make failures harder to track.

Security is crucial when agents have access to business apps, private files, or are equipped with tools that can modify data. Every agent should be assigned the minimum permissions they require. Businesses should verify tool inputs, restrict access to sensitive information, log key activities, and seek human approval for critical decisions.

Another challenge is context management. Agents require useful context to perform their tasks, but more context can add to processing costs and create distraction. Systems should deliver brief, task-specific context between agents, and shared state should be preserved when needed. Testing should test the whole workflow, not just individual agents. Appropriate metrics would be task success and accuracy, tool call error, latency, cost per task success, and human intervention.

Choosing the Right AI Agent Architecture

Choose between a single-agent or multi-agent system based on the task you are trying to solve, and not by the number of agents you want to use. If it’s something within a well-defined, relatively narrow scope and with narrow tool access, and where workload performance can be improved by providing more specific instructions or by designing the workflow, then you should probably want to use a single agent. Multi-agent design is appropriate when responsibilities entail specialised capabilities, isolated security domains, parallel execution, or coordination.

The most pragmatic solution may be to construct and test the simplest architecture capable of achieving the performance requirements; then, assuming that measurable constraints remain, deploy specialised agents and orchestration following. Long-term, the future of an agentic AI architecture isn’t simply about more agents but about more reliable, secure, measurable, and useful ones. For businesses, success will be designing an architecture that’s commensurate with real-world needs and ensures the costs, accountability, and human oversight are all well managed.

The post Single-Agent vs Multi-Agent AI Systems: Architecture, Key Differences and Enterprise Use Cases appeared first on ELE Times.

Interim steps to the end destination are often a wise policy, economically if for no other reason. And, it turns out, non-bleeding-edge gear can be made wiser in the process, too.

As recently mentioned, I shortly plan to begin migrating my LAN from 1 to 2.5 GbE (and 10 GbE in some spans). That said, to be clear, I don’t plan to do so in one fell swoop. And frankly, I may never complete the transition.

Most of my LAN clients connect to either the main router or mesh points over wireless, and it doesn’t make sense to update any switch hardware tethered to them until they’re upgraded beyond the Wi-Fi 5-plus-1 GbE backhaul technology threshold. And even if a LAN client hooks into the LAN fully in a wired fashion, most of them are 1 GbE-only.

There are exceptions, of course; my Apple Mac Studio in the office is 10 GbE-supportive, and I’ve upgraded the highest-end of my three QNAP NASs in the furnace room below it for 10 GbE cognizance, too. And then there are the multiple MoCA 2.x adapters, one in the furnace room, that I may reintroduce in the future. Perhaps obviously, therefore, the multi-port switches in both locations will get upgraded first; if the Cat 5e span between them turns out not to be 10 GbE-reliable, I’ve got 50 feet of optical cable and two SFP+ modules ready to replace it.

For the switch in the furnace room, sitting right next to the router and cable modem, and therefore acting as the LAN nexus, the mix of legacy and more modern, higher speed clients proved to be manageable in combination with an open-box (truly so, it turned out; never unpacked, far from used) Zyxel device, the XGS1010-12, that I bought for $49.99 on eBay.

As you can see from the photo, it baseline-integrates eight 1 GbE ports, the same quantity and speed as with the switch I’m currently using, a TRENDnet TEG-S81g. But there are also two 2.5 GbE ports, along with two 10G SFP+ cages. Not only will the XGS1010-12 expand my total port allotment at that location, its RJ-45 and SFP+ additions will deliver higher speeds, too. And, it turns out, another pleasant surprise also awaited me post-purchase.

Switch types

Both my existing switch and the Zyxel XGS1010-12 are unmanaged, meaning (to quote Wikipedia) that they have no configuration interface or options. They are plug and play. They are typically the least expensive switches, and therefore often used in a small office/home office environment. Although likely running firmware, it’s usually non-upgradeable, and no settings or broader graphical user interface (GUI) exist for the user to access, either. Therein the lack of a MAC address on my XGS1010-12’s underside.

Managed switches, on the other end of the spectrum, are (as the name implies) user-configurable and -updateable. Why would you want such a thing? One example is virtual LAN (VLAN) support, the ability to isolate various clients (and clusters of them) so that they can’t access other client groups and, in some cases, the WAN either. One well-known example here is the “guest network” feature bundled with many modern routers, which provides visitors with the ability to use the Internet without allowing them to “see” devices on the main LAN.

You might also want to, for example, be able to isolate “smart home” IoT devices from the rest of the LAN so that, should one of them get hacked, the infection can’t then spread elsewhere. Managed switches also enable you, for example, to prioritize traffic flowing through a particular port (for VoIP applications, say), to hard-wire various ports’ bandwidth and duplex settings, to implement MAC filtering and other network access rules, to aggregate multiple ports for the same connection (to a multi-port NAS, for example), and to more broadly monitor real-time network traffic conditions, along with other features.

And between these two extremes is the “smart” switch, implementing a subset of the fully managed switch’s capabilities, across a subset of the total available ports, but in a more user-friendly fashion. Take, for example, the front panel multi-position configuration switch offered with this low-priced Tenda device.

The lion in sheep’s clothing

All of which leads to the XGS1010-12’s managed “big brother”, the XGS1210-12. Notice the familial name similarity? They could, in fact, be twins, judged by their visual commonality (aside, of course, from the respective product names on the front panels, and the MAC address stamped on the XGS1210-12 underside).

It turns out, in fact, that the hardware allotment is identical between the two, aside from one other front panel deviation; the XGS1210-12 extends a PCB-mounted reset button to the exterior for easy user access. They otherwise differ (I’m speaking specifically of my XGS1010-12 with hardware version A1; hold that thought) only in the software running inside. Have you guessed yet where this tale is headed?

After purchasing the XGS1010-12 unmanaged switch, and while waiting for the eBay to ship it to me, I did a Google search on the product code to see what else I could find out about it. Near the top of the results page, I excitedly learned, was a Reddit post (along with subsequent follow-up posts from the original poster, and broader r/homelab community discussion) describing how to hack the XGS1010-12 and upload the XGS1210-12 firmware to it, converting it to the managed-switch version in the process.

“But Brian,” you might be thinking right about now, “I thought you said that unmanaged switches don’t have user-accessible GUIs?” I did, actually, but I never said anything about a command-line user interface (CLI), did I? What Redditor zeda1ert realized was that in-between two of the side passive airflow vents was a standard UART console header.

The Reddit post has detailed instructions; you’ll see in the ensuing conversation that three years later I chimed in with a bunch of questions. Fortuitously, zeda1ert was still monitoring the post and graciously helped me. The following few paragraphs summarize the process.

Connect a USB-UART adapter (I own both this 3.3V one and this 5V one and can use either, because the switch’s 3.3-V UART circuitry is self-powered, so only the adapter’s Tx, Rx and GND need to be hooked up, although the latter’s cable is conveniently longer) to the switch and your computer, start up a CLI terminal session (I used MacOS’s built-in command-line “screen” utility), and issue a timing-critical ESC to terminate the switch’s boot sequence before it finishes.

Now configure a MAC address for the switch, along with static IP addresses for both the computer and switch (different, but on the same subnet), then fire up a TFTP server session on the computer (MacOS has a built-in one, but it’s also command line-based and fairly cryptic, so I instead went with SoftPerfect’s excellent freeware GUI utility, which I’ll include in the next best-of list). Use it to download and install the most recent v1 XGS1210-12 firmware to the switch. Then reboot, and the switch is now managed.

And speaking of “re”(boot), the missing hardware “re”set button isn’t a problem in practice, as you can alternatively accomplish the same reset outcome through either the switch’s CLI or GUI.

Hardware fortuity

I’d earlier explicitly noted that mine was an A1 hardware version unit. The distinction was initially important, and remains so for “stock” firmware, although broadly no longer (stay tuned). Partway through its ongoing product life, Zyxel redesigned the XGS1010-12, switching from Realtek’s RTL8226 2.5 GbE PHYs to the newer RTL8221B with reduced power consumption, therefore also lower heat dissipation.

Unfortunately, this caused an incompatibility with the legacy firmware for the XGS1210-12, which wasn’t similarly hardware-updated. Installing XGS1210-12 firmware on a version B1 XGS1010-12 resulted in nonfunctional multi-gig ports.

A further nuance involves the various A1 revisions, A, B, and C. Originally, it was not possible to install any newer v2 XGS1210-12 firmware (patch 0 link, patch 1 link with OpenSSL vulnerability fix) on a version A1, revision C XGS1010-12 unit such as mine.

Scroll down in the Reddit thread, though, and you’ll see that another contributor later figured out how, via resistor relocation, to spoof the board identifier, enabling successful v2 firmware update. But I haven’t bothered doing so, because I have a more robust alternative next step planned for eventual implementation.

Open source once again saves the day

Three years back, when the original Reddit thread post was published, OpenWrt development for the XGS1010-12 was immature and insufficiently staffed, with the resulting available build functionally incomplete. A lot has changed since then, notably including the inclusion of support for version B1 units’ RTL8221B PHYs (in spite of Realtek’s longstanding and ongoing open-source reticence) beginning in mid-2026.

Right now, the v1 “stock” XGS1210-12 conversion does everything I need, and since the switch isn’t exposed to the Internet, I’m not worried about its ongoing “Heartbleed” OpenSSL compromise. But at some point, I’ll probably take the plunge and further migrate to OpenWrt instead. If and when I do so, I’ll report the result here in the form of another blog post. And until then, I as-always welcome your thoughts in the comment on what I’ve discussed in this post!

—Brian Dipert is the associate editor, as well as a contributing editor, at EDN.

Related Content

• The multi-gig migration: Motivations and implementations
• NAS upgrades: proprietary lockouts and surmounts
• The whole-house LAN: Achilles-heel alternatives, tradeoffs, and plans
• SFP: Add-in module delivers diminutive performance, flexibility
• Heartbleed: the wakeup call the open-source community needed?

The post Hacking a network switch for management enhancements appeared first on EDN.

The winners of the 2026 Infineon Start-up Challenge – the competition for critical technologies for the next generation of humanoid robots – have been announced by Infineon. After four months of hard work, the jury finally chose 15 startups from more than 100 submissions to pitch their solutions during the Infineon Start-up Challenge Demo Day at EBSCON – the Electronic Based Systems Conference in Graz, Austria.

The challenge united start-ups from Europe and Asia, investors, industry innovators, and technology leaders around robotics and physical AI innovation. The participants innovated solutions to enable humanoid robots to more effectively sense their surroundings and interact with the environment, handle objects, and execute precise movements. The winners were chosen by an international jury of industry, venture capital, start-up ecosystem, and technology innovation experts.

“Strategic collaboration with start-ups creates a win-win situation, combining novel ideas with industrially proven semiconductor technologies and thereby accelerating innovative, market-ready applications,” said Sören Jehmlich, Vice President Ventures, Start-ups & Ecosystems at Infineon. “The Start-up Challenge is a key pillar of our innovation culture, bringing together entrepreneurial courage, technological expertise and rapid implementation.”

“The quality of innovation we have seen throughout this year’s challenge has been remarkable. Start-ups from Europe and Asia demonstrated how diverse perspectives and technologies can come together to solve some of the most important challenges in humanoid robotics. Programs like the Infineon Start-up Challenge are essential for connecting innovators across regions and accelerating the path from breakthrough ideas to real-world impact,” highlights Jerry Park, Director Asia Pacific at Infineon.

The winners are shaping the future of humanoid robotics

First place went to AdapTronics S.r.l. from Italy with its innovative gripping technology, which allows robots to safely handle a wide variety of objects without conventional suction cups or mechanical grippers. Such flexible object handling is a key capability for next-generation humanoid robots. The technology also addresses applications in logistics, packaging, and future space-robotics. The jury highlighted its versatility, innovation, and potential for industrial use. “Winning the Infineon Start-up Challenge is a great recognition of our team’s work and vision,” said Lorenzo Agostini, Founder and CEO at AdapTronics S.r.l. “The challenge gave us valuable access to technology experts, industry insights and a strong innovation network. We look forward to further advancing our solution and exploring new opportunities for collaboration.”

COSMOKE and TECHiFAB complete the podium

Second place went to COSMOKE from South Korea. The start-up developed COSKIN, an innovative flexible magnetic tactile sensing technology that enables humanoid robots to perceive touch, pressure, and physical interactions. By providing essential tactile feedback for dexterous manipulation and safer human robot interaction, COSKIN plays a key role in advancing next-generation humanoid robotics and physical AI.

TECHiFAB from Germany took third place with its In-Memory Computing based approach to real-time motor control for robotic actuators. This is physical AI by definition and is designed to enable faster, more energy-efficient and safer control while improving performance directly within the drive train of humanoid robots.

The solutions presented during the challenge reflect the technologies required for the next generation of humanoid robots, from tactile sensing to dexterous gripping and precise motor control. To support the start-ups in developing and validating their concepts, Infineon provided access to dedicated hardware and software platforms, including Environmental Sensing Kits, Artificial Skin Kits, Motor Control Kits, Visual Feedback Kits, and in-house AI development software, enabling teams to accelerate prototyping and transform innovative ideas into scalable applications.

“Humanoid robots are the most complex form of physical AI and highly relevant for Infineon,” said Dirk Geiger, Senior Director & Team Lead Humanoid Robotics at Infineon. “They combine power, sensing, real-time connectivity, safety and security with software and AI compute, turning machines into autonomous systems. No single company can master
this complexity alone. With the Start-up Challenge, we gave start-ups early access to our hardware stack as well as our software and system offering and brought them together with our partners and application experts. The solutions shown prove how quickly ideas can become building blocks for scalable humanoid platforms and give valuable insight into where the technology is heading.”

The Infineon Start-up Challenge is part of the global Infineon Start-up Co-Innovation Program, in which Infineon collaborates with start-ups as a technology and development partner. As the winner of the Infineon Start-up Challenge 2026, AdapTronics will now join the Infineon Start-up Co-Innovation Program to further develop and scale its solution together with Infineon. The collaboration will officially kick off at the Start-up Night in Munich in November, where Infineon showcases successful start-up partnerships and highlights the value of start-up-driven innovation. Infineon continues to engage with other promising participants for future technological and business collaboration. By combining the agility and creativity of start-ups with Infineon’s technological expertise and global capabilities, the program supports the development of scalable applications and accelerates innovation in humanoid robotics and physical AI.

The post Infineon Announces Winners of 2026 Start-up Challenge on Humanoid Robotics appeared first on ELE Times.

Recently, I suddenly had a strong desire to make an interesting USB device. Once again, when I was browsing AliExpress, I came across an STM32F070 for about 49 cents, and I bought it right away. When it arrived, the question arose of convenient debugging during development, and for that purpose I made this board. I wanted to share it. submitted by /u/Potential_Step1619 [link] [comments]

Waveshare has put together a devkit built around the ESP32-C5-WROOM-1U module and a 3.5-inch capacitive touch IPS display. It is the largest ESP32-C5 board with a touch display seen so far, and it is meant for building voice and visual interfaces that talk to large online AI models. The 32-bit RISC-V processor runs at up to 240 MHz, with 384 KB of SRAM, 320 KB of ROM, 8 MB of PSRAM and 32 MB of Flash. The low-power RISC-V core, meanwhile, runs at 40 MHz.

The radio covers dual-band Wi-Fi at 2.4 GHz and 5 GHz, Bluetooth 5 LE and IEEE 802.15.4 for Zigbee 3.0 and Thread. So the board is not limited to classic connectivity: it can join a Matter or Thread home automation network without extra modules. Anyone who wants to start from a simpler base can still find an ESP32 development board with Wi-Fi and Bluetooth for their first experiments.

Display, touch and sensors on the I2C bus

The capacitive IPS panel measures 3.5 inches, has a resolution of 320 x 480 pixels and supports 262K colours. The ST7796 driver drives the display over SPI, while the FT6336 touch chip answers on the I2C bus. The board also integrates a six-axis QMI8658 IMU, a PCF85063 RTC and an SHTC3 temperature and humidity sensor. For storage there is a TF card slot, handy for logs and multimedia files.

The audio section relies on the ES8311 codec and the NS4150B amplifier, with microphone and speaker already on board. The board can therefore record voice, play audio and handle a conversation with a remote assistant. The factory firmware is based on ESPBrookesia, while the tutorial for the XiaoZhi AI voice assistant shows how to connect to online AI model platforms. The manufacturer collects examples and instructions on the Waveshare maker site.

AXP2101 power and expansion pins

Power management goes through the AXP2101 chip. The optional 3.7 V lithium battery is charged through the MX1.25 connector or from the USB Type-C port. The board measures 95.11 x 63.67 x 14.10 mm and offers a 32-pin expansion connector with 2.54 mm pitch, so it can be plugged into a breadboard without adapters.

• ESP32-C5-WROOM-1U: 32-bit RISC-V up to 240 MHz, 384 KB SRAM, 320 KB ROM, 8 MB PSRAM, 32 MB Flash
• Display: 3.5-inch capacitive touch IPS, 320 x 480 pixels, 262K colours, ST7796 driver over SPI
• Touch: FT6336 chip over I2C
• Sensors: six-axis QMI8658 IMU, PCF85063 RTC, SHTC3 temperature and humidity
• Audio: ES8311 codec, NS4150B amplifier, microphone and speaker
• Power: AXP2101 PMU, 3.7 V lithium battery, USB Type-C or MX1.25
• Optional camera: BF3901 at 320 x 240 pixels

On the software side you can choose between ESP-IDF, Arduino IDE and Visual Studio Code with the Espressif IDF plugin. For anyone who wants to add external memory to the project, the catalogue also offers a microSD card reader with SPI interface, useful when the 32 MB of Flash are not enough for audio files.

Prices for the development kit range from 31.99 to 35.99 dollars in the manufacturer’s online store, from 37.99 to 43.99 dollars on AliExpress and from 43.99 to 47.99 dollars on Amazon, depending on whether you choose the version with or without camera and battery. Finally, anyone who wants to measure the environmental conditions around the board can add a module with a DHT11 sensor on the 32-pin connector.

Source: https://docs.waveshare.com/ESP32-C5-Touch-LCD-3.5

Related products

• ESP32 – 32 GPIO development board with WiFi and Bluetooth
• MicroSD Card Reader module with SPI interface
• DHT11 Temperature and Humidity Sensor Board

The post ESP32-C5 with 3.5-inch touch display: the Waveshare devkit for voice AI appeared first on Open Electronics.

Infineon Technologies AG is expanding its technology partnership with NVIDIA based on 800 Volt direct current (VDC) power architectures for AI data centres. The latest from the companies is an announcement timed to NVIDIA’s GTC Berlin developer conference based on the high-voltage intermediate bus converter (IBC), which is one of the most critical and challenging conversion stages in the power chain of AI data centres, with Infineon’s gallium nitride (GaN) emerging as a preferred technology. This builds on the companies’ prior collaboration announced in May 2025, and elaborated on in October 2025, which included power-path protection and hot-swap functionality for 800 VDC server architectures.

“AI is fundamentally reshaping the demands we place on power infrastructure, and semiconductors are at the heart of solving that challenge,” said Jochen Hanebeck, CEO, Infineon Technologies AG. “Our collaboration with NVIDIA on 800 Volt power architectures shows what is possible when deep semiconductor expertise meets the pace of innovation required by AI. Gallium nitride-based system solutions are a key enabler of this next generation of data centres, and Infineon is proud to help power the AI era from grid to core.”

The growing power demands of AI workloads have driven data centre designers to adopt intermediate-bus architectures. An intermediate bus converter (IBC) steps down the main DC bus voltage and supplies a lower voltage to subsequent power-conversion stages, which generate the voltage levels required by AI processors. This multi-stage approach helps manage power-distribution losses and improve overall efficiency while meeting strict constraints on board space, thermal management and system reliability. As AI computing requirements grow, 800 VDC is emerging as an additional power-distribution approach designed to support higher power densities in AI data centres.

Gallium nitride is well suited to meet these requirements. Compared to silicon, GaN allows power devices to switch significantly faster with lower losses, which enables higher switching frequencies of up to 1 MHz at the IBC stage. This in turn allows the size of magnetic components and passives to shrink considerably, directly translating into higher power density and lower board heights, a critical advantage as rack space becomes an increasingly scarce resource in AI data centres. At the same time, GaN’s low conduction and switching losses support best-in-class conversion efficiency, helping to limit heat generation even as power levels per rack continue to climb toward the megawatt range. These characteristics make GaN the preferred semiconductor technology today capable of meeting the combined demands of power density, efficiency, and fast transient response at the IBC stage, a position Infineon has built on the back of many years of leadership in GaN development and manufacturing. In combination with PSoC control C3 and EiceDRIVER product families, full system solutions for IBCs are provided by Infineon.

Infineon’s GaN portfolio supports the full range of conversion ratios required at the HV IBC stage, including 800 V to 50 V, 800 V to 12 V, and 800 V to 6 V, giving data centre operators the flexibility to optimize rack architectures without compromising on power density or efficiency. At this combination of high switching frequency, power density and efficiency, the GaN power switches are used to their full benefits. Infineon’s technology leadership in power semiconductors relies on extensive in-house manufacturing capabilities as well as application and system expertise built up over many years. The company’s portfolio spans IBC solutions across silicon, gallium nitride and silicon carbide, supporting customers along the entire range of their design requirements.

Infineon and NVIDIA collaborate along the entire data centre power chain. In addition to IBCs, this also includes power path protection solutions, as announced in October 2025, targeting safety and service aspects such as the hot-swap controller functionality and enabling future server boards to operate in 800 VDC power architectures.

This advanced collaboration underscores Infineon’s position as a grid-to-core power semiconductor partner for AI infrastructure, supplying solutions across the full power delivery chain, from grid-facing power supply units to the point of load at the processor.

The post Infineon and NVIDIA Advance GaN-Based Power Conversion for 800 VDC AI Data Centres appeared first on ELE Times.

Futura Elettronica, the company behind Open Electronics, and its Italian magazine Elettronica In are Technical Partners of Maker Faire Rome again this year. The fair is the yearly meeting point of the European maker community.

23 to 25 October at the Gazometro Ostiense

The 2026 edition takes place from 23 to 25 October, once again at the Gazometro Ostiense in Rome. In recent years this striking industrial venue has proved a perfect home for three days dedicated to makers.

Find us at stand M15

Look for stand M15, where you can talk to the Futura Elettronica team about your projects, ask for technical advice and see the products up close.

Starter kits, boards and books at the fair

Futura Elettronica will bring a large part of its range to Rome: starter kits, boards, components, tools, the Elettronica In magazine and books (the latter two are in Italian). The catalog counts about 6,000 products, so we cannot bring all of them. If there is a specific product you would like to see in person, let us know before the fair and we will try to have it with us.

Tickets and the full programme are available on the official website, makerfairerome.eu.

The post Open Electronics at Maker Faire Rome 2026: Come and Meet Us appeared first on Open Electronics.

Littelfuse is expanding its family of omnipolar TMR switches with the new TX00AT314AMA sensor, which brings the proven performance of the TX00 platform into a TO-92 package with wire leads. The device offers high sensitivity, ultra-low power consumption and omnipolar detection, along with a diversified sourcing option thanks to its South Korean origin.

A new format for the TX00 platform

Littelfuse, Inc., a diversified industrial technology manufacturer that creates solutions for the safe and efficient transfer of electrical power, today announced the TX00AT314AMA omnipolar TMR switch sensor, the latest addition to the TX00 TMR switch family. The TX00AT314AMA delivers the same proven performance as the TX00AS314TRA SOT-23-3 — high sensitivity, ultra-low 1.5 µA power consumption, omnipolar detection and switching speeds up to 1 kHz — in a TO-92 package with wire leads and with South Korea as the country of origin, giving design teams a new form-factor option and a diversified supply chain.

Technology and technical features

The TX00AT314AMA integrates a precision TMR (Tunnel Magnetoresistance) sensing element with CMOS signal processing circuitry, including an integrated voltage generator, a low-noise amplifier, a comparator and a Schmitt trigger, to ensure accurate switching, strong noise immunity and excellent thermal stability. Like its SOT-23-3 counterpart, it has an X-axis (in-plane) magnetic sensor for detecting fields parallel to the sensor surface, offering greater flexibility in mechanical design. The device operates with a typical supply current of just 1.5 µA and supports high-speed detection up to 1 kHz.

Like all members of the TX00 family, the TX00AT314AMA features omnipolar detection, which lets it respond to both North and South magnetic poles without polarity alignment constraints. Its precise operate and release thresholds, combined with built-in hysteresis, ensure clean, bounce-free switching even in electrically noisy environments.

Statement from Bavly Obaid

“The TX00AT314AMA gives design engineers a new way to access the proven performance of the TX00 platform,” said Bavly Obaid, Global Product Manager, Sensors at Littelfuse. “The TO-92 package supports through-hole assembly and prototyping-friendly integration, while the South Korean origin gives our customers a concrete option for supply chain diversification — two things that matter greatly in today’s design environment.”

Key features and benefits

• Ultra-low power consumption (1.5 µA typ.) extends battery life in always-on systems
• High sensitivity (~14 Gauss) enables reliable detection with small magnets
• Omnipolar detection simplifies design and reduces alignment requirements
• Fast response (up to 1 kHz) supports dynamic and rotational detection
• Integrated signal conditioning and hysteresis improve noise immunity and switching stability
• TO-92 package with wire leads supports through-hole assembly and prototyping-friendly integration

Markets and applications

The TX00AT314AMA is designed for applications that require low power consumption, high reliability and flexibility from prototype to production, including:

• Home automation (smart meters with tamper detection, position and limit sensing)
• Industrial automation (proximity detection)
• Consumer electronics (appliances, power tools, battery-powered IoT devices and wearables)
• Utilities (gas, water and heating metering)

By combining the proven performance of the TX00 with a through-hole form factor and diversified origin, the TX00AT314AMA helps engineers design smaller, smarter and longer-lasting products while reducing maintenance needs and improving system reliability.

The TX00AT314AMA expands the packaging and sourcing options within Littelfuse’s TX00 TMR switch family, giving design teams greater flexibility without compromising the performance characteristics engineers already rely on.

Frequently asked questions about the TX00AT314AMA omnipolar TMR switch sensor

What makes TMR technology better than Hall-effect sensors?

TMR sensors offer higher sensitivity and significantly lower power consumption than Hall-effect devices. This enables reliable detection with smaller magnets while extending battery life in always-on applications.

What does omnipolar detection mean for designers?

Omnipolar sensors detect both North and South magnetic poles, eliminating the need for precise magnet orientation. This simplifies mechanical design and reduces assembly complexity.

How does the TX00AT314AMA compare with the TX00AS314TRA?

The TX00AT314AMA shares identical electrical and magnetic characteristics with the TX00AS314TRA, including 1.5 µA supply current, 14 Gauss sensitivity and 1 kHz switching speed, but in a TO-92 package with wire leads and South Korea as the country of origin. It is the right choice when through-hole mounting, prototyping-friendly assembly or supply chain diversification is a priority.

What kinds of applications benefit most from this sensor?

Applications that require continuous operation, compact size and high reliability — such as smart meters, proximity switches and portable electronics — benefit most from its performance.

How does the device maintain reliable switching in noisy environments?

An integrated Schmitt trigger and precise hysteresis ensure stable switching behavior. This prevents false triggering and guarantees clean output signals even in electrically noisy systems.

What are the main distinguishing features of the TX00AT314AMA within the TX00 family?

Two things set the TX00AT314AMA apart from others in the TX00 family: its TO-92 package with wire leads, which enables through-hole printed circuit board assembly and easy prototyping, and its country of origin, South Korea, which offers a non-Chinese sourcing option for customers managing supply chain risk. Its performance specifications are identical to those of the TX00AS314TRA.

Why does the country of origin matter for the TX00AT314AMA?

The TX00AT314AMA is produced in South Korea, making it one of the first Littelfuse TO-92 magnetic switches with non-Chinese origin. For customers facing tariff exposure, trade policy risk or internal supply diversification requirements, it offers a qualified alternative with performance identical to the TX00AS314TRA without requiring a redesign.

Availability

The TX00AT314AMA is available in a TO-92 package, supplied in ammunition-style packaging. Sample requests can be submitted to any authorized Littelfuse distributor worldwide. For a list of Littelfuse distributors, visit Littelfuse.com.

For more information, the product page for the TX00AT314AMA omnipolar TMR switch sensor is available.

The post Littelfuse Expands Omnipolar TMR Switch Family with TO-92 Option appeared first on Open Electronics.

Keysight Technologies, today announced the Functional Interconnect Test Solutions (FITS)-16CH digital-layer error performance validation system, expanding Keysight’s FITS portfolio for optical, active copper, and passive copper interconnects. With 16 transmit and 16 receive channels, FITS-16CH has twice the channel density of FITS-8CH, and is designed to validate complete interconnect assemblies across research and development, product design, manufacturing, and pre-and post-production AI and network infrastructure deployments.

As interconnect speeds increase, testing only the physical-layer does not provide a complete view of system-level error performance. FITS-16CH combines bit error ratio (BER) and forward error correction (FEC) measurements at the digital layer to evaluate how complete interconnect assemblies perform under real-world conditions. The platform enables 106G and 212G lane-rate validation for today’s 800G interconnects and emerging 1.6T technologies.

FITS-16CH supports validation across a broad range of optical and electrical interconnects. These include full-retimed optics (FRO), active optical cables (AOCs), linear-retimed optics (LRO), linear pluggable optics (LPO), active copper cables (ACCs), active electrical cables (AECs), passive direct attach cables (DACs), and high-speed copper flyover cables used in networking and high-performance computing equipment. The platform also supports development and manufacturing workflows for silicon chips, networking equipment, and interconnect products, as well as performance benchmarking for data centre operators.

Key capabilities include:

• Higher channel density for complete-assembly validation: With 16 transmit and 16 receive channels, FITS-16CH is designed to test fully assembled interconnects using two Module Compliance Boards (MCBs) with independent channel groups and MCB controls, enabling teams to validate interconnect performance on more lanes simultaneously, ensuring a high degree of system-level qualification.
• Broad interconnect support and insertion-loss capability: A large insertion-loss budget supports signals across lossy channels and customer fixtures, enabling validation of a broad range of optical and copper interconnects, including active copper and high-speed copper flyover cables.
• Automated lane tuning: The FITS Windows 11 graphical user interface integrates FITS-16CH with the Keysight DCA-X to automatically calculate optimal transmit finite impulse response (FIR) tap settings and open the electrical eye. The automated process can reduce tuning time to a few minutes compared with manual tuning that can take hours, days, or even weeks.
• Flexible integration and automation: FITS-16CH can integrate as a transmitter or receiver with Keysight data communications analysers (DCAs), high-performance bit error ratio testers (BERTs), and UXR real-time oscilloscopes. The platform supports automated validation workflows with Standard Commands for Programmable Instruments (SCPI) API support, automatic real-time charts and data tables, pass/fail flagging, and PDF and .csv report generation. The solution reduces validation complexity by using the common FITS software framework, providing a familiar environment across the FITS portfolio.

Ameet Suri, Vice President of Product, Credo Technologies, said: “The tighter margins at 1.6T make it essential to evaluate active electrical cable performance at the system level, not in isolation for each link. Keysight’s solutions give Credo a practical way to test our AEC cables during development and qualification, so issues surface sooner and designs reach production with greater assurance.”

Ram Periakaruppan, Vice President and General Manager, Network Test & Security Solutions, Keysight, said: “As interconnect speeds increase, manufacturers need to validate more lanes simultaneously on many types of interconnects without adding unnecessary complexity to their labs. FITS-16CH expands our functional interconnect validation portfolio with the capacity, flexibility, and automation needed to help engineers move from product development and qualification to mass production with greater confidence.”

The post Keysight Expands Active and Passive 1.6T Copper Interconnect Validation for Scale-Out Data Centres appeared first on ELE Times.

In an exclusive interview with Anwesh Koley of ELE Times, Prasanth Viswanathan Pillai, Design Manager, Senior Member Technical Staff (SMTS), Texas Instruments, shares his views on the recent innovations at TI and how next-generation applications are simplifying the path from design to deployment.

ELE Times: Texas Instruments recently introduced the AM13Ex MCU family at Embedded World 2026. Could you walk us through the core innovation behind this launch and its significance for the embedded systems market?

Prasanth Viswanathan Pillai: At Embedded World 2026, Texas Instruments introduced the AM13Ex MCU family, designed to help developers bring intelligence closer to where data is generated and decisions are made. The core innovation behind the AM13Ex family is the integration of TI’s TinyEngine Neural Processing Unit (NPU) alongside an Arm Cortex-M33 core, dedicated hardware accelerators, and an advanced real-time control architecture on a single chip. This combination enables developers to run AI inference directly at the edge while maintaining deterministic real-time control performance.

The first device in the family, the AM13E23019, is built for applications that require both intelligent decision-making and precise control. It combines a 200MHz Cortex-M33 core, TinyEngine NPU, trigonometric math acceleration, integrated security features, and high-performance analogue peripherals, enabling developers to address increasingly complex industrial and embedded workloads on a single platform.

For the embedded systems market, this represents an important shift. Embedded devices are evolving from performing fixed functions to becoming intelligent, adaptive systems capable of local data processing and real-time decision-making. By integrating AI acceleration, real-time control, and security into one device, the AM13Ex family helps reduce system complexity and improve energy efficiency.

ELE Times: Texas Instruments also recently expanded its MCU portfolio with the MSPM33C321A. What role does this device play in TI’s broader embedded strategy, and what opportunities does it create for developers?

PVP: The MSPM33C321A reflects Texas Instruments’ commitment to delivering highly integrated, scalable microcontroller solutions that address the growing demands of modern embedded applications. Built on the Arm Cortex-M33 core, the device combines processing performance, integrated security features, advanced communication capabilities, and precision analogue integration in a single platform.

A key differentiator of the MSPM33C321A is its rich analogue and control integration, including high-speed ADCs, configurable analogue peripherals, and motor-control capabilities. These features make it well-suited for applications that require accurate sensing, real-time control, and reliable operation, while helping developers streamline system design.

For developers, the MSPM33C321A opens opportunities across a wide range of applications, including industrial automation, motor drives, building automation, smart appliances, and intelligent sensing systems. Additionally, as part of the MSPM0 portfolio, it enables developers to leverage a common software ecosystem and development environment, supporting greater design flexibility and scalability as product requirements evolve.

ELE Times: How does the Arm Cortex-M33 architecture support next-generation embedded applications?

PVP: At the core of M33C321 is the Arm Cortex-M33 architecture, which is built to balance performance, efficiency, and security. Its TrustZone-enabled security framework provides hardware-level protection, which is increasingly essential as connected systems expand.

At the same time, its deterministic real-time responsiveness and DSP capabilities make it ideal for applications that require precision, reliability, and efficient decision-making at the edge. This architecture gives developers the flexibility to design for today’s needs while building platforms that can scale with tomorrow’s complexity.

ELE Times: What was the role of TI India in the development of this MCU, and how did the local team contribute to enabling this innovation?

PVP: M33C321 is especially meaningful because it represents true end-to-end product leadership from India. At Texas Instruments India, the team drove the journey from architecture and core design through full development, validation, and test program generation.

This demonstrates how India is contributing not just engineering capacity, but full-spectrum semiconductor innovation. It reflects the maturity of India’s R&D ecosystem and reinforces its role as a strategic center for global product development.

ELE Times: What differentiates TI’s approach to embedded processing compared with other MCU vendors?

PVP: TI’s differentiation comes from taking a truly end-to-end view of semiconductor innovation. Beyond designing advanced embedded processors, Texas Instruments combines system architecture, analogue leadership, software ecosystems, and importantly, internal manufacturing capability. This in-house manufacturing strength allows TI to co-develop silicon and process technologies together—optimising device architecture alongside manufacturing processes to deliver better performance, efficiency, quality, and long-term reliability for customers.

For customers, this means more tightly optimised products and a stronger value proposition because device design is not isolated from manufacturing realities. For engineers, it opens up a far more complete perspective—extending beyond product design into process development, optimisation, and manufacturability. From a semiconductor standpoint, that full-stack visibility is incredibly valuable because it creates opportunities to innovate across the entire lifecycle, from architecture to fabrication. This combination of product, process, and ecosystem integration is what makes TI’s approach particularly distinctive in embedded processing.

ELE Times: How do these new devices help customers accelerate innovation in industrial and automation applications?

PVP: M33C321 helps customers innovate by simplifying the path from design to deployment. Its integrated architecture supports advanced control, secure connectivity, and efficient system management, enabling developers to focus more on differentiation and less on integration challenges.

This versatility makes it highly relevant across evolving sectors—from industrial automation and precision robotics to intelligent infrastructure supporting large-scale digital transformation. As industries modernise, customers need platforms that can adapt quickly, scale efficiently, and maintain reliability—and that is where the M33C321 delivers significant value.

The post India’s Building the Full-Spectrum of Semiconductor Innovation: Prasanth Viswanathan Pillai, Texas Instruments appeared first on ELE Times.

Gallium nitride (GaN) and silicon carbide (SiC) power semiconductor firm Navitas Semiconductor Corp of Torrance, CA, USA has announced an ultra-high-voltage (UHV) SiC power module family for advanced energy and grid infrastructure...

I built a padel tennis score tracker. It keeps the time, set and game scores, and tracks who serves. - E-ink - Physical buttons - Coin cell that lasts for up to 3 years submitted by /u/melon_crust [link] [comments]

Infineon Technologies AG of Munich, Germany is advancing its collaboration with NVIDIA on 800V direct current (VDC) power architectures for AI data centers. Timed to coincide with NVIDIA’s GTC Berlin developer conference on 20–22 October, the announcement centers on the high-voltage intermediate bus converter (IBC), one of the most critical and demanding conversion stages in the power delivery chain of AI data centers...

Photonic integration firm Photon Bridge of Eindhoven, The Netherlands has raised €10m to tackle the emerging bottleneck in AI infrastructure: producing the millions of lasers that will be needed to connect increasingly large clusters of AI processors...

Defense-grade Agilex FPGAs and SoC FPGAs from Altera operate reliably in harsh environments across a temperature range of -55°C to +125°C. Leaded-ball and ruggedized packaging options are designed to withstand temperature cycling, vibration, and shock in mission-critical aerospace and defense applications.

The defense-grade devices will span Altera’s entire Agilex portfolio, from cost-optimized Agilex 3 FPGAs to mid-range Agilex 5 and high-performance Agilex 7 and Agilex 9 Direct RF-Series FPGAs. The portfolio addresses varying requirements for performance, power efficiency, and integration in applications ranging from embedded processing to high-bandwidth communications, sensing, and electronic warfare. A common architecture lets designers adapt their systems as mission requirements evolve.

Altera’s HyperFlex architecture uses Hyper-Retiming and Hyper-Pipelining to balance pipeline delays and shorten critical logic and routing paths. These techniques enable higher clock frequencies and greater processing throughput.

Fabrication in the United States provides a domestic source of wafer production, supporting supply-chain resilience for aerospace and defense programs with long service-life requirements.

Initial shipments of defense-grade Agilex FPGAs are scheduled for Q1 2027. Contact an Altera sales representative for additional information.

Altera

The post Altera extends Agilex FPGAs to defense systems appeared first on EDN.

The Synaptics Astra SR200 series of xMCUs runs multimodal AI workloads without the memory and compute limitations of conventional MCUs. Devices combine heterogeneous, AI-native compute and acceleration with integrated high-bandwidth custom DRAM scalable to hundreds of Mbytes. This allows larger AI models and richer multimodal workloads to run entirely on-device.

Powered by Synaptics’ Torq AI engine with Google Research’s transformer-capable Coral NPU, the xMCUs deliver up to 400 GOPS of AI inference. They also feature Arm Cortex-M85 and Cortex-M52 cores, integrated vision and audio capabilities, and hardware-rooted security. A tiered architecture pairs up to 8 Mbytes of SRAM with extensible, high-bandwidth, high-capacity custom DRAM. Synaptics says this architecture runs workloads at one-third the power of typical system DRAM.

The Astra SR200 series comprises three pin-compatible product lines sharing a common hardware foundation and SDK. The SR210 reaches 200 GOPS for always-on voice and sensing; the SR230 adds vision, display, and optional audio at 300 GOPS; and the SR250 provides 400 GOPS with dual vision and display paths for demanding edge applications.

Locate a distributor or sales office here.

Astra SR200 product page 

Synaptics

The post MCUs accelerate multimodal edge AI appeared first on EDN.