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🧐 Конкурс учнівських проєктів “Автоматизація навколо нас” kpi пт, 06/12/2026 - 12:45

Photonic simulation CAD software developer Photon Design Ltd of Oxford, UK has added a silicon modulator design capability to its HAROLD semiconductor and laser simulation tool, across a range of geometries...

Guerrilla RF Inc (GRF) of Greensboro, NC, USA — which provides radio-frequency integrated circuits (RFICs) and monolithic microwave integrated circuits (MMICs) for wireless applications — has announced the production launch of its GRF5847 linear power amplifier (PA) module, which combines fully integrated 50Ω input and output matching with what is claimed to be exceptional output power, efficiency and linearity in a compact surface-mount package...

Volta Metals Ltd of Toronto, Canada (which owns, has optioned and is currently exploring a critical minerals portfolio of rare-earths, gallium, lithium, cesium and tantalum projects in Ontario) says that the Ontario government has awarded funding of up to $500,000 under the Critical Minerals Innovation Fund (CMIF) for work on the its Springer Rare Earth Element (REE) and Gallium Project, which spans 4750-hectares on the traditional territory of the Nipissing First Nations in Sturgeon Falls about 70km east of Sudbury, Ontario, with direct access via the Trans-Canada Highway and Highway 64. The award will be applied towards metallurgical and mineral processing work aimed at enhancing recoveries of rare-earth elements and gallium from mineralization at the Springer Deposit...

This series of articles is written for system bring-up engineers, post-silicon validation engineers, platform firmware developers, kernel and driver integrators, and test architects who are—or will soon be—working with Compute Express Link (CXL) Type 3 memory expanders in real hardware. If your job involves taking a server from first power-on to production-ready memory expansion, reconciling what firmware advertises with what the operating system actually consumes, or explaining why a workload is “slow on CXL” when link training looks clean, this material is aimed at you.

This mini-series assumes you already understand PCIe fundamentals and have a working mental model of CXL device types and topologies. It does not re-teach CXL from first principles; instead, it focuses on the practical cross-layer problems that dominate bring-up and validation; discovery versus usability, non-uniform memory access (NUMA) placement versus link health, and policy configuration versus silicon defects.

How will this mini-series help

CXL Type 3 memory is deceptively familiar. From software’s perspective, it looks like RAM; from a validation perspective, it behaves like a small distributed system spanning expander ASIC firmware, host BIOS, ACPI tables, kernel drivers, and user-space tooling. Failures at one layer often masquerade as symptoms at another—a missing NUMA node that is really an HDM validity problem, or a “slow” benchmark that is really default allocator placement on far memory.

This mini-series gives you a structured playbook to:

• Set performance and correctness expectations using the latency–capacity pyramid and NUMA topology, so you know when a workload should tolerate CXL-attached memory and when it will not.
• Verify platform prerequisites across CPU, BIOS, kernel, and device firmware before spending days on the wrong debug path.
• Use the standard Linux tooling chain—cxl, ndctl, daxctl, numactl, lspci—to distinguish “device not seen,” “device seen but not consumable,” and “device online but misconfigured”.
• Walk the boot timeline from slot power and DRAM training through DVSEC discovery, decode programming, CDAT delivery, and driver bind, with a validation mindset at each gate.
• Interpret transport-layer and CXL-specific configuration-space indicators, run targeted memory traffic, and separate link issues from NUMA policy and memory-mode configuration faults.

The goal is to reduce time spent debugging the wrong layer and to give you checklists and command-level examples you can adapt into lab gates, CI smoke tests, and field triage runbooks.

What each part covers

Part 1: Why CXL Type 3 memory matters, and what your platform must provide

Part 1 establishes the system context. It explains why AI and data-intensive workloads are driving interest in memory expanders, how CXL Type 3 devices differ from local DIMMs even when they appear as ordinary RAM, and where expander memory sits in the latency–capacity pyramid relative to socket-local DRAM and storage.

It then walks through platform prerequisites—CPU enablement, BIOS/firmware, kernel support, device firmware, and RAS—and explains why features such as CXL IDE or tiered memory only work when every layer is aligned. The part closes with the NUMA story on Linux: how cxl_pci binds Type 3 endpoints, why expander memory often appears as a separate or “far” NUMA node, and why many CXL issues show up as placement and bandwidth imbalance rather than hard functional failures.

Part 2: Tooling and boot path from power-on to usable memory

Part 2 is the operational core. It introduces the user-space utilities that make CXL state visible beyond dmesg—cxl/libcxl for fabric topology, ndctl and daxctl for region and DAX/system-RAM modes, numactl for placement experiments, and lspci/hwloc for bus- and topology-level sanity checks.

It then traces the end-to-end boot sequence: power and clocks, on-device DRAM training and SPD discovery, gating of host-managed device memory (HDM) until mem_info_valid is asserted, PCIe/CXL link up and DVSEC-based discovery, decode programming and mem_enable, CDAT transport over DOE and mailbox health, ACPI handoff via CEDT/SRAT/HMAT, and final OS driver binding. Each stage is framed as an implied test with characteristic failure signatures, so you can map symptoms to the most likely layer quickly.

Part 3: Test, debug, and validation of CXL memory expanders

Part 3 turns theory into hands-on practice. It covers integration modes—system RAM versus device DAX—and when boot parameters such as efi=nosoftreserve or daxctl reconfigure-device apply.

It shows how to confirm expander memory as a distinct NUMA node with numactl, decode key lspci fields (link width/speed, CXL DVSEC capabilities, HDM range Valid/Active bits, cxl_pci binding), and drive traffic with numactl placement plus tools such as Intel MLC, stressapptest, and memtester. The series concludes with a cross-layer validation mindset, suggested future work for multi-device and pooled topologies, and references for deeper reading.

Read all three parts if you are new to CXL Type 3 bring-up; jump to Part 2 or Part 3 if you already have a booting system and need tooling or debug guidance.

Ameet Sanghavi works in post-silicon validation for PCIe and CXL at Nvidia with a focus on interface bring-up and validation on shipping products. He has worked on PCIe since 2005 (from PCIe 1.1 onward) and on CXL since 2020 (from CXL 1.1 onward).

Related Content

• Stripped Down CXL Scales Memory Wall
• CXL Efforts Focus on Memory Expansion
• CXL Adds Port Bundling to Quench AI Thirst
• CXL: The key to memory capacity in next-gen data centers
• From GPUs to Memory Pools: Why AI Needs Compute Express Link (CXL)

The post Bring-up and testing of systems with CXL Type 3 memory expanders appeared first on EDN.

All thanks to one single person who believed in me & pushed me to do it! submitted by /u/FoundationOk3176 [link] [comments]

Mining exploration company Nimy Resources Ltd of Perth, Western Australia and Perth-based Curtin University are to undertake what is described as a pioneering research program into processing gallium...

Epitaxial deposition and process equipment maker Veeco Instruments Inc of Plainview, NY, USA has announced the first commercial acceptance and qualification of its LUMINA+ metal-organic chemical vapor deposition (MOCVD) system by Ennostar Corp of Hsinchu, Taiwan (a provider of integrated optoelectronic solutions, specializing in R&D and manufacturing III-V materials). The order is said to set a new benchmark for high-volume arsenide and phosphide (As/P) production...

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Георгій Васильєв: діяльність на перетині науки, освіти та державної політики Інформація КП чт, 06/11/2026 - 16:23

Advance robotics and the dynamic growth of humanoid systems are heralding the next stage of automation. Bosch is actively pushing ahead with key technologies for automation and robotics.

“Sophisticated sensor technology, software, and the efficient conversion of electrical energy into motion aren’t just technologically related to automated mobility; they’re the cornerstones of modern robotics,” said Stefan Hartung, chairman of the board of management of Robert Bosch GmbH.

Bosch was quick to respond to the growing demand for automation and robotics technologies and is already a sought-after and attractive commercialization partner and component supplier worldwide.

“With the advent of humanoid robotics, the demand for Bosch components and solutions is increasing”, Hartung added.

With its comprehensive expertise, the company is well-positioned to participate in the growth of the robotics market. Bosch sees the potential to develop a business worth billions in this field. The company is putting its faith in synergy effects to achieve this. “We’re combining proven technologies from various business sectors with visionary innovations to drive forward the industrial scaling of robotics – all the way to humanoids,” Hartung said. “We also hope that committing to this course will strengthen Europe as a technology location.” Moreover, Bosch is making targeted use of automation to increase the competitiveness of its German plants compared to the rest of the world, as well as to counteract the ever more acute shortage of skilled workers.

Robotics needs a delicate touch

“Bosch is moving the future on wheels and with arms,” says Tanja Rueckert, member of the board of management of Robert Bosch GmbH. The company is deploying its cross-domain automation expertise from the car to the factory to the home as its decisive advantage in shaping this growth market. Bosch is positioning itself not as a manufacturer of humanoid robots, but as a leading supplier and partner for the “brain and nervous system” of modern automation and robotics. At the heart of these flexible solutions is Bosch’s open ctrlX AUTOMATION platform. This makes robotics accessible, modular, and quick to integrate. The Bosch Rexroth division is currently implementing several customer projects in this area.

Robots need a keen sense of touch so that they can interact safely and precisely with their environment, whether in the factory or in the home. A tiny but indispensable technology gives robots precisely this tactile sense: microelectromechanical systems, known as MEMS sensors. They are the key to enabling robots to handle objects with the necessary finesse and react sensitively to physical contact. For example, it’s these sensors that give a robot the ability to precisely adjust its grip to a robust water glass or a delicate stemmed glass. “Humans have 4 million touch sensors. If we were to build robots with just as many sensors, then 4 years’ worth of worldwide sensor production would barely be enough for 12,500 robots,” Hartung says. This figure illustrates the immense potential in the future of automation and robotics. According to the Yole Group, a market research and strategy consultancy, the market for MEMS sensors is expected to grow to over 19.2 billion U.S. dollars by 2030 and achieve an average annual growth rate of 4 percent.

Bosch is working to further develop cognitive robots

To accelerate development in automation and robotics, Bosch is relying on a combination of in-house innovation and an open ecosystem approach. The company’s GmbH is an optimal unit that focuses on the development and commercialization of new robotics solutions. At the same time, Bosch is continuing to drive forward industrial scaling through strategic partnerships. For example, the company is working together with deep manufacturing expertise. Bosch also acts as a key partner for leading robotics startups from around the world, including Humanoid from the U.K., and other U.S. and Chinese partners, is bringing their prototypes to production scale. Bosch Robotics Center China (BROC) is driving forward the development of physical AI and the commercialization of robotics solutions.

In addition to the robots’ “intelligence,” Bosch’s strength lies in the crucial components that give robots their physical performance. Bosch Rexroth has a comprehensive portfolio of key components for modern robotics and factory automation. These include high-precision electric motors and powerful servo drives that ensure dynamic and precise movements, as well as CtrlX AUTOMATION for smart, flexible control of robots for a range of environments and requirements. Bosch also offers complex assemblies and subsystems that give robots the power, speed, and precision they need, meaning these components serve as the technological backbone for various automation tasks. Moreover, Bosch can provide support with factory equipment for robotics manufacturing, for example, with Rexroth conveyor systems.

Unique treasure trove of data from over 230 plants worldwide

Artificial intelligence (AI) is the engine that gives automation and robotics new capabilities. “The combination of cutting-edge electronics and mechanics with AI puts significant technological breakthroughs in automation and robotics within reach,” Rueckert says.

For example, it enables robots to perceive their environment, understand processes, and learn from experience. Bosch builds this key technology firmly into its strategy and uses it on two levels. First, the company is bringing AI models from the cloud directly into its physical products to enable automated operation. Second, Bosch already makes extensive use of AI in its own manufacturing.

“Our decisive competitive advantage is not the machinery alone, but the data from our global manufacturing network,” Rueckert says. This treasure trove of data is the raw material for the development of intelligent automation solutions in the future. In addition, to translate human expertise into machine-readable data, Bosch uses special data suits that record complex movement sequences as a basis for training.

The post Bosch Accelerates Automation and Robotics Drive appeared first on ELE Times.

Solutions, a global technology manufacturer of hardware and software. Key drivers of the global investments in AI infrastructure and AI server applications are currently the high demand for highly complex server boards, which is leading to an increased need for SMT solutions for technologically sophisticated manufacturing processes.

New order bookings in the first quarter were more than double last year’s amount. Business in Asia showed particularly strong growth. The company also saw a noticeable increase in demand for SIPLACE placement solutions in the Americas and in Europe. In light of these welcome developments, ASMPT SMT Solutions expects its business to keep growing strongly for the rest of fiscal 2026.

“The dynamic growth surrounding AI server applications has exceeded our already high expectations,” explains Josef Ernst, CEO of ASMPT SMT Solutions.

Especially when it comes to the assembly of highly complex server boards, the demands on precision, process stability, and productivity are rising dramatically. It is precisely in these applications that our solutions are currently demonstrating their strengths worldwide.

AI servers are placing new demands on electronics manufacturing.

Placement solutions for modern AI server boards must be capable of handling both heavy, large-format, high-performance BGAs and thousands of highly miniaturized components from 016008M size with great reliability, precision, and productivity.

The combination of ever-larger printed circuit boards, rising component complexity, and the highest demands on accuracy and process stability presents new challenges for SMT manufacturing. Consequently, there is a need for placement solutions that intelligently combine high speed, maximum precision, and stable processes. In this context, the interplay between integrated hardware and software, as well as global service, is becoming increasingly important.

“Today, our customers no longer evaluate individual machines alone, but rather the performance of complete solution environments,” says Josef Ernst. “Global presence, local support, and the close integration of hardware, software, and service are becoming increasingly important.”

Focus on the supply chain and delivery capability

At the same time, high demand is creating new challenges for global supply chains. Geopolitical uncertainties, rising logistics costs, and the highly dynamic market are increasing pressure on supply chains, manufacturing, and service organizations. ASMPT SMT Solutions is therefore making targeted investments in expanding global delivery and service capacities to reliably support customers worldwide.

“In market phases like these, it quickly becomes clear just how resilient a manufacturer really is,” explains Josef Ernst. “Our customers rely on us to deliver and provide first-class service worldwide. That is exactly where our focus lies right now.”

The post AI server Boards are Boosting at ASMPT SMT Solutions appeared first on ELE Times.

Nanoelectronics research center imec of Leuven, Belgium is evolving its 300mm RF silicon interposer into a system-level platform for the heterogeneous integration of III–V chiplets on Si-CMOS. By uniquely combining high-density embedded capacitors, a scalable modeling framework for passive components and laser-assisted bonding for III–V chiplet assembly, the platform lays the foundation for next-generation wireless (mmWave and sub-THz) systems, as well as RF-grade signal handling for ultrafast data-center applications...

Learning from and adapting the lessons of the past is wise, as long as it’s not taken to overly constraining excess. So, too, is adopting others’ ideas (in a non-patent-infringing way, of course).

As you already know if you read last week’s blog post (and if not, please do so first before continuing with today’s…I’ll be right here, waiting for your return…), I initially planned on covering this topic in a single writeup. It ended up, however, being at least twice as long as I’d originally envisioned, so I basically chopped it in two. Part 1 covered the historical precedents that led to the ongoing memory card innovations of more modern times, which I’ll discuss this time.

Interface evolutions

I’m spending all this time on past-history factoids and trends because, as you’ll soon see, they conceptually continue(d) to repeat themselves multiple times over with the passage of time. To that point, one other historical example, involving performance, also bears mention. PCMCIA, introduced in 1990, tackled a mid-life enhancement five years later, from the 16-bit ISA bus-derived PC Card to the PCI bus-based and 32-bit, but still backwards-compatible, CardBus.

A more radical transformation, ExpressCard (originally called NEWCARD), followed roughly a decade after that. Based on the combination of PCI Express and USB 2.0, it was not directly backwards compatible with CardBus, far from with PC Card, thereby either forcing systems adopters to include slots for both standards in designs or forcing users to use clumsy adapters:

More generally, as my attempted blending of two Wikipedia entry excerpts notes:

Despite being much faster in speed/bandwidth, ExpressCard was not as popular as PC Card, due in part to the ubiquity of USB ports on modern computers. When the PC Card was introduced, the only other way to connect peripherals to a laptop computer was via RS-232 and parallel ports of limited performance, so it was widely adopted for many peripherals. More recently, virtually all equipment has Hi-Speed USB ports, and most types of peripherals which formerly used a PC Card connection are available for USB (and have the advantage of being compatible with desktop computers as well as portable devices) or are built-in, making the ExpressCard less necessary than the PC Card was in its day.

Wash, rinse, repeat

Let’s now fast-forward to more modern times. CFast, short for CompactFast, which I mentioned in both of my 2023 writeups (in the context of their use by my Blackmagic cameras), is based on CompactFlash (and is also managed by the CFA) but migrates from ATA to SATA. CFast 1.x dates from 2009 and is based on SATA 2.0; the backwards-compatible CFast 2.0 upgrades to SATA 3.0 but has seen limited-at-best industry uptake since being initially unveiled in 2012.

Why? Enter, for example, the alternative CFexpress, also managed by the CFA, which switches from SATA to the solid-state media-optimized NVM Express (i.e., NVMe) as its command set and to PCI Express (PCIe) as its hardware interface foundation (as I’d mentioned at the end of 2023), as well as coming in multiple dimensional options. The smaller Type A (at left in the following image) and larger Type B (right) card variants are today commonplace in the industry, with the even larger Type C conversely not yet in production to the best of my knowledge:

In this context, an overview of the earlier XQD standard also bears mention. XQD, once again now managed by the CFA (albeit initially announced solely by Sandisk, Sony and Nikon), dates from 2010. It’s dimensionally and connector-compatible with CFexpress Type B and is also based on PCIe, albeit only in a single-lane implementation (with PCIe 3.0 support added with XQD 2.0 in mid-2012). The XQD and CFExpress standards are therefore cross-compatible, although only to a degree, generally requiring firmware updates which not all camera, memory card reader and other system manufacturers have provided.

CFexpress 1.0, announced by the CFA in September 2016 as the successor to XQD, launched with support for PCIe 3.0, albeit this time in higher-bandwidth dual-lane form (for the size option now known as Type B and used by my high-end Canon and Panasonic cameras, among others). CFExpress 2.0, following in February 2019, added the single-lane PCIe Type A and quad-lane Type C options, along with upgrading the NVMe command set from 1.2 to 1.3. And the latest iteration, August 2023’s CFexpress 4.0, upgrades the supported PCIe interface to 4.0 (again, at up to four lanes with Type C), and the NVMe command set to 1.4. CFExpress 4.0-optimized systems are not yet in the market, to the best of my knowledge, but cards (such as this OWC Atlas Pro) are prevalent and backwards-compatible with existing cameras and such:

No, I don’t know what happened to CFexpress version 3.0, either. While buying a CFexpress 4.0 card now will leave potential performance “on the table” with CFexpress 2.0-only systems, it does provide obsolescence protection for subsequent camera-or-other upgrades you might make in the future. And conversely, if future-proofing isn’t a concern, you’ll be able to (as I’ve personally done) get some great deals on CFexpress 2.0 memory cards right now, despite overall semiconductor memory supply constraints, as manufactures strive to “fire sale” deplete their inventories of legacy product variants.

Don’t count out Donkey Kong

And what about the SD and related microSD card standards; are they in danger of falling by the wayside as these high-performance newcomers ramp into the market? Not if the SD Association has anything to say about it, specifically with next-generation “Express” offerings. See if you notice anything familiar trend-wise in the paragraphs that follow:

When the SD Association (SDA) first announced SD Express in June 2018, it set the bar high and opened a world of possibilities for manufacturers to integrate supercharged removable storage into their designs. SD Express is capable of delivering SSD performance levels of up to 4GB/sec. This makes it perfect for use in high-performance electronic devices and products. With the introduction of advanced security features in May 2022 found in the SD specification version 9, performance and versatility merge to create an innovative, and advanced powerhouse solution for SD memory cards.

SD Express leverages the PCI Express and NVMe interfaces and uses the well-known SD memory card form factor for compatibility with existing SD slot architectures. The SDA also introduced a microSD Express memory card format that is backward compatible with devices. SD Express is not just about SD memory cards getting faster, it is also about SD memory cards doing more.

After languishing for several years awaiting market demand that stubbornly refused to emerge, “Express” variants’ fortunes are finally looking up. Specifically, the microSD Express card is used in the Nintendo Switch 2 game console, notably (and singlehandedly) increasing the likelihood of a high-volume long-term future for the standard.

Blazing a trail

I’ll wrap up this writeup with coverage of a recently emergent sole-source memory card option (in spite of my earlier comment that I planned to avoid diving into past-history proprietary offerings) that I’d earlier caught mention of at The Verge and elsewhere. It’s Biwin’s Mini SSD:

Biwin is, if you hadn’t already guessed from the coin at left in this “stock” image, a China-based memory subsystem manufacturer (to the right of the 1-yuan coin is the rare U.S. $1 coin). Most of the products on the company’s website are industry standards-based: PCIe NVMe internal SSDs, for example, along with USB flash sticks and drives, DRAM DIMMs and SoDIMMs, SD/microSD and CFexpress memory cards (an image of which you saw earlier), and memory card readers. But with the Mini SSD, the company has apparently decided to try its hand at also going proprietary.

Interestingly, the Mini SSD is slightly larger (at 15x17x1.4 mm) than the microSD Express (15x11x1 mm) counterpart. And at least from a latest-generation ratified-spec standpoint, it’s seemingly no faster than microSD Express, either; both are based on dual-lane PCIe 4.0 and NVMe (once again: sound familiar?). The key differentiator that Biwin seems to be betting on is timing; as Ars Technica notes, currently available microSD Express cards “top out around 900MB per second, roughly the amount of bandwidth available from a single PCI Express 3.0 lane.”

Conversely, Biwin was demonstrating functional products at CES in January, claiming read speeds up to 3,700 MB/s and write speeds up to 3,400 MB/s (at least in combination with the company’s own card reader peripheral), and with capacities ranging from 512 GB to 2 TB. Biwin also touts Mini SSD’s IP68-rated dust- and water-proof chops. One note: while the company was referring to them as the “BL100” series late last summer, it’s now calling them “CL100”. Why?

Will Biwin be able to gain a defendable beachhead (and then expand its addressable customer “footprint”) before SD Association members release similar-performance microSD Express products into the market? Let me know your thoughts on that question, or anything else I’ve discussed in this series, in the comments!

—Brian Dipert is the associate editor, as well as a contributing editor, at EDN.

Related Content

• Memory card interfaces keep pace with the internal bus evolution race: Part 1
• Memory cards: Specifications and (more) deceptions
• SD card speeds: question your assumptions
• Prosumer and professional cameras: High quality video, but a connectivity vulnerability
• 2024: A technology forecast for the year ahead

The post Memory card interfaces keep pace with the internal bus evolution race: Part 2 appeared first on EDN.

Yesterday I started up an old Soviet gas discharge rectifier ВГ-176. submitted by /u/289_257 [link] [comments]

As India accelerates its transition to electric mobility, the focus is shifting from adoption to scale, efficiency, and affordability. Bosch is set to support this next phase by introducing its latest third-generation Silicon Carbide (SiC) semiconductors in India. Designed to improve the performance and efficiency of electric vehicles, the new chips will also contribute to the development of a stronger local mobility ecosystem.

Silicon carbide (SiC) semiconductors are central to improving the efficiency of electric vehicles. They control the flow of energy within the power electronics system – particularly in the inverter and ensure that energy from the battery to the electric motor is converted as efficiently as possible. With this new generation, Bosch is delivering approx 20% higher performance, supporting India’s rapidly growing EV market. For the end-user, this means longer driving ranges without larger batteries, improved battery utilization, and ultimately, a lower total cost of ownership.

“Our advanced SiC technology is designed to deliver the tangible benefits that Indian consumers demand – longer driving range, faster charging, and lower long-term costs,” said Sandeep Nelamangala, Joint Managing Director, Bosch Limited, and President, Bosch Mobility India. “By making high-efficiency power electronics more accessible, we are helping to unlock the full potential of the EV market, making clean, efficient mobility a reality for everyone in India.”

With over 60 million SiC chips already delivered worldwide, Bosch brings proven power semiconductor expertise to support the next phase of India’s electrification journey. The company continues to invest billions of euros in expanding its global semiconductor capabilities, creating a strong foundation for innovation, supply resilience, and future growth. As India advances its ambitions in electric mobility, localization, and advanced manufacturing, Bosch aims to support customers and ecosystem partners by bringing together global semiconductor expertise and local ecosystem development.

With its third-generation SiC chips, Bosch is taking this technology to the next level. “Our ambition is clear: we want to be a globally leading manufacturer of SiC chips,” said Markus Heyn, member of the Bosch board of Management and chairman of the Bosch Mobility business sector. “With our next-generation SiC chips, we are helping our customers put even more powerful and efficient electric vehicles onto the road.”

Bosch’s Gen 3 SiC technology enables more compact and efficient power electronics designs by reducing energy losses, improving thermal performance, and lowering system complexity and cooling requirements. Miniaturization is a key enabler for long-term cost efficiency, as it allows more chips to be produced per wafer. In this way, Bosch is contributing to making high-performance electronics more widely accessible.

The advantage makes advanced power electronics relevant not only for premium vehicles but also for mass-market EV segments, where efficiency, affordability, and reliability are critical due to the optimal combination. Bosch is bringing advanced semiconductor innovation closer to the needs of India’s evolving mobility landscape and supporting the next phase of efficient, scalable, and sustainable electric mobility in the country.

The post Bosch Introduces Third-Gen Silicon Carbide Chips for EV appeared first on ELE Times.

🎥 Відкрито R&D-лабораторію «Монтаж та експлуатація електротехнічного обладнання» KPI4U-2 чт, 06/11/2026 - 13:06

КПІ ім. Ігоря Сікорського відвідала делегація PCM & MAT Kosovo (Республіка Мальта) kpi чт, 06/11/2026 - 13:01

Обговорення перспективних напрямів співпраці між КПІ та американськими партнерами kpi чт, 06/11/2026 - 12:50

Vishay Intertechnology, Inc. announces an expansion of its ILHB series of Automotive Grade multilayer chip ferrite beads for high current filtering. The Vishay Dale devices now offer higher current capability, smaller case sizes, and a wider range of impedance values to meet a broader set of EMC noise reduction requirements.

The ILHB series is now available in 0402, 0603, 0805, 1008, and 1206 case sizes with current handling up to 6 A and impedance values from 10 Ω to 2700 Ω. The expanded lineup allows designers to achieve higher current handling in smaller packages, while delivering two to three times the current capability for the same package size and impedance value.

The immense range of sizes, current handling, and impedance values allows the ILHB ferrite beads to be used in a wider array of EMC noise reduction applications. These include high current, high frequency, and signal-specific filtering in automotive energy distribution and management systems; industrial automation systems; home and building controls; computers and computer peripherals; consumer devices; white goods; medical instrumentation; avionics; and telecom infrastructure.

The ILHB product datasheets optimize with additional design parameters that help engineers estimate bead performance across more frequencies without consulting multiple performance graphs to simplify device selection. These parameters include impedance peak value and frequency, the frequency at which impedance drops below the nominal value, and the X- and R-frequency crossover point.

The AEC-Q200 qualified devices feature a silver (Ag) inner conductor with copper (Cu), nickel (Ni), and tin (Sn) plating. The ferrite beads operate over a temperature range from -55 °C to +125 °C and are RoHS-compliant, halogen-free, and Vishay Green.

Device Specification Table:

Part number	IHLB-0402	IHLB-0603	IHLB-0805	IHLB-1008	IHLB-1206
Case size	0402	0603	0805	1008	1206
Dimensions (mm)	1.0 x 0.5 x 0.5	1.6 x 0.8 x 0.8	2.0 x 1.2 x 0.85	2.5 x 2.0	3.2 x 1.6
Z at 100 MHz (W)	10 to 1800	22 to 2500	17 to 2700	300 to 600	19 to 1000
DCR max. (mW)	18 to 2400	7 to 1800	10 to 800	30	10 to 300
Rated DC current at 85 °C (1) (A)	0.05 to 3.1	0.05 to 6	0.2 to 6	4	0.5 to 6
Zpk (2) (W)	19 to 3738	28 to 2526	21.6 to 31 868	554 to 670	32.68 to 1167
F at Zpk (3) (MHz)	97 to 1329	78 to 1000	72 to 1132	122 to 155	61 to 2921
Z typ. at 100 MHz (W)	10 to 2038	22 to 2200	17 to 2713	309 to 517	17.2 to 1000
F at ZDO (4) (MHz)	125 to > 10 000	100 to 8000	84 to 8000	138 to 222	100 to > 10 000
XL / XR x over (5) (MHz)	31 to 710	26 to 439	23 to 298	100 to 117	25 to 120

 

• Rated current is the DC that causes a 40 °C temperature rise at 20 °C ambient
• Zpk = peak of impedance curve
• F at Zpk = frequency of Zpk
• F at ZDO = frequency above 100 MHz where Z drops to nominal Z
• XL / XR x over = crossover point for inductive reactance and resistance impedance

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