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A recent Design Idea (DI), “Silly simple precision 0/20mA to 4/20mA converter,” by prolific DI contributor Stephen Woodward uses the venerable LM337 regulator in a creative configuration along with a few passive components, to translate an input 0-20 mA current source (say from a sensor with a separate power source that outputs a 0-20 mA signal current) into a 4-20 mA two-wire transmitter current loop (a standard 2 terminal industrial current source).

Below is another novel, ‘silly simple’ way of implementing the same function using the LM337. It relies on tapering off an initial 4 mA current to zero in proportion to the input 0-20 mA, and adding the input and the tapered off 4mA signal to create a 2-wire 4-20 mA output loop. It is loosely based on another Woodward gem [3]. Refer to Figure 1.

Figure 1 An input 0-20 mA is added to a tapered-off 4-0 mA at OUT to give an output 4-20 mA.

Wow the engineering world with your unique design: Design Ideas Submission Guide

First, imagine ‘0 mA’ current input (input loop open). The series arrangement of R1 parallel ‘R2 + Pz’ (‘Rz’@250E) and R3 parallel ‘R4+Ps’ (‘Rs’@62.5E) having a nominal value of 312.5E, sets the value of output loop current into OUT at 0mA+4mA (1.25V/312.5E), set using Pz.

Now, feeding a 20mA input current, imagine it pulled from junction X and pushed into the OUT terminal. This current is sourced from the output loop ‘+’, dropping 62.5E x 20mA=1.25V in Rs, in a direction opposing the internal reference voltage. With proper calibration, this reduces the drop across Rz to zero, and in doing so, reduces the original 4 mA contribution through Rz into OUT, also to zero.

The output loop current is now equal to the input current of 20mA+0mA (added at OUT), transferred from the input loop to the output loop from OUT to IN of U1. We have converted a current source input of 0-20 mA to a 2-wire loop current of 4-20 mA. The 20 mA setting is done by Ps.

Accurate current setting requires 2 S/Z passes to set the output current to within 0.05% or (much) better. Pots should be multi turn 3296 types or similar, but single turn trimmers will also work fairly well as both pots have a small trim range, by design.

The performance is excellent. The input to output linearity of the basic circuit is 0.02%. With a small heat sink, short term stability is within 0.02%, and change in loop current is 0.05% over a voltage from 5 V to 32 V. Transfer accuracy and stability are high because we aren’t transforming the input signal, only transferring it into the output loop. Reference drift affects only the basic 4 mA current and thus has a smaller effect on overall drift. The heat sink improves drift and di/dv by a factor of 3 to 4.

For intermediate input currents, the 4mA basic current via Rz into OUT is tapered off in proportion to the input 0-20 mA current. Thus at 10 mA (half) input current, the voltage at X changes suitably to maintain @500 mV across Rz, this supporting a contribution of 2 mA into OUT, down from the original 4 mA set at 0 mA input current. Output loop current into OUT is now the input 10mA+2mA=12mA, the halfway point of the 4-20 mA loop too. Similar reasoning applies to other input/output loop currents relationships.

A reverse protection diode is recommended in the 4-20 mA loop. Current limiting should be applied to limit fault current to safe levels. A series 2-transistor current limiter with appropriate resistance values is an excellent candidate, being low drop, low cost, fast acting and free from oscillation. A 40-mA ptc ‘polyfuse’ in the loop will protect the load from a complete short across both circuits (an unlikely event).

The basic drop seen by the 0-20 mA signal is -1 V to 0 V. Two diodes or an LED in series with the + of the 0-20-mA input allow the source to always see a positive drop.

Regarding stability: only the 68E(R3) and the 270E(R1) need to be 25 ppm 1% types to give low overall temperature drift, which is a significant plus. Pot drift, typically larger than that of fixed resistors, has less effect in the configuration used, wherein pots Ps and Pz, relatively high valued, control only a small part of the main current. Larger pot values also help minimize the effect of varying pot contact resistance.

A 3-V minimum operating voltage allows as much as 1000E of loop resistance with a 24-V supply, for the basic circuit.

It is a given that one of the loops will (need to) be floating. This is usually the source loop, as the instrument generating the 0-20 mA is powered from a separate supply.

Ashutosh Sapre lives and works in a large city in western India. Drifting uninspired through an EE degree way back in the late nineteen eighties, he was lucky enough to stumble across and be electrified by the Art of Electronics 1 and 2. Cut to now, he is a confirmed circuit addict, running a business designing, manufacturing and selling industrial signal processing modules. He is proud of his many dozens of design pads consisting mostly of crossed out design ideas.

Related Content/References

1. Silly simple precision 0/20mA to 4/20mA converter
2. A 0-20mA source current to 4-20mA loop current converter
3. PWM-programmed LM317 constant current source
4. https://www.radiolocman.com/shem/schematics.html?di=150983

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Satellites in geostationary orbit (GEO) face a harsher environment due to plasma, trapped electrons, solar particles, and cosmic rays, with the environmental effect higher in magnitude compared with low Earth orbit (LEO)-Low Inclination, LEO-Polar, and International Space Station orbits. This is the primary reason why power supplies used in these satellites need to comply with stringent MIL standards for design, manufacturability, and quality.

GEO satellites circle around the earth in approximately 24 hours at about 3 km/s, at an altitude of about 35,786 km. There are only three main satellites that can cover the full globe, as these satellites are far from Earth.

In comparison, LEO satellites travel around the earth at of 7.8 km/s, at an altitude of less than 1,000 km, but they could be as low as 160 km above Earth. This is lower than GEO but still >10× higher than a commercial plane altitude at 14 km.

Total ionizing dose (TID) and single-event effects (SEEs) are two of the key radiation effects that need to be addressed by power supplies in space. Satellites placed in GEO face harsher conditions due to radiation compared with those in LEO.

GEO being farther from Earth is more susceptible to radiation; hence, the components used in GEO satellite power supplies need to be radiation-hardened (rad-hard) by design, which means all of the components must comply with TID and SEEs, as high as 100 Krad and 82 MeV cm2/mg, respectively.

In comparison, the LEO satellite components need to be radiation-tolerant with a relatively lower level of requirement of TID and SEEs. However, using no shielding from these harsh conditions may result in failure.

While individual satellites can be used for higher-resolution imaging, typically constellations of a large number of exact or similar types of relatively smaller satellites form a web or net around the earth to provide uninterrupted coverage. By working in tandem, these constellations provide simultaneous coverage for applications such as internet services and telecommunication.

The emergence of New Space has enabled the launch of multiple smaller satellites with lighter payloads for commercial purposes. Satellite internet services are slowly and steadily competing with traditional broadband and are providing more reliable connectivity for remote areas, passenger vehicles, and even aerospace.

Microchip offers a scalable approach to space solutions based on the mission. (Source: Microchip Technology Inc.) Configurability for customization

The configurability of power supplies is an important factor for meeting a variety of space mission specifications. Voltage levels in the electrical power bus are generally standardized to certain values; however, the voltage of the solar array is not always standardized. This calls for a redesign of all the converters in the power subsystems, depending on the nature of the mission.

This redesign increases costs and development time. Thus, it is inherently important to provide DC/DC converters and low-dropout regulators (LDOs) across the power architecture that have standard specifications while providing the flexibility for customization depending on the system and load voltages. Functions such as paralleling, synchronization, and series connection are of paramount importance for power supplies when considering the specifications of different space missions.

Size, weight, power, and cost

Due to the limited volume available and the resource-intensive task of sending the objects into space against the pull of gravity, it is imperative to have smaller footprints, smaller size (volume), and lower weight while packing more power (kilowatts) in the given volume. This calls for higher power density for space optimization and higher efficiency (>80%) to get the maximum performance out of the resources available in the power system.

The load regulations need to be optimal to make sure that the output of the DC/DC converter feeds the next stage (LDOs and direct loads), matching the regulation requirements. Additionally, the tolerances of regulation against temperature variations are key in providing ruggedness and durability.

Space satellites use solar energy as the main source to power their loads. Some of the commonly used bus voltages are 28 V, 50 V, 72 V, 100 V, and 120 V. A DC/DC converter converts these voltages to secondary voltages such as 3.3 V, 5 V, 12 V, 15 V, and 28 V. Secondary bus voltages are further converted into usable voltages such as 0.8 V, 1.2 V, and 1.5 V with the help of points of load such as LDOs to feed to the microcontrollers (MCUs) and field-programable gate arrays (FPGAs) that drive the spacecraft loads.

A simplified power architecture for satellite applications, using Microchip’s standard rad-hard SA50-120 series of 50-W DC/DC power converters (Source: Microchip Technology Inc.) Environmental effects in space

The space environment consists of effects such as solar plasma, protons, electrons, galactic cosmic rays, and solar flare ions. This harsh environment causes environmental effects such as displacement damage, TID, and SEEs that result in device-level effects.

The power converter considerations should be in line with the orbits in which the satellite operates, as well as the mission time. For example, GEO has more stringent radiation requirements than LEO.

The volume requirement for LEO tends to be higher due to the number of smaller satellites launched to form the constellations. The satellites’ power management faces stringent requirements and needs to comply with various MIL standards to withstand the harsh environment. The power supplies used in these satellites also need to minimize size, weight, power, and cost (SWaP-C).

Microchip provides DC/DC space converters that are suitable for these applications with the standard rad-hard SA50 series for deep space or traditional space satellites in GEO/MEO and the standard radiation-tolerant LE50 series for LEO/New Space applications. Using standard components in a non-hybrid structure (die and wire bond with hermetically sealed construction) can prevent lot jeopardy and mission schedule risk to ensure reliable and rugged solutions with faster time to market at the desired cost.

In addition to the ruggedness and SWaP-C requirements, power supply solutions also need to be scalable to cover a wide range of quality levels within the same product series. This also includes offering a range of packaging materials and qualification options to meet mission goals.

For example, Microchip’s LE50-28 isolated DC/DC power converters are available in nine variants, with single and triple outputs for optimal design configurability. The power converters have a companion EMI filter and enable engineers to design to scale and customize by choosing one to three outputs based on the voltage range needed for the end application. This series provides flexibility with up to four power converters to reach 200 W. It offers space-grade radiation tolerance with 50-Krad TID and SEE latch-up immunity of 37-MeV·cm2/mg linear energy transfer.

The space-grade LE50-28 series is based on a forward topology that offers higher efficiency and <1% output ripple. It is housed in a compact package, measuring 3.055 × 2.055 × 0.55 inches with a low weight of just 120 grams. These standard non-hybrid, radiation-tolerant devices in a surface-mount package comply with MIL-STD-461, MIL-STD-883, and MIL-STD-202.

In addition, the LE50-28 DC/DC power converters, designed for 28-V bus systems, can be integrated with Microchip’s PolarFire FPGAs, MCUs, and LX7720-RT motor control sensors for a complete electrical system solution. This enables customers to use cost-effective, standard LE50 converters to customize and configure solutions using paralleling and synchronization features to form more intricate power systems that can meet the requirements of LEO power management.

For New Space’s low- to mid-volume satellite constellations with stringent cost and schedule requirements, sub-Qualified Manufacturers List (QML) versions in plastic packages are the optimal solutions that provide the radiation tolerance of QML (space-grade) components to enable lower screening requirements for lower cost and shorter lead times. LE50 companions in this category are RTG4 FPGA plastic versions and the PIC64 high-performance spaceflight computing (PIC64-HPSC) LEO variant.

The post Choosing power supply components for New Space appeared first on EDN.

A new white paper published by the UK’s Compound Semiconductor Applications (CSA) Catapult sets out how the the country could take a leading role in the next major shift in power electronics, as demand surges for smaller, faster and more energy-efficient high-voltage systems...

Перша конференція магістрантів ФМФ, присвячена результатам дисертаційних досліджень kpi вт, 01/27/2026 - 14:21

Nuvoton Technology Corp Japan of Kyoto, Japan has begun mass production of its KLC330FL01WW high-power ultraviolet semiconductor laser (379nm, 1.0W), which delivers what is claimed to be industry-leading optical output in a 9.0mm-diameter CAN package (TO-9)...

• Clarivate’s list ranks the organisations leading the way in innovation worldwide
• ST earns the distinction for the eighth time overall, including five consecutive years since 2022

STMicroelectronics (NYSE: STM), a global semiconductor leader serving customers across the spectrum of electronics applications, has been named in the Top 100 Global Innovators 2026. In its 15th edition, the annual benchmark from Clarivate, a leading global provider of transformative intelligence, identifies and ranks organisations that consistently deliver high-impact inventions, shaping the future of innovation across industries. The Top 100 Global Innovators navigate complexity with clarity and set the pace for invention quality, originality and global reach.

 “We are honoured to be recognised as a Top 100 Innovator by Clarivate for 2026, marking our fifth consecutive year and eighth time overall receiving this distinction. This achievement underscores STMicroelectronics’ unwavering commitment to sustained, large-scale innovation in products and technologies, driven by the creativity and dedication of our global teams,” said Alessandro Cremonesi, Executive Vice President, Chief Innovation Officer, and General Manager, System Research and Applications. “As the pace of technological change accelerates, we work in open collaboration with customers and partners to develop disruptive semiconductor technologies and solutions in sensing, power and energy, connectivity, data communications, compute and edge AI, helping them turn ambitious ideas into market-defining solutions.”

ST invests significantly in R&D, and about 20% of company employees work on product design, development and technology in extensive collaboration with leading research labs and corporate partners throughout around the world. The company’s Innovation Office focuses on connecting emerging market trends with internal technology expertise to identify opportunities, stay ahead of the competition, and lead in new or existing technology domains. ST is recognised as a leading semiconductor technology innovator in several areas, including smart power technologies, wide bandgap semiconductors, edge AI solutions, MEMS sensors and actuators, optical sensing, digital and mixed-signal technologies, and silicon photonics.

Maroun S. Mourad, President, Intellectual Property, Clarivate, said: “Recognition as a Top 100 Global Innovator is a remarkable achievement given the pace of change. Multi-year winners and new entrants are investing in AI innovation as it redefines the boundaries between research, engineering and commercial execution. The leaders we celebrate today are not just responding to this shift, they are designing for it.”

The Top 100 Global Innovators analysis is underpinned by the Clarivate Centre for IP and Innovation Research. Their analyses are founded in rigorous research leveraging the proprietary Derwent Strength Index, derived from the Derwent World Patents Index (DWPI) and its global invention data to measure the influence of ideas, their success and rarity, and the investment in inventions.

Detailed Methodology

The Top 100 Global Innovators uses a complete comparative analysis of global invention data to assess the strength of every patented idea, using measures tied directly to their innovative power. To move from the individual strength of inventions to identifying the organisations that create them more consistently and frequently, Clarivate sets two threshold criteria that potential candidates must meet and then adds a measure of their internationally patented innovation output over the past five years.

About STMicroelectronics

At ST, we are 50,000 creators and makers of semiconductor technologies, mastering the semiconductor supply chain with state-of-the-art manufacturing facilities. An integrated device manufacturer, we work with more than 200,000 customers and thousands of partners to design and build products, solutions, and ecosystems that address their challenges and opportunities, and the need to support a more sustainable world. Our technologies enable smarter mobility, more efficient power and energy management, and the wide-scale deployment of cloud-connected autonomous things. We are on track to be carbon neutral in all direct and indirect emissions (scopes 1 and 2), product transportation, business travel, and employee commuting emissions (our scope 3 focus), and to achieve our 100% renewable electricity sourcing goal by the end of 2027. 

The post STMicroelectronics recognised as a Top 100 Global Innovator 2026 appeared first on ELE Times.

• Acquisition adds USD 17 million current revenue base, with a target to scale to ~USD 25 million within three years; consolidation from Q4 FY26
• Strengthens engagement with global OEM customers in mission-critical segments
• Advancing full-stack, mission-critical electronics capabilities

Aimtron Electronics Limited, an India-based electronics system design and manufacturing (ESDM) company with operations in the United States, announced the acquisition of ICS Company, a US-based ESDM and ODM company headquartered in Decatur. Based on CY 2025 estimates, the acquired business is expected to generate approximately USD 17 million in revenue, with stable performance across the year. Aimtron plans to consolidate revenues from Q4 of FY26.

The acquisition strengthens Aimtron’s capabilities by adding experienced engineering teams, proprietary intellectual property, and long-standing customer relationships, enhancing its end-to-end offerings across product design, manufacturing, and lifecycle support. ICS serves leading global OEMs across industrial and mission-critical segments, including Caterpillar and John Deere. This deepens Aimtron’s presence in high-reliability electronics and strengthens its engagement with global OEM customers.

The acquired facility is currently operating at around 54 per cent capacity utilisation, offering strong headroom for growth. Aimtron intends to scale utilisation to approximately 90 per cent over the next three years through improved procurement, enhanced operating leverage, and targeted capacity expansion.

The transaction has been evaluated on both trailing and forward financials and is expected to be margin- and EPS-supportive from year one, while remaining aligned to Aimtron’s ROCE and ROE benchmarks.

Mukesh Jeram Vasani, Founder, Aimtron Electronics Limited, said, “This acquisition is a decisive step in Aimtron’s global journey. It significantly expands our footprint in North America, deepens our engineering strength, and positions us closer to customers building mission-critical products. With scalable infrastructure, strong regional opportunity, and a highly capable team, this integration accelerates our move toward a truly full-stack ESDM platform and reinforces our ambition to build a global electronics powerhouse.”

The acquired company operates a 58,000 sq. ft. manufacturing facility located on approximately 3.9 acres in Decatur. Strategically positioned within an established industrial and OEM ecosystem, the facility serves customers across agrotech, oil and gas, mining, hardened electronics, heavy engineering, and medical technology.

Dennis Espinoza, Founder & CEO, said, “Joining the Aimtron family marks an exciting new chapter for ICS. By aligning our deep-rooted Midwest engineering focus with Aimtron’s global resources and manufacturing scale, we can now offer our long-standing customers even more comprehensive end-to-end solutions. This partnership empowers us to accelerate innovation and better serve the rising demand for rugged, high-reliability electronics in critical industries like agrotech and heavy engineering.”

Nirmal Vasani, Chief Operating Officer, Aimtron Electronics, said, “The acquisition of ICS is a cornerstone of our ‘Glocal’ strategy, combining the engineering precision of the US with the immense scale of our Indian manufacturing ecosystem. This is a significant leap toward our vision of becoming a ₹1,000 crore global ESDM powerhouse.”

Chris Espinoza, Vice President of ICS Company, said, “Under the Aimtron umbrella, we now have the scale, resources, and global reach to accelerate growth while continuing to serve our customers with the same engineering focus and operational discipline. Our Midwest location—at the heart of North America’s most productive farming regions—also positions us well to support the rising demand for advanced agrotech and rugged electronics solutions.”

Recently, Aimtron incorporated Aimtron Mechatronics, a wholly owned subsidiary in Gujarat, and raised ₹100 crore through preferential convertible warrants. Together with this US acquisition, these initiatives are expected to play a key role in fulfilling Aimtron’s mission of achieving ₹1,000 crore in revenue over the next three years.

The post Aimtron Electronics acquires US-based ESDM and ODM company to expand global footprint appeared first on ELE Times.

I dedicate this composition to Office Space... Some of these parts will be upcycled in new projects... some others will be used for target practice... submitted by /u/Professor_Shotgun [link] [comments]

Ascent Solar Technologies Inc of Thornton, CO, USA – which designs and makes lightweight, flexible copper indium gallium diselenide (CIGS) thin-film photovoltaic (PV) panels that can be integrated into consumer products, off-grid applications and aerospace applications – has entered into definitive agreements for the purchase and sale of 1,818,182 shares of common stock (or pre-funded warrants in lieu thereof), series A warrants to purchase up to 1,818,182 shares of common stock and short-term series B warrants to purchase up to 909,091 shares of common stock at a purchase price of $5.50 per share of common stock (or per pre-funded warrant in lieu thereof) and accompanying warrants in a private placement priced at-the-market under Nasdaq rules...

submitted by /u/1Davide
[link] [comments]

Multifunction devices are great…as long as you can find uses for all (or at least some) of those additional functions that you end up paying for, that is.

All other factors being equal (or at least roughly comparable), I tend to gravitate toward multifunction devices instead of a suite of single-function widget alternatives. The versatile smartphone is one obvious example of this trend; while I still own a collection of both still and video cameras, for example, they mostly collect dust on my shelves while I instead regularly reach for the front and rear cameras built into my Google Pixel phones. And most folks have already bailed on standalone cameras (if they ever even had one in the first place) long ago.

Speaking of multi-function devices, as well as of cameras, for that matter, let’s take a look at today’s teardown victim, NEEWER’s Replacement Battery and Charger Set:

It comes in three variants, supporting (and bundled with two examples of) batteries for Canon (shown here), Nikon, and Sony cameras, with MSRPs ranging from $36.49 to $73.99. It’s not only a charger, over both USB-C and micro-USB input options (a USB-A to micro-USB adapter cable is included, too), but also acts as a travel storage case for those batteries as well as memory cards:

And assuming the batteries are already charged, you can use them not only to power your camera but also to recharge an external device, such as a smartphone, via the USB-A output. My only critique would be that the USB-C connector isn’t bidirectional, too, i.e., able to do double-duty as both a charging input and an external-powering output.

When life gives you damaged devices, make teardown patients

As part of Amazon’s most recent early-October Prime Big Deal Days promotion, the company marked down a portion of the inventory in its Resale (formerly Warehouse) section, containing “Quality pre-owned, used, and open box products” (their words, not mine, and in summary: where Amazon resells past customer returns). I’ve regularly mentioned it in the past as a source of widgets for both my ongoing use and in teardowns, the latter often the result of my receiving something that didn’t work or was otherwise not-as-advertised, and Amazon refunding me what I paid and telling me not to bother returning it. Resale-sourced acquisitions don’t always pan out, but they do often enough (and the savings are significant enough) that I keep coming back.

Take the NEEWER Replacement Battery and Charger Set for Canon LP-E6 batteries, for example. It was already marked down from $36.49 to $26.63 by virtue of its inclusion in the Resale section, and the Prime Big Deal Days promotion knocked off an additional 25%, dropping the per-unit price to $19.97. So, I bought all three units that were available for sale, since LP-E6 batteries are compatible not only with my two Canon EOS 5D Mark IV DSLRs and my first-generation Blackmagic Design Pocket Cinema 6K video camera but also, courtesy of their ubiquity (along with that of the Sony-originated L-series, i.e., NP-F battery form factor) useful as portable power options for field monitors, flash and constant illumination sources, and the like.

From past experience with Warehouse-now-Resale-sourced acquisitions, I expected the packaging to be less-than-pristine compared to a brand-new alternative, and reality matched the lowered expectations. Here are the front and back panels of the first two devices’ outer boxes, in the first image accompanied by a 0.75″ (19.1 mm) diameter U.S. penny for size comparison purposes, which you’ll also see in other photos in this piece:

Flip up the top, however, and the insides were a) complete and b) in cosmetically acceptable and fully functional shape. Here are the contents of the first box shown earlier, for example:

The aforementioned USB-A to micro-USB adapter cable:

One of the two included batteries:

The device outsides:

And finally, its insides:

The third time’s NOT the charm

The third device, on the other hand…when I saw the clear plastic bag that it came in, I knew I was in for trouble:

Removing the box from the bag only made matters visually, at least, worse:

And when I flipped open the top…yikes (I’d already taken out the LP-E6 batteries, which ended up looking and working fine, from the box when I snapped the following shots):

From a charging-and-powering standpoint, the device still worked fine, believe it or not. But the inability to securely attach the lid to the base rendered it of low value at best (there are always, of course, thick rubber bands as an alternative lid-securing scheme, but they’d still leave a gap).

So, I got in touch with Amazon, who gave me a full refund and told me to keep the device to do with as I wished. I relocated the batteries to my Blackmagic camera case. And then I added the battery charger to my teardown pile. On that note, by the way, I’ve intentionally waited until now to show you the packaging underside:

Case underside:

And one of the slips of literature:

This was the only one of the three devices I bought that had the same warning in all three places. If I didn’t know better, I’d think they’d foreseen what I later had planned for it!

Difficulty in diving in

Time to get inside:

As with my recent Amazon Smart Plug teardown, I had a heck of a time punching through the seemingly straightforward seam around the edges of the interior portion:

But finally, after some colorful language, along with collateral damage:

I wrenched my way inside, surmounting the seemingly ineffective glue above the PCB in the process. The design’s likely hardware modularity is perhaps obvious; the portion containing the battery bays is unique to a particular product proliferation, with the remainder common to all three variants.

Remove the three screws holding the PCB in place:

And it lifts right out:

That chunk out of one corner of the wire-wound inductor in the middle came courtesy of yours truly and his habit of blindly jabbing various tools inside the device during the ham-fisted disassembly process. The foam along the left edge precludes the underside LEDs (which you’ll see shortly) from shining upward, instead redirecting their outputs out the front.

IC conundrums

The large IC to the right of the foam strip, marked as follows:

0X895D45

is an enigma; my research of both the topside marked text (via traditional Google search) and the image (via Google Lens) was fruitless. I’m guessing that it’s the power management controller, handling both battery charging and output sequencing functions; more precise information from knowledgeable readers would be appreciated in the comments.

The two identical ICs along the top edge, in eight-lead SOP packages, were unfortunately no easier to ID. They’re marked as follows:

PSD (company logo) AKJG
PAP8801

And along the right edge is another IC, also in an eight-lead SOP but this time with the leads connected to the package’s long edges, and top-side stamped thusly:

SPT (company logo) SP1081F
25CT03

This last one I’m more confident of. It appears to be the SP1081F synchronous buck regulator from Chinese semiconductor supplier Wuxi Silicon Power Microelectronics. And intermingled with all these ICs are various surface-mounted passives and such.

For additional perspective, next are some side-view shots:

And, last but not least, here’s the PCB underside, revealing the four aforementioned LEDs, a smattering of test points, and not much else (unless you’re into traces, that is):

There you have it! As always, please share your insights in the comments.

—Brian Dipert is the Principal at Sierra Media and a former technical editor at EDN Magazine, where he still regularly contributes as a freelancer.

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The post A battery charger that does even more appeared first on EDN.

Від Межигірської фаянсової фабрики – до факультету автоматизації, промислової інженерії та екології КПІ kpi пн, 01/26/2026 - 15:38

The wide adoption of artificial-intelligence models has led to a redesign of data center infrastructure. Traditional data centers are being replaced with AI factories, specifically designed to meet the computational capacity and power requirements required by today’s machine-learning and generative AI workloads.

Data centers traditionally relied on a microprocessor-centric (CPU) architecture to support cloud computing, data storage, and general-purpose compute needs. However, with the introduction of large language models and generative AI applications, this architecture can no longer keep pace with the growing demand for computational capacity, power density, and power delivery required by AI models.

AI factories, by contrast, are purpose-built for large-scale training, inference, and fine-tuning of machine-learning models. A single AI factory can integrate several thousand GPUs, reaching power consumption levels in the megawatt range. According to a report from the International Energy Agency, global data center electricity consumption is expected to double from about 415 TWh in 2024 to approximately 945 TWh by 2030, representing almost 3% of total global electricity consumption.

To meet this power demand, a simple data center upgrade would be insufficient. It is therefore necessary to introduce an architecture capable of delivering high efficiency and greater power density.

Following a trend already seen in the automotive sector, particularly in electric vehicles, Nvidia Corporation presented at Computex 2025 an 800-VDC power architecture designed to efficiently support the multi-megawatt power demand required by the compute racks of next-generation AI factories.

Power requirements of AI factories

The power profile of an AI factory differs significantly from that of a traditional data center. Because of the large number of GPUs employed, an AI factory’s architecture requires high power density, low latency, and broad bandwidth.

To maximize computational throughput, an increasing number of GPUs must be packed into ever-smaller spaces and interconnected using high-speed copper links. This inevitably leads to a sharp rise in per-rack power demand, increasing from just a few dozen kilowatts in traditional data centers to several hundred kilowatts in AI factories.

The ability to deliver such high current levels using traditional low-voltage rails, such as 12, 48, and 54 VDC, is both technically and economically impractical. Resistive power losses, as shown in the following formula, increase exponentially with rising current, leading to a significant reduction in efficiency and requiring the use of copper connections with extremely large cross-sectional areas.

Presistive loss = V × I = R × I2

To support high-speed connectivity among multiple GPUs, Nvidia developed the NVLink point-to-point interconnect system. Now in its fifth generation, NVLink enables thousands of GPUs to share memory and computing resources for training and inference tasks as if they were operating within a single address space.

A single Nvidia GPU based on the Blackwell architecture (Figure 1) supports up to 18 NVLink connections at 100 GB/s, for a total bandwidth of 1.8 TB/s, twice that of the previous generation and 14× higher than PCIe Gen5.

Figure 1: Blackwell-architecture GPUs integrate two reticle-limit GPU dies into a single unit, connected by a 10-TB/s chip-to-chip link. (Source: Nvidia Corporation) 800-VDC power architecture

Traditional data center power distribution typically uses multiple, cascading power conversion stages, including utility medium-voltage AC (MVAC), low-voltage AC (LVAC, typically 415/480 VAC), uninterruptible power supply, and power distribution units (PDUs). Within the IT rack, multiple power supply units (PSUs) execute an AC-to-DC conversion before final DC-to-DC conversions (e.g., 54 VDC to 12 VDC) on the compute tray itself.

This architecture is inefficient for three main reasons. First, each conversion stage introduces power losses that limit overall efficiency. Second, the low-voltage rails must carry high currents, requiring large copper busbars and connectors. Third, the management of three-phase AC power, including phase balancing and reactive power compensation, requires a complex design.

Conversely, the transition to an 800-VDC power backbone minimizes I2R resistive losses. By doubling the distribution voltage from the industry-standard high end (e.g., 400 VDC) to 800 VDC, the system can deliver the same power output while halving the current (P = V × I), reducing power loss by a factor of four for a given conductor resistance.

By adopting this solution, next-generation AI factories will have a centralized primary AC-to-DC conversion outside the IT data hall, capable of converting MVAC directly to a regulated 800-VDC bus voltage. This 800 VDC can then be distributed directly to the compute racks via a simpler, two-conductor DC busway (positive and return), eliminating the need for AC switchgear, LVAC PDUs, and the inefficient AC/DC PSUs within the rack.

Nvidia’s Kyber rack architecture is designed to leverage this simplified bus. Power conversion within the rack is reduced to a single-stage, high-ratio DC-to-DC conversion (800 VDC to the 12-VDC rail used by the GPU complex), often employing highly efficient LLC resonant converters. This late-stage conversion minimizes resistive losses, provides more space within the rack for compute, and improves thermal management.

This solution is also capable of scaling power delivery from the current 100-kW racks to over 1 MW per rack using the same infrastructure, ensuring that the AI factory’s power-delivery infrastructure can support future increased GPU energy requirements.

The 800-VDC architecture also mitigates the volatility of synchronous AI workloads, which are characterized by short-duration, high-power spikes. Supercapacitors located near the racks help attenuate sub-second peaks, while battery energy storage systems connected to the DC bus manage slower events (seconds to minutes), decoupling the AI factory’s power demand from the grid’s stability requirements.

The role of wide-bandgap semiconductors

The implementation of 800-VDC architecture can benefit from the superior performance and efficiency offered by wide-bandgap semiconductors such as silicon carbide and gallium nitride.

SiC MOSFETs are the preferred technology for the high-voltage front-end conversion stages (e.g., AC/DC conversion of 13.8-kV utility voltage to 800 VDC, or in solid-state transformers). SiC devices, typically rated for 1,200 V or higher, offer higher breakdown voltage and lower conduction losses compared with silicon at these voltage levels, despite operating at moderately high switching frequencies. Their maturity and robustness make them the best candidates for handling the primary power entry point into the data center.

GaN HEMTs, on the other hand, are suitable for high-density, high-frequency DC/DC conversion stages within the IT rack (e.g., 800 VDC to 54 VDC or 54 VDC to 12 VDC). GaN’s material properties, such as higher electron mobility, lower specific on-resistance, and reduced gate charge, enable switching frequencies into the megahertz range.

This high-frequency operation permits the use of smaller passive components (inductors and capacitors), reducing the size, weight, and volume of the converters. GaN-based converters have demonstrated power densities exceeding 4.2 kW/l, ensuring that the necessary power conversion stages can fit within the constrained physical space near the GPU load, maximizing the compute-to-power-delivery ratio.

Market readiness

Leading semiconductor companies, including component manufacturers, system integrators, and silicon providers, are actively collaborating with Nvidia to develop full portfolios of SiC, GaN, and specialized silicon components to support the supply chain for this 800-VDC transition.

For example, Efficient Power Conversion (EPC), a company specializing in advanced GaN-based solutions, has introduced the EPC91123 evaluation board, a compact, GaN-based 6-kW converter that supports the transition to 800-VDC power distribution in emerging AI data centers.

The converter (Figure 2) steps 800 VDC down to 12.5 VDC using an LLC topology in an input-series, output-parallel (ISOP) configuration. Its GaN design delivers high power density, occupying under 5,000 mm2 with a height of 8 mm, well-suited for tightly packed server boards. Placing the conversion stage close to the load reduces power losses and increases overall efficiency.

Figure 2: The EPC GaN converter evaluation board integrates the 150-V EPC2305 and the 40-V EPC2366 GaN FETs. (Source: Efficient Power Conversion)

Navitas Semiconductor, a semiconductor company offering both SiC and GaN devices, has also partnered with Nvidia to develop an 800-VDC architecture for the emerging Kyber rack platform. The system uses Navitas’s GaNFast, GaNSafe, and GeneSiC technologies to deliver efficient, scalable power tailored to heavy AI workloads.

Navitas introduced 100-V GaN FETs in dual-side-cooled packages designed for the lower-voltage DC/DC stages used on GPU power boards, along with a new line of 650-V GaN FETs and GaNSafe power ICs that integrate control, drive, sensing, and built-in protection functions. Completing the portfolio are GeneSiC devices, built on the company’s proprietary trench-assisted planar technology, that offer one of the industry’s widest voltage ranges—from 650 V to 6,500 V—and are already deployed in multiple megawatt-scale energy storage systems and grid-tied inverter projects.

Alpha and Omega Semiconductor Limited (AOS) also provides a portfolio of components (Figure 3) suitable for the demanding power conversion stages in an AI factory’s 800-VDC architecture. Among these are the Gen3 AOM020V120X3 and the top-side-cooled AOGT020V120X2Q SiC devices, both suited for use in power-sidecar configurations or in single-step systems that convert 13.8-kV AC grid input directly to 800 VDC at the data center’s edge.

Inside the racks, AOS supports high-density power delivery through its 650-V and 100-V GaN FET families, which efficiently step the 800-VDC bus down to the lower-voltage rails required by GPUs.

In addition, the company’s 80-V and 100-V stacked-die MOSFETs, along with its 100-V GaN FETs, are offered in a shared package footprint. This commonality gives designers flexibility to balance cost and efficiency in the secondary stage of LLC converters as well as in 54-V to 12-V bus architectures. AOS’s stacked-die packaging technology further boosts achievable power density within secondary-side LLC sockets.

Figure 3: AOS’s portfolio supports 800-VDC AI factories. (Source: Alpha and Omega Semiconductor Limited)

Other leading semiconductor companies also announced their readiness to support the transition to 800-VDC power architecture, including Renesas Electronics Corp. (GaN power devices) and Innoscience (GaN power devices), onsemi (SiC and silicon devices), Texas Instruments Inc. (GaN and silicon power modules and high-density power stages), and Infineon Technologies AG (GaN, SiC, and silicon power devices).

For example, Texas Instruments recently released a 30-kW reference design for powering AI servers. The design uses a two-stage architecture built around a three-phase, three-level flying-capacitor PFC converter, which is then followed by a pair of delta-delta three-phase LLC converters. Depending on system needs, the unit can be configured to deliver a unified 800-VDC output or split into multiple isolated outputs.

Infineon, besides offering its CoolSiC, CoolGaN, CoolMOS, and OptiMOS families of power devices, also introduced a 48-V smart eFuse family and a reference board for hot-swap controllers, designed for 400-V and 800-V power architectures in AI data centers. This enables developers to design a reliable, robust, and scalable solution to protect and monitor energy flow.

The reference design (Figure 4) centers on Infineon’s XDP hot-swap controller. Among high-voltage devices suitable for a DC bus, the 1,200-V CoolSiC JFET offers the right balance of low on-resistance and ruggedness for hot-swap operation. Combined with this SiC JFET technology, the digital controller can drive the device in linear mode, allowing the power system to remain safe and stable during overvoltage conditions. The reference board also lets designers program the inrush-current profile according to the device’s safety operating area, supporting a nominal thermal design power of 12 kW.

Figure 4: Infineon’s XDP hot-swap controller reference design supports 400-V/800-V data center architectures. (Source: Infineon Technologies AG)

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University of Michigan at Ann Arbor in the USA has reported the experimental demonstration of a record room-temperature 2DEG sheet density exceeding 1x1014cm2 in a single-channel AlN/GaN heterostructure grown by plasma-assisted molecular beam epitaxy (PAMBE), using a 9nm-thick AlN barrier...

Europe has a leading position in photonic chip technology, it is reckoned. But, without targeted investment and action, the European Union (EU) risks losing its advantage as the global competition intensifies with large investments elsewhere...

Delay lines are more than passive timing tricks—they are deliberate design elements that shape how signals align, synchronize, and stabilize across systems. From their theoretical roots in controlled propagation to their practical role in high-speed communication, test equipment, and signal conditioning, delay lines bridge abstract timing concepts with hands-on engineering solutions.

This article unpacks their principles, highlights key applications, and shows how understanding delay lines can sharpen both design insight and performance outcomes.

Delay lines: Fundamentals and classifications

Delay lines remain a fundamental building block in circuit design, offering engineers a straightforward means of controlling signal timing. From acoustic propagation experiments to precision imaging in optical coherence tomography, these elements underpin a wide spectrum of applications where accurate delay management is critical.

Although delay lines are ubiquitous, many engineers rarely encounter their underlying principles. At its core, a delay line is a device that shifts a signal in time, a deceptively simple function with wide-ranging utility. Depending on the application, this capability finds its way into countless systems. Broadly, delay lines fall into three physical categories—electrical, optical, and mechanical—and, from a signal-processing perspective, into two functional classes: analog and digital.

Analog delay lines (ADLs), often referred to as passive delay lines, are built from fundamental electrical components such as capacitors and inductors. They can process both analog and digital signals, and their passive nature allows attenuation between input and output terminals.

In contrast, digital delay lines (DDLs), commonly described as active delay lines, operate exclusively on digital signals. Constructed entirely from digital logic, they do not provide attenuation across terminals. Among DDL implementations, CMOS technology remains by far the most widely adopted logic family.

When classified by time control, delay lines fall into two categories: fixed and variable. Fixed delay lines provide a preset delay period determined by the manufacturer, which cannot be altered by the circuit designer. While generally less expensive, they are often less flexible in practical use.

Variable delay lines, by contrast, allow designers to adjust the magnitude of the delay. However, this tunability is bounded—the delay can only be varied within limits specified by the manufacturer, rather than across an unlimited range.

As a quick aside, bucket-brigade delay lines (BBDs) represent a distinctive form of analog delay. Implemented as a chain of capacitors clocked in sequence, they pass the signal step-by-step much like a line of workers handing buckets of water. The result is a time-shifted output whose delay depends on both the number of stages and the clock frequency.

While limited in bandwidth and prone to noise, BBDs became iconic in audio processing—powering classic chorus, flanger, and delay effects—and remain valued today for their warm, characterful sound despite the dominance of digital alternatives.

Other specialized forms of delay lines include acoustic devices (often ultrasonic), magnetostrictive implementations, surface acoustic wave (SAW) structures, and electromagnetic bandgap (EBG) delay lines. These advanced designs exploit material properties or engineered periodic structures to achieve controlled signal delay in niche applications ranging from ultrasonic sensing to microwave phased arrays.

There are more delay line types, but I deliberately omitted them here to keep the focus on the most widely used and practically relevant categories for designers.

Figure 1 The nostalgic MN3004 BBD showcases its classic package and vintage analog heritage. Source: Panasonic

Retro Note: Many grey-bearded veterans can recall the era when memory was not etched in silicon but rippled through wire. In magnetostrictive delay line memories, bits were stored as acoustic pulses traveling through nickel wire. A magnetic coil would twist the wire to launch a pulse—which propagated mechanically—and was sensed at the far end, then amplified and recirculated.

These memories were sequential, rhythmic, and beautifully analog, echoing the pulse logic of early radar and computing systems. Mercury delay line memories offered a similar acoustic storage medium in liquid form, prized for its stable acoustic properties. Though long obsolete, they remain a tactile reminder of a time when data moved not as electrons, but as vibrations.

And from my recollection of color television delay lines, a delay line keeps the faster, high-definition luminance signal (Y) in step with the slower, low-definition chrominance signal (C). Because the narrow-band chrominance requires more processing than the wide-band luminance, a brief but significant delay is introduced. The delay line compensates for this difference, ensuring that both signals begin scanning across the television screen in perfect synchrony.

Selecting the right delay line

It’s now time to focus on choosing a delay line that will function effectively in your circuit. To ensure compatibility with your electrical network, you should pay close attention to three key specifications. The first is line type, which determines whether you need a fixed or variable delay line and whether it must handle analog or digital signals.

The second is rise time, generally defined as the interval required for a signal’s magnitude to increase from 10% to 90% of its final amplitude. The third is time delay, the actual duration by which the delay line slows down the signal, expressed in units of time. Considering these parameters together will guide you toward a delay line that matches both the functional and performance requirements of your design.

Figure 2 A retouched snip from the legacy DS1021 datasheet shows its key specifications. Source: Analog Devices

Keep in mind that the DS1021 device, once a staple programmable delay line, is now obsolete. Comparable functionality is available on DS1023 or in modern timing ICs such as the LTC6994, which deliver finer programmability and ongoing support.

Digital-to-time converters: Modern descendants of delay lines

Digital-to-time converters (DTCs) represent the contemporary evolution of delay line concepts. Whereas early delay lines stored bits as acoustic pulses traveling through wire or mercury, a DTC instead maps a digital input word directly into a precise time delay or phase shift.

This enables designers to control timing edges with sub-nanosecond accuracy, a capability central to modern frequency synthesizers, clock generation, and high-speed signal processing. In effect, DTCs carry forward the spirit of delay lines—transforming digital code into controlled timing—but with the precision, programmability, and integration demanded by today’s systems.

Coming to practical points on DTC, unlike classic delay line ICs that were sold as standalone parts, DTCs are typically embedded within larger timing devices such as fractional-N PLLs, clock-generation ICs, or implemented in FPGAs and ASICs. Designers will not usually find a catalog chip labeled “DTC,” but they will encounter the function inside modern frequency synthesizers and RF transceivers.

This integration reflects the shift from discrete delay elements to highly integrated timing blocks, where DTCs deliver picosecond-level resolution, built-in calibration, and jitter control as part of a broader system-on-chip (SoC) solution.

Wrap-up: Delay lines for makers

For hobbyists and makers, the PT2399 IC has become a refreshing antidote to the fog of complexity.

Figure 3 PT2399’s block diagram illustrates internal functional blocks. Source: PTC

Originally designed as a digital echo processor, it integrates a simple delay line engine that can be coaxed into audio experiments without the steep learning curve of PLLs or custom DTC blocks. With just a handful of passive components, PT2399 lets enthusiasts explore echoes, reverbs, and time-domain tricks, inspiring them to get their hands dirty with audio and delay line projects.

In many ways, it democratizes the spirit of delay lines, bringing timing control out of the lab and into the workshop, where curiosity and soldering irons meet. And yes, I will add some complex design pointers in the seasoned landscape—but after some lines of delay.

Well, delay lines may have shifted from acoustic pulses to embedded timing blocks, but they still invite engineers to explore timing hands‑on.

T. K. Hareendran is a self-taught electronics enthusiast with a strong passion for innovative circuit design and hands-on technology. He develops both experimental and practical electronic projects, documenting and sharing his work to support fellow tinkerers and learners. Beyond the workbench, he dedicates time to technical writing and hardware evaluations to contribute meaningfully to the maker community.

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The post Delay lines demystified: Theory into practice appeared first on EDN.

Мета - залучити студентів до сучасного наукового дискурсу Інформація КП нд, 01/25/2026 - 12:46

✅ Оголошується конкурс на заміщення посад kpi нд, 01/25/2026 - 08:30

Almost to big for the x-ray sensor. submitted by /u/Rhine_Labs [link] [comments]