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India’s electric vehicle industry is rapidly emerging as a significant force in the global automotive market, with electric car exports reportedly reaching approximately $369 million in Q1 2026. This development signals a new phase for India’s EV sector, positioning domestic manufacturing increasingly for international markets.

Sharing his optimism regarding the e-mobility segment in India, Dr. Rajeev Mishra, President, IFEVA (International Federation of Electric Vehicle Association), said, “Make in India is now evolving into Made in India, made for the World.” He highlighted the growing potential of India as a global electric mobility manufacturing and export hub.

India as a Global EV Powerhouse

Dr. Mishra emphasised that India’s EV ambition should go far beyond increasing domestic EV sales. “India must transition from being an EV-consuming market to becoming a Global EV Manufacturing, Technology, Innovation and Export Hub. Our objective should be to build Indian EVs not only for India, but for the world.”

India’s next phase of growth, according to him, must focus on EV manufacturing, batteries, power electronics, components, charging infrastructure, testing and certification, R&D, software, skill development and global supply-chain integration. He further stressed the importance of collaboration between government, industry, MSMEs, startups, academia, research institutions, investors and international technology partners to build a globally competitive EV ecosystem.

“$1 billion quarterly EV exports should be the next milestone,” Dr. Mishra averred, calling for a clear national ambition of taking India’s quarterly electric vehicle exports towards $1 billion. He said achieving this target would require stronger localisation, world-class quality standards, technology innovation, competitive financing, robust testing infrastructure, global certifications and strategic international partnerships.

Europe Emerging as a Key Opportunity

Europe is becoming an important destination for Indian electric vehicles, driven by stringent emission regulations, the transition towards clean mobility and increasing demand for cost-effective and technologically capable EVs. India’s expanding manufacturing ecosystem, competitive production capabilities and growing localisation of EV components are strengthening its position in the international market.

Three Forces Driving India’s EV Export Momentum

Government Manufacturing Support: Policy initiatives and manufacturing incentives are helping strengthen India’s EV and advanced battery ecosystem while encouraging investment and localisation.

Atmanirbhar Bharat: Expanding domestic manufacturing and supply chains creates a stronger foundation for Indian and global automotive companies to manufacture in India and serve international markets.

Global EV Transition: As countries accelerate the shift towards electric mobility and diversify global supply chains, India has an opportunity to emerge as a major “China+1” manufacturing destination.

EVs Can Become a New Engine of India’s Growth

The growth of electric mobility can generate opportunities across manufacturing, engineering, electronics, batteries, software, charging infrastructure, logistics and associated services, while strengthening India’s foreign-exchange earnings and global industrial footprint. Dr. Mishra said the EV revolution can become an important pillar of India’s broader journey towards Viksit Bharat 2047, strengthening both economic and energy security.

Dr. Mishra reiterated IFEVA’s commitment to creating stronger platforms for industry collaboration, policy dialogue, technology exchange, skill development, investment facilitation and global partnerships in electric mobility. “The opportunity before India is not merely to manufacture more electric vehicles. The real opportunity is to make India one of the world’s most trusted destinations for electric mobility innovation, manufacturing and exports.”

The post India Must Target $1 Billion in Quarterly EV Exports: IFEVA President appeared first on ELE Times.

Following a “reality check” in 2024–2025, when sales of hybrid electric vehicles gained ground and battery-electric vehicles growth slowed temporarily, the xEV industry is regaining momentum, notes Yole Group in its report ‘Automotive Powertrain and Electrification 2026 – Focus on Power Electronics’. The market research firm estimates that xEV production is growing at a double-digit compound annual growth rate (CAGR) during 2025–2031 to about 70% of global light vehicle production, with battery-electric vehicles (BEVs) alone accounting for 33 million units. In turn, the xEV power device market is growing at a 14% CAGR to $14.5bn by 2031...

A pilot project has been planned at NTPC Simhadri Thermal Power Station to evaluate an indigenous Iron-Air Battery technology for Long-Duration Energy Storage (LDES) applications. The project will be implemented by Atal Incubation Centre – Anna University (AIC-AU) at NTPC Simhadri through its technology partner, Meine Electric, with the objective of assessing the technology under utility operating conditions.

Role of Pilot Project

The pilot project will evaluate the technical performance, operational reliability and operational characteristics of the indigenous Iron-Air Battery system under real world conditions. The study is expected to generate valuable operational data and insights into the suitability of the technology for long-duration energy storage applications, enabling reliable 24×7 clean energy, enhancing grid flexibility and supporting future applications that require enhanced operational flexibility.

What Makes Meine Electric’s Iron-Air LDES Technology Different?

Meine Electric is the first company in APAC and the third globally to pioneer Iron-Air Long-Duration Energy Storage (LDES) technology. Its proprietary Fast Charge Long Discharge (FCLD) technology, which enables a six-hour charge and 18-hour discharge, has also been independently validated by Customized Energy Solutions (CES), the parent company of the India Energy Storage Alliance (IESA). CES Battery Laboratory testing assessed the technology’s electrochemical performance, capacity retention and operational stability under a 6-hour charging and 18-hour discharging cycle, providing third-party validation as Meine Electric advances towards larger scale demonstrations and commercial deployment.

As India continues to expand its renewable energy capacity, long-duration energy storage is expected to play an increasingly important role in improving grid reliability, managing renewable energy variability and supporting a more flexible and resilient power system. The pilot project is expected to contribute towards the development and evaluation of indigenous energy storage technologies while generating valuable learnings for future applications.

Through the AIC-Anna University initiative, Meine Electric will be responsible for the development, system integration and performance monitoring of the Iron-Air Battery system. The operational data and technical insights generated during the pilot will provide an important benchmark for further technology development and future commercial-scale deployment.

Speaking on the collaboration, Mr. Priyansh Mohan, Co-Founder & CEO, Meine Electric, said:

“We are honoured that our indigenous Iron-Air Battery technology has been selected for implementation under this pilot project planned at NTPC Simhadri Thermal Power Station. The project provides an important opportunity to demonstrate the technology under utility operating conditions and generate valuable performance data that will help accelerate the development of cost-effective long-duration energy storage solutions for India’s evolving power system.”

Speaking on the partnership, Shri Kishore Kumar.S, CEO, AIC – Anna Incubator, said:

“Our mission is to catalyze high-impact innovations that solve critical national challenges. Supporting Meine Electric in deploying India’s indigenous Iron-Air Battery technology at NTPC Simhadri is a major step toward achieving scalable, long duration energy storage. This collaboration highlights how academia, startups, and public sector leaders can work together to strengthen India’s clean energy ecosystem and accelerate our transition to a resilient, sustainable grid.”

The initiative reflects the growing emphasis on indigenous innovation, advanced energy storage technologies and collaborative research aimed at supporting India’s clean energy transition and strengthening long-term energy security.

The post Meine Electric’s ‘Made in India’ Iron-Air battery for Long Duration Energy Storage Enters Utility-Scale Pilot Evaluation appeared first on ELE Times.

Every engineer’s confidence in measurement rests on more than the instrument—it depends on the interface that ties instruments together into a working system. Standards like GPIB, USB, LXI, PXI, and VXI are not just acronyms; they are the lifelines that enable communication, synchronization, and scalability across labs and production floors.

Understanding these interfaces equips engineers to unlock the full potential of their tools, ensuring precision today while building readiness for tomorrow’s challenges. This fundamentals guide maps the evolution and role of these connections, showing how mastery of interfaces translates directly into mastery of measurement.

Interfaces as the backbone of measurement

Instrument interfaces are the quiet enablers of every test setup, defining how equipment communicates, synchronizes, and scales. From the legacy reliability of GPIB to the plug-and-play familiarity of USB, and from the networked flexibility of LXI to the modular power of PXI and VXI, these standards form the connective tissue of modern measurement.

Mastering them isn’t just about knowing acronyms; it’s about gaining the confidence to build systems that are precise, adaptable, and future-ready. By understanding the fundamentals of these interfaces, engineers equip themselves to unlock the full potential of their instruments and drive measurement forward with clarity and control.

Legacy heavyweights: GPIB and serial

Before “plug and play” became the industry standard, test and measurement benches relied on a rugged era of “plug and screw-in” connectivity, dominated by GPIB (IEEE-488) and serial interfaces. GPIB is instantly recognizable by its massive, 24-pin Centronics-style connector and notoriously stiff, heavily shielded cabling.

Despite its bulk, GPIB offered a unique, ingenious hardware feature: stackability. Because the cables featured a male connector on one side and a female on the other, engineers could literally stack five or six connectors directly on top of a single instrument port to daisy-chain devices together, keeping complex automated test systems organized.

Figure 1 The GPIB interface in the B2901B source/measurement unit (SMU) incorporates the device into automated test systems, enabling seamless communication with legacy controllers and peripheral hardware. Source: Keysight

Parallel to GPIB, traditional RS-232 and RS-485 serial communication typically relied on robust DB9 or DB25 D-Sub connectors to lock down data links. While these legacy ports were a staple of early automated test setups, modern instrument backplanes have largely phased out the bulky D-Sub form factor.

Today, you are much more likely to find an RJ-45 or USB-B port that “emulates” serial communication. Transitioning to these modern setups often requires specific adapter cables—such as the ubiquitous “Cisco blue cable”—bridging the gap between classic serial protocols and modern benchtop connectivity.

The modern bench: USB and Ethernet

If you have bought a piece of test equipment in the last 15 years, there is a 90% chance your back panel is dominated by USB and Ethernet connectivity. Unlike the fragile Type-A ports found on modern consumer electronics, most instruments standardize on the chunkier USB Type-B port (the classic “printer cable” connection).

It’s a deliberate choice by instrument designers; the Type-B architecture is physically much more robust, providing the mechanical stability needed to survive the constant plugging, unplugging, and cable-tugging common in a busy lab environment. However, navigating instrument USB ports requires a bit of spatial awareness.

While the Type-B port on the back is meant for raw PC control, many instruments feature a standard USB-A port right on the front panel. It’s crucial to remember that this is a “Host” port. It is there to let the instrument control peripheral devices—like saving screenshots to a thumb drive or hooking up a mouse for easier UI navigation—and cannot be used to interface the equipment directly with a computer.

That mechanical status quo is finally shifting, however, with the slow but steady arrival of USB-C on the test bench. While engineers initially feared its tiny footprint would be too fragile for heavy lab use, its massive data bandwidth and high power-delivery capabilities are proving too good to ignore.

Modern compact USB oscilloscopes and smart, battery-powered field instruments are increasingly adopting USB-C, allowing them to simultaneously stream high-speed sample data to a PC and pull operational power over a single, reversible cable.

LXI/Ethernet (RJ-45)

If USB is the king of close-range bench automation, Ethernet is the undisputed champion for remote testing, distributed systems, and distributed lab networks. Utilizing the standard 8P8C (RJ-45) jack, modern Ethernet-enabled instruments generally conform to the LAN eXtensions for Instruments (LXI) standard, transforming a simple local network into a highly synchronized, long-distance test environment.

But Ethernet brings an even bigger hardware advantage to the bench: galvanic isolation. Unlike USB connections, which share a common DC ground between the instrument and your PC, Ethernet architecture is inherently transformer-coupled. This creates a physical, magnetic barrier for electrical DC currents.

If you are working with high-power systems or floating measurements where your instrument’s chassis sits at a different electrical potential than your PC, Ethernet eliminates the risk of “ground loops.” It ensures that a sudden voltage spike or ground fault will not travel down the communication line and catastrophically blow up your PC’s motherboard.

Figure 2 Arrow points to the LXI port on the RIGOL DS1202Z-E rear panel. Source: Rigol

The unsung hero of automation: Digital I/O interface

While analog channels get all the glory for capturing waves and signals, the digital input/output (digital I/O) interface is the quiet workhorse that turns standalone Test & Measurement (T&M) instruments into fully automated systems. Think of it as the instrument’s binary nervous system. It uses simple high/low voltage signals (typically TTL or CMOS levels) to communicate with the outside world.

Through digital inputs, an instrument can listen for external triggers—like a sensor detecting that a device under test (DUT) is properly in place, or a companion machine signaling is ready. Conversely, digital outputs allow the instrument to command its environment, such as triggering an external laser, switching a relay, or flashing a red warning light if a test fails.

For engineering students and hobbyists transitioning from manual bench testing to automated production lines, mastering digital I/O is the crucial first step toward building smart, synchronized, and hands-free test environments.

Figure 3 The digital I/O interface is on the rear panel of the Keithley 2602B SMU. Source: dataTec

High-speed backbone: PXI, PXIe, and VXI

When benchtop space is at a premium and a handful of standalone instruments can no longer keep up with massive channel counts or ultra-high throughput demands, the “instrument” undergoes a physical evolution. While VXI served as the rugged, VMEbus-based grandfather of this movement in the late 1980s, modern high-density testing has largely migrated to PXI and PXI Express (PXIe).

In these automated test equipment (ATE) environments, traditional boxes give way to modular instrumentation systems like PCI eXtensions for Instrumentation (PXI) and PXI Express (PXIe). In these systems, instruments lose their front panels, screens, and individual power supplies, transforming into compact, modular cards that slide into a shared industrial rack.

These card-edge modules do not work alone; they require a dedicated chassis to provide the necessary power, cooling, and communication pathways, alongside a dedicated controller card that serves as the system’s “brain.” What truly separates PXI/PXIe from consumer-grade PC chassis, however, is its high-density “hard metric” backplane connector packed with hundreds of pins.

This backplane doesn’t just route high-speed PCIe data lanes; it features hardwired, dedicated hardware lines for precision triggering and 10 MHz/100 MHz reference clocks. By baking synchronization directly into the physical backplane copper, engineers can synchronize multiple instrument cards—such as digitizers and RF signal generators—with absolute precision, dropping timing skew down to the picosecond level.

Specialty and high-frequency sync

When you are pushing the boundaries of high-speed measurement, a fast data interface like USB or Ethernet simply isn’t enough; the inherent software latencies are far too unpredictable. For true phase alignment and precise event matching, you need physical, hardware-level timing synchronization. This is where dedicated coaxial connections on the back panel come into play, stripping away communication protocols in favor of raw, speed-of-light electrical pulses.

The most common tool for this job is the ubiquitous BNC (Trigger In/Out) connector—the classic, 50-Ω “push and twist” interface found on almost every piece of serious bench gear. These ports carry simple TTL voltage steps to command multiple instruments to start capturing data at the exact same microsecond, eliminating any jitter caused by PC software.

Right alongside the trigger ports, you will almost always find the 10-MHz reference In/Out BNC ports. These are used to completely override an instrument’s internal crystal oscillator. By daisy-chaining these reference lines, you can “lock” the internal timebases of every instrument on your bench to a single master clock—whether that is a high-end oscilloscope or an ultra-stable external rubidium or GPS disciplined clock—ensuring your entire test system drifts as one.

Here is a side note on why 10 MHz. Ten megahertz (10 MHz) became the universal reference frequency because it strikes the right balance between practicality and precision. It’s low enough to distribute cleanly over coaxial cables without distortion, yet high enough to be multiplied or divided into the ranges needed for synthesizers and RF systems.

Its adoption was reinforced by national time services, rubidium and cesium atomic clocks, and GPS-disciplined oscillators, all of which commonly output 10 MHz. As a result, nearly every serious instrument supports it, making 10 MHz the common language for locking multiple devices to a single master clock.

Engineering trade-off: Speed, distance, and ruggedness

Ultimately, choosing the right hardware interface is an exercise in balancing speed, distance, and ruggedness against the specific needs of your test setup. If you are building a permanent, high-throughput automated rack that requires absolute clock synchronization, scaling up to PXIe or building out an LXI-compliant Ethernet network is the gold standard.

Conversely, if you are just pulling a quick measurement at your desk or running a temporary validation test, the simplicity of USB remains king. There is no single “best” interface—only the right tool for the specific measurement topology at hand.

Navigating the “hidden” hardware premium

As you map out your test system, it’s worth keeping an eye on the budget for the often-overlooked physical layer accessories. While it’s easy to assume that hooking up an older, high-end GPIB-equipped spectrum analyzer to a modern PC is just a matter of a simple cable change, the “hidden” hardware costs can catch you off guard.

Because GPIB is a complex parallel bus, standard GPIB-to-USB controller adapters from reputable T&M vendors require dedicated, specialized chipsets inside the cable housing. Consequently, these controller cables can easily run anywhere from $500 to over $1,000 each.

Figure 4. NI GPIB-USB-HS interface translates legacy GPIB signals into a USB-compatible format to enable remote instrument control and data logging. Source: National Instruments

Don’t let these price tags discourage you from utilizing legacy gear, though. These rugged adapters are highly reliable, built to last for decades, and frequently retain their value on the secondary market. Alternatively, if you are working on a tighter budget, there are excellent open-source or lower-cost third-party controller alternatives available, ensuring you can still breathe modern life into classic, high-performance bench instruments without breaking the bank.

From bench to bus: Your turn to build

At the end of the day, every piece of iconic technology—from the Mars rovers to the smartphone in your pocket—started as a cluster of instruments connected to a test bench. Whether you are a seasoned automation engineer managing a massive PXIe chassis rack, or a curious maker setting up your very first USB oscilloscope at a home workbench, the interfaces you choose are the quiet enablers that bring your designs to life.

Don’t let the complex acronyms or the price tags of high-end adapters intimidate you; the fundamentals of data, grounding, and synchronization remain exactly the same. So, here is our challenge to you: look at the back panel of your gear, grab a cable, and push your bench a little further this week.

If you are a novice, try writing a basic script to pull a single voltage reading over USB. If you are a veteran, see if you can optimize your automated test cycle times by swapping a legacy serial link for LXI Ethernet. Every great piece of hardware engineering is built on the back of rigorous measurement. Go wire up your bench, automate your data, and show us what you are building.

What does your current test setup look like? Are you still rocking legacy GPIB gear via adapters, or have you fully migrated to an Ethernet-driven LXI bench? Drop a comment below and share your worst ground-loop horror stories or your slickest automated test setups!

T. K. Hareendran is a self-taught electronics enthusiast with a strong passion for innovative circuit design and hands-on technology. He develops both experimental and practical electronic projects, documenting and sharing his work to support fellow tinkerers and learners. Beyond the workbench, he dedicates time to technical writing and hardware evaluations to contribute meaningfully to the maker community.

Related Content

• T&M Survey: What’s Most Important in Test Equipment?
• Software-Defined Radio in Test & Measurement Markets
• What IEEE 1588 means for your next T&M system design
• Why you should use LXI instruments in your next T&M system
• The USB takeover: Why modern T&M is moving to your pocket

The post Measurement basics: A field guide to instrument interfaces appeared first on EDN.

Pixus Technologies, a provider of embedded computing and chassis solutions, has announced a MIL Ruggedized NI software defined radio (SDR) with extended temperature options. Now a part of Emerson, the NI SDR is based on the family of Ettus brand Universal Software Radio Peripherals (USRPs).

Pixus ruggedizes various versions of NI SDRs in IP67 outdoor and full MIL rugged qualified versions.  The new RN310 version has options for an external MIL grade fan that pulls air over the conduction-cooled fins on the enclosure as well as an internal heater board.  This allows the units to meet -40C to +71C applications.

Pixus offers MIL rugged and commercial enclosure solutions in VITA based architectures such as OpenVPX, as well as specialty customized solutions like the rugged NI SDRs.   The company has also developed two-in-one dual USRP versions in a 1U format with superior front to rear cooling.

 

The post New MIL Rugged N310 Software Defined Radio With Extended Temperature Options appeared first on ELE Times.

Testing a .001 uf 6000v door knob capactor for leackage, both passed at least up to the 600v this IT-28 Capactor tester can run. Not the 2000 to 3000 volts that are possible in a SB-220 but it should be close enough if the "eye" does not close at 600v they should be good. submitted by /u/RefrigeratorLess9786 [link] [comments]

The old paper wound caps were replaced with new metal electrolitic caps, and bleed resister array which bleeds voltage off caps when unit is turned off. New metering board on the front of the power pack to feed readout meters on front panel. Older chokes and caps were removed from botyom grid circuit and the grid was grounded to chasis for better stability. A soft-key was built and added to the amp key up circuit to ne compatable with modern radios. Old coax and wiring replaced to higher temp and voltage rated material. submitted by /u/RefrigeratorLess9786 [link] [comments]

submitted by /u/AutoModerator
[link] [comments]

Rf choke replacement submitted by /u/RefrigeratorLess9786 [link] [comments]

Dreading placing those SMDs… I need a PnP 😭 submitted by /u/aq1018 [link] [comments]

КПІ ім. Ігоря Сікорського та Науковий парк адитивних технологій провели воркшоп для українського бізнесу KPI4U-2 пт, 08/14/2026 - 19:16

As AI infrastructure, industrial robotics, battery management systems (BMS) and advanced power electronics drive increasing power density and efficiency requirements, accurate current sensing is becoming increasingly critical. According to market analyses, the global current-sense resistor market is projected to expand at a CAGR of approximately 6% through the coming years, reflecting growing demand across battery management, motor control and power conversion applications.

At the same time, engineers are under increasing pressure to improve energy efficiency and reduce system costs while maintaining measurement accuracy in higher power designs. To address these challenges, Panasonic Industry offers its Thick Film Current Sensing Resistors as a cost-effective alternative to conventional metal shunt resistors for selected low- and medium-current sensing applications.

Current sense resistors play a vital role in measuring electrical current and enabling its monitoring and control in applications ranging from AI server power systems and industrial robotics to battery management systems, DC/DC converters, motor drives and advanced power supplies. Accurate current detection and control support improved system performance, system protection and higher energy efficiency.

Traditionally, metal shunt resistors have been widely used for current sensing, particularly in applications requiring very low resistance values and high power-handling capabilities. However, not all current-sensing applications require ultra-low resistance values or the highest power ratings. In low- and medium-current designs with suitable electrical and thermal requirements, thick film current sense resistors can provide the required sensing performance while helping to reduce component cost.

Panasonic’s Thick Film Current Sense Resistors support efficient and accurate current measurement in low- and medium current applications where low resistance, thermal stability and cost efficiency are key design considerations. By combining advanced resistor materials, optimized trimming technology and different structural designs, including double-sided resistor structures and wide-terminal designs, Panasonic offers resistance values down to 10 mΩ, with stable resistance performance over temperature and TCR values as low as ±75ppm/°C in selected series.

A key challenge in current sensing is balancing low resistance with a low temperature coefficient of resistance (TCR), as these requirements typically involve a trade-off. Panasonic addresses this challenge through optimized resistor materials and component structures that support accurate current measurement, low power loss through low resistance values, improved heat dissipation and reduced temperature-induced drift.

For engineers working within the operating range in which thick-film and metal-shunt technologies overlap, Panasonic’s Thick Film Current Sensing Resistors offer several important advantages:

• Potential component cost savings of up to 50% compared with selected comparable metal shunt solutions in suitable applications*
• Improved heat dissipation through optimized component design, such as wide-terminal structures and double-sided resistive element structures, helping to lower operating temperatures and enhance thermal performance.
• Enhanced reliability under thermal cycling, supported by soft termination technology that helps reduce solder-joint stress.
• Supports accurate current sensing with resistance values down to 10mΩ, stable resistance performance over temperature and TCR values as low as ±75ppm/°C in selected series.
• Simplified migration through footprint-compatible designs available in selected case sizes, supporting the replacement of metal shunt resistors within the overlapping operating range.

Panasonic’s Thick Film Current Sense Resistors are already proven in customer applications and are particularly suited to AI infrastructure, robotics, battery management systems, motor control, power supplies and industrial automation systems, where designers seek to optimize both cost and performance.

As designers look for ways to improve efficiency, reduce thermal stress and manage bill-of-materials costs, Panasonic’s Thick Film Current Sensing Resistors offer a practical, cost-effective option for low- and medium-current sensing applications that require accurate measurement, thermal stability and reliable performance.

The post Panasonic Thick Film Current Sense Resistors Enable Potential Cost Savings Up to 50% as an Alternative to Metal Shunts appeared first on ELE Times.

Oscilloscopes utilize both hardware and software tools to enhance the resolution of time measurements. Happily, most of the processing is transparent.

The primary display from an oscilloscope is amplitude versus time. Most of the focus when using oscilloscopes is on the vertical axis, including amplitude resolution, analog bandwidth, and vertical accuracy. The time axis does not seem to get equal billing. That’s because oscilloscope time bases are very good.

Timebase accuracy

The oscilloscope’s timebase generates the sampling clock, which samples the input signal at uniform time intervals at the sampling rate. The sampling rate and the length of the acquisition memory determine the horizontal scale factor. The timebase clock of an oscilloscope has a frequency accuracy generally specified in parts per million (ppm) or parts per billion (ppb).

For example, an instrument with a timebase specified as accurate to within ± 0.1 ppm (100 ppb). This means that any time interval, T, being measured is accurate to within ± 0.1/106 of the value of T. If the measured interval is one second, the uncertainty of the measurement is ±1×10-7 seconds or ±0.1 microseconds (ms).

Clock oscillators are subject to frequency drift over time. This timing uncertainty is cumulative and increases as the oscillator operates over longer periods. That drift, called aging, is usually specified as an additive uncertainty in frequency, expressed in parts per million per year (ppm/yr). A typical clock timebase accuracy specification might be ±0.1 ppm + 0.05 ppm/year. The time is measured from the instrument’s last calibration.

If the oscilloscope’s internal timebase is not as accurate as desired or if the oscilloscope’s operation must be synchronized with other instruments, many oscilloscopes include an external clock reference input. The external reference is usually generated from a very stable signal source at either 10 or 100 Megahertz (MHz), which is used to synchronize the internal timebase to the reference input to improve its accuracy.

Improving time resolution

The time resolution of a digitizing instrument, based only on the sampling clock frequency, would be the reciprocal of the sampling rate. An oscilloscope that samples at 40 gigasamples per second (GS/s) would have a time resolution of 25 picoseconds.

Oscilloscopes enhance hardware time resolution by using a specialized frequency counter called a time-to-digital converter (TDC). In real-time acquisition mode, the time-to-digital converter measures the time between the trigger event and the next sample.

In general, the trigger event and the sample clock are not synchronous. The time delay between these two events is uniformly distributed over the sampling period. The uniform distribution means that any time delay between zero and the sampling period is equally possible. The time delay for each acquisition is called the horizontal offset and is a characteristic of the acquired waveform. Figure 1 shows a horizontal offset measurement.

Figure 1 A typical measurement of the horizontal offset of an acquisition measuring time between the trigger point and the next sample point.

The figure shows an acquired waveform. The bright dots on the waveform indicate the real samples.

Horizontal relative cursors provide a visual measurement of the time between the trigger point and the next following sample and display the Δx value of 12.5 ps in the cursor readout field in the lower right corner. The TDC output provides an exact digital readout internally.

The time resolution of the TDC is much finer than the sample rate. In this specific example, it is five ps. The horizontal offset is used to align waveform samples for display and measurements. It is also used to combine multiple acquisitions of a periodic waveform into a random interleaved sampling acquisition.

Random interleaved sampling

Random interleaved sampling (RIS) is an acquisition mode that enhances the instrument’s time resolution when measuring multiple periodic waveforms with a stable trigger point. The oscilloscope acquires multiple waveforms, each with the same shape (Figure 2).

Figure 2 The horizontal offset, time delay between the trigger and the next sample, is uniformly distributed over the sampling period; multiple acquisitions show this variation.

Each acquired waveform has a horizontal offset uniformly distributed over the sampling period. Multiple acquired waveforms will each have a different horizontal offset. Examining the time difference between the trigger point and the first sample that follows in the figure illustrates this variation. Overlaying the twelve waveforms shows how they synthesize a waveform with an effectively higher sample rate (Figure 3).

Figure 3 Creating a composite waveform from multiple acquisition results in a higher effective sample rate.

The oscilloscope measures the horizontal offset of each waveform and categorizes them to select those whose values are multiples of the desired effective sampling rate. These selected waveforms are combined to form the RIS waveform (Figure 4).

Figure 4 This graph compares a real-time and RIS waveform.

The lower waveform in the figure is the real-time acquisition. Cursors mark a 25 ps sampling period of the real-time waveform.  The upper trace is the RIS acquisition. Note that there are five effective sample periods between the cursors; the effective sample rate is five times the 40 GS/s sample rate, or 200 GS/s. Remember that the RIS acquisition mode requires multiple repetitive acquisitions with the identical waveform using a stable trigger point.

Sequence mode

Sequence mode is another acquisition mode that uses the TDC. This mode is used to minimize the dead time between adjacent acquisitions. It is also applied to reduce the time between acquisitions. Sequence mode breaks the acquisition memory into a user-defined number of segments. Each segment holds a single acquisition. Since the oscilloscope does not need to display the trace between segments, the dead time between acquisitions is minimized.

The downside of this mode is that the time between segments is indeterminate as the instrument waits for the next acquisition trigger. To counter this, the oscilloscope marks the location, in time, of each segment in two ways.

First, it labels the start of each segment using the oscilloscope’s real-time clock to label each trigger time. The real-time clock has a resolution of one second, which is not practical for fast acquisitions. It also uses the TDC to measure the time delay of each trigger from the first trigger in the acquisition (Figure 5).

Figure 5 A sequence mode acquisition of five ultrasound pulsed bursts showing the sequence mode time stamps.

The figure shows a sequence-mode acquisition of five ultrasonic pulse bursts, each in its own segment. The sequence mode time stamps appear under the graphic display, including the absolute time from the oscilloscope’s real-time clock in the column labeled time. Additionally, it lists the time from the start of the first segment and the time between segments. These TDC-measured times are displayed with a resolution of one nanosecond.

The time stamps indicate the timing of the trigger events. It basically places each segment at a specific time. If each trigger event is an anomaly, then the time stamps provide the frequency of the anomalies, a bit of diagnostic information that often proves useful.

Interpolation

If the TDC is the hardware tool for precise time measurements, then interpolation is the software tool. Interpolation is a mathematical technique for increasing the effective sample rate of an acquired signal. Interpolation calculates intermediate sample values between the real-time samples. Interpolation is usually applied to the displayed data, but in many cases, it is incorporated into application-specific measurements.

Interpolation is also available as a math function and can be used to increase the time resolution of acquired waveforms. The oscilloscope used in this article offers sin x/x, linear, or cubic interpolation with sampling rate improvement from two to fifty calculated points per real-time sample.  Interpolation increases instrument processing time proportional to the number of interpolated samples.

On the positive side, interpolation can be applied to single-shot acquisitions. On the downside, interpolation requires that the data meet the Nyquist criteria and have a sample rate greater than twice the signal’s bandwidth. Failure to satisfy Nyquist can result in significant errors. From a data integrity perspective, it is essential to note that RIS data comprises all real samples, whereas interpolated data is a combination of real and calculated sample values.

Jitter measurements

Jitter is a short-term variation in the timing of a digital signal from its nominal value. Any timing parameter can be the subject of jitter analysis, and the main timing parameters considered are variations in width, period, and time-interval error (Figure 6).

Figure 6 This graphic gives examples of timing uncertainty in width, period, and time interval error jitter, including jitter measurements along with the histogram of time interval error.

Width or period jitter can be measured using the width and period measurement parameters, respectively. The jitter is evident in the statistical readouts for minimum (min), maximum (max), and standard deviation (sdev). The difference between the maximum and minimum is the range or peak-to-peak jitter. The standard deviation is the root-mean-square (RMS) jitter.

Time interval error (TIE) measures the difference between each actual waveform edge and the ideal location of that edge. The ideal edge locations are computed from the waveform’s mean frequency.  TIE can be thought of as the instantaneous phase of the signal.

 The time parameters period, width, and TIE are measured by determining the time between edges. For a period, it is the time between adjacent edges with the same slope. For the width measurement, it is the time between adjacent edges with different slopes. TIE measures the time between an acquired edge and an ideal edge. The measurement uses interpolation to achieve the highest possible time resolution (Figure 7).

Figure 7 A dual interpolator finds use in obtaining a more precise measurement time resolution.

The figure shows an edge defined by three real-time samples taken with a 10 GS/s sampling rate. The interpolator uses a cubic interpolation to fit several interpolated samples between each real-time sample. Then, the two samples that bracket the measurement threshold are used to perform linear interpolation to determine the time at which the measurement threshold is crossed. The resulting measurements in this example have a resolution better than 1 picosecond.

Jitter has both random and deterministic components.  Random jitter is associated with stochastic processes, such as noise, and is unbounded, meaning it increases with increasing observation time. Deterministic jitter is bounded, and its amplitude is limited with increasing observation time. The random components of jitter are studied using statistical tools, such as histograms.

Figure 6 shows the histogram of the TIE parameter. There are parameters intended to interpret histograms themselves. The histogram mean (hmean), mode (hmode), standard deviation (hsdev), and range (hrange) are examples of histogram-specific parameters.

Conclusion

Oscilloscopes utilize both hardware and software tools to enhance the resolution of time measurements. Improved time resolution is used both in displaying the data and in measurements. Happily, most of the processing is transparent and requires little user interaction to achieve good results.

Arthur Pini is a technical support specialist and electrical engineer with over 50 years of experience in electronics test and measurement.

Related Content

• Using an oscilloscope’s time, frequency, and statistical measurement domains
• Basic oscilloscope operation
• Analyze noise with time, frequency, and statistics
• Oscilloscope special acquisition modes
• How to perform histogram analysis on your oscilloscope
• Basic jitter measurements using an oscilloscope
• Closing the gaps in your digital oscilloscope waveforms

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MongoDB, Inc. today announced at MongoDB .local Build Fest that MongoDB’s intelligent data platform is now available natively inside the AI tools developers use to build applications. Available today, MongoDB Atlas Managed MCP Server is a fully hosted way to connect agents to Atlas without running additional infrastructure. Builders can now easily add MongoDB Atlas to Claude Code, Codex, Grok Build and Devin. Everything announced today is available now, and teams can get started with Atlas for free at mongodb.com/atlas.

“The AI tools teams reach for keep changing, so our approach is to make sure MongoDB is present in all of them, whether a team is working in Claude or Codex, or running an agent in production. More of that building is now done by agents, and neither the agent nor the developer has to stop and set up a connection, so applications come together faster,” said Pablo Stern-Plaza, Chief Product Officer, AI and Emerging Products, MongoDB.

With the new connectors, MongoDB is available natively across the tools where software is built. Ask questions of data in plain language in ChatGPT, Claude, and Grok. Query, inspect, and update data in MongoDB as work happens, with coding agents like Claude Code, Codex, Grok Build and Devin. And builders can also see live MongoDB data while generating an app in an IDE like Cursor.

Getting connected with these tools takes only a few clicks. Find the MongoDB connector in the tool’s marketplace and authorize it, with no connection string to paste and no infrastructure to configure. Once connected, the tool can list collections and indexes, query and aggregate data, and inspect schemas—and with the right permissions—can also create collections or manage indexes.

Introducing the MongoDB Atlas Managed MCP Server

Running an agent in production means connecting it to real operational data and agent memory, and until now, teams had to build and maintain that connection themselves. MongoDB’s MCP server already sees more than 30,000 installs a week. Starting today, the MongoDB Atlas Managed MCP Server is remote and fully hosted, running as a service inside Atlas, so there is nothing for a team to install, operate, or upgrade. Teams connect using the same credentials and access controls they already use with Atlas, so administrators can govern how agents access operational data from one place.

“Developers want their AI tools to connect with the context and systems they already rely on,” said Vibhor Chhabra, Product Lead for ChatGPT Ecosystem at OpenAI. “MongoDB’s plugin in ChatGPT makes it easier to access and work with live application data, helping developers move faster while staying grounded in the context of their applications.”

“We’re in the golden age of software engineering. The scope of what one engineer can build has exploded, and the unlock is agents working with real context,” said Russell Kaplan, President at Cognition, the company behind Devin. “By connecting Devin to MongoDB Atlas, engineers can hand off well-scoped tasks knowing Devin is working from live application data, not stale assumptions, and spend their own time on the harder problems.”

MongoDB also announced at Build Fest new capabilities that bring its benchmark-leading Voyage AI retrieval models into the operational database, including Automated Embeddings in MongoDB Atlas powered by Voyage AI, the Atlas Embedding and Reranking API, and voyage-code-4: https://www.mongodb.com/company/newsroom/press-releases/mongodb-atlas-now- delivers-industry-leading-context-retrieval-with-precision-accuracy

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The growing New Space market is fueling demand for smaller, less expensive space hardware to support short-duration missions for applications such as satellite-to-cellular communications, alternative navigation and Earth imaging. Microchip Technology today announces it expanded its atomic clock portfolio with the radiation-tolerant Space CSAC-SA65, a Chip Scale Atomic Clock designed to deliver precise timing for space systems. The device provides a compact, low-power alternative to traditional radiation-hardened timing solutions, helping developers reduce size, weight, power and cost while maintaining accuracy.

Building on the heritage of Microchip’s Space CSAC-SA45, the Space CSAC-SA65 extends radiation tolerance to at least 30 kRad and operates in extended temperature ranges from –40°C to +80°C. Consuming less than 120 mW and occupying less than 17 cc of volume, the device is optimized for size-, weight- and power-constrained satellite designs. Its built-in 1 PPS input and output capabilities support synchronization for satellite systems, while its atomic stability enables extended operation without continuous reliance on external timing references such as Global Navigation Satellite System (GNSS) signals.

“By enabling one of the lowest power atomic clocks to thrive in extreme conditions, even the smallest CubeSat can now fly with atomic accuracy,” said Randy Brudzinski, corporate vice president of Microchip’s frequency and time systems business unit. “The Space CSAC-SA65 brings atomic-clock performance to applications where size, weight, power and cost are tightly constrained, helping developers maintain synchronization and timing accuracy even when external timing references are unavailable.”

Manufactured as a Commercial Off-The-Shelf (COTS) product using radiation-tolerant commercial electronic components, the device can offer shorter lead times and lower overall costs compared to traditional space-grade oscillators. Designed for Low Earth Orbit (LEO) missions, the CSAC-SA65 is well suited for applications including satellite timing and frequency control, satellite clock reference, assured positioning, navigation and timing (PNT), and satellite cross-linking.

Microchip offers an extensive portfolio of clock and timing systems, ranging from miniature component oscillators, to small plug-in timing server cards, to multi-rack time scale systems. As a primary contributor to the world’s time, Microchip’s timing solutions are trusted, reliable and resilient. For more information, visit Microchip’s Clock and Timing Systems web page.

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STMicroelectronics has extended the STGAP3S family of gate drivers that feature enhanced galvanic isolation for greater reliability, introducing an efficient and economical 3A series for circuits that need lower drive current. The new STGAP3S3S is optimized for silicon carbide (SiC) MOSFETs, while the STGAP3S3IF is suited to IGBTs.

All STGAP3S drivers work with high-voltage rails up to 1200V in circuits such as power-factor correction (PFC), power supply units, DC/DC converters, and inverters. International safety and insulation certifications, including UL 1577 and IEC 60747-17, independently confirm robust isolation, safe operation, and reliable long-term performance at high voltage.  Typical applications include charging stations, energy-storage systems (ESS), solar inverters, industrial electric vehicles like forklifts, induction heating equipment, and general drives, pumps and fans.

ST’s state-of-the-art reinforced galvanic isolation protects the power-stage circuitry against transients up to 9.6kV and ensures Common Mode Transient Immunity (CMTI) up to 200V/ns. The family contains three series capable of sinking/sourcing up to 10A, 6A, and now 3A, each containing variants optimized for driving IGBTs and silicon-carbide MOSFETs.

The new STGAP3S3 series, with 3A drive strength, integrates the complete active Miller clamp, including clamping MOSFET, to prevent unwanted induced turn-on of the power switch thereby avoiding shoot-through currents. Integrating the MOSFET saves PCB space, simplifies the circuit design, and reduces the bill of materials, while providing suitable clamping performance with gate drive up to 3A. The 6A STGAP3S6 and 10A STGAP3SX series contain a pre-driver for an external MOSFET, giving extra flexibility to optimize the clamping speed in systems with high gate-drive current.

All STGAP3S drivers have desaturation detection with soft turn-off to ensure controlled voltage and current transitions, which protects the power switch during dangerous overload or short-circuit conditions. The 6A and 10A drivers, and the new 3A drivers for SiC MOSFETs, let designers connect an external resistor to optimize the soft turn-off speed.

All devices have diagnostic pins that indicate when desaturation protection, undervoltage-lockout UVLO, and thermal shutdown are active. The drivers allow negative gate voltage that strengthens unwanted turn-on prevention, protects the device during fault turn-off, and ensures robust switching without ringing during normal turn-off transitions.

An evaluation board is available for each STGAP3S driver, including the latest 3A models. These two boards, the EVLSTGAP3S3S and EVLSTGAP3S3IF, are half-bridge boards that come with protection already configured and provide test points and diagnostic LEDs to assist development.

The complete STGAP3S family for driving IGBTs and SiC MOSFETs, including STGAP3S3, STGAP3S6, and STGAP3SX series, is in production now. The drivers are offered in the SO16W wide-body package, from $1.93 for orders of 1000 pieces.

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