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As systems grow, the knowledge needed to safely change them becomes harder to retrieve quickly, even when the design itself is sound. Models increasingly encode not just algorithms, but also assumptions, trade-offs, and system-level intent that accumulate over time. As ownership changes hands, understanding that intent becomes the bottleneck.

Consider a common engineering handoff: you are new to an existing project and are asked to update the braking system to support a heavier vehicle variant. The system works. The architecture looks intentional. But you were not part of the original design decisions, and before touching anything, you need to understand what is safe to change and why.

Compared to reading thousands of lines of code, being given a model offers a clear advantage. It exposes structure, makes data flow visible, and captures behavior in a form engineers can reason more quickly. For years, this has been a core strength of model-based design.

However, this advantage is now under pressure. Today’s software-defined systems are larger, more interconnected, and built across distributed teams, suppliers, and release cycles. Even with a well-structured model, engineers still need to reconstruct why signals flow a certain way, which subsystems own specific behaviors, which parameters are safe to modify, and where hidden constraints exist.

So, when that context is hard to recover, teams slow down. Review cycles expand. The risk of validation failures or schedule delays increases. This is not because the design is wrong, but because its underlying rationale is difficult to access quickly. Over time, this becomes an engineering scalability problem: critical knowledge lives inside the design but becomes harder to retrieve as systems grow more complex.

The challenge is no longer simply one of scalability, but of how engineers recover that context quickly enough to make the right change. This is the gap that shows up most clearly in engineering handoffs.

Walkthrough: Recover context in the ABS braking model

To see how this challenge appears in practice, consider an anti-lock braking system (ABS) model. The system runs, but the engineer has been asked to update the braking system to support a heavier vehicle variant. Before making that change, engineers first need to understand where the wheel-speed behavior lives and how it interacts with the rest of the design.

Figure 1 ABS demo regulating wheel slip (Desired Relative Slip) via a bang-bang controller (Controller) drives vehicle/brake dynamics (Vehicle Dynamics) with visualization (Visualization). Source: MathWorks

This opens sldemo_absbrake, a model that simulates vehicle dynamics under braking with a bang-bang controller. The example is small enough to follow end to end, but it raises the same questions that appears in production handoffs: What are the major pieces? Where does the behaviour live? Which blocks should be inspected before changing it?

Get the big picture

Start by building a system-level understanding of the model. Before inspecting individual blocks, click “Simulink Copilot Chat” on the “Simulation” tab of the toolstrip, and type: Give me an overview of this model.

Simulink Copilot returns a structured breakdown of the four top-level subsystems (Controller, Vehicle Dynamics, Visualization, and More Info), the high-level signal flow from slip reference to controller to braking dynamics to visualization, and the control strategy: bang-bang control on the slip error. Every block name in the response is a clickable hyperlink, so the explanation remains tied to the model canvas rather than floating apart from it.

Figure 2 Simulink Copilot generates a grounded overview of the open model, with hyperlinks to each subsystem and block. Source: MathWorks

Instead of digging through the model block by block, a working mental map is established. The model’s behaviour, major connections, and the part of the design worth inspecting before making a change are now clear.

Drill into a subsystem

The overview points to “Vehicle Dynamics” as the subsystem that handles braking physics. If a change could affect wheel motion, stopping distance, or slip, that is the area to drill down next. Instead of opening the subsystem and reading every block manually, right-click the “Vehicle Dynamics” block on the canvas and choose “Explain with Simulink Copilot” in the Simulink context menu.

Figure 3 Right-click any block and choose “Explain with Simulink Copilot” for a contextual explanation without typing a prompt. Source: MathWorks

Simulink Copilot generates a contextual explanation of the subsystem: its purpose, its inputs and outputs, and the internal structure that connects tire forces, brake pressure, wheel speed, vehicle speed, and relative slip. This is not a generic block description. It explains how Vehicle Dynamics is connected to this specific design, which is the context needed before deciding what to modify.

Find where a feature lives

Now suppose the design change requires extending or reviewing the wheel-speed calculation. There is no longer a need to start at the top of the model or guess which subsystem owns that behaviour. Ask the question directly: What components handle wheel-speed calculation?

Figure 4 Simulink Copilot identifies the specific blocks that implement wheel-speed calculation, each hyperlinked for one-click navigation. Source: MathWorks

Simulink Copilot returns the specific blocks involved, including sldemo_wheelspeed_absbrake, the integrator that computes wheel angular velocity, and the gain block that converts angular velocity to wheel speed. Each result is hyperlinked to a model element, enabling navigation from a design question to the implementation detail.

What this looks like in practice

Generate an overview, drill down into subsystems, and perform a targeted search: this becomes a repeatable three-step pattern for working with an inherited Simulink model. Start broad enough to understand the architecture, narrow the conversation around the subsystem that owns the behaviour, and then ask targeted questions that lead to the blocks that may need modification.

From there, follow-up questions can move from orientation to change impact:

• How does the bang-bang control strategy work within the context of this model?
• What outputs are visualized during simulation, and how do they reflect braking performance?
• What adjustments can be made to controller parameters to enhance braking response time?

Each response references the model itself: block names, signal paths, subsystem boundaries, and parameter values. The conversation builds on itself, so by the time the first edit is made, the process is no longer based on a disconnected search result. Instead, it provides a model-specific explanation of what the design does, how the relevant pieces fit together, and why they matter to the requested change.

Tips for better handoff questions

• Be specific about scope. “Explain the braking control logic” works better than “explain this model” once the relevant part of the inherited design has been identified.
• State the goal, not just the question. “I need to extend the wheel-speed calculation” gives Simulink Copilot context to focus on the behaviour that is changing.
• Reference blocks by name when possible. “Explain the Sum block labelled slip_error” is more useful than “explain the Sum block” because it anchors the question in the design.
• Use Deeper Insights for questions that require sophisticated reasoning. Reserve the more thorough analysis for decisions about design intent, subsystem responsibilities, or change impact.

Now return to the engineer at the start: you inherited a model, and you were asked to update the braking system to support a heavier vehicle variant, and the risk was not that the model lacked structure. The risk was acting before understanding the intent behind that structure.

A grounded conversation changes that first hour. The architecture can be mapped, the subsystem that owns the behaviour can be inspected, and the relevant blocks can be identified before making the change. That does not replace engineering judgment or validation, but it provides a faster, more defensible way to inform decisions for the next design change.

Amal Jayarajan Phillai is a product manager at MathWorks.

Related Content

• Accelerating development with model-based design
• Model-based design and early verification aid designers
• Early verification and validation using model-based design
• Understanding the specific use cases for Simulink and Stateflow
• Plan strategies for adopting Model-Based Design for embedded applications

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У КПІ ім. Ігоря Сікорського створено унікальну дослідницьку інфраструктуру TRIUMPH! kpi пт, 09/11/2026 - 12:21

India’s premier video security brand PRAMA showcased advanced security products and smart security solutions for the MSME sector at the first edition of Bharatiya Vyapar Mahotsav (BVM) from August 12-15, 2026 at Bharat Mandapam, New Delhi. At the exhibition, traders, MSMEs, manufacturers, innovators, businesses and other industry stakeholders came together to showcase their products, services, and solutions. The inaugural event was attended by Union Minister for Commerce & Industry Piyush Goyal, Minister of State for Commerce and Industry Jitin Prasada and former Union Minister Smriti Irani along with leaders and representatives from Confederation of All India Traders (CAIT), Swadeshi Jagran Manch and other organisations.

PRAMA management representative said, “The Bharatiya Vyapar Mahostav is a great platform for Pan India Trade bodies and entrepreneurs of MSME sector. The Indian security market is poised for a new growth phase due to the exponential growth of Micro, Small and Medium Enterprises (MSME) sector. MSME sector is the backbone of India’s economy. We are glad to serve the needs of India’s Medium and Small enterprises. We find Bharatiya Vyapar Mahotsav (BVM) event, a highly valuable exhibition platform to connect with the key stakeholders and ecosystem partners. We showcased the latest products and solutions in this expo. We appreciate CAIT’s proactive role in organizing Bharatiya Vyapar Mahotsav event to spur innovation and engagement with key industry stakeholders.”

He further elaborated, “PRAMA, being India’s premier indigenous security brand holds, great significance. The spectacular growth that India security industry has achieved, PRAMA’s evolution as a leading security brand is the manifestation of Indian spirit and ingenuity. We are taking indigenous manufacturing to the next level. We are here to offer best-in-class products with cutting edge technologies that can deliver solutions as per the MSME Sector’s evolving requirements as per the business cases and application scenarios.”

The elaborately designed spacious PRAMA booth was center of attraction for the trade and industry specific visitors. PRAMA booth showcased the latest products and MSME sector’s solutions, including Ai technology, Interactive Display Panel, Perimeter and Defence Solution, Ranginview IP Series with Built-in MiC, Safe City Solution, Transportation Solution, Mobile enforcement Solution, Networking and Transmission and many more.

PRAMA booth displayed the latest video security products, including Ai Solution. PRAMA’s AiSense technology, powered by advanced AI Algorithms, takes surveillance to the next level. This technology intelligently distinguishes people and vehicles from other moving objects, reducing false alarm caused by animals or environmental factors. With AiSense Technology one can focus on the real threats, optimize resources and build on an intelligent security system. The AI Sense Technology can be very helpful in the various application scenarios in the retail segment for the MSME sector.

PRAMA’s Interactive Display Panel (IDP) was displayed at the booth, it is an all-in-one large display panel which integrates features of a computer, whiteboard, and projector, all in one device, making it a versatile tool for education, corporate training and business video conferencing scenarios. It is a great communication and training tool for the MSME sector.

PRAMA’s booth showcased Safe City Solution, which provides sound, stable and reliable public security. It features a suite of advanced technologies and security subsystems to safeguard industries, centralise operations, and integrate security platforms. These integrated technologies enable rapid and effective responses to security needs and events.

Bharatiya Vyapar Mahotsav (BVM) 2026 is India’s largest Make-In-India multi-sectoral trade expo, designed to bring together India’s diverse business ecosystem under one roof, connecting traders, MSMEs, manufacturers, industry leaders, institutions, and policymakers from across the country. The mega event was organized by Confederation of All India Traders (CAIT) & ITPO.

The Bharatiya Vyapar Mahotsav (BVM), 2026 was a four day event, which was successfully concluded. The event helped to create awareness about the latest innovations and products in the myriad trade segments. The discussions and deliberations were done with various key stakeholders on the core trade and MSME issues. The event was attended by the key trade and business professionals, Government officials and key stakeholders from the Trade and MSME sectors.

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Midsummer AB of Järfälla, near Stockholm, Sweden and Indonesian technology industrial company PT Metalogika Rekayasa Sistem have signed a binding investment and industrialization framework agreement for the establishment of a manufacturing platform in Indonesia for Midsummer’s lightweight, flexible copper indium gallium diselenide (CIGS) thin-film solar cell and photovoltaic module technology...

GSAS Micro Systems inaugurated its new manufacturing and expanded R&D facility in Doddaballapur, Bengaluru Rural, marking a significant step in the company’s journey from embedded engineering and technology integration toward a stronger in-house product development and manufacturing footprint in Karnataka.

Located in the Doddaballapur 3rd Phase Industrial Area, the new facility brings GSAS’s product development, engineering, manufacturing and project activities together under one roof. It will serve as a working hub for hardware manufacturing, assembly, integration, quality testing, R&D and new-product development.

The expansion comes as Karnataka continues to strengthen its electronics and semiconductor ecosystem, building on its established capabilities in electronic design and semiconductor R&D. According to the Karnataka Digital Economy Mission (KDEM), the state contributes 10% of India’s electronics output and nearly 40% of the country’s electronic design output. Karnataka also accounts for more than 22% of India’s electronics exports and hosts more than 100 fabless semiconductor design companies.

For GSAS, the Doddaballapur facility is both a business milestone and the culmination of a much older ambition. The company’s founder has carried the vision of building a dedicated electronics manufacturing base since the 1990s. Bringing that ambition to life in Karnataka gives the company a permanent home for developing and building more of its own products while expanding the engineering infrastructure available for customer-specific programmes.

“This is a deeply personal milestone for me. I have wanted to build a dedicated electronics manufacturing home since the 1990s. Karnataka gave our generation of electronics entrepreneurs the engineering talent, industry networks and ecosystem to build companies here. With this facility, we now have a place where our team can take more ideas from engineering and R&D into real products and manufacturing. For us, this is not the end of a dream; it is the foundation for what GSAS wants to build next.” said Satya Gopalam, Chairman and Managing Director , GSAS Micro Systems.

“Our engineering work has been moving deeper into the FPGA space, with vision AI and edge AI projects, board bring-up support for automotive programmes, and PCBA test automation. This new 12,000 square foot facility gives that work a manufacturing home: we will build the new Genesis series here, essentially embedded development kits and FPGA development kits, manufactured and assembled on site, alongside test automation and integration work for the automotive, aerospace and satellite space. We have been working towards this for the last few years, and I am proud to see it finally established. If you are curious, reach out; we are happy to give you a tour of the facility.” said Anvesh Gopalam, Executive Director , GSAS Micro Systems.

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Col Sandeep Rao (Retd) is a veteran Indian Army Artillery officer with more than two decades of military service. His career includes experience in combat operations, counter-terrorism and high-altitude operations along the Line of Control. An alumnus of the National Defence Academy and Don Bosco High School, Matunga, Mumbai, he brings military leadership and field experience to his role as Advisor at Tirupati Forge.

Within India’s defence acquisition framework, Col Rao served as programme coordinator for the country’s first indigenously designed and developed 155 mm advanced artillery gun system, managing requirement formulation, trials, and execution. His domain expertise includes artillery platforms, counter-UAS systems, defence robotics, ammunition manufacturing, and Defence Acquisition Procedure (DAP 2020) implementation.

Following his military service, Col Rao acts as a strategic advisor to defence manufacturers, technology enterprises, and investment platforms. He guides companies on market positioning, technology transfer, and institutional procurement pathways while advising defence-tech start-ups on investor readiness and government acquisition. As a technology scout and strategy consultant, he collaborates across the Ministry of Defence, DRDO, and industry channels to bridge operational military requirements with commercial delivery and advance defence indigenisation.

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Microchip Technology and Marelli have announced a new display connectivity solution that uses ASA Motion Link (ASA-ML), an open standard for automotive video connectivity. The solution enables graphics and video generated by a vehicle’s central computer to be streamed directly to in-vehicle displays. The demonstrator can help automakers simplify display architectures, optimise system costs and increase sourcing flexibility as they move toward software-defined vehicles (SDVs).

ASA Motion Link is an open standard for automotive video connectivity and SerDes (serializer-deserializer) communication, defined by the Automotive SerDes Alliance (ASA), a global consortium of vehicle makers, Tier 1 suppliers and semiconductor companies. By enabling secure, high-speed video and graphics transmission across products from multiple technology providers, the standard supports greater compatibility across the automotive ecosystem and provides a scalable alternative to proprietary video transmission technologies. As a founding member of ASA, Microchip is advancing the automotive industry’s transition from proprietary connectivity technologies to open, interoperable standards, and has demonstrated broad interoperability with its camera solutions and is now extending those solutions to enable display connectivity.

As vehicle architectures evolve toward centralized computing and software-defined vehicles (SDVs), vehicle makers are looking for connectivity solutions that can support growing performance demands while reducing complexity, controlling costs and enabling scalable vehicle electronics architectures. In the joint demonstrator solution, graphics and video content generated by the vehicle’s central computer is processed and transmitted through Microchip’s VS7000 ASA-ML chipset over a high-speed standardized link.

Marelli pioneers the display-side integration of the technology by enabling the configuration and optimization of the ASA ML deserializer to decode standardized video streams directly at the display. This ensures accurate reception, synchronization and delivery of centrally generated content, including camera feeds, navigation maps, infotainment graphics and vehicle control interfaces, while enabling simplified display-side electronic architectures.

“The transition to software-defined vehicles is driving demand for more open, flexible and scalable electronic architectures,” said Kelei Shen, president of Marelli’s electronics business. “As an integrator within the automotive ecosystem, Marelli brings together best-in-class technologies from multiple partners to deliver complete solutions for vehicle makers. This collaboration highlights how open standards can accelerate innovation while providing interoperability needed for the next generation of vehicle architectures.”

“Open standards play a critical role in accelerating innovation by reducing dependency on proprietary technologies,” said Kevin So, vice president of Microchip’s communications business unit. “Our collaboration with Marelli demonstrates how ASA Motion Link provides automotive manufacturers with a secure, interoperable and scalable connectivity solution that simplifies integration across the ecosystem.”

Technology Highlights

• Open interoperability enabling seamless connectivity between cockpit systems and displays from multiple technology providers.
• Greater supplier flexibility thanks to open protocol specifications supported across the automotive ecosystem.
• Integrated security with link-layer authentication and encryption embedded in the communication channel.
• Robust data transmission with lossless communication and high immunity to electromagnetic noise.
• Scalable performance supporting data rates up to 16 Gbps to address a range of display requirements.
• Optimized efficiency enabled by embedded Time Division Duplex (TDD) functionality and simplified Forward Error Correction (FEC), contributing to lower power consumption.
• Path to increasingly Ethernet-centric vehicle architectures.

The collaboration demonstrates how open-standard connectivity supports in-vehicle networking and electronics by enabling secure communication between centralized computing systems and displays. It also reflects Marelli’s broader commitment to adopting open standards that help simplify development, optimize system costs, and promote a more open automotive ecosystem.

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London is set to be the venue for European Microwave Week (EuMW) 2026, bringing together professionals working across RF, microwave, wireless and radar engineering.

In relation to this the European Microwave Exhibition is being held in Excel London, the event scheduled to take place between October 6 and 8, 2026. Within Booth B10, Rohde & Schwarz will present a range of their most recent test and measurement solutions, aimed at RF & Microwave component, wireless, radar & satellite system developers and will enable them to respond to demands in areas such as EW (electronic warfare) and EMSO (electromagnetic spectrum operations) with more challenging frequency environments.

Markus Lörner, Application Segment Manager RF & Microwave Components at Rohde & Schwarz, says: “Our EuMW 2026 motto, ‘Progress needs proof,’ reflects what many engineers are facing today: when DUTs push beyond the limits of conventional methods, innovation slows down. At the show, we will demonstrate how our advanced test solutions support customers across RF and microwave components, satellite and radar systems, phased-array antennas and emerging 6G sensing applications. As R&D moves toward higher frequencies, more integrated designs and increasingly demanding spectrum environments, precise and reliable measurement becomes a key enabler of progress.”

From EW and EMSO scenarios to advanced high-frequency characterization

A highlight at the Rohde & Schwarz booth is the FSWX signal and spectrum analyser, displayed in a radar and electronic warfare (EW) test scenario within the context of electromagnetic spectrum operations (EMSO), focused on DRFM-based jammers. In this setup, an R&S SMW200A vector signal generator simulates radar signals, while the FSWX uses its multi channel architecture to analyse jammer input and output signals simultaneously for a comprehensive assessment of deceptive signal behaviour. The new, fully integrated R&S FSWX-KM700 pulse analysis option measures both channels in parallel and provides detailed insight into pulsed radar parameters, differences between the channels and the parameter trends over time.

In a second demonstration, Rohde & Schwarz will show how its high-frequency test capabilities can be extended into the E-band and beyond, up to 110 GHz, to characterise challenging high-frequency components. The demonstration combines the fully calibrated R&S FE110ST external frontend with the R&S SFI100A wideband IF vector signal generator, enabling wideband signal generation and testing for demanding high-frequency applications. The setup can support the testing of satellite components for new payload and link-generation applications, while helping engineers accurately characterise the RF behaviour of the device under test (DUT).

Advanced testing for low-noise sources and high-power RF frontends

Rohde & Schwarz will also showcase the enhanced R&S FSWP phase noise analyser and VCO tester platform for advanced component characterization. With support for residual and absolute phase noise measurements up to 56 GHz and further improved internal reference, R&S FSWP-B62, the solution offers high flexibility for testing synthesizers, OCXOs, DROs, VCOs and two-port components such as amplifiers. New options for integrating external signal sources as local oscillators can dramatically accelerate measurements, in some cases by up to a factor of 1,000, making the R&S FSWP well suited for the development of low-noise signal sources for radar, satellite, base station and high-speed digital applications.

Rohde & Schwarz will also present the new R&S SAM200 system amplifier for high-power test applications in the Ka- and V band up to 53 GHz. In radar, satellite link and backhaul applications, RF frontends must deliver higher power levels so signals can travel farther and cover larger distances. Designed to support validation of these components, the amplifier extends test setups with higher signal power while maintaining precise and reliable level control. At EuMW, Rohde & Schwarz will showcase the R&S SAM200 in two demonstrations: one characterizing a high-power Ka-band amplifier with the R&S ZNA vector network analyser in a fully integrated and calibrated test setup, and another highlighting the amplifier’s linearity in a wideband modulated test scenario with the R&S SMW200A vector signal generator and the FSW signal and spectrum analyser.

Scalable test for SATCOM and phased-array systems

At EuMW, Rohde & Schwarz will also highlight the R&S ZNB3000 vector network analyzer for measurement applications in satellite communications, Earth observation and radio astronomy. Its wide dynamic range and low trace noise provide the sensitivity required for demanding antenna characterization and radar measurements. For higher-frequency applications, optional millimeter wave converters extend coverage up to 330 GHz, including bands used by microwave and millimeter wave radiometers. Together, these capabilities make the R&S ZNB3000 a versatile and cost-effective solution for a broad range of measurement needs in the satellite and space sectors.

Micro-Doppler emulation for emerging sensing use cases

With the AREG800A radar target generator, Rohde & Schwarz will showcase new test capabilities addressing use cases like 6G integrated sensing and communication (ISAC). As 6G networks evolve beyond data connectivity toward environmental awareness, ISAC is emerging as a key technology for detecting and classifying objects using mobile infrastructure. In addition to emulating distance, speed and radar cross section (RCS), the solution can also generate micro-Doppler signatures, enabling more realistic test scenarios for applications such as drone detection and supporting the development of advanced sensing capabilities.

Rohde & Schwarz at EuMW 2026

Visitors will find Rohde & Schwarz at booth B10 at Excel London from October 6 to 8, 2026, where they can learn how next-generation test solutions support engineers from component characterization to system-level validation across radar, satellite, wireless and aerospace and defense applications. In addition, experts from the company will contribute to the EuMW 2026 with presentations and workshops as part of the European Microwave Conference (EuMC) as well as the European Radar Conference (EuRAD).

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Couldn't find any documentation, so I made my own! The cathode line took 1-3V across the thin wires in the display, and the metal grid along with the phosphorous layer both were hooked up to the 12V+ end while the cathode was hooked up to 12V- I eventually plan on driving it with a teensy 4.0 and a bit more logic to drive the 4-bit ULN2803 interface. In case anybody ever has to work with one of these I'm going to leave some of these SEO terms: VFD 6-LT-09 Echo-6 94V-I PWB-AGN 2161317-007 VFD-7-Segment (kHz/MHz) ULN2803 submitted by /u/chknboy [link] [comments]

The "slayer exciter" circuit is the classic introduction to SSTCs. I really wanted a version with just one coil because once you eliminate the loosely coupled resonant transformer, you end up with a greatly simplified design. It basically drives a series resonant circuit through a RF choke, using a coupling capacitor as feedback. I'm not the first to think of that but there was always something or other that I didn't like about other people's designs so this version might be my own :) I encourage you to try it, let me know if you can get the thing to at least light a neon bulb or something. My tiny axial inductors aren't handling the power well 🔥 And btw component values are "for demonstration only", do not assume they're optimal! submitted by /u/Lily_1225 [link] [comments]

Silicon photonics-based chip-to-chip optical connectivity firm Ayar Labs of San Jose, CA, USA — which is pioneering co-packaged optics (CPO) for AI scale-up — has secured an additional $150m in funding, bringing its total primary capital raised in 2026 to $650m. Separately, it discloses that Wiwynn made a strategic investment earlier this year. Wiwynn, a cloud IT and infrastructure provider for data centers, joins a growing group of strategic backers that includes Alchip, AMD, Intel, MediaTek, and NVIDIA...

The Optical Internetworking Forum (OIF) has issued the Implementation Agreement (IA) for 1600ZR Coherent Interfaces, defining an interoperable 1.6T coherent line interface and frame format for single-span, amplified, point-to-point dense wavelength division multiplexing (DWDM) links up to 120km...

In booth #2173 at the European Conference on Optical Communication (ECOC 2026) in Malaga, Spain (21–23 September), the Ethernet Alliance is hosting a live multi-vendor interoperability demonstration at a pivotal moment for high-speed Ethernet, as bandwidth and performance requirements continue to climb and the 1.6 Terabit Ethernet ecosystem gains momentum. IEEE P802.3dj, which includes new specifications for 1.6Tb/s Ethernet, is also advancing through the standards process...

There’s a lot you can potentially do to boost your WAN’s downstream and upload speeds, as well as to minimize its latency. But only if your service provider lets you.

This is my final post in this series. Really. I promise! Like I’ve said before, I’ve learned a lot in the near-year that started last October, when an inadvertent cable cut led to chronic broadband and TV service outages. Four blog posts’ worth, apparently. But I’ll wrap up today. Really. I promise!

At the conclusion of last week’s third post:

• Debugging intermittent Comcast, part 1: Scenario-setting
• Debugging intermittent Comcast, part 2: Remediation details
• Debugging intermittent Comcast, part 3: Retrospective analysis

I’d been seduced by the Sirens’ Song of the Comcast technician, who, after swapping out some hardware, had confidently proclaimed “wait until you see how fast your Internet access will be now!” Unfortunately, although my connection was now rock-solid reliable, it wasn’t seemingly any faster than before. Why, I wondered? Thereby launching myself down the packet-hole into broadband-land (with apologies to Alice and the White Rabbit for the admittedly lame analogy). Recall upfront that I hadn’t yet done the necessary online research to realize that I was already running near the upper end of my location-determined Comcast-offered speed tier options.

Spectral extension and overlap

DOCSIS 3.1, I learned through my research, is theoretically capable of leveraging wire-based frequencies all the way up to 1,218 Mhz (original plans for further spectrum extensions up to 1,794 Mhz are now instead comprehended in subsequent-gen DOCSIS 4.0). In the process, though, it spectrally overlaps with MoCA 2.5 beginning at 1,125 MHz by default, at least (hold that thought for a dedicated-topic post to come, hopefully in the near future).

Recall, too, that I still had a point of entry (PoE) filter sitting ahead of the cable modem, initially a self-purchased and -installed standalone unit, subsequently integrated within the grounding block supplied by Comcast. In both cases, however, the specified low-pass cutoff frequency was only 1,002 MHz, matching that of the lingering two-way splitter in-between the filter and the cable modem (connection-shared with a CABLEcard receiver, therefore the splitter). And building on the fact that I wasn’t currently running MoCA anyway, I suspected that nobody else in my neighborhood was, either.

Why, then, did all the extra hardware “gifts” the technician had passed on to me at the end of his visit—standalone MoCA filters, two- and three-way splitters, etc.—have 1,002 MHz low-pass cutoffs, too, if DOCSIS 3.1 supposedly stretched to 1,218 Mhz? And what would therefore happen, I wondered, if I were to ditch the outside filter entirely, along with replacing the limited-frequency splitter in the furnace room with a spectrally wider alternative? There’s no better way to find out than to try it and see what happens, right? So that’s what I did.

Here again is the original outside setup:

Here’s my original in-the-furnace-room splitter:

And here are some snapshots of the original dataset, first as a benchmark result from my router.

Followed by a data dump leveraging my cable modem’s convenient second integrated Ethernet port.

Now let’s replace the filter-inclusive grounding block outside with a filter-less one.

And swap out the original furnace room splitter with one that spec’d operation all the way out to 2,450 MHz.

The outcome? Data suggestive of a degraded-performance response to the changes, actually. The benchmark results alternatively might simply reflect test run-to-run variability.

But the higher upstream signal power that the modem is being required to generate in the latter case is, as I first explained in Part 2, suggestive of higher channel noise level that it’s “fighting”.

Perhaps MoCA is operational somewhere in my neighborhood after all? Obviously, I immediately reversed course and returned to the original setup.

Router uniqueness and artificial constraints

The fact that I was “only” getting ~850 Mbps (average, ~890 Mbps peak) download speeds still nagged at me, particularly given that my upload speeds were notably exceeding Comcast’s estimates (43+ Mbps vs. 35 Mbps), and in spite of the fact that I’d best-case only be able to squeeze an additional 50 Mbps or so of downstream bandwidth out of the setup. My cable modem is a somewhat unique Netgear variant, the Nighthawk CM1100, which I’d first mentioned more than seven years back, with more in-depth coverage a year-plus later.

As I mentioned before, the Nighthawk CM1100 “only” implements 1 GbE connectivity, but it integrates two Ethernet ports, thereby (barely) rationalizing NETGEAR marketing’s “multi-gig” product claims.

The intent here is to optionally mate the CM1100 with a more advanced router containing dual Ethernet WAN connections, subsequently leveraging a feature known as “link aggregation”. But, as my research eventually revealed, this particular feature, not to mention the router’s broader 1 GbE (minus protocol overhead) claimed peak performance specs, were for naught “thanks” to Comcast’s unavoidable setting tweaks.

Here’s what Google AI Assistant, aggregating various info bits on the Internet that I’d already come across, spat back at me when I searched on the phrase “Xfinity 1 Gbit plan actually 800 Mbit CM1100”.

The reason your Xfinity 1 Gbps (1,000 Mbps) plan is maxing out at roughly 800 Mbps is because Xfinity explicitly limits the Netgear CM1100 to an 800 Mbps speed tier on their network.

Even though the Netgear CM1100 is a highly capable DOCSIS 3.1 modem with a theoretical multi-gigabit capability, Comcast’s official device compatibility lists cap this specific hardware for plans “Up to 800 Mbps” (previously rated for up to 945 Mbps). When an unapproved or downgraded modem is connected to a higher tier like the 1 Gig plan, Xfinity’s automated provisioning system pushes a default, restricted config file to the modem. This prevents it from pulling your full subscription speed.

Hardware and Network Bottlenecks

Beyond Xfinity’s strict software provisioning profile, your hardware setup likely has several physical bottlenecks preventing you from reaching 1 Gbps:

• Lack of a 2.5 Gbps Port: The CM1100 only features standard 1 Gbps (1,000 Mbps) Ethernet ports. Due to standard network overhead (headers, routing metadata, and packet loss), a single 1 Gbps port will max out at roughly 940 Mbps in a real-world wired environment.
• Link Aggregation Limits: While the CM1100 supports Link Aggregation (bonding its two 1 Gbps ports together to achieve 2 Gbps), Xfinity generally disables or restricts this feature on customer-owned modems. Furthermore, most consumer Wi-Fi routers do not support WAN Link Aggregation.

How to Fix It

If you want to get the full speed you are paying for, you have three primary paths forward:

• Downgrade Your Plan: Call Xfinity and drop your service to the 800 Mbps tier. Your CM1100 is perfectly optimized for this tier, you will save money on your monthly bill, and your real-world internet performance will feel exactly the same.
• Upgrade Your Modem: If you want to keep the 1 Gbps speed (or plan to upgrade to 1.2 Gbps in the future), you must purchase a modern DOCSIS 3.1 or DOCSIS 4.0 modem that features a dedicated 2.5 Gbps Ethernet port (such as the Arris Surfboard S33 or Netgear CM2000). This will allow Xfinity to push a “Next-Gen” provisioning profile to your house.
• Rent an Xfinity Gateway: You can opt to rent an Xfinity XB7 or XB8 gateway. These come equipped with native 2.5 Gbps LAN ports and are completely optimized for Xfinity’s over-provisioned gigabit speeds.

Unfortunately, as you already saw from the screenshots I shared last time, an “800 Mbps” plan isn’t offered at my particular Comcast service location. I’m also not interested in paying Comcast a monthly rental fee for the “privilege” of using Xfinity Gateway gear I’ll never own free-and-clear.

And regarding the “upgrade your modem” option, I now recall an email I received from the company in late May 2025 with the tantalizing subject line “Replace your equipment to get faster speeds – at no extra cost.” Here’s the body verbiage.

Good news

Bringing customers like you the best in-home WiFi experience is our top priority. That’s why we’re excited to give you faster speeds so your home can continue being everyone’s favorite binge, scroll, share, and stream zone.

Here’s the best part: These faster speeds are included with your current Internet plan at no extra cost.

Next steps

Your current internet equipment can’t deliver these new speeds, so we’ve compiled a list of compatible devices to purchase so that you can take advantage of the fastest speeds available to you. Click below to find a compatible device.

Find compatible devices

Or you can explore our Xfinity Gateway option, which is a modem + WiFi router in one with advanced security designed to deliver the fastest, most reliable coverage on our network.

Take action today so you can start enjoying faster speeds as soon as possible.

Thanks for being with us.

The “no extra cost” angle, perhaps obviously, was specific to the service tier I was paying for. The “replace your equipment” encouragement, on the other hand, was most definitely not “no extra cost”. And nowhere in the email, or the linked website page for that matter, did Comcast happen to mention Google AI Assistant’s tipoff that “when an unapproved or downgraded modem” such as my existing CM1100 “is connected to a higher tier like the 1 Gig plan, Xfinity’s automated provisioning system pushes a default, restricted config file” (known as a bootfile) “to the modem. This prevents it from pulling your full subscription speed”.

The information Google AI’s Assistant is sharing with me seems spot-on, by the way; an over-provisioned “800 Mbit” plan (if it theoretically existed as a service tier option for me) would likely deliver the ~890 Mbps peak download and ~43 Mbps peak upload speeds that I’m now seeing.

I’m more than a little irritated to learn that Comcast’s latest-version provisioning bootfile for CM1100, which downloads every time the modem connects to the network and overrides NETGEAR’s factory-default settings, is disabling my device’s dual-Ethernet facilities. I’m even more irritated to learn that the bootfile now also artificially restricts my modem’s peak speeds, which were previously unhindered.

And don’t get me started on the fact that Comcast wants me to drop several hundred dollars on a brand-new replacement modem with capabilities that the speed tiers available at my location can’t even leverage, discarding my perfectly good existing hardware in the process, just so I can take full advantage of the service I’m paying for.

Thanks but no thanks, Comcast. Thoughts, readers? Sound off in the comments!

—Brian Dipert is the associate editor, as well as a contributing editor, at EDN.

Related Content

• Debugging intermittent Comcast, part 1: Scenario-setting
• Debugging intermittent Comcast, part 2: Remediation details
• Debugging intermittent Comcast, part 3: Retrospective analysis
• The whole-house LAN: Achilles-heel alternatives, tradeoffs, and plans
• A quest for faster upstream bandwidth

The post Debugging intermittent Comcast, part 4: Broadband diagnostics appeared first on EDN.

Infineon Technologies and SolarEdge Technologies, have expanded their existing collaboration to include Solid-State Circuit Breaker (SSCB) technology for high-voltage DC distribution in AI and hyperscale data centres. The collaboration addresses a key challenge in adopting 800 VDC architectures: achieving selective protection while maintaining high efficiency requires extremely fast fault isolation.

Expanding the partnership into solid-state protection addresses an important gap in the distribution layer between the Solid State Transformer (SST) and the compute rack, further advancing the end-to-end grid-to-rack concept. SolarEdge is leading the design of the Solid-State Circuit Breaker (SSCB) solution, while Infineon contributes its silicon carbide (SiC) JFET technology as a core component of the protection switch.

Rapidly increasing AI compute density is pushing the data-centre industry toward higher-voltage DC distribution architectures. In this environment, solid-state circuit breakers (SSCBs) address the need for fast and selective fault protection. Unlike AC systems, DC systems do not have a natural current zero, making fault interruption more challenging and potentially resulting in arcing when conventional mechanical breakers are used.

SSCBs overcome this limitation by using power semiconductors to interrupt fault currents in the microsecond regime, without mechanical contacts and the associated arcing. Infineon’s CoolSiC JFET technology combines low conduction losses, fast turn off capability and high robustness, making it suitable for solid-state protection applications. These characteristics can help protect high-value compute hardware from fault-related damage while supporting compact and power-dense DC distribution architectures.

The collaboration builds directly on SolarEdge’s SST platform with Infineon SiC components, first announced in November 2025. The SST is designed to enable direct medium-voltage (13.8-34.5 kV) to 800-1500 VDC conversion at over 99 percent efficiency, collapsing multiple conversion stages into a single solution while reducing physical footprint.

“High-density AI infrastructure at 800 VDC demands uncompromising efficiency and protection”, said Shuki Nir, Chief Executive Officer of SolarEdge. “Solid-state protection will enable operators to achieve both, delivering ultra-fast and dependable fault isolation without sacrificing conversion performance. Infineon’s silicon carbide technology is what makes it practical at scale.”

“Today’s data infrastructures have become more vulnerable to electrical faults, thereby driving the demand for smarter, faster and more robust power distribution systems,” said Andreas Weisl, Executive Vice President and Chief Sales Officer of Industrial & Infrastructure at Infineon. “By combining our advanced silicon carbide JFET technology with SolarEdge’s expertise in final power distribution, we are addressing these demands to ensure fast, safe and reliable operations in AI data centers.”

Building on more than 15 years of leadership in DC-coupled power electronics, SolarEdge is developing an 800 VDC powertrain for AI factories, a DC-native chain that carries power from the medium-voltage grid connection through conversion, distribution and protection to the compute rack. Infineon’s broad portfolio of silicon, silicon carbide and gallium nitride solutions provides that foundation, supporting the decarbonisation of AI infrastructure through lower losses, reduced environmental impact, and improved total cost of ownership.

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NUBURU Inc of Centennial, CO, USA (a dual-use defense & security integrated platform company) says that, following notification from NYSE Regulation, trading in its common stock is scheduled to resume on NYSE American on 14 September under the ticker symbol ‘BURU’. The stock is currently quoted on the OTC Pink Market under the temporary post-split symbol ‘BURUD’...

This year, the emphasis of Electronica, Bengaluru, is on a presentation of new inspection systems. Making its presence felt, GOPEL electronic will present an array of new products at the exhibition. The Multi Line AXI X-ray inspection platform marks a new generation of inspection systems for electronic assemblies that brings a new dimension of quality to electronics manufacturing.

Advanced Technology on Display by GOPEL Electronic

Multi Line AXI combines advanced technological innovations with flexible application options and multifunction capabilities, while also offering simple and rapid adaptability to inspection tasks. This innovative AXI marks a new benchmark in X-ray inspection while supporting manufacturers in maintaining consistent quality in electronics production.

The all-purpose Multi Line is ready for all inspection tasks throughout the entire manufacturing process which includes SPI (Solder Paste Inspection), SMD (Surface-Mount Device) and THT (Through-Hole Technology) processes. Due to the modularity of the Multi Line platform, camera modules can be configured according to specific requirements and are available for other process applications through rearrangement, if ever required.

Fast test program generation, bilateral inspection and the use of a common operating platform are characteristics of devices from the Multi Line AOI platform, which ensure high quality of production at high-mix/low volume production, prototyping, and small batch sizes. The Vario Line systems combine high-speed inspection with high defect-detection performance, setting new standards in precision and efficiency through intelligent 2D/3D inspection and variable 360-degree inspection in 1-degree increments.

Testing and Programming Prowess

In the field of electrical testing and programming, GOPEL electronic’s in-system programming and boundary scan products will take centre stage: For example, the FlashFOX universal programmer supports the dynamic transfer of programming data—the programmer always retrieves the latest content to be programmed from the central server. In addition to the 8-channel version, the new FlashFOX 2 can also implement complex power supply configurations for the microcontrollers or flash devices to be programmed, thanks to four integrated independent power supplies.

The turnkey BARCUDA tester is a complete solution for testing and programming PCBAs. The stand-alone unit utilises the proven technologies of GOPEL Electronics’s Embedded JTAG Solutions, but can also be expanded to meet the functional test requirements of electronics manufacturing. The BARCUDA JTAG production tester tests and programs PCBAs with or without JTAG/boundary scan without the need for time-consuming configuration of a specialized in-house test system.

The JULIET unlimited JTAG tester is a professional, flexible JTAG/boundary scan tester that combines the entire system electronics and DUT adaptation into a single, complete unit. A total of six different models cover all production applications from simple test execution to a complete repair station with graphical fault visualisation making the system ideal for rapid prototyping and low-volume production runs.

The post GOPEL Electronic to Showcase New AOI, BScan and X-ray Inspection Systems at Electronica 2026 appeared first on ELE Times.

Infineon Technologies AG of Munich, Germany and smart energy firm SolarEdge Technologies Inc of Milpitas, CA, USA have extended their collaboration to advance solid-state circuit breaker (SSCB) technology for high-voltage DC distribution in AI and hyperscale data centers. The collaboration addresses a key challenge in the adoption of 800VDC architecture: Safe operation of increasingly power-dense infrastructure requires very fast fault-isolation to achieve selectivity while maintaining high efficiency...

​Arrow Electronics has made global remote access available to customers through its Digital Test Drive platform for evaluating NXP Semiconductors’ Ara240 discrete neural processing unit (DNPU). This gives engineers early access to run, test, or evaluate real-world performance for advanced AI models and technologies for computer vision, generative AI & multimodal systems before purchasing.

This trend comes as AI is being more heavily deployed in industrial, robotics, and intelligent vision applications, and developers now look forward to implementing more advanced AI applications close to the generation of data. Operating AI locally at the edge brings advantages such as limited latency, enhanced data privacy, and restricted reliance on cloud-hosted computation, as for those with real-time requirements.

To enable customers to discover and examine this functionality. Arrow has also included NXP’s Ara240 solutions on its Digital Test Drive, a digital test platform offered by Arrow on the web. Arrow’s Digital Test Drive, a ‘digital test platform,’ is a remote hardware test and development platform hosted in the cloud. It allows users to test real hardware, remote devices without actually owning and having a target device on their desk.

Engineers can test live systems with NXP i.MX applications processor and the Ara240 DNPU over remote systems that let engineers explore real world AI applications like computer vision, LMM inference and vision language AI without having to rely on specifications or benchmarks. From these systems, engineers can better test their intended use case for their particular project before investing hardware money and system architecture.

“Developers need practical ways to understand how advanced AI technologies will perform in real applications,” said Justin Mortimer, senior director, product marketing, Secure Connected Edge, NXP Semiconductors. “By providing access to NXP’s Ara240 DNPUs through Digital Test Drive, Arrow enables engineering teams to evaluate real-world edge AI performance faster and make informed design decisions.”

“At Arrow, we are committed to helping customers accelerate their AI journey by removing barriers between innovation and deployment,” said Shelby Schnurrenberger, vice president of supplier management, global semiconductor, Arrow Electronics. “By integrating NXP’s Ara240 AI accelerator into our Digital Test Drive platform, engineers can evaluate advanced edge AI workloads immediately, gaining hands-on experience with the technology before making hardware investments.”​

​“Together with NXP, we are enabling customers to move faster from concept to production and unlock new opportunities in intelligent edge applications. Digital Test Drive extends global access to NXP’s AI portfolio, allowing engineers to validate performance, explore use cases, and shorten development cycles from anywhere in the world. This collaboration reinforces our shared commitment to making edge AI more accessible, scalable, and practical for customers across industrial, robotics, machine vision, and emerging intelligent systems.” Schnurrenberger stated.

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ST is introducing an initiative to provide Rust drivers for many of our sensors, opening a new avenue for those looking to adopt this programming language in their embedded systems development. Obviously, we will continue to ship and maintain our C-based ecosystem.

However, we are also aware of the growing popularity of the Rust programming language, the benefits it offers for many projects, and that building a robust, platform-agnostic alternative in another programming language takes significant time and investment. It’s for those reasons that we have started porting drivers piecemeal and are now advertising our presence on crates.io and showcasing projects like Embassy STM32, which provides a hardware abstraction layer in Rust for our MCUs.

Reason One: Safety

One of the most popular aspects of Rust is its inherent code safety compared to other languages, including C and C++. In essence, that means the Rust compiler will forbid certain operations that could jeopardise memory safety. Being memory-safe means that the Rust compiler will block any memory access if it hasn’t been explicitly allocated or has already been deallocated. This is a significant departure from C and C++, where developers have much more freedom in memory management. However, it also means that bad code can lead to issues such as buffer overflows, memory leaks, and “use-after-free” or dangling pointers. All of these can result in data corruption or even security vulnerabilities.

The reason Rust is safer is that it implements Resource acquisition is initialisation (RAII), a technique that automatically and immediately allocates resources when an object is created and releases them when the object is deleted. The compiler allocates these resources to an owner and can then transfer ownership or allow another owner to borrow it if needed. As a result, Rust handles resource management and does not need a garbage collector to manage memory allocations, unlike C++, another language that implements RAII but still requires developers to manage memory themselves. In practice, the absence of a garbage collector reduces overhead, but it also makes Rust code much less lenient.

While this blog post can’t begin to scratch the surface of all the ways Rust differs from C and C++ (we won’t even go into type safety), the point above illustrates an important reason why developers are moving to Rust and why ST has already tried to provide alternatives to its sensor drivers. The Rust learning curve is high. Writing safe code that compiles is challenging because there are so many guardrails to ensure code safety. However, it also means that once the code compiles, developers have far greater assurance of safety and security. And for developers new to Rust, having open-source drivers like the ones ST provides means they can study our implementations and learn from our experience.

Reason Two: Practicality, Portability, and Performance (sort of)

Another reason developers are adopting Rust for their embedded projects is the way it handles interfaces and bus operations. Unlike C, which traditionally uses a pointer-based bus abstraction, Rust uses “Traits”, which define interfaces as types and then provide a flexible abstraction over them. Through ecosystem standards such as embedded-HAL, interfaces for buses like I2C and SPI can be implemented consistently across platforms, helping developers gain expertise. In fact, our code already uses APIs aligned with our original C drivers to ease the learning curve, and we adopted consistent naming to smooth the transition to our Rust alternative.

One misconception we often encounter is that Rust is inherently “faster” than C or C++. The truth is far more nuanced. Depending on the application, Rust may be slower than, on par with, or faster than C. However, in many instances, Rust forces teams to rewrite their application, which naturally leads to refactoring, dropping legacy code, or creating new, optimised processes. The absence of a garbage collector in Rust, or its modern compiler enhancements, certainly helps, but embedded system developers should not rush in thinking it will magically provide significant runtime improvements. However, it will offer significantly safer, often more flexible code, which is why we are providing Rust alternatives for our C sensor drivers.

Reason Three: The Rust Community

The discussions in our GitHub repository for this project show a thriving community, which is an important factor for many developers. It’s not just key industry players like Meta, Google, or Microsoft that have publicly pledged to adopt the new programming language. Many smaller teams are investing in the new language because acquiring fluency takes time, and falling behind could lead to significant technical debt that would benefit a competitor. We know that adoption is still in the early phase. This is why we are providing Rust sensor drivers now. ST wants to support those who want to be first in this transition, which seems to be shaping the future of embedded systems development.

The best way to get started is to install Rust using rustup, then, as developers build their project, grab one of our packages on Crates. Our GitHub Page also walks users through the download and integration process. We offer examples in Cargo to help teams get results faster. And while the drivers themselves allow engineers to be MCU-agnostic, the examples we use are written for STM32 microcontrollers and primarily use the NUCLEO-F401RE development board. Current Rust drivers focus on I2C and SPI interfaces, as these are by far the most commonly used, but additional support, including I3C, is underway, and we will update this blog post as we release major updates.

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