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The high-speed data link to Mars faces a unique timing challenge

EDN Network - 3 години 53 хв тому

Experienced network designers know that the performance achievable of a data link depends on many factors, including the quality and consistency of the inherently analog medium between the two endpoints. Whether it’s air, copper, fiber, or even vacuum, that link sets a basic operating constraint on the speed and bit error rate (BER) of the link.

Any short- or longer-term perturbation in the link—including external and internal noise, distortion, phase shifts, media shifts, and other imperfections—will result in a lower effective data rate, need for more data encoding, error detection, correction, and re-transmissions.

A critical element in high-speed, low-BER data recovery is the advanced clock recovery and re-clocking for synchronization accomplished using phase-locked loops (analog or digital) and other arrangements. The unspoken assumption is that the fundamental measurement of “time” is the same at both ends of the link. This can be established by use of atomic and laser-optical clocks of outstanding precision and performance, if crystal or resonator-based won’t suffice.

But that endpoint equivalence is not necessarily the case. If we want to establish a long-term robotic or even human presence on our neighbor Mars, and set up a robust high-speed data link, we need to know the answer to a basic question: What time is it on Mars?

It turns out that it’s not a trivial question to answer. As Einstein showed in his classic 1905 paper on special relativity “On the Electrodynamics of Moving Bodies,” and subsequent work on general relativity, clocks don’t tick at the same rate across the universe. They will run slightly faster or slower depending on the strength of gravity in their environment, as well as their relative velocity with respect to other clocks.

This time dilation is not a fanciful theory, as it has been measured and verified in many experiments. It even points to a correction factor that must be applied to satellites orbiting the Earth. Without those adjustments, GPS signal timing would be “off” and its accuracy seriously degraded. It’s a phenomenon that is often, and quite correctly, summarized simply as “moving clocks run slow.”

The general problem of time-dilation, objects in motion, and gravity’s effects have been known for many years, and it can be a problem for non-orbiting space vehicles as well. To manage the problem, Barycentric Coordinate Time—known as TCB, from the French name—is a coordinate time standard defined in 1991 by the International Astronomical Union.

TCB is intended to be used as the independent variable of time for all calculations related to orbits of planets, asteroids, comets, and interplanetary spacecraft in the solar system, and defines time as experienced by a clock at rest in a coordinate frame co-moving with the barycenter (center of mass) of the solar system.

What does this have to do with Mars and data links? As shown in Figure 1, the magnitude of the dilation-induced time “slippage” between Earth and Mars is one factor that affects maintaining a high-speed link between these two planets.

Figure 1 In addition to “hard” data from landed rover and orbiting science packages, Mars—also known as “the red planet”—presents a complicated time-dilation scenario. Source: NIST

Now, a team of physicists at the National Institute of Standards and Technology (NIST) has calculated a fairly precise answer for the first time. The problem is complicated as there are four primary “players” to consider: Mars, Earth, Sun, and even our Moon (and the two small moons of Mars also have an effect, though much smaller).

Why the complication? It’s been known since the 1800s that the three-body problem has no general closed-form solution, and the four-body problem is worse. That means there is no explicit formula that can resolve the positions of the bodies in the dilation analysis. Consequently, number-crunching numerical calculations must be used, and it’s even more challenging with four and more bodies.

The researchers’ work is based not only on theory but also measurements from the various “rovers” that have landed on Mars as well as Mars orbiters. The team chose a point on the Martian surface as a reference, somewhat like sea level at the equator on Earth, and used years of data collected from Mars missions to estimate gravity on the surface of the planet, which is five times weaker than Earth’s.

I won’t even try to explain the mathematics of the analysis; all I will say it’s the most “intense” set of equations I have even seen, even compared to solid-state physics.

They determined that on average, clocks on Mars will tick 477 microseconds faster than those on Earth per day (Figure 2). However, Mars’ eccentric orbit and the gravity from its celestial neighbors can increase or decrease this amount by as much as 226 microseconds a day over the course of the Martian year.

Figure 2 Plots of the clock-rate offsets between a clock on Mars compared to clocks on the Earth and the Moon for ∼40 years starting from modified Julian date (MJD) 52275 (January 1, 2003), using DE440 data. DE440 is a highly accurate planetary and lunar ephemeris (a table of positions) from NASA’s Jet Propulsion Laboratory, representing precise orbital data for the Sun, Moon, planets, and Pluto. Source: NIST

The clock is not only “squeezed” with respect to Earth, but the amount of squeeze varies in a non-periodic way. In contrast, they note that the Earth and Moon orbits are relatively constant; time on the Moon is consistently 56 microseconds faster than time on Earth.

If you want the details, check out their open-access paper “A Comparative Study of Time on Mars with Lunar and Terrestrial Clocks” published in The Astronomical Journal of the American Astronomical Society. Don’t worry: a readable summary and overview is also posted at the NIST site, “What Time Is It on Mars? NIST Physicists Have the Answer.”

How engineers will deal with these results is another story, but timing is an important piece of the data link signal chain. Perhaps they will have to build an equivalent of the tide-predicting machine designed by William Thomson (later known as Lord Kelvin) shown in Figure 3.

Figure 3 This analog all-mechanical computer design by William Thomson was designed to predict tides, which are determined by cyclic motion of the Earth, Moon, and many other factors. Source: Science Museum London via IEEE Spectrum

This analog mechanical computer on display at the Science Museum in London was designed for one purpose only: combining 10 cyclic oscillations linked to the periodic motions of the Earth, Sun, and Moon and other bodies to trace the tidal curve for a given location.

Have you ever had to synchronize a data link with a nominally accurate clock on each end, but with clocks that actually had significant differences as well as cyclic and unknown shifting of their frequencies?

Bill Schweber is a degreed senior EE who has written three textbooks, hundreds of technical articles, opinion columns, and product features. Prior to becoming an author and editor, he spent his entire hands-on career on the analog side by working on power supplies, sensors, signal conditioning, and wired and wireless communication links. His work experience includes many years at Analog Devices in applications and marketing.

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AXT updates Q4/2025 revenue guidance to $22.5–23.5m

Semiconductor today - 4 години 52 хв тому
For fourth-quarter 2025, AXT Inc of Fremont, CA, USA — which makes gallium arsenide (GaAs), indium phosphide (InP) and germanium (Ge) substrates and raw materials at plants in China — has updated its expectations for revenue to $22.5–23.5m, primarily due to fewer export control permits for indium phosphide being issued by China’s Ministry of Commerce than previously expected...

Sumitomo Chemical exhibiting compound semiconductor products at Photonics West

Semiconductor today - 5 годин 11 хв тому
Japan-based Sumitomo Chemical Co Ltd is participating at SPIE Photonics West 2026 in The Moscone Center, San Francisco, CA, USA (20–22 January), focusing on its compound semiconductor products...

Nuvoton and ITRI Join Forces to Accelerate Edge AI Adoption Across Industries with the Entry-Level M55M1 AI MCU

ELE Times - 6 годин 26 хв тому

Nuvoton Technology, centred on its NuMicro M55M1 AI MCU, is partnering with the Industrial Technology Research Institute (ITRI) to promote integrated “hardware–software” edge AI solutions. These solutions support diverse application scenarios, including manufacturing, smart buildings, and healthcare, enabling industries across the board to adopt AI quickly in a “usable, manageable, and affordable” way, and bringing AI directly into frontline equipment and business processes.

Aligned with the National Science and Technology Council (NSTC) and the Ministry of Economic Affairs (MOEA) initiative to build the Taiwan Smart System Integration and Manufacturing Platform, Nuvoton follows ITRI’s three key pillars for AI development—data, computing power, and algorithms—together with a six-dimension AI readiness framework covering AI strategy, organizational culture, talent and skills, infrastructure, data governance, and risk management. Based on this framework, Nuvoton modularises its toolchains, AI models, and development board offerings, and works with ITRI’s Chip and System Integration Service Platform Program to establish a TinyML micro-computing platform. This platform enables small and medium-sized enterprises (SMEs) to complete proof-of-concept (PoC) projects with minimal entry barriers, progress toward pilot production, and scale through replication. At the same time, it promotes “dual-brain collaboration” between AI experts and domain specialists, increasing project success rates and supporting the government’s vision of building Taiwan into an “AI Island.”

As one of the few entry-level AI solutions on the market, the M55M1 integrates an Arm Cortex-M55 core (up to 220 MHz) with an Arm Ethos-U55 micro-NPU in a single chip, delivering around 110 GOP/s of acceleration for mainstream CNN/DNN inference. The chip features up to 1.5 MB of on-chip SRAM and 2 MB of Flash. It can be expanded via HyperBus to support HyperRAM/HyperFlash, enabling real-time, offline, low-power AI inference and control directly at the edge. Together with Nuvoton’s in-house NuML Toolkit and a variety of readily available AI models (such as face recognition, object detection, speech/command recognition, and anomaly detection), developers can quickly get started using a standard MCU development flow, effectively lowering the barrier to AI adoption.

Nuvoton and ITRI will first focus on three key real-world application scenarios:

  • Edge inspection on manufacturing lines: Using CCAP for image pre-processing and U55 for inference to perform object detection or defect identification at the edge, supporting quality inspection as well as predictive analysis of equipment health.
  • People flow detection and energy-saving control in smart buildings: Leveraging lightweight sensing such as PIR, ToF, or low-resolution imaging, combined with time-based and zoned control strategies, to drive lighting/HVAC on/off and dimming/airflow adjustments, thereby improving energy efficiency.
  • Edge alerts for medical and long-term care: Performing posture and fall detection directly on end devices, uploading only events and key indicators to balance personal data protection with overall system availability.

Nuvoton and ITRI will continue to leverage Taiwan’s local supply chain and its strengths in hardware–software integration, using a systematic approach of “data × computing power × algorithms” to bring AI directly into real-world environments. With its single-chip capability to handle combined requirements in vision, audio, and control, the M55M1 enables small and medium-sized enterprises to embrace AI in an affordable and well-governed way.

Nuvoton is now collaborating with system integrators and field partners across scenarios such as manufacturing, buildings, healthcare, and public services, providing development boards, toolchains, and best-practice templates to help enterprises complete PoC and mass deployment in the shortest possible time. We welcome inquiries and partnership opportunities to jointly advance “AI in industries and industrialisation of AI,” accelerating AI transformation and value innovation across Taiwan’s many sectors.

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Cadence to deliver pre-validated chiplet solutions to Accelerate Chiplet Time to Market

ELE Times - 8 годин 6 хв тому
Cadence announced a Chiplet Spec-to-Packaged Parts ecosystem to reduce engineering complexity and accelerate time to market for customers developing chiplets targeting physical AI, data centre, and high-performance computing (HPC) applications. Initial IP partners joining Cadence include Arm, Arteris, eMemory, M31 Technology, Silicon Creations and Trilinear Technologies, as well as silicon analytics partner proteanTecs. To help reduce risk and streamline customer adoption, Cadence is collaborating with Samsung Foundry to build out a silicon prototype demonstration of the Cadence Physical AI chiplet platform, including pre-integrated partner IP on the Samsung Foundry SF5A process.
Extending their longstanding history of close collaboration, Cadence and Arm are working together to accelerate innovation across physical and infrastructure AI applications. Cadence will leverage the advanced Arm Zena Compute Subsystem (CSS) and other essential IP to enhance Cadence’s Physical AI chiplet platform and Chiplet Framework. The resulting new Cadence solutions accommodate the demanding next-generation edge AI processing requirements for automobiles, robotics and drones, as well as the needs of standards-based I/O and memory chiplets for data centre, cloud and HPC applications. The alliances reduce engineering complexities, offer customers a low-risk path to advanced chiplet adoption and pave the way for smarter, safer and more efficient systems.
“Cadence’s new chiplet ecosystem represents a significant milestone in chiplet enablement,” said David Glasco, vice president of the Compute Solutions Group at Cadence. “Multi-die and chiplet-based architectures are increasingly critical to achieving greater performance and cost efficiency amid growing design complexity. Cadence’s chiplet solutions optimise costs, provide customisation flexibility and enable configurability. By combining our extensive IP and SoC design expertise with pre-integrated and pre-validated IP from our robust partner ecosystem, Cadence is accelerating the development of chiplet-based solutions and helping customers mitigate risk to quickly realise their chiplet ambitions with greater confidence.”
Cadence has built spec-driven automation to generate chiplet framework architectures that combine Cadence IP and third-party partner IP with chiplet management, security, and safety features, all supported by advanced software. The generated EDA tool flow enables seamless simulation with the Cadence Xcelium Logic Simulator and emulation with the Cadence Palladium Z3 Enterprise Emulation Platform, while the physical design flow employs real-time feedback for efficient place-and-route cycles. The resulting chiplet architectures are standards-compliant to ensure broad interoperability across the chiplet ecosystem, including adherence to the Arm Chiplet System Architecture and future OCP Foundational Chiplet System Architecture. Cadence’s Universal Chiplet Interconnect Express (UCIe) IP provides industry-standard die-to-die connectivity, while a comprehensive protocol IP portfolio enables fast integration of leading-edge interfaces such as LPDDR6/5X, DDR5-MRDIMM, PCI Express (PCIe) 7.0, and HBM4.
An earlier prototype of the Cadence base system chiplet, which is part of the Cadence Physical AI chiplet platform and incorporates the Cadence chiplet framework, UCIe 32G, and LPDDR5X IP, has already been fully silicon validated.
Supporting Partner Quotes
“As compute demands surge across automotive, robotics, and other emerging applications, the industry needs scalable solutions that deliver higher performance, greater efficiency, and functional safety by design. By leveraging Arm Zena CSS, Cadence’s chiplet platform will meet the requirements of next-generation intelligent systems that will advance the physical AI landscape, accelerate chiplet adoption, and help customers reduce design complexity.”
Suraj Gajendra, Vice President of Products and Solutions, Physical AI Business Unit, Arm
“Arteris network-on-chip IP products, including Ncore and FlexNoC, are at the forefront of innovation, and we are pleased to support the Cadence Physical AI Chiplet Platform and Chiplet Framework. Together with Cadence, we are enabling customers to confidently adopt chiplet architectures with high-bandwidth, scalable, and production-proven interconnect technology for next-generation multi-die systems.”
Guillaume Boillet, Vice President of Strategic Marketing, Arteris
“eMemory’s enhanced OTP products complement Cadence’s Securyzr™ Root of Trust within the Cadence Chiplet Framework. As a leading provider of non-volatile memory technologies, the combination of eMemory technology and Cadence’s security subsystem results in a Physical AI Chiplet platform delivering secure storage and long-lifecycle key management, reinforcing the strong hardware foundation provided by Cadence for die-to-die security and safety in advanced chiplet designs.”
Charles Hsu, Chairman, eMemory
“M31 is proud to be a contributor to Cadence’s expanding chiplet ecosystem, continuously advancing interface IP on leading-edge process technologies and keeping pace with the latest MIPI standards. With proven automotive-grade IP and over a decade of experience supporting high-volume consumer applications, M31 delivers world-class MIPI PHY interface IP that enables customers to rapidly realise advanced chiplet solutions with flexible MIPI CSI and DSI integration.”
Scott Chang, CEO, M31 Technology
“We’re thrilled to partner with Cadence on its chiplet platform, embedding proteanTecs telemetry across all chiplet types. Together, we’re enabling safe, reliable and power-efficient physical AI for next-gen compute demands. It’s an amazing collaboration delivering real value for customers, building advanced SoCs and systems for automotive and autonomous applications.”
Ziv Paz, VP of Business Development, proteanTecs
 
“We’re pleased to collaborate with Cadence to demonstrate the competitiveness of Samsung’s SF5A technology. Through this trusted partnership, we look forward to the successful expansion of the Chiplet Spec-to-Packaged Parts ecosystem and helping customers accelerate reliable paths to cutting-edge silicon solutions for physical AI applications, including next-generation automotive designs.”
Taejoong Song, Vice President of Foundry Technology Planning, Samsung Electronics
 
“As a long-time Cadence partner, we’re pleased to deepen our collaboration through the Chiplet Spec-to-Parts initiative. Over the past 15 years, we’ve developed and delivered over 100 custom PLLs for Cadence across leading foundries. Throughout this partnership, we have provided high-performance low-jitter PLLs and specialised clocking solutions, and we’re excited to extend our collaboration to help accelerate next-generation chiplet-based designs.”
Pawel Banachowicz, PLL Product Line Development Director, Silicon Creations
 
“Trilinear Technologies is excited to provide our advanced DisplayPort IP as part of this innovative initiative. Collaborating with Cadence enables us to drive high-performance video connectivity and deliver flexible, future-ready display solutions for the chiplet ecosystem.”
Carl Ruggiero, CEO, Trilinear Technologies

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Microchip Releases Custom Firmware For NVIDIA DGX Spark For Its MEC1723 Embedded Controllers

ELE Times - 8 годин 25 хв тому
Microchip Technology announced the release of custom-designed firmware for its MEC1723 Embedded Controller (EC), customised to support NVIDIA DGX Spark personal AI supercomputers. The software is designed to optimise the MEC1723 EC’s capabilities for system management of AI workloads on the NVIDIA DGX platform. By focusing on firmware innovation within its controllers, Microchip is helping to improve performance and security in demanding AI computing architectures.
Embedded controllers play an important role in managing power sequencing, alerts and system-level energy regulation. In this application, the MEC1723 EC goes a step further to also manage critical firmware operations.
  • Secure firmware authentication: firmware code is digitally signed and authenticated by NVIDIA, helping to maintain platform integrity.
  • Root of Trust for system boot: cryptographic verification of the firmware using Elliptic Curve Cryptography (ECC-P384) public key technology. This establishes the root of trust for the entire laptop, which is critical because the EC is the first device to power on and authorise secure system boot.
  • Advanced power management: handles battery charging, alerts and system power state transitions to optimise energy efficiency.
  • System control: oversees key scan and keypad operations for reliable user input.
  • New host interface support: implements packet command format processing unique to the NVIDIA DGX interface, advancing beyond traditional byte-level data transfers.
  • Value-added integration: incorporates Electromagnetic Interference (EMI) and Static Random-Access Memory (SRAM) interfaces to improve overall system performance.
“The collaboration between Microchip and NVIDIA helps deliver secure, tailored firmware solutions that address the complex needs of modern computing platforms,” said Nuri Dagdeviren, corporate vice president of Microchip Technology’s secure computing group. “Our MEC1723 firmware is customised to provide reliable operation and advanced functionality for NVIDIA DGX architecture, supporting the evolving requirements of client computing.”
Microchip’s MEC embedded controllers are designed to support the next generation of notebook and desktop applications across industrial, data centre and consumer markets. These controllers provide advanced system management, security features and efficient power management, making them suitable for today’s high-performance computing needs.

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Infineon and HL Klemove collaborate to advance innovation for SDVs

ELE Times - 8 годин 40 хв тому

Infineon Technologies AG and HL Klemove aim to strengthen their strategic collaboration in automotive technologies. Their partnership aims to combine Infineon’s semiconductor expertise and system understanding with HL Klemove’s capabilities in advanced autonomous driving systems to accelerate innovation in vehicle electronic architecture for the Software-Defined Vehicle (SDV) era and advance autonomous driving technologies.

This collaboration reflects the shared commitment of both companies to delivering safe and efficient connected mobility solutions. By optimising resources and accelerating proof of concept development, the partners aim to bring innovative technologies to market faster. Together, they plan to build the foundation for future key projects with high-performance, highly reliable autonomous driving solutions that combine Infineon’s semiconductor expertise and HL Klemove’s system integration capabilities.

Under the MoU, the two companies will cooperate in key areas, including:

  • Next-generation Zonal Control Units: The companies will jointly develop zone controller applications using Infineon’s microcontrollers and power semiconductors. HL Klemove will lead application development, while Infineon provides semiconductor technology support. Through prototype development, the collaboration aims to strengthen competitiveness in SDV electronic architecture.
  • Next-generation Radar Technologies: HL Klemove will leverage Infineon’s radar semiconductor solutions to develop high-resolution and short-range satellite radar, preparing for commercialisation through proof of concept. Additionally, the companies will work on high-resolution imaging radar to achieve next-generation radar technologies capable of precise object recognition.
  • Vehicle Ethernet-based ADAS and Camera Solutions: The partners will cooperate on developing front camera modules and an ADAS parking control unit using Infineon’s Ethernet technology. HL Klemove will handle system and product development, while Infineon provides Ethernet semiconductor and networking technology to enable high-speed, highly reliable in-vehicle network solutions.

“Based on our holistic product portfolio, deep system understanding and application know-how, Infineon aims to empower the automotive industry to accelerate time-to-market of software-defined vehicles,” said Peter Schaefer, Executive Vice President and CSO Automotive of Infineon. “Our collaboration with HL Klemove combines Infineon’s technology leadership with HL Klemove’s system expertise to deliver safer and smarter mobility solutions.”

Yoon-Haeng Lee, CEO of HL Klemove, said, “This collaboration marks an important milestone in realising the next-generation electronic architecture required for the software-defined vehicle era. By combining HL Klemove’s system architecture and integration capabilities with Infineon’s semiconductor technology, we will accelerate innovation in key areas such as next-generation zonal controllers, vehicle Ethernet-based ADAS systems, and high-resolution radar.”

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TSA to deploy Rohde & Schwarz QPS201 security scanners at airport checkpoints, ahead of Soccer World Cup, 2026

ELE Times - 9 годин 16 хв тому

Rohde & Schwarz, a world leader in AI-based millimetre wave screening technology, announced today it has won a multi-million dollar award from TSA to supply its QPS201 AIT security scanners to passenger security screening checkpoints at selected Soccer World Cup 2026 host city airports.

“We are thrilled to receive this award to deliver QPS201’s high-volume and passenger-friendly on-person security screening technology to modernize checkpoints at the airports of cities hosting the matches,” said Frank Dunn, CEO of Rohde & Schwarz USA, Inc. “TSA’s continued investment in the QPS will also further expand Rohde & Schwarz’s economic impact as we grow and create jobs at our facilities in Maryland and Texas.”

“We are proud that TSA is investing in modernising security checkpoints at the Soccer World Cup 2026 host city airports with our high-performance QPS201 technology platform,” said Andreas Haegele, Vice President of Microwave Imaging. “Rohde & Schwarz is deeply committed to our partnership with TSA. We will continue to develop and deliver innovative and effective on-person screening solutions to make airport security more efficient and convenient in the upcoming mega decade of travel, including the Soccer World Cup, America’s 250th Anniversary and the Olympic Games.”

The QPS201 achieved TSA qualification in 2022, approving it for use in US passenger security screening checkpoints and has achieved certification to the TSA and European Civil Aviation Conference (ECAC) highest standards. There are more than 100 R&S QPS201 scanners deployed in US airports already, and more than 2,000 systems deployed in airports worldwide. The QPS201 uses safe millimetre wave radio frequency technology to rapidly and accurately screen passengers for concealed threats. The system requires only milliseconds per scan, and its open design and hands-down scan pose make security screening easy and accessible for travellers.

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Vision SoC powers 8K multi-stream AI

EDN Network - 12 годин 34 хв тому

Ambarella’s CV7 SoC leverages the CVflow computer vision architecture to bring 8K image processing and advanced AI inference to the edge. It supports simultaneous processing of multiple video streams at up to 8K at 60 Hz, making it well suited for a wide range of consumer and industrial AI perception applications, as well as multi-stream automotive systems—particularly those running CNNs and transformer-based networks.

Built on a 4-nm process, the CV7 delivers low power consumption, reducing thermal management requirements and extending battery life. Compared to its predecessor, it consumes 20% less power while integrating a quad-core Arm Cortex-A73 CPU that doubles general-purpose processing performance. A 64-bit DRAM interface further improves memory bandwidth.

The highly integrated CV7 SoC includes a third-generation CVflow AI accelerator, delivering more than 2.5× the AI performance of the previous CV5 SoC. It also integrates an image signal processor and hardware-accelerated video encoding for H.264, H.265, and MJPEG formats.

CV7 SoC samples are now available, along with a CNN toolkit for porting neural networks developed using Caffe, TensorFlow, PyTorch, and ONNX frameworks.

CV7 product page 

Ambarella

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Processors centralize vehicle intelligence

EDN Network - 12 годин 34 хв тому

NXP has introduced the S32N7 super-integration processor series for centralized vehicle computing across propulsion, vehicle dynamics, body, gateway, and safety domains. The 5-nm series replaces distributed electronic control units with a single processing hub at the vehicle core, providing a foundation for software-defined vehicles.

By consolidating software and data, the S32N7 simplifies vehicle architectures and reduces system complexity, lowering total cost of ownership by up to 20% through fewer hardware modules and more efficient wiring, electronics, and software integration. The processors are designed to meet automotive safety, security, and real-time requirements.

With 32 compatible variants, the S32N7 series provides a scalable platform for AI-enabled vehicle functions. Its high-performance data backbone supports future AI upgrades without re-architecting the vehicle, enabling long-term software development and differentiation across vehicle platforms.

Bosch is the first company to deploy the S32N7 in its vehicle integration platform. Together, NXP and Bosch have co-developed reference designs, safety frameworks, hardware integration guidelines, and an expert enablement program for early adopters.

The S32N79, the superset of the series, is sampling now.

S32N7 series product page

NXP Semiconductors 

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SoC unlocks 20-MHz Wi-Fi 7 for smart IoT

EDN Network - 12 годин 35 хв тому

According to Infineon, the AIROC ACW741x family of tri-radio SoCs features the first 20-MHz Wi-Fi 7 device designed for IoT applications. The device also integrates Bluetooth LE 6.0 with channel sounding, IEEE 802.15.4 Thread connectivity, and support for the Matter ecosystem—all in a compact QFN package.

Wi-Fi 7’s support for 20-MHz channel widths represents a meaningful expansion beyond conventional high-speed applications, especially for IoT devices. This enables lower power consumption, smaller form factors, and more reliable connectivity across a wider range of devices.

“With the recent extension of Wi-Fi Certified 7 capabilities to 20 MHz-only devices, Wi-Fi Alliance will deliver the benefits of Wi-Fi 7 for new device categories, enabling the next wave of IoT innovation across smart home, industrial, and healthcare settings,” said Kevin Robinson, CEO, Wi-Fi Alliance. The introduction of 20-MHz Wi-Fi 7 IoT solutions, such as those being introduced by Infineon, will unlock widespread Wi-Fi 7 adoption across the IoT market.”

The ACW741x supports Wi-Fi 7 multi-link operation (MLO), which enhances link reliability through adaptive band switching to reduce congestion and interference. By maintaining concurrent connections across 2.4-GHz, 5-GHz, and 6-GHz bands, Wi-Fi 7 multi-link for IoT provides a more consistent, always-connected experience for devices such as security cameras, video doorbells, alarm systems, medical equipment, and HVAC systems.

Integrated wireless sensing capabilities give smart IoT devices greater contextual awareness and allow them to share intelligence with other devices on the same network. Compared with other IoT Wi-Fi products, the ACW741x delivers up to 15× lower standby power consumption, extending battery life.

The ACW741x family is sampling now, along with hardware and software development kits.

ACW741x product page 

Infineon Technologies 

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Software proves AI behavior in high-risk systems

EDN Network - 12 годин 35 хв тому

The Keysight AI Software Integrity Builder enables rigorous validation and lifecycle maintenance of AI-enabled systems to ensure trustworthiness. As AI development grows in complexity, the software delivers transparent, adaptable, and data-driven assurance tailored for safety-critical applications, including automotive systems.

The decision-making behavior of AI models, especially deep neural networks, is difficult to interpret, complicating the identification of dataset limitations and model failure modes. Regulatory frameworks, including ISO/PAS 8800 for automotive AI and the EU AI Act, require demonstrable explainability and validation without defining clear implementation methods.

AI Software Integrity Builder delivers a unified, lifecycle-based framework that provides regulatory evidence and supports continuous AI model improvement. Unlike fragmented toolchains, it integrates dataset analysis, model validation, real-world inference testing, and continuous monitoring. This enables validation of both learned behavior and operational performance for high-risk applications such as autonomous driving.

To learn more about the Keysight AI Software Integrity Builder (AX1000A) and request a quote, visit the product page linked below.

AX1000A product page

Keysight Technologies  

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Transmissive sensors increase vertical headroom

EDN Network - 12 годин 35 хв тому

Two transmissive sensors from Vishay—the single-channel VT171P and dual-channel VT172U—feature a dome height that is 42% greater than that of previous-generation industrial devices. Housed in a 5.5×4×5.7 mm surface-mount package, the sensors increase mechanical design flexibility and provide additional vertical headroom for large code wheels in turn-and-push configurations.

The VT171P integrates an infrared emitter and phototransistor detector for motion and speed sensing, while the VT172U adds a second phototransistor to also enable direction detection. Both sensors operate at a wavelength of 950 nm and deliver a typical output current of 1.5 mA, with typical rise and fall times of 14 µs and 21 µs, respectively. They feature a 3-mm gap width and 0.3-mm apertures.

With a moisture sensitivity level (MSL) of 1, the VT171P and VT172U offer unlimited floor life. The sensors are suited for latches, simple encoders, and switches in industrial, consumer, telecommunication, and healthcare applications.

Samples and production quantities are available now, with lead times of 10 weeks.

VT171P product page 

VT172U product page 

Vishay Intertechnology 

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Throwaway dirt bike ECU repair

Reddit:Electronics - 15 годин 1 хв тому
Throwaway dirt bike ECU repair

Well ain't AI getting good. I'm in this project deeper than my own knowledge could've taken me. I'm working on a non running dirt bike I just bought with no spark. Chat GPT helped me go through the entire electrical system until we zeroed in on the ECU by eliminating everything else, and found the exact transistor that went bad. The ignition coil driver, (on the right with the little purple mark on it.)

At logic level, it looks like it's still working. It still switches, but it's rated for 15A continuous and its only able to sink enough current to barely illuminate an LED. That's not gonna drive an ignition coil.

So I'm gonna try to replace it with a better one and see if I can find out why it failed, to hopefully prevent it happening again. I've done similar jobs on guitar amps before, but never a computer. I don't know if you can tell, but you're not supposed to be able to work on these things. It's been a bit of a lesson in archeology, unearthing this thing. Fortunately the potting compound is quite soft and tears/slices pretty easily, and, though it took a few hours, I've been able to remove it easily enough with a knife and my thumbnails.

Fun little project. If I can manage to fix it for the $2.50 of a new transistor, and maybe a couple resistors, awesome. If not, well it's technically scrap in it's current state, anyway, and definitely worth a shot at potentially saving the $800-$1000 for a replacement ECU for this bike 😵

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📊 Щорічне опитування студентів та аспірантів щодо якості освіти та окремих сторін функціонування університету

Новини - Чтв, 01/08/2026 - 21:42
📊 Щорічне опитування студентів та аспірантів щодо якості освіти та окремих сторін функціонування університету
Image
kpi чт, 01/08/2026 - 21:42
Текст

Запрошуємо студентів та аспірантів взяти участь у щорічному опитуванні щодо якості освіти та окремих сторін функціонування університету. Мета опитування — отримати важливу інформацію, яка дозволить краще врахувати потреби здобувачів вищої освіти та зробити навчання і сервіси університету більш зручними й ефективними.

Благодійний фонд підтримки Збройних Сил України "Київський політехнік"

Новини - Чтв, 01/08/2026 - 21:20
Благодійний фонд підтримки Збройних Сил України "Київський політехнік"
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kpi чт, 01/08/2026 - 21:20
Текст

Фото-звіт про чергову допомогу нашим захисникам. Завдяки вашій підтримці було придбано планшет для оперативних потреб військових. Загальна сума допомоги: 17 600 грн.

Marktech launches new transfer-molded LED and photodiode packaging capabilities

Semiconductor today - Чтв, 01/08/2026 - 18:32
Marktech Optoelectronics Inc of Latham, NY, USA and its device manufacturing partner Optrans Corp of Kawasaki-Shi, Japan are introducing new transfer-molded photodiode and LED packaging capabilities, which are currently under development and scheduled for first customer availability in second-quarter 2026. The next-generation photonics packages offer improved reliability, optical beam control, enhanced environmental robustness, and reduced stray-light interference while supporting both conventional LED emitters and advanced point-source resonant-cavity light-emitting diode (RCLED) and quantum well light-emitting diode (QWLED) architectures...

Circuit Board Pattern Generator

Reddit:Electronics - Чтв, 01/08/2026 - 16:23
Circuit Board Pattern Generator

Needed a tool so made a tool

I got tired of searching for circuit board pattern graphics to use on website/social posts, as this pattern when designing anything embedded related is used quite often.

AI generated looked bad for me, so I made a tool to generate one, featuring shapes, text and gradient fills

If you need any pattern or just to play:

https://hacod-tech.github.io/Circuit-Board-Pattern-Generator/

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