Збирач потоків

Introduction

For more than half a century, digital electronics has relied on binary systems in which information is represented by bits existing as either 0 or 1. From microcontrollers to supercomputers, this binary architecture has powered modern civilization. However, the increasing demand for ultra-fast computation, secure communication, and advanced artificial intelligence is pushing conventional semiconductor technology toward its physical limitations. Quantum computing and quantum cryptography are emerging as revolutionary technologies capable of transforming the future of electronics engineering.

Unlike classical systems, quantum electronics operate using qubits (quantum bits), which exploit the principles of quantum mechanics such as superposition and entanglement. These properties allow quantum computers to solve highly complex problems in seconds that would require traditional supercomputers thousands of years to complete.

Understanding Qubits

A classical bit can exist only in one state at a time: either 0 or 1. In contrast, a qubit can exist simultaneously in multiple states due to the phenomenon known as superposition.

|\psi\rangle = \alpha|0\rangle + \beta|1\rangle

This quantum state representation enables parallel computation on a massive scale. Furthermore, qubits can become entangled, meaning the state of one qubit instantly affects another regardless of distance. Entanglement dramatically increases processing power and computational efficiency.

Quantum computers leverage these effects to perform operations on enormous datasets simultaneously. As a result, applications such as molecular simulation, optimization algorithms, cryptographic analysis, and machine learning become significantly faster and more efficient.

Quantum Computing Hardware Challenges

Building practical quantum computers is one of the greatest engineering challenges of the 21st century. Qubits are extremely sensitive to environmental disturbances such as heat, electromagnetic noise, and vibration. Even minimal interference can collapse the fragile quantum state, a problem known as decoherence.

To overcome this issue, engineers are developing highly specialized hardware systems, including:

• Superconducting circuits
• Trapped ion processors
• Photonic quantum systems
• Topological qubits
• Cryogenic cooling systems

Most quantum processors operate at temperatures near absolute zero using dilution refrigerators. These ultra-cold environments reduce thermal noise and help maintain quantum coherence.

Schematics of superconducting quantum computers. A). The conventional approach to manipulating and reading out of a superconducting quantum processor. Room temperature electronics are used as control units to generate analog microwave pulses with a well-defined frequency, amplitude, and phase, which are sent to the cryogenic quantum processing unit (QPU) through coaxial cables with careful attenuation and filtering. The significant hardware overhead limits the scaling of the quantum computer. B). A conceptual superconducting quantum computer that integrates the QPU with its control units at cryogenic temperatures. The control units may compose cryogenic microwave pulse generators and their control electronics. Such a monolithic integrated architecture enables large-scale superconducting quantum computers

Comparison chart between classical bits and quantum qubits

Another major challenge is achieving fault-tolerant quantum computing. Quantum systems naturally produce errors because qubits are unstable. Engineers, therefore, implement quantum error correction techniques to maintain computational accuracy. The race among technology companies and research laboratories is focused on creating scalable, stable, and fault-tolerant quantum processors.

Major organizations, including IBM, Google, Intel, and Microsoft, are investing billions of dollars into quantum hardware development.

Quantum Cryptography and Cybersecurity

While quantum computing offers immense computational power, it also threatens existing cybersecurity systems. Modern encryption methods such as RSA and ECC rely on mathematical problems that classical computers cannot solve efficiently. However, quantum algorithms such as Shor’s Algorithm could potentially break these cryptographic systems within minutes.

Quantum cryptography addresses this challenge by using the laws of quantum mechanics to secure communications. The most important application is Quantum Key Distribution (QKD), where encryption keys are transmitted using quantum particles such as photons.

The security advantage of QKD lies in the Heisenberg Uncertainty Principle. Any attempt to intercept or measure the quantum transmission changes its state, immediately alerting the communicating parties to potential eavesdropping.

Schematic of a two-node implementation of Quantum Key Distribution.
Photons are distributed using a quantum channel, usually an optical link, and detected using single-photon detectors. Parties follow a protocol allowing them to simultaneously generate identical keys at two distant locations by communicating measurement details over a data channel. Security is guaranteed by quantum physics, which predicts that an eavesdropper inadvertently produces detectable errors through her activities.

Quantum cryptography provides several advantages:

• Extremely high security
• Real-time intrusion detection
• Resistance against quantum attacks
• Secure military and financial communications

Countries and corporations worldwide are now investing heavily in quantum-secure communication networks to prepare for the post-quantum era.

Applications of Quantum Technology

Quantum technologies are expected to revolutionize multiple industries, including:

1. Healthcare and Drug Discovery

Quantum simulations can model molecular interactions accurately, accelerating pharmaceutical research and personalized medicine.

2. Artificial Intelligence

Quantum machine learning may process vast datasets faster than conventional AI systems.

3. Financial Modeling

Banks can optimize trading strategies, risk analysis, and portfolio management using quantum algorithms.

4. Logistics and Optimization

Complex optimization problems in transportation and supply chains can be solved more efficiently.

5. Defense and Space Research

Quantum sensors and secure communication systems are becoming critical for national security and satellite networks.

Future Outlook

Quantum computing remains in its early developmental stage, but progress is accelerating rapidly. Electronics engineers will play a central role in designing quantum processors, cryogenic electronics, photonic systems, RF control circuits, and quantum communication networks.

As Moore’s Law approaches its practical limit, quantum electronics may become the next major technological revolution. The transition from binary systems to quantum architectures represents not merely an upgrade in computing power, but a complete transformation in how information is processed, transmitted, and secured.

The coming decades will likely witness the integration of classical and quantum systems, creating hybrid computing platforms capable of solving problems previously considered impossible. For electronics engineers, mastering quantum technologies today could define the future of next-generation innovation.

The post Quantum Computing and Quantum Cryptography: The Future Beyond Binary Electronics appeared first on ELE Times.

Brandworks Technologies, India’s fastest growing design-driven, R&D-led electronics manufacturing powerhouse, receives official recognition for its In-House Research & Development (R&D) Unit from the Department of Scientific and Industrial Research (DSIR), under the Ministry of Science & Technology, Government of India. 

Brandwork Technologies receives an award from DSIR’s Industrial R&D Promotion Programme (IRDPP). Brandworks Technologies continues to strengthen its capabilities across electronics design, embedded systems, AI-enabled hardware, and smart manufacturing technologies. It also reflects the company’s ongoing investments in internal research, engineering infrastructure, and product innovation. The company’s strategic positioning within sectors such as AI-enabled electronics, smart devices, embedded engineering, industrial IoT, and next-generation manufacturing systems.

Commenting on the development, Ishwar Kumhar, Founder & CEO, Brandworks Technologies, said, “At Brandworks, we have always believed that strong engineering and R&D capabilities are fundamental to building globally competitive technology products. This recognition from DSIR is a significant validation of the work our teams have been doing across product development, design, and innovation. As the electronics ecosystem in India continues to evolve, we remain focused on building technologies and products that are designed, engineered, and developed in India for global markets.” 

The design and manufacturing ecosystem focuses on developing scalable and high-tech solutions. The company deals with product conceptualisation, engineering, prototyping, validation, and precision manufacturing across multiple technology categories.

The development comes at a time when Brandworks Technologies continues to expand its capabilities across product design, latest engineering, precision manufacturing, and AI-native hardware ecosystems. With advanced manufacturing infrastructure, dedicated R&D centres, and growing expertise in end-to-end electronics development, the company remains focused on contributing to India’s emergence as a global hub for advanced electronics and deeptech manufacturing.

The post Brandworks Technologies receives DSIR recognition appeared first on ELE Times.

India at the Center of the Tech Revolution: A Conversation with Frank Oehler

At the Rohde & Schwarz Technology Symposium in Bangalore, India, Devendra Kumar, Editor of ELE Times magazine, interviewed Mr. Frank Oehler, Vice President for North Asia, Oceania, India, and ACIS at Rohde & Schwarz. In this insightful conversation, Mr. Oehler shared perspectives on his regional leadership role, the company’s strategic priorities, and the technologies expected to shape the future.

Q1. Could you please introduce yourself and tell us about your role and responsibilities?

Frank Oehler: My name is Frank Oehler, and I serve as Vice President for India, North Asia, Oceania, and Central Asia. I’m responsible for all business activities across these regions — sales, operations, and marketing — as well as expansion initiatives, particularly in India, where we are growing our R&D and engineering presence.

Q2. What is the R&S Technology Symposium, and how does it benefit participants?

Frank Oehler: It’s a highly professional event with strong participation from across the industry. It’s not just about showcasing products — it’s about networking, sharing knowledge, and discussing key trends like AI, next-generation communications, and defense technologies. The diversity of participants and the quality of discussions make it a genuinely valuable platform.

Q3. Rohde & Schwarz has been at the forefront of innovation — how do you see the current evolution of the global electronics and communications industry?

Frank Oehler: The industry is evolving at an incredible pace. Development cycles are becoming shorter, and innovation is accelerating rapidly, driven largely by artificial intelligence. We are still at the early stages of AI adoption, but it will significantly increase efficiency and speed. At the same time, technologies are evolving naturally — moving from 5G to 6G — but each generation brings greater complexity. Managing this complexity will require new tools and approaches, including advanced computing. These trends will have a major impact on the electronics and communications landscape globally.

Q4. What is your perspective on India within this global context?

Frank Oehler: India stands out as a major technology hotspot. It has a strong foundation in IT and programming, along with a rapidly growing ecosystem in communication technologies. The country benefits from a large pool of highly skilled graduates and the presence of global corporations with strong R&D hubs. We see India as a key part of our future and are committed to being actively involved in this growth.

Q5. What key technology trends are shaping the future of North Asia, particularly in sectors like telecom, defense, and aerospace?

Frank Oehler: Artificial intelligence is certainly one of the most important technologies. Another is quantum computing, which will help manage the increasing complexity and massive data volumes we face today. From a communications perspective, we are also seeing a shift beyond terrestrial networks toward space-based communication and applications such as signal intelligence — areas becoming increasingly important, especially in defense and advanced communications.

Q6. What are Rohde & Schwarz’s strategic priorities in India, particularly around the ‘Make in India’ initiative?

Frank Oehler: Our strategy in India is clear — we want to be part of the country’s growth story. “Make in India” covers a broad spectrum for us. It includes system integration, where components are assembled and integrated locally — both mechanically and through software — as well as strong R&D and engineering contributions. Given our portfolio of over 20,000 products, it doesn’t always make sense to manufacture everything locally, but we contribute significantly through integration, R&D, and customized automated testing solutions that customers need as end-to-end systems rather than individual instruments. We remain flexible, recognizing that today’s rapidly evolving environment has made India become increasingly important geopolitically as a key global technology hub.

Q7. What differentiates Rohde & Schwarz from competitors in this rapidly evolving market?

Frank Oehler: One key differentiator is that we are privately owned. This allows us to take a long-term view rather than focusing on short-term financial pressures. We invest heavily in technology and innovation, collaborating with universities and acquiring companies based on technological value rather than market segments. Our diversified portfolio and independence give us stability and flexibility, enabling us to stay ahead in a rapidly changing industry.

Q8. How is Rohde & Schwarz contributing to advancements in 5G and the upcoming 6G ecosystem?

Frank Oehler: 5G is still being rolled out globally, with its evolution increasingly focused on IoT, machine-to-machine communication, and edge computing. We are leaders in communication testing solutions that help companies design and validate these technologies. Looking ahead to 6G, we are already involved in early-stage development and standardization. Concepts like network sensing and advanced applications could transform user experiences in ways we can’t fully predict yet. We are also working on innovations like digital twins and software-based testing environments to accelerate development cycles.

Q9. When do you expect 6G to become reality?

Frank Oehler: We expect early demonstrations around 2028, possibly during major global events. However, widespread adoption will depend on real-world use cases and the speed at which compelling applications emerge for end users.

Q10. What role do AI and automation play in your current and future product offerings?

Frank Oehler: AI is a key focus area for us. It helps analyze large volumes of data, improve decision-making, and enhance product design. It’s deeply integrated into our innovation strategy, including areas like quantum computing. We see AI becoming an essential part of our daily operations and future growth.

Q11. With increasing geopolitical challenges, how is Rohde & Schwarz supporting defense and homeland security sectors?

Frank Oehler: We are actively involved in supporting defense and homeland security through technologies such as electronic warfare, signal intelligence, and secure communications. These capabilities extend beyond terrestrial systems into space-based applications. We work closely with governments, including India, to address these evolving requirements.

Q12. As a leader, what motivates you in such a dynamic and technology-driven industry?

Frank Oehler: Technology itself is my biggest motivation — I’ve always been fascinated by how it shapes our lives. This industry is constantly evolving, which means continuous learning. Working with talented teams, especially in regions like India, adds to that excitement. Being part of innovation and helping shape the future is incredibly rewarding.

Q13. How do you envision India’s long-term growth and strategic role in the global technology and industrial landscape?

Frank Oehler: India will continue its strong growth trajectory over the next decade. Education and talent will be key drivers, and India is already leading in this area. Cities like Bengaluru have the potential to become the next global technology hub, comparable to Silicon Valley. We are excited to be part of this journey.

Q14. What message would you like to share with participants and stakeholders?

Frank Oehler: Stay curious. The technologies we see today are just the beginning — there’s much more to come. Keep learning, keep networking, and keep engaging with the ecosystem. Collaboration and curiosity will drive the next wave of innovation.

Q15. Any final insight before we wrap up?

Frank Oehler: I truly enjoy being in India. The energy, talent, and decision-making capabilities here are impressive and growing stronger. It’s an exciting time to be part of this ecosystem, and I look forward to continued collaboration and growth.

The post Interview with Frank Oehler, Vice President (North Asia, Oceania, India, and ACIS) at Rohde & Schwarz appeared first on ELE Times.

Memory customization is not always a top priority when a design team plans a new system-on-chip (SoC) project. But often it should be.

This may not be an obvious statement. Granted, SRAM claims a lot of area on most SoCs. The speed and power consumption of SRAM arrays can affect the overall chip performance and energy efficiency.

But today’s memory compilers are flexible tools that support a variety of cell designs. At Faraday, for example, the 14FFC compiler offers eight variants, tuned to diverse needs, ranging from high-density to high-performance to ultra-low-power. So why do you consider custom memory?

One answer to the above question is the need for an unusual word or bit length. Relatively simple customization can produce the exact SRAM configuration required for a specific instance, not just the compiler’s closest approximation.

Similarly, there are times during floorplanning—or, more concerningly, during timing closure—when giving an SRAM instance an unusual aspect ratio can ease a difficult situation. This may be a more complex customization, requiring changes to array layout and routing, multiplexers, drivers, and cell designs.

Recently, we designed a multi-Mbit SRAM array with an aspect ratio of nearly 1:19. This memory architecture is ideally suited for seamless integration into frame-buffer applications specifically designed for display processing. The memory configuration, characterized by its unique aspect ratio, is carefully engineered to accommodate wide I/O widths and specialized non-2n-column multiplexing requirements.

Figure 1 Special aspect ratio memory in this case is x = 1775 um, y = 95 um; giving an SRAM instance an unusual aspect ratio can ease a difficult situation. Source: Faraday Technology

Another situation involves yield and reliability. Compilers typically only generate a specific number of redundant columns of bit cells. In the event of a bit failure, the array can disconnect the offending cell’s column and replace it with a redundant column if one is available. This technique is effective if failures only occur in one or a few columns.

But for various reasons, some designs require more protection: redundant columns and redundant rows. The additional cells, routing, and logic to implement this expanded redundancy can be achieved by customizing the array.

Figure 2 This memory offers redundant rows and columns for additional rows and columns. Source: Faraday Technology

An automotive case study

Another example of memory customization comes from a recent SoC design we participated in. The project was for a mission-critical automotive SoC. Our customer specified an Automotive Grade 1 (AG1) operating ambient temperature range of -40 to +125 °C.

Within that range, the customer required an extended operating life, as is customary for automotive electronics. And the chip would require ISO 26262 functional safety certification, which would require enhanced failure analysis and documentation during design.

This project illustrates the level of detail sometimes needed in memory customization. But it also shows the extent of additional support—analysis, documentation, design assistance, and test services—that a custom memory design can entail.

We determined that existing tools could produce an array that would operate reliably over the AG1 temperature range in the short term. But to achieve the required operating life, we had to address aging issues in the circuitry.

First, there was the issue of high-current signals on the array’s word lines and bit lines. The customer was rightly concerned that, over the operating life and at elevated temperatures, the high currents could cause sufficient electromigration to trigger chip failure. So, we redesigned the line drivers and the array, preserving array performance, signal integrity, and line-direction management while reducing the risk of electromigration.

Bias temperature instability (BTI) was another threat to chip life: time and elevated temperature cause a gradual but significant drift in MOSFET threshold voltages. Unfortunately, NMOS and PMOS devices age differently under BTI. So very gradually, the timing of rising and falling signal edges can diverge. Eventually, this can lead to circuit failure at points where the relative arrival times of two signals, one positive-going and one negative-going, are critical. Accordingly, we altered the memory design.

We further inspected the remaining control logic for the risk of developing race conditions over time and adjusted timing margins to account for eventual threshold-voltage drift. The result was a significant improvement in SRAM’s expected operating life.

Functional safety

Certification under ISO 26262 was another requirement. This comprehensive standard delves deep into the design process to ensure that chip failure modes are identified, traced to their root causes, and addressed. This process extends to IP used in the design and to the original circuitry. So, the documentation required for ISO 26262 certification was deliverable for the custom memory team.

Two primary documents are required: a Design Failure Mode and Effects Analysis (DFMEA) and a safety manual. The former, as its name suggests, is an exhaustive list of the ways the IP could cause an error, the possible causes of those failure modes, and the remedial actions taken. The safety manual, in contrast, is an instruction manual for the chip and system designers who will integrate the IP into the overall design.

One entry in the DFMEA might include a failure in which a bit cell flips, corrupting data in the SRAM. Under this heading, list potential causes of a flipped bit, including design-rule violations in the cell array, radiation upset, and aging. For each reason, there would be a list of controls to prevent it or detect it, an assessment of the remaining failure risk, and recommendations for further action.

The safety manual tells IP integrators and system developers how to use the IP without violating the conditions for which it was designed. Directions might include, for instance, input signal and supply voltage ranges, noise limits, substrate noise and temperature limits, output loading specifications, and maximum duty cycle limits.

Why custom memory design?

As these examples illustrate, custom memory design can adapt an array exactly to functional, timing, or layout requirements of a particular SoC. It can also produce arrays for demanding performance, environmental, or reliability requirements.

But seeing a customer through to a finished SoC requires far more than just providing the design files for a custom SRAM array. The design partner should be ready to assist the SoC design team with integration, provide verification and test support, and thoroughly document the characteristics and requirements of the new SRAM design.

In addition, the partner should be able to work intimately with the SoC foundry to ensure yield, and with the test vendor to ensure adequate test coverage for the new array. In many cases, it’s an advantage for the partner to have in-house testing capability.

Roger Chen is deputy division manager for memory IP development at Faraday Technology.

 

 

Related Content

• Accurate memory models for all
• Geopolitics Is Rewriting Memory Sourcing
• The Memory Wall Is Real, Here Is the Door
• Developing a Design Methodology for Embedded Memories
• Beyond Bandwidth: The Industry is Striving for Custom Memory

The post Would custom memory ease your SoC design? appeared first on EDN.

Hi all, not sure if this post fits, but I really wanted to share my first real project. For my 3rd Year in Electronic Engineering at the University of Pretoria we were tasked with building a line following robot from scratch. For this assignment we worked in a group of 2 people. The exact task was: Build a line following robot using the PIC18f45k22 as your uC. Program it fully in PIC-assembler. Build all relevant sensors (Touch and Colour) from scratch. Design your own PCB. The robot (MARV) needs to be able to detect any of the 4 (Green, Red, Blue, Black) colours and follow them. This large task was broken into smaller sub-practicals that had to be completed throughout the semester (While doing other subjects). I'll break down the project into these smaller components to explain what I did a bit better, this is also where I add that English is not my first language so please excuse that. Practical 1: Colour sensing. For the first practical we had to design a colour sensor from scratch. We ended up going with a reversed biased Photo-diode (SFH-213) over a resistor into a standard non-inverting negative feedback amplifier using a MCP6001 as our op-amp. We designed a 3d printed housing to hold 5 of these in a row. Then we used a RGB-LED that illuminates the surface of which the colour is being measured. The PIC controlled the LED's by strobing the colours while taking measurements of the sensor with the ADC. The colours were shined one after another and different values were taken to determine what colour is what while moving the sensor over a calibration strip. There is a lot more that was done but this is a good enough summary. Practical 2: Motor control, navigation and integration. For this practical the sensors had to be integrated with a line following algorithm as well as motor control. After a calibration sequence the PIC would wait for you to select a colour which it should follow, after this it sits in a waiting state until the basic capacitive touch sensor is pressed, where-after it starts moving by sending PWM signals to a motor controller based on the L298M. This stage also had us designing a PCB for the first time, figuring out how linear voltage regulators, decoupling capacitors and many more things worked. This stage is the lunch box on wheels, this is also where our robot got her name, Jessica. Once again this is just a quick summary. Practical 3: UART, I2C and polish for raceday! For this practical an EEPROM (24LC16B) had to be communicated with over I2C to store calibration data. A serial to UART chip (MCP2221A) needed to be utilised to talk to the PIC over USB. This is the stage where Jessica gained her sleek 3d printed chassis and her PCB arrived. I've glossed over all the technical things of the code to try and keep this short-ish. This is also where the coolest part of the project happens. Race-day, All other groups compete in a head to head race, where the fastest robot wins big prizes for there teams. This evens is sponsored by big companies such as RS, Wurth, Hensold and many more. In race day my team finished 2nd, and we won a cash prize, unfortunately not the grand prize of a 3d printer with other goodies, but at the end of the day I'm still chuffed with the result. Feel free to ask any questions, I wanted to add more but this is just a reddit post after all. If someone wants a more in-depth look at our code just let me know and I'll share a github link. If your interested in seeing the race in action also let me know and I'll link the live stream of the race. submitted by /u/THEsuit33 [link] [comments]

Global aerospace propulsion, services and systems firm GE Aerospace of Evendale, OH, USA and Wolfspeed Inc of Durham, NC, USA — which makes silicon carbide (SiC) materials and power semiconductor devices — have entered into a memorandum of understanding (MoU) to collaborate on accelerating the adoption of high-voltage silicon carbide across the industrial, aerospace and defense markets...

Intelligent power and sensing technology firm onsemi of Scottsdale, AZ, USA has announced its Elite Pairing Studio, an industry-first online design tool that enables engineers to move beyond traditional component-level selection to quickly identify recommended combinations of silicon carbide (SiC) MOSFETs and gate drivers based on their specific requirements. The interactive tool makes it easier to evaluate pairing behavior and trade-offs, helping to accelerate the development of power electronics designs. It also serves as the front door to onsemi’s broader simulation toolset for system-level performance and efficiency analysis...

КПІ ім. Ігоря Сікорського прийняв Національний форум з відкритої науки KPI4U-1 пн, 06/08/2026 - 18:00

Infineon Technologies AG and Siemens AG of Munich, Germany are partnering to advance electrical protection and ensure reliable operations in data centers, production facilities and battery storage systems. As part of the collaboration, Infineon will supply silicon carbide (SiC) power modules to Siemens for use in its SENTRON 3QD2 semiconductor (solid-state) circuit breakers. This will enhance the efficiency, power density and reliability of Siemens’ protection solution...

At the PCIM Europe 2026 (Power Electronics, Intelligent Motion, Renewable Energy and Energy Management) Expo & Conference in Nuremberg, Germany (9–11 June), Fraunhofer Institute for Applied Solid State Physics IAF is presenting the latest developments in gallium nitride (GaN) power electronics...

Менеджмент на підприємствах ОПК: зміни на часі. Які саме? Інформація КП пн, 06/08/2026 - 15:02

Connectivity is all well and good…well, sort of, as it invariably comes with a price, literally and/or figuratively. Simple’s sometimes best, all things considered, and ambient-light power’s also nice.

When you want to monitor and adjust the internal humidity (and temperature, while you’re at it) of your residence or other facility, a “smart” connected hygrometer such as the one I tore down last month is convenient, since you can check both the measurements-of-the-moment and longer-term legacy trends from anywhere (even when you’re away) using your mobile device. A “smart” hygrometer can even alert you when those measurements stray beyond predefined boundary conditions. And if it includes a built-in display, you can keep your smartphone stowed away and still see the data.

All that connectivity and integrated intelligence comes with a bill-of-materials cost adder, however. And there’s always also the latent (or not) potential for hackers to gain access to that same data stream. While you might not care if someone halfway around the world (or down the street, for that matter) knows your home’s humidity and temperature, you’ll undoubtedly care a lot more if that same “smart” hygrometer ends up being a penetration “vector” for a broader attack, revealing your location and Wi-Fi network login details, for example, along with providing strangers with access to more privacy-violating LAN devices such as security cameras.

Acceptable = respectable

As such, a non-connected sensor is a credible (and sometimes the preferable) alternative. At the beginning of April, I saw a two-pack of BaldrTherm 2.2” solar-powered digital thermometer and hygrometers marked down to $9.99 at Amazon and, curious to try out (and tear down) such a device myself, pressed “purchase”.

I’ve subsequently seen the same two-pack listed there for as low as $8.99, exemplifying a broader BaldrTherm promotion that I’m guessing is motivated by a product line transition combo of redesign and migration to larger, more visible data-rich, 3.2” display devices:

with in-progress awkward consequences:

And to be clear, the company offers plenty of “connected” product variants, too. But today we’ll dive inside a fully standalone-operation offering, complete with a solar cell power option that’s more broadly photon-source agnostic (albeit presumably still visible light spectrum-centric).

Since I know how much you all love conceptual teardown “stock” images, I’ll start with one of ‘em:

And now for our actual patient, as usual beginning with some outer box shots, also as-usual accompanied by a 0.75″ (19.1 mm) diameter U.S. penny for size comparison purposes:

Flip open either of the latter two flaps:

and inside you’ll find two slips o’literature (the “user manual”, such as it scantly is, can be accessed in PDF form here):

and two sleeve-swathed examples of today’s teardown victim:

Diminutive in size and price

Here’s the now-“naked” device from various perspectives. Note the transparent piece of plastic (which BaldrTherm refers to as an “insulation sheet”) sticking out one side, which keeps the battery inside from prematurely draining while sitting on store shelves pre-purchase, until removed by the buyer-now-owner (and whose very presence was initially confusing to me, as I’d assumed the energy storage cell in the interior was solar-rechargeable; keep reading).

In spite of the battery still being disconnected, and after a brief delay after initial exposure to my home office’s overhead lighting:

the display came on and the device started working:

I was initially surprised by this unexpected functional transition, until I pondered and realized the underlying reason why, which the user manual also spells out:

Time to get inside. You may have already noticed in one of the earlier overview shots the two coin edge-inviting slots (one of them doing double-duty for the “insulating sheet”) on one side.

Had I thought to grab the penny I had handy, they might have sufficed. As it was, the flexible tip of the “spunger” I was trying to use made it ineffective, so much so that I peeled off the backside sticker to see if I could find any screw heads underneath it. Nope:

Switching to a flat-head screwdriver eventually accomplished my objective, however:

Hot and (not) heavy

Here’s where things started getting interesting and, in retrospect, amusing. I happened to notice that, presumably during the initial disassembly process, the spring terminal at the anode (“negative”) end of the AAA battery inside had become dislodged.

Normally, such batteries’ cases have a thin plastic outer insulating layer that prevents short-circuits with the cathode directly below it:

Not in this case (bad pun intended), however, or maybe it got scratched during disassembly, too. Because when I grabbed the sides of the battery to remove it, my fingertips got scorched. I quickly grabbed the aforementioned flat-head screwdriver and flipped the battery out of the chassis that way instead.

While I waited for it to cool, I carefully rolled it around and learned that it was a non-rechargeable conventional alkaline cell, instead.

In retrospect, including not only a rechargeable battery but also the necessary recharging circuitry in the design would have ballooned the bill-of-materials cost, and I later noticed that the documentation made it clear that the battery was not to be replaced, apparently if for no other reason than to preclude owner burns and other potential mishaps.

If so, though, then why the tempting coin-shaped slots on one side? Inquiring minds want to know. Surprisingly, the cell still held a meaningful modicum of charge; I’d apparently been sufficiently speedy in noticing and rectifying the short-circuit circumstances:

And the device still worked, both with the battery removed:

and with it temporarily reinstalled once safe to touch again.

Internal details

Onward. The solar cell is tenuously held in place with a single piece of tape on one side and the case sides on the other.

The PCB to which it’s attached is conversely more firmly ensconced by two screws.

You know what comes next:

We have a liftoff:

Now for the other, more circuitry-meaningful front side:

Flipping the LCD over reveals its elastomeric connector on one end, which normally presses up against electrical contacts on the PCB itself:

This is one rugged little device; pressing the two halves back together with my fingers and exposing the solar cell to light reignites the display and broader sensing-and-reporting capabilities (albeit with the measured temperature presumably inflated by my body proximity).

Here’s a closeup of the PCB frontside:

showing the elastomer-mating contacts at bottom, a piece of insulating tape at upper left and normally between the LCD backside and a 220-µF capacitor first glimpsed in the assembly rear-view images I shared earlier:

and at upper right, and left-to-right, the humidity and temperature sensors. Underneath the identification-blocking black epoxy blob in the center is presumably the SoC.

Capacitor and missing-battery buffers

In closing, after putting everything back together, the device still worked, after a brief wakeup delay and initially for only a short and cyclical timeframe.

After which, functionality eventually stabilized as long as sufficient light remained available.

Specifically, I’m guessing, commensurate with the fact that there’s still no battery (re)installed. What’s the relationship here? It has to do, I think, with the core purpose of that previously noted capacitor. Remember my “backup batteries and supercaps” piece from last month? This is effectively the supercapacitor, intended to smooth out transient ambient illumination variability-induced impermanence in the solar cell’s output.

I’m guessing that the capacitor is taking a few system-reboot cycles to get to full stored charge capacity, particularly given that there’s (abnormally, versus the normal configuration) no battery installed to alternatively supply the system with the necessary electrons. Agree or disagree, readers? As always, please let me know your thoughts on this and/or anything else that caught your fancy in the comments!

—Brian Dipert is the associate editor, as well as a contributing editor, at EDN.

Related Content

• Humidifiers and such: How much “smart” is too much?
• Smart hygrometers: Still largely useful even without integrated visual monitors
• The Tapo Hub: TP-Link joins the low-bandwidth, long-range RF club
• TP-Link’s Tapo H100: Smart sensing unencumbered
• IoT device vulnerabilities are on the rise
• Backup batteries and supercaps: Geriatric hardware traps

The post Not smart, but solar: Analyzing another thermo-plus-hygrometer appeared first on EDN.

Semiconductor circuit breakers are fast-acting, semiconductor-based electronic devices that protect electrical circuits and components from damage caused by short circuits or overloads. Infineon’s silicon carbide power modules enhance the efficiency, power density, and reliability of the Siemens circuit breaker

Infineon Technologies AG and Siemens AG are partnering to advance electrical protection and ensure reliable operations in data centers, production facilities, and battery storage systems. As part of the collaboration, Infineon will supply silicon carbide (SiC) power modules to Siemens for use in its SENTRON 3QD2 semiconductor circuit breakers. This will enhance the efficiency, power density, and reliability of Siemens’ protection solution.

“AI data centers and factories are becoming increasingly electrified and complex. This increases vulnerability to electrical failures and drives the demand for more sustainable, efficient, and reliable power distribution systems,” said Andreas Weisl, Executive Vice President & Chief Sales Officer of Industrial and Infrastructure at Infineon. “By combining our advanced silicon carbide technology with Siemens’ expertise in power distribution, we are addressing this demand to ensure fast, safe, and reliable operations in power-critical environments.”

A semiconductor circuit breaker, also known as a solid-state circuit breaker, is an electronic device that protects electrical circuits from damage by excessive current flow, such as short circuits or overloads. Unlike traditional electromechanical circuit breakers, which rely on mechanical parts to interrupt the flow of current and typically operate on the millisecond scale, the Siemens SENTRON 3QD2 uses semiconductor components and smart protection algorithms to perform this function. This enables ultra-fast interruption in the microsecond range, up to 1,000 times faster than conventional systems. This capability is essential for direct current (DC) grids and offers a significant increase in protection and system availability, which is crucial in applications like industrial manufacturing and AI data centers, where even a slight delay can cause costly downtime, data loss, or expensive hardware damage in the event of electrical failures.

“Our new direct current portfolio offers innovative solutions that not only improve energy efficiency but also enable the development of resilient, future-proof infrastructure,” said Markus Grabmeier, CEO of Electrical Products at Siemens Smart Infrastructure. “Direct current applications can decrease energy consumption and substantially cut material usage. By integrating batteries, peak power can also be significantly reduced. With this approach, we are making a decisive contribution to the decarbonization of our industries, while reinforcing our commitment to developing technologies that deliver tangible value to our customers and society.”

This technology directly addresses the increasing demands of power-critical applications, where speed, precision, and reliability are essential. Integrating the 1200 V CoolSiC MOSFET module into advanced solid-state circuit protection concepts creates a more resilient, efficient, and future-ready power infrastructure. This approach supports the growing adoption of DC grids and highly electrified environments, helping industrial and infrastructure operators meet rising performance and reliability requirements.

The post Upgrading Factory Power Safety with Silicon Carbide Semiconductors from Infineon and Siemens appeared first on ELE Times.

Independent power electronics company Quantum Power Transformation (QPT) Ltd of Cambridge, UK — which was founded in 2019 and develops gallium nitride (GaN)-based electric motor controls — has unveiled qDesign, an AI-driven generative design service that programmatically generates, simulates and iterates on QPTs patented qAttach thermal interface layer for any power module, replacing weeks of human-in-the-loop CAD and simulation cycles with AI-generated topologies and automated optimization...

Independent power electronics company Quantum Power Transformation (QPT) Ltd of Cambridge, UK — which was founded in 2019 and develops gallium nitride (GaN)-based electric motor controls — has unveiled qDesign, an AI-driven generative design service that programmatically generates, simulates and iterates on QPTs patented qAttach thermal interface layer for any power module, replacing weeks of human-in-the-loop CAD and simulation cycles with AI-generated topologies and automated optimization...

Зустріч із професором Чарльзом Кокеллом KPI4U-2 пн, 06/08/2026 - 12:15

The global power electronics industry is undergoing a major technological transition. For decades, silicon-based devices such as MOSFETs and IGBTs have been the backbone of power conversion systems. However, emerging applications—including electric vehicles (EVs), renewable energy grids, AI data centers, aerospace systems, and ultra-fast charging infrastructure—now demand significantly higher efficiency, power density, switching speed, and thermal capability than conventional silicon can provide.

To overcome these limitations, the semiconductor industry is rapidly adopting Wide-Bandgap (WBG) materials, primarily Silicon Carbide (SiC) and Gallium Nitride (GaN). These advanced semiconductor technologies are redefining modern power conversion architectures and enabling a new generation of compact, energy-efficient electronic systems.

Understanding Wide-Bandgap Semiconductors

The “bandgap” of a semiconductor represents the energy required for electrons to move from the valence band to the conduction band. Conventional silicon has a bandgap of approximately 1.1 eV, whereas SiC and GaN possess much larger band gaps of around 3.2 eV and 3.4 eV, respectively.

This wider bandgap enables several key electrical advantages:

• Higher breakdown electric field
• Lower switching losses
• Faster switching capability
• Higher thermal conductivity
• Operation at elevated junction temperatures
• Reduced conduction resistance

As a result, WBG devices can operate at significantly higher voltages, frequencies, and temperatures compared to silicon devices while maintaining excellent efficiency.

Comparison of Semiconductor Materials

Parameter	Silicon (Si)	Silicon Carbide (SiC)	Gallium Nitride (GaN)
Bandgap Energy	1.1 eV	3.2 eV	3.4 eV
Max Junction Temperature	~150°C	~200°C	~200°C
Switching Speed	Moderate	High	Very High
Breakdown Voltage	Moderate	Excellent	High
Thermal Conductivity	Moderate	Excellent	Good
Typical Applications	General Power	EVs, Solar, Industrial	Fast Chargers, Telecom

 

Silicon Carbide (SiC): The Backbone of High-Power Conversion

Silicon Carbide has emerged as the preferred technology for high-voltage and high-power applications. SiC MOSFETs and Schottky diodes exhibit lower switching losses and superior thermal performance compared to silicon IGBTs.

SiC Power Module Used in EV Inverters

One of the most important advantages of SiC is its ability to switch at very high frequencies while handling voltages exceeding 1200V. This dramatically reduces the size of passive components such as inductors, capacitors, and transformers.

In electric vehicles, SiC traction inverters deliver:

• Higher drivetrain efficiency
• Increased battery range
• Faster charging capability
• Reduced cooling requirements
• Lower system weight

Modern EV manufacturers are increasingly integrating SiC devices into:

• Main traction inverters
• On-board chargers (OBC)
• DC-DC converters
• Fast charging stations

For example, replacing silicon IGBTs with SiC MOSFETs can improve inverter efficiency from approximately 96% to over 99%. Although the efficiency increase appears small numerically, the resulting reduction in thermal losses significantly impacts vehicle range and thermal management.

SiC technology is also critical in renewable energy systems. Solar inverters and wind-turbine converters benefit from higher efficiency and lower heat generation, enabling improved grid stability and reduced operating costs.

Gallium Nitride (GaN): Enabling Ultra-Fast Switching

While SiC dominates high-voltage applications, Gallium Nitride excels in high-frequency, medium-power systems.

Compact GaN Fast Charger

GaN High Electron Mobility Transistors (HEMTs) switch much faster than silicon MOSFETs, often operating in the MHz range. This enables ultra-compact converter designs with extremely high power density.

GaN technology is rapidly expanding in:

• USB-C fast chargers
• Laptop adapters
• Telecom rectifiers
• Server power supplies
• Data-center power architectures

Modern GaN chargers delivering 100W or more are often nearly 50% smaller than equivalent silicon-based chargers. Higher switching frequencies allow the use of smaller magnetic components, directly reducing volume and weight.

Another major advantage is improved efficiency under high-frequency operation. Since switching losses are minimized, less heat is generated, reducing the need for bulky heat sinks.

This is especially important for AI data centers where energy efficiency has become a critical economic and environmental factor.

Why Silicon Is No Longer Sufficient

Traditional silicon devices face several physical limitations in modern high-performance systems:

• Significant switching losses at high frequencies
• Limited high-temperature operation
• Larger cooling systems
• Lower power density
• Reduced efficiency at high voltages

As industries move toward electrification and compact system architectures, these limitations become increasingly problematic.

WBG devices overcome these constraints by enabling:

• Smaller converter footprints
• Higher efficiency
• Reduced cooling infrastructure
• Faster transient response
• Increased reliability

Engineering Challenges of WBG Devices

Despite their advantages, WBG technologies introduce new design challenges for electronics engineers.

Key Challenges Include:

• High device cost
• Fast switching-induced EMI
• Complex gate-driver design
• PCB layout sensitivity
• Thermal stress management
• Packaging reliability

The extremely fast switching edges of GaN and SiC devices can generate severe electromagnetic interference (EMI) if PCB parasitics are not carefully minimized. Engineers must therefore adopt advanced layout techniques, Kelvin-source connections, and optimized gate-drive circuits.

Thermal management also remains a critical design consideration despite improved material performance.

Future Outlook of WBG Power Electronics

Future EV and Renewable Energy Ecosystem

The adoption of Wide-Bandgap semiconductors is expected to accelerate dramatically over the next decade. Industry analysts predict strong growth driven by:

• Electric mobility
• Smart grids
• Renewable energy integration
• Industrial automation
• Aerospace electrification
• AI computing infrastructure

SiC is likely to dominate high-voltage transportation and energy applications, while GaN will become mainstream in compact consumer and communication systems.

For electronics engineers, understanding WBG device physics, high-frequency design techniques, EMI mitigation, and thermal optimization is becoming increasingly essential.

The transition from silicon to Wide-Bandgap semiconductors is not simply an incremental improvement—it represents a fundamental shift in the future of power electronics engineering.

The post Wide-Bandgap (WBG) Power Electronics: Transforming the Future of High-Efficiency Energy Systems appeared first on ELE Times.

As hyperscalers and enterprise operators race to build increasingly powerful AI infrastructure, power delivery and energy efficiency are emerging as the most critical constraints. Industry analysts estimate that AI rack power requirements could grow beyond 1MW/rack in the very near future...

As hyperscalers and enterprise operators race to build increasingly powerful AI infrastructure, power delivery and energy efficiency are emerging as the most critical constraints. Industry analysts estimate that AI rack power requirements could grow beyond 1MW/rack in the very near future...

In booth 20036 at 2026 IEEE MTT-S International Microwave Symposium (IMS) in Boston, MA, USA (7–12 June), Qorvo Inc of Greensboro, NC, USA (which provides core technologies and RF solutions for mobile, infrastructure and defense applications) is highlighting its latest innovations under the theme: ‘Proven RF Solutions. Live at IMS’...