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Basic oscilloscope operation

Fri, 02/07/2025 - 21:19

Whether you just received a new oscilloscope or just got access to a revered lab instrument that you are unfamiliar with, there is a learning curve associated with using the instrument. Having run a technical support operation for a major oscilloscope supplier, I know that most technical people don’t read manuals. This article (shorter than the typical user manual) is intended to help those who need to use the instrument right away get the instrument up and running.

The front panel

Oscilloscopes from different manufacturers look different, but they all have many common elements. If the oscilloscope has a front panel, it will have basic controls for vertical, horizontal, and trigger settings like the instrument shown in Figure 1.

Figure 1 A typical oscilloscope front panel with controls for vertical, horizontal, and trigger settings. Source: Teledyne LeCroy

Many controls have alternate actions evoked by pushing or, in some cases, pulling the knob. These are generally marked on the panel.

Many oscilloscopes, like this one, use the Windows operating system and can be controlled from the display using a pointing device or a touch screen. Feel free to use any interface that works for you.

Getting a waveform on the screen

It’s crucial to note that digital oscilloscopes retain their last settings. If you’re using the oscilloscope for the first time, it’s a smart practice to recall its default setting. This step ensures you’re starting from a known setting’s state. Some oscilloscopes, like the one used here, have a dedicated button on the front panel; recalling the default setting can also be done using a pulldown menu (Figure 2).

Figure 2 Recalling the default setup of an oscilloscope places the instrument in a known operational state. Source: Arthur Pini

In the example shown, the default setting is recalled from the “Recall Setup” dialog box using the Recall Default button, highlighted in orange.

Auto Setup

Using the oscilloscope’s “Auto Setup” feature to obtain a waveform on the screen from the default state is simple.

As a basic experiment, connect channel 1 of the oscilloscope to the calibration signal on the oscilloscope’s front panel using one of the high-impedance probes included with the oscilloscope. This calibration signal is a low-frequency square wave used to adjust the low-frequency compensation of the probe’s attenuator.

Press the oscilloscope’s Auto Setup button on the front panel or use the Vertical pulldown menu to select Auto Setup (Figure 3).

Figure 3 The “Auto Setup” is either a front-panel push button or a selection on a pulldown menu, as shown here. Source: Arthur Pini

“Auto Setup” in this instrument scans all the input channels in order and configures the instrument based on the first signal it detects. Based on the detected signal(s), the vertical scale (volts/div) and vertical offset are adjusted. The trigger is set to an edge trigger with a trigger level of fifty percent of the amplitude of the first signal found. The horizontal timebase (time/div) is set so that at least ten signal cycles are displayed on the display screen.

Different oscilloscopes handle this function differently. In some, the signal must be connected to channel 1. Other models, like the one shown, will search through all the channels and set up the first signal found. “Auto Setup” in all oscilloscopes should get you to a point where you have a waveform on the screen.

The basic controls—vertical settings

The basic oscilloscope controls include vertical, horizontal, or timebase and trigger. In Figure 3, these appear, in that order from left to right, as pull-down menus on the menu bar. These controls are duplicated on the front panel and grouped under the same headings. Either of the control types can be used.

Vertical controls, either on the front panel or on the screen, are used to set up the individual input channels. Selecting a channel creates a dialog box for controlling the corresponding channel. The vertical channel controls include vertical sensitivity (volts/div) and offset. The channel setup controls include coupling, bandwidth, rescaling, and processing (Figure 4).

Figure 4 The vertical channel setup includes the principal controls, including vertical scaling, offset, and coupling. Source: Arthur Pini

The vertical scaling should be set so that the waveform is as close to full scale as possible to maximize the oscilloscope’s dynamic range. This oscilloscope has a “Find Scale” function icon the channel setup, which will scale the vertical gain and offset to get the waveform centered on the screen with a reasonable amplitude. It is good practice not to overdrive the input amplifier by having the waveform exceed the selected full-scale voltage limits. Use the zoom display to expand the trace for a closer look at tiny features. The offset control centers the waveform on the display. Coupling offers a choice of a 50 Ω DC coupling or 1 MΩ input termination and AC or DC coupling.

The other controls include a selection of input bandwidth limiting filters, the ability to rescale the voltage reading based on the probe attenuation factor, and the ability to rescale the amplitude reading in a sensor or a probe’s units of measure (e.g., amperes for a current probe). Signal processing in the form of averaging or digital (noise) filtering can be applied to improve the signal-to-noise ratio of the acquired signals.

Channel annotation boxes, like the one labeled C1 in Figure 4, show the vertical scale setting, offset, and coupling for channel 1. When the cursors are turned on, cursor amplitude readouts can also appear in this box.

Timebase settings

Selecting “Horizontal Settings” from the “Timebase” pull-down menu or using the front panel horizontal controls adjusts the horizontal scaling and delay of the horizontal axis, the acquisition sampling modes, the acquisition memory length, and the sampling rate (Figure 5).

Figure 5 The timebase setup controls the sampling mode, horizontal scale, time delay, and acquisition setup. Source: Arthur Pini

The “Horizontal” controls simultaneously affect all the input channels. Generally, three standard sampling modes are real-time, sequence, and roll mode. Real-time is the normal default mode, sampling the input signal at the sampling rate for the entire duration set by the horizontal scale. Sequence mode breaks the acquisition memory into a user-set number of segments and triggers and acquires a signal in each segment before displaying them. Sequence mode acquisitions provide a minimum dead time between acquisitions. Roll mode is for long acquisition times with low sampling rates. Data is written to the display as it is acquired, producing a display that looks like a strip chart recorder.

The time per division (T/div) setting sets the horizontal time scale. The acquisition duration will be ten times the T/div setting. The acquisition delay shifts the trigger point on the display. The default delay is zero. Negative delays shift the trace to the left, and positive delays shift it to the right.

The “Maximum Sample Points” field sets the maximum length of the acquisition memory. By selecting “Set Maximum Memory”, the memory length varies as the T/div setting is changed until the maximum memory is allocated. Beyond that point, increasing the T/div will cause the sampling rate to drop. Basically, the time duration of the acquisition is equal to the number of samples in the memory divided by the sampling rate. If the fixed sampling rate mode is selected, the oscilloscope sampling rate will remain at the user-entered sampling rate as the T/div setting changes. The T/div setting will be restricted to settings compatible with the selected sampling rate.

The sample rate also affects the span of the fast Fourier transform (FFT) math operation, while the time duration of the acquisition affects its frequency resolution.

This oscilloscope allows the user to select the number of active channels. Note that the memory is shared among the active channels.   

The “Navigation Reference” setting controls how the oscilloscope behaves when you adjust T/div. The centered (50%) selection keeps the current center time point fixed, and other events move about the center as T/div changes. With this setting, the trigger point could move off the grid as the scale changes. The “Lock to Trigger” setting holds the trigger point location fixed. The trigger event remains in place as T/div changes, while other events move about the trigger location.

Basic trigger settings

Oscilloscopes require a trigger, usually derived from or synchronous with the acquired waveform. The function of the trigger is to allow the acquired waveform to be displayed stably. The trigger setup, either on the front panel or using the “Trigger” pulldown provides access to the trigger setup dialog box (Figure 6).

Figure 6 The basic setup for an edge trigger will allow the acquired waveform to be displayed stably. Source: Arthur Pini

The edge trigger is the traditional default trigger type. In edge trigger, the scope is triggered when the source trace crosses the trigger threshold voltage level with the user-specified positive or negative slope. Trigger sources can be any input channel, or an external trigger applied to the EXT. input. Edge trigger is the most commonly used trigger method and is selected in the figure. The current scope settings shown use channel 1 as the trigger source. The trigger is DC coupled with a trigger threshold level of nominally 500 millivolts (mV) and a positive slope. Note the “Find Level” button in the “Level” field will automatically find the trigger level of the source signal. The trigger annotation box on the right side of the screen summarizes selected trigger settings.

The trigger mode, which can be stop, automatic (auto), normal, or single, is selected from the trigger pulldown menu. The trigger mode determines how often the instrument acquires a signal. The default trigger mode is auto; in this mode, if a trigger event does not occur within a preset time period, one will be forced. This guarantees that something will be displayed. Normal trigger mode arms the oscilloscope for a trigger. When the trigger event occurs, it acquires a trace which is then displayed. After the acquisition is complete, the trigger automatically re-arms the instrument for the next trigger. Traces are displayed continuously as the trigger events occur. If there are no trigger events, acquisitions stop until one occurs.

In single mode, the user arms the trigger manually. The oscilloscope waits until the trigger event occurs and makes one acquisition, which is displayed. It then stops until it is again re-armed. If a valid trigger does not occur, invoking Single a second time will force a trigger and display the acquisition. Stop mode ceases acquisitions until one of the other three modes is evoked. Other, more complex triggers are available for more complex triggering requirements; however, they are beyond the scope of this article.

Display

The oscilloscope display is controlled from the display pull-down menu. The type of display can be selected from the pull-down, or the “Display Setup” can be opened (Figure 7).

Figure 7 “Display Setup” allows for the selection of the number of grids and other display-related settings. This example shows the selection of a quad grid with four traces. Source: Arthur Pini

This oscilloscope allows the user to select the number of displayed grids. There is also an “Auto Grid” selection, which turns on a new grid when each trace is activated. Multiple traces can be located in each grid, allowing comparison of the waveforms. Having a single trace in each grid provides an unimpeded view while maintaining the full dynamic range of the acquisition. In addition to normal amplitude versus time displays, the “Display Setup” includes cross plots of two traces producing an X-Y plot.

Display expansion-zoom

Zoom magnifies the view of a trace horizontally and vertically. The traditional method to leverage the zoom functions uses the pull-down “Math” menu to open “Zoom Setup” as shown in Figure 8.

Figure 8 Zoom traces can be turned on using the Zoom Setup under the Math pull-down menu. Source: Arthur Pini

Many oscilloscopes have a “Zoom” button on the front panel to open a zoom trace for each displayed waveform. Oscilloscopes with touch screens support drop and drag zoom. Touch the trace near the area to be expanded and then drag the finger diagonally. A box will be displayed; continue dragging your finger until the box encloses the area to be expanded. Remove the finger, and the zoom trace can be selected to show the expanded waveform.

A quick start guide

This should get you started. Most Windows-based oscilloscopes have built-in help screens that may be context-sensitive and provide helpful information about settings. If you get stuck, contact the manufacturer’s customer service line; they will get you going quickly. If all else fails, consider reading the manual.

Arthur Pini is a technical support specialist and electrical engineer with over 50 years of experience in electronics test and measurement.

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Rad-tolerant RF switch works up to 50 GHz

Thu, 02/06/2025 - 21:22

Teledyne’s TDSW050A2T wideband RF switch operates from DC to 50 GHz with low insertion loss and high isolation. The radiation-tolerant device, fabricated with 150-nm pHEMT InGaAs technology, is well-suited for complex aerospace and defense applications.

Based on a MMIC design process, the reflective SPDT switch maintains high performance across frequencies, including millimeter-wave bands. It has a typical input P1dB of 23 dBm and port isolation of 23 dB at 50 GHz. The TDSW050A2T operates from ±5-V power supplies with minimal DC power consumption and is controlled with TTL-compatible voltage levels.

The switch withstands 100 krads (Si) TID, making it useful for satellite systems exposed to radiation. It meets MIL-PRF-38534 Class K equivalency for space applications and operates over an extended temperature range of -40°C to +85°C. The TDSW050A2T is supplied as a 1.15×1.47×0.1-mm die for hybrid assembly integration.

The TDSW050A2T RF switch is available now for immediate shipment from Teledyne HiRel and authorized distributors.

TDSW050A2T product page

Teledyne HiRel Semiconductors

Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.

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Vishay expands SiC Schottky diode portfolio

Thu, 02/06/2025 - 21:22

Vishay has launched 16 SiC Schottky diodes with 650-V and 1200-V ratings in SOT-227 packages, enhancing efficiency in high-frequency applications. The devices offer, according to the manufacturer, the best trade-off between capacitive charge (QC) and forward voltage drop in their class.

The recently released components include dual diodes in parallel configuration with total forward current ratings ranging from 40 A to 240 A, along with single-phase bridge devices rated at 50 A and 90 A. The diodes feature a forward voltage drop as low as 1.36 V, reducing conduction losses and improving efficiency. They also offer better reverse recovery parameters than Si-based diodes, with virtually no recovery tail.

The SOT-227 package aids efficiency through improved thermal management and reduced parasitic inductance and resistance. The diodes’ low QC down to 56 nC enables high-speed switching, while their industry-standard package provides a drop-in replacement for competing solutions.

Samples and production quantities of the SiC Schottky diodes are available now, with lead times of 18 weeks. To access the datasheets for the dual-diode and single-phase bridge devices, click here.

Vishay Intertechnology 

Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.

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PMIC extends primary battery operating time

Thu, 02/06/2025 - 21:22

Integrating an efficient boost regulator, the nPM2100 PMIC from Nordic Semiconductor prolongs the life of primary non-rechargeable batteries. Along with a range of energy-saving features, the device ensures that the full charge is used before the cell is discarded.

Powered by an input voltage range of 0.7 V to 3.4 V, the nPM2100’s boost regulator provides an output voltage from 1.8 V to 3.3 V, with a maximum current of 150 mA. It also drives a load switch/LDO, supplying up to 50 mA across an output range of 0.8 V to 3.0 V. The regulator features a quiescent current of 150 nA, with power conversion efficiency of up to 95% at 50 mA and 90.5% at 10 µA.

The nPM2100 manages the power supply for low-power SoCs and MCUs, including Nordic’s nRF52, nRF53, and nRF54 series of wireless multiprotocol devices. Configured via an I2C-compatible two-wire interface, it provides easy access to advanced functions such as ship mode and battery fuel gauging. Additionally, the PMIC furnishes two GPIOs that can be repurposed for time-critical control functions, offering an alternative to serial communication.

Ship mode supports a 35-nA sleep current with multiple wakeup options, including a break-to-wake function that allows a buttonless product to wake from ship mode when an electrical connection is broken. The voltage- and temperature-based fuel gauge runs on the host microprocessor, providing accurate battery level measurements and ensuring full access to the battery’s energy.

Samples of the nPM2100 are now available in a 1.9×1.9-mm WLCSP, with additional variants to be offered in 4×4-mm QFN packages. Volume production is expected in the first half of 2025.

nPM2100 product page

Nordic Semiconductor 

Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.

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Partners simplify FPGA-based wireless development

Thu, 02/06/2025 - 21:21

Outfitted with an Altera Agilex 7 FPGA, Hitek’s eSOM7 embedded system-on-module pairs with ADI’s Apollo Mixed Signal Front End (MxFE) AD9084/AD9088 evaluation boards. This combined wideband development setup enables customers to seamlessly evaluate and develop high-performance Apollo MxFE-based wireless products in conjunction with Agilex 7 FPGAs.

The Hitek development platform includes two modules: the eSOM7, featuring two 400-pin high-speed mezzanine connectors, and a carrier board that breaks out the FPGA’s SERDES and I/Os. The eSOM7’s Agilex 7 F-tile FPGA integrates hard IP for networking up to 400G Ethernet and PCIe Gen 4. Adding soft IP such as JESD204C, a UDP/IP offload engine (UOE), and DIFI enables an optimized front-end processing and transport design.

For flexibility, designers can choose between two eSOM7 variants: the eSOM7-4F (four F-tiles), which supports all MxFE ADC/DAC channels, or the eSOM7-2F (two F-tiles), which supports half. The carrier module includes a VITA57.4 FMC+ connector with level translation and control logic to interface with ADI’s Apollo MxFE evaluation boards.

The high-performance platform eases the development of a wide range of applications, including radar, electronic warfare systems, phase array antennas, broadband and satellite communication systems, and electronic test and measurement systems.

The HiTek development platform with the eSOM7-2F is available now. The version featuring the eSOM7-4F will be available in Q1 2025. To learn more, click here.

Hitek Systems

Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.

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ASIL-D MCUs and compiler enhance SDV safety

Thu, 02/06/2025 - 21:21

HighTec’s Rust compiler now supports ST’s Stellar automotive MCUs, accelerating safety-critical system development for software-defined vehicles (SDVs). Stellar 28-nm MCUs are certified to ISO 26262 ASIL D, the highest level of risk management, while the Rust compiler is qualified to the same safety level.

Rust’s safety, performance, and reliability make it an emerging choice for automotive mission-critical systems. It includes provisions to safeguard memory, process threads, and data types, with runtime efficiency comparable to C/C++ in execution time and memory usage. HighTec’s C/C++ and Rust compilers enable the integration of newly developed Rust code, with its inherent safety benefits, alongside legacy C/C++ code.

ST’s Stellar automotive MCUs feature Arm Cortex-R52+ cores and a safety-focused architecture. In addition to ISO 26262 ASIL D certification, they comply with ISO 21434 cybersecurity standards and UN155 requirements, ensuring alignment with the latest safety and security standards.

For more information about the HighTec ASIL D Rust compiler for ST’s Stellar 32-bit automotive MCUs, click here.

HighTec EDV-Systeme

Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.

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Will open-source software come to SDV rescue?

Thu, 02/06/2025 - 15:37

Modern cars’ capture of advanced features for safety, driver assistance, and infotainment is now intrinsically tied to software-defined vehicles (SDVs), which automakers have already accomplished using lower levels of software based on closed-source, proprietary solutions. However, an SDV can be defined in six levels, with a true SDV starting at level three.

Moritz Neukirchner explains these six levels and argues that open-source software will be crucial in realizing proprietary alternatives for SDVs. While acknowledging that design teams have tried and failed to develop safety-centric, Linux-based solutions for automotive, he provides an update on Linux solutions’ recent progress in incorporating safety functionality into SDVs.

Read the full story at EDN’s sister publication, EE Times.

 

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Converting from average to RMS values

Wed, 02/05/2025 - 15:37

We had a requirement to measure the RMS value of a unipolar square wave being fed to a resistive load. Our resistive loads were light bulb filaments (Numitrons) so the degree of brightness was dependent on the applied RMS.

Our digital multimeters did not have an RMS measurement capability, but they could measure the average value of the waveform at hand.

Conversion of a measured average value to the RMS value was accomplished by taking the average value and dividing that by the square root of the waveform’s duty cycle.

The applicable equations are shown in Figure 1.

Figure 1 Equations used to convert a measured average value to RMS value by taking the average value and dividing that by the square root of the waveform’s duty cycle.

John Dunn is an electronics consultant, and a graduate of The Polytechnic Institute of Brooklyn (BSEE) and of New York University (MSEE).

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Flip ON flop OFF

Wed, 02/05/2025 - 15:36

Toggle, slide, push-pull, push-push, tactile, rotary, etc. The list of available switch styles goes on and on (and off?). Naturally, as mechanical complexity goes up, so (generally) does price. Hence simpler generally translates to cheaper. Figure 1 goes for economy by adding a D-type flip-flop and a few discretes to a minimal SPST momentary pushbutton to implement a classic push-on, push-off switch.

Figure 1 F1a regeneratively debounces S1 so F1b can flip ON and flop OFF reliably.

Wow the engineering world with your unique design: Design Ideas Submission Guide

An (almost) universal truth about mechanical switches, unless they’re the (rare) mercury-wetted type, is contact bounce. When actuated, instead of just one circuit closure, you can expect several, usually separated by a millisecond or two. This is the reason for the RC network and other curious connections surrounding the F1a flip/flop.

When S1 is pushed and the circuit closed, a 10 ms charging cycle of C1 begins and continues until the 0/1 switching threshold of pin 4 is reached. When that happens, poor F1a is simultaneously set to 1 and reset to 0. This contradictory combination is a situation no “bistable” logic element should ever (theoretically) have to tolerate. So, does it self-destruct like standard sci-fi plots always paradoxically predict? 

Actually, the 4013-datasheet truth table tells us that nothing so dramatic (and unproductive) is to be expected. According to that, when connected this way, F1a simply acts as a non-inverting buffer with pin 2 following the state of pin 4, snapping high when pin 4 rises above its threshold, and popping low when it descends below. Positive feedback through C1 sharpens the transition while ensuring that F1a will ignore the inevitable S1 bounce. Meanwhile the resulting clean transition delivered to F1b’s pin 11 clock pin causes it to reliably toggle, flipping ON if it was OFF and flopping OFF if it was ON where it remains until S1 is next released and then pushed again.

Thus, the promised push-ON/push-OFF functionality is delivered!

The impedance of F1b’s pin 13 is supply-voltage dependent, ranging from 500 Ω at 5 V to 200 Ω at 15 V. If the current demand of the connected load is low enough, then power can be taken directly from F1b pin 13 and the Q1 MOSFET is unnecessary. Otherwise, it is, and a suitably capable transistor should be chosen. For example, the DMP3099L shown has an Ron less than 0.1 Ω and can pass 3 A.

But what about that “no switch at all” thing?

The 4013 input current is typically only 10 pA. Therefore, as illustrated in Figure 2, a simple DC touchplate comprising a small circuit board meander can provide adequate drive and allow S1 to be dispensed with altogether. It’s hard to get much cheaper than that.

Figure 2 An increase in RC network resistances allows substitution for S1 with a simple touchplate.

 Stephen Woodward’s relationship with EDN’s DI column goes back quite a long way. Over 100 submissions have been accepted since his first contribution back in 1974.

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Build ESD protection using JFETs in op amps

Wed, 02/05/2025 - 15:34

Design engineers aiming to protect the input and output of op amps have several options. They can use an electrostatic discharge (ESD) diode or input current-limiting resistor alongside a transient voltage suppressor (TVS) diode. However, both design approaches have limitations. Here is why an op amp with integrated JFET input protection has better design merits.

Read the full article at EDN’s sister publication, Planet Analog.

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Investigating injection locking with DSO Bode function

Tue, 02/04/2025 - 15:39
Peltz oscillator with injection locking

Oscillator injection locking is an interesting subject; however, it seems to be a forgotten circuit concept that can be beneficial in some applications.

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This design idea shows an application of the built-in Bode capability within many modern low-cost DSOs such as the Siglent SDS814X HD using the Peltz oscillator as a candidate for investigating injection locking [1], [2], [3].

Figure 1 illustrates the instrument setup and device under test (DUT) oscillator schematic with Q1 and Q2 as 2N3904s, L ~ 470 µH, C ~ 10 nF, Rb = 10K, Ri = 100K and Vbias = -1 VDC. This arrangement and component values produce a free running oscillator frequency of ~75.5 kHz

Figure 1 Mike Wyatt’s notes on producing a Peltz oscillator and injector locking setup where the arrangement and component values produce a free running oscillator frequency of ~75.5 kHz.

Analysis and measurements

As shown in Figure 2, the analysis from Razavi [2] shows the injection locking range (± Δfo) around the free running oscillator frequency fo. Note the locking range is proportional to the injected current Ii. The component values shown reflect actual measurements from an LCR meter.

Figure 2 Mike Wyatt’s notes on the injection-locked Peltz oscillator showing the injection locking range around the free running oscillator frequency fo.

This analysis predicts a total injecting locking range of 2*Δfo, or 2.7 kHz, which agrees well with the measured response as shown in Figure 3.

Figure 3 The measured response of the circuit shown in Figure 1 showing an injection locking range of roughly 2.7 kHz.

Increasing the injection signal increases the locking range to 3.7 kHz as predicted, and measurement shows 3.6 kHz as shown in the second plot in Figure 4.

Figure 4 The measured response of the circuit shown in Figure 1 where increasing the injection signal increases the locking range to 3.7 kHz.

Note the measured results show a phase reversal as compared to the illustration notes (Figure 2) and the Razavi [2] article. This was due to the author not defining the initial phase setup (180o reversed) in agreement with the article and completing the measurements before realizing such!!

Injection locking use case

Injection locking is an interesting subject with some uses even in today’s modern circuitry. For example, I recall an inexpensive arbitrary waveform generator (AWG) which had a relatively large frequency error due to the cheap internal crystal oscillator utilized and wanted the ability to use a 10 MHz GPS-disciplined signal source to improve the AWG waveform frequency accuracy. Instead of having to reconfigure the internal oscillator and butcher up the PCB, a simple series RC from a repurposed rear AWG BNC connector to the right circuit location solved the problem without a single cut to the PCB! The AWG would operate normally with the internal crystal oscillator reference unless an external reference signal was applied, then the oscillator would injection lock to the external reference. This was automatic without need for a switch or setting a firmware parameter, simple “old school” technique solving a present-day problem!

 Michael A Wyatt is a life member with IEEE and has continued to enjoy electronics ever since his childhood. Mike has a long career spanning Honeywell, Northrop Grumman, Insyte/ITT/Exelis/Harris, ViaSat and retiring (semi) with Wyatt Labs. During his career he accumulated 32 US Patents and in the past published a few EDN Articles including Best Idea of the Year in 1989.

References

  1. “EEVblog Electronics Community Forum.” Injection Locked Peltz Oscillator with Bode Analysis, www.eevblog.com/forum/projects/injection-locked-peltz-oscillator-with-bode-analysis. 
  2. B. Razavi, “A study of injection locking and pulling in oscillators,” in IEEE Journal of Solid-State Circuits, vol. 39, no. 9, pp. 1415-1424, Sept. 2004, doi: 10.1109/JSSC.2004.831608. 
  3. Wyatt, Mike. “Simple 5-Component Oscillator Works below 0.8V.” EDN, 3 Feb. 2025, www.edn.com/simple-5-component-oscillator-works-below-0-8v/.

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Intel comes down to earth after CPUs and foundry business review

Tue, 02/04/2025 - 12:31

While finetuning its products and manufacturing process roadmap, Intel has realized that there are no quick fixes. After a briefing from Intel co-CEOs Michelle Holthaus and David Zinsner on upcoming CPUs and a slowdown in the ramp of the 18A node, Alan Patterson caught up with industry analysts to take a closer look at Intel’s predicament. He spoke with them about delayed CPU launches, the lack of an AI story, and the fate of Intel Foundry.

Read the full story at EDN’s sister publication, EE Times.

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Functional safety in non-automotive BMS designs

Tue, 02/04/2025 - 10:06

Battery-powered applications, which have become indispensable over the last decade, require a certain level of protection to ensure safe use. This safety is provided by the battery management system (BMS). The BMS monitors the battery and possible fault conditions, prevents any hazardous situation due to the battery or its surroundings, and ensures that there is an accurate estimation of the battery’s remaining capacity or the level of battery degradation.

The main structure of a BMS for a low- or medium-voltage battery is commonly made up of three ICs, as described below:

  1. Battery monitor and protector: Also known as the analog front-end (AFE), the battery monitor and protector provides the first level of protection since it’s responsible for measuring the battery’s voltages, currents, and temperatures.
  2. Microcontroller unit (MCU): The MCU, which processes the data coming from the battery monitor and protector, commonly incorporates a second level of protection, including monitoring thresholds.
  3. Fuel gauge (FG): The fuel gauge is a separate IC that provides the state-of-charge (SOC), state-of-health (SOH) information and remaining runtime estimates, as well as other user-related battery parameters.

Figure 1 The BMS architecture displays the key three building blocks. Source: Monolithic Power Systems

Figure 1 shows the main structure of a complete BMS for low- or medium-voltage batteries. The fuel gauge can be a standalone IC, or it can be embedded in the MCU. The MCU is the central element of the BMS, taking information from both the AFE and fuel gauge and interfacing with the rest of the system.

While three main components constitute the BMS, using these components without any additional consideration is not enough to ensure that the system meets the safety level required by certain industries. This article will explain the role that functional safety plays in non-automotive battery management systems and how to achieve the required safety level.

Functional safety introduction

Functional safety is a branch of overall safety focused on reducing the risk produced by hazardous events due to a functional failure of an electric/electronic (E/E) system. The goal is to ensure that the residual risk is within an acceptable range.

In recent years, the increasing use of E/E systems in different fields such as automotive, machinery, medicine, industry, and aviation has been accompanied by a greater emphasis on functional safety. These changes have led to the development of different functional safety standards.

ISO 13849, titled “Safety of machinery – Safety related part of control systems”, is a functional safety standard focused on the safety-related parts of control systems (SRP/CS) in the machinery field. This is a field that includes a wide spectrum of applications, from generic industrial machinery to mopeds and e-bikes. ISO 13849 defines different safety levels as performance level (PL), which range from PLa (lower safety level) to PLe (higher safety level).

This safety standard defines an accurate process for risk evaluation and reduction. It proposes a simplified method to determine the achieved PL based on three parameters: category, mean time to dangerous failure (MTTFD), and average diagnostic coverage (DCAVG), which is calculated by averaging all the DC associated to the different safety measures applied in the system.

The category is a classification of an SRP/CS that describes its resistance to faults and the subsequent behavior in the event of a fault condition. There are 5 categories (B, 1, 2, 3, and 4).

Architecture has the biggest impact on the category. The basic architecture of an SRP/CS is composed of three functional blocks: an input, a logic block, and an output (Figure 2). Figure 2 corresponds with the architecture proposed for category B and category 1, and it’s called a “single-channel” architecture. A single-channel architecture is considered the most basic architecture to implement the nominal functionality of the SRP/CS, but it’s not intended for any diagnostic functionality.

Figure 2 The above architecture is proposed for category B and category 1. Source: Monolithic Power Systems

Category B and 1 rely on the reliability of their components (MTTFD) to ensure the integrity of the safety functions. If a component implementing the safety function has a failure, a safe state can no longer be guaranteed, as no diagnostics are implemented (DCAVG = 0).

For category 2, the proposed architecture is called “single-channel tested.” The base of this architecture is the same as the single-channel architecture, but with an added test equipment block that can diagnose whether the functional channel is working correctly. If a component implementing the safety function has a failure, the safety function is not carried out; however, a safe state can be achieved if the failure is diagnosed by the test equipment.

For category 3 and category 4, the proposed architecture is called “redundant channels,” which is implemented with two independent functional channels that can diagnose issues on the other channel. If a component implementing the safety function has a failure, the safety function can still be carried out by the other channel. Designers should select the SRP/CS category based on the targeted safety level of each safety function.

Achieving functional safety step-by-step

The ISO 13849 standard defines an iterative process during which the SRP/CS design is evaluated to determine the achieved PL and check whether that safety level is sufficient or must be improved in a new loop. The process includes three different methods for risk reduction: risk reduction via safe designs measures, risk reduction via safeguarding, and risk reduction via information for use. ISO 13849 supports risk reduction via safeguarding (Figure 3).

Figure 3 ISO 13849 supports risk reduction via safeguarding. Source: Monolithic Power Systems

The safeguarding process starts by defining the safety functions of the SRP/CS, in which the required performance level (PLr) is defined after the risk analysis is conducted. The PLr is the target PL of the SRP/CS for each safety function.

The next step includes designing the SRP/CS for the specified safety requirements. This entails considering the possible architecture, the safety measures to implement, and finalizing the design of the SRP/CS to perform the relevant safety functions.

Once the SRP/CS is designed, evaluate the achieved performance level for each safety function. This is the core step of the entire safeguarding process. To evaluate the achieved PL, define the category and then calculate the MTTFD and DCAVG of the SRP/CS for each individual safety function.

The MTTFD is calculated per channel, and it has three levels (Table 1).

Table 1 MTTFD, calculated per channel, has three levels. Source: Monolithic Power Systems

Table 2 shows the four levels for defining the DC of each diagnostic measure.

Table 2 There are four levels for defining the DC of each diagnostic measure. Source: Monolithic Power Systems

The achievable PL can be determined using the relevant parameters (Table 3).

Table 3 Relevant parameters help determine the achievable PL. Source: Monolithic Power Systems

The achievable PL can only be confirmed when the remaining requirements and analyses defined by the standard are implemented in the design. These requirements must comply with systematic failures management, common cause failure (CCF) analysis, safety principles and software development, if applicable.

Once this process is complete, the PL achieved by the SRP/CS for a concrete safety function should be verified against the PLr. If PL < PLr, then the SRP/CS should be redesigned, and the PL evaluation process must begin again. If PL ≥ PLr, then the SRP/CS has achieved the required safety level, and validation must be executed to ensure the correct behavior through testing. If there is an unexpected behavior, the SRP/CS should be redesigned. This process should be reiterated for each safety function.

Functional safety level according to each market

Battery-powered devices are used in countless markets, and each market demands different functional safety specifications according to how dangerous a failure could be for humans and/or the environment. Table 4 shows the functional safety level required by some of the main markets. Note that these levels are constantly changing and may be different depending on each engineering team’s design.

Table 4 This is how PL is determined based on market. Source: Monolithic Power Systems

Although these are the current performance level market expectations, electromobility and certain energy storage applications may move into PLd due to the constant issues in battery-powered devices around the world. For example, faulty energy storge applications have resulted in fires in U.S. energy storage system (ESS) facilities. In U.K., more than 190 persons have been injured, and eight persons have been killed by fires sparked by faulty e-bikes and e-scooters.

All these events could have been prevented by a more robust and reliable system. The constant need for increasing safety levels means it is vital to have a scalable solution that can be implemented across different performance levels.

A functional safety design proposal

Take the case of an ISO 13849-based BMS concept that Monolithic Power Systems (MPS) has developed by combining an MCU with its MP279x family of battery monitors and protectors. This system is oriented to achieve up to PLc safety level for a certain set of safety functions (SFs), as shown in Table 5. PLr determination is dependent on the risk analysis, in which small variations can take place, as well as the application in which the BMS is used.

Table 5 See the defined safety functions for the BMS concept. Source: Monolithic Power Systems

The solution proposed by MPS to achieve PLc can meet category 2 or category 3—depending on each safety function—as for certain safety functions. There is only a single input block and for others, there are redundant input blocks.

Figure 4 shows how to implement SF2 and SF4 to prevent the battery pack from over-charging and under-charging. In the implementation of the SRP/CS, there are two logic blocks: the battery monitor and protector (logic 1) and the MCU (logic 2). These logic blocks are used to diagnose correct functionality of different parts in the design.

Figure 4 Here is how to implement SF2 and SF4. Source: Monolithic Power Systems

The implementation of single or duplicated input is determined by the complexity and cost in each case. To ensure that the safety functions for a single input are compliant with PLc, additional safety measures can be taken to increase the diagnostic capability; an example is a cell voltage plausibility check to verify that the cell voltage measurements are correct.

Functional safety used to be relevant for automotive products, but nowadays most modern markets demand the manufacturer to comply with a functional safety standard. The best-known safety standard for non-automotive markets is ISO 13849, a system-level standard that ensures an application’s safety and robustness.

Miguel Angel Sanchez is applications engineer at Monolithic Power Systems.

Diego Quintana is functional safety engineer at Monolithic Power Systems.

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Amazon’s Echo Auto Assistant: Legacy vehicle retrofit-relevant

Mon, 02/03/2025 - 15:15

Remember my April 2023 teardown of Spotify’s now-defunct Car Thing?

Ditch the touchscreen LCD, broaden functionality and that’s Amazon’s Echo Auto in a nutshell:

Shown here and introduced in mid-2019 is the first-generation version of the product, which I’ll be tearing down today. It originally sold for $49.99 but was initially promo-priced at half that amount ($24.99), which is how it came to be in my possession that same summer. The second-gen successor, introduced three years (and three months) later with shipments beginning in mid-December 2022, was smaller, with beefier mounting options, equivalent claimed input-sound quality (in spite of fewer integrated mics) and a supposed superior sonic output, along with a permanent 24.99 price cut. It’s still available for purchase:

Considering that the first-gen Echo Auto has been sitting on my shelf for more than 5 years now awaiting my dissection attention, the beat-up condition of its packaging, as-usual accompanied by a 0.75″ (19.1 mm) diameter U.S. penny for size comparison purposes, would be understandable…except that it’s looked like this since it first showed up at my front door!

Rip off the retaining tape and flip open the top flap:

and the contents come into view.

Post-removal, here’s our patient, alongside the similarly clear plastic-clad (at least for the moment) dashboard mount:

the “cigarette lighter” 12V socket-based power supply, flanked by (on the left) a 3.5mm TRS extension cable and (on the right) the USB-A to micro-USB power cable, all three of which I’ll hold on to for future reuse:

and, of course, a few slivers of documentation:

Next, a couple of additional looks at the adhesive dash mount (and its accompanying preparatory dashboard-cleaning handi wipe), now free of its clear plastic sarcophagus:

and the power adapter, with a handy included second USB-A jack, and decent aggregate output:

With the contents removed and its insides now ostensibly empty, the box still seems hefty, but I confirmed that there was nothing left within. Must be all those folded cardboard layers:

And now for some initial perspectives on our patient, with dimensions of 3.3” x 1.9” x 0.5” (85 mm x 47 mm x 13.28 mm) and a weight of 1.6 oz (45 grams). Front:

The left “mute” button, by the way, turns red when active, as with other Echo devices, as does the more general multicolor device-status light bar along the bottom edge:

The device top is comparatively bland, although there is that inside access-tempting seam:

The sides are more interesting. Along the right are the 3.5mm auxiliary analog audio output and the micro-USB power connector. The former was a key motivation for me to initially buy the Echo Auto, as none of my vehicles have integrated Bluetooth, far from Apple’s CarPlay or Google’s Android Auto services—only my wife’s newer car does—but their sound systems all have AUX inputs.

And on the left? No, that’s not a SD card slot. Believe it or not, it’s the aperture for the integrated speaker, pointing toward the vehicle’s driver (at least sometimes):

Finally, the device backside, revealing (among other things) the FCC ID (2ALV8-4833) and magnetic dash mount inset (I trust there’s metal inside, on the other side of the chassis):

Speaking of “inside”, let’s get to it. A preparatory peek underneath one of the rubber feet seemingly wasn’t promising:

So, I turned my attention to the aforementioned top side seam. The first “spudger” I tried slipped inside fairly easily but was too flimsy to make any separation headway:

Its beefier Jimmy sibling, however, was no more successful:

On a hunch, I revisited those feet. That grey piece of plastic you saw underneath the one in the earlier photo? Turns out, it pops out too:

And underneath each of the plastic pieces is a hex screw head begging for attention:

That’s more like it:

FWIW, as it turns out from my subsequent research, I wasn’t the only one initially flummoxed!

There’s that piece of metal I’d previously forecasted would be on the other side of the dashboard mount inset. Below it, along the bottom edge, is a portion of the light guide assembly (presumably associated with a to-be-seen row of LEDs on the PCB):

And here’s our first glimpse of the system’s guts:

On the left (right when viewed from the front; remember that we’ve so far removed the back panel) is the micro-USB power input, with the 3.5 mm audio jack above it. Along the bottom are—I told you so—a row of 11 multicolor LEDs. At the top is the PCB-embedded Bluetooth antenna. And on the right? That, believe it or not, is the mono speaker! Let’s get it outta there:

Lest there be any doubt as to its magnet-inclusive acoustic identity:

And now for some closeups, with perspectives oriented per the transducer as originally installed in the previous photo. Right side, where the sound comes out; I seriously doubt it “goes to 11”:

Front:

Left side:

Back, exposing the speaker’s electrical contacts:

And finally, the top:

and bottom:

With the speaker removed, you can now see the PCB-resident “spring” contacts that mate up with those on the speaker. Note, too, that the PCB holes corresponding to mounting pins on the speaker backside are foam-reinforced, presumably to suppress vibration while in operation:

And now let’s get the PCB out of there, a thankfully easier process than what’d previously been necessary to get our first glimpse of it, as it now lifts right out of the remaining chassis half:

The stuck-on RFID tag inside the front chassis half is an interesting story in and of itself. As this blogger also postulates (in addition to identifying the source—Inpinj—of the IC connected to the comparatively massive antenna), I believe that it finds use in uniquely associating the device with your Amazon account prior to its shipment to you. To wit, I happened to notice, in reviewing my Amazon order history to refresh my memory of when I bought the Echo Auto and what I paid for it, that the device serial number was also included in the relevant transaction listing. And at the bottom is the other portion of the light guide assembly:

Here’s the already-seen PCB backside, now free of its previous plastic chassis surroundings:

And here’s the first-time glimpsed PCB front side:

Let’s first get rid of that rubber gasket, which thankfully peeled off easily:

Note the LEDs straddling the left-side switch, which generate the red “mute” indication. Note, too, eight total circular apertures for the microphone array, one in each corner of each of the two switches. And as for the ICs between the switches, let’s zoom in:

Unfortunately, I had no luck in identifying any of these; I’m once again hopeful that insightful readers can fill in the missing pieces. The one at the bottom (U10), when correctly oriented (it’s upside-down marked in the photo) has what looks to be an “OXZ” company logo stamped in the upper left corner. The three-line product marking next to it looks like this:

L16A
0225
ZSD838A

I found similar markings (albeit with second-line deviations) on an IC inside a 2018-2019 13” Apple MacBook Air, within a Facebook post which I stumbled across thanks to Google Image Search, but that’s all I’ve got. Above it are two ICs (U2 and U6) identically marked as follows:

YE08
89T

which may be 8-bit bidirectional voltage-level translators, specifically Texas Instruments’ TXB0108. And in U10’s upper right corner is another (U9) with the following two-line marking:

T3182
3236A

Again…🤷‍♂️

Let’s flip the PCB back over to its backside and see if we have any better luck. Step one is to get those two Faraday Cages’ tops off:

That’s better:

The IC at far left (U20), next to a wire-wound inductor whose guts seem to have been inadvertently exposed by the spudger while removing the cage, is labeled thusly (and faintly so):

25940A
TI 89I
AE24

“TI” stands for “Texas Instruments”, I’m pretty confident, reflective of the longstanding partnership between that supplier and Amazon also noted in several of my past Echo product dissections. And Texas Instruments does have a “25940” in its product line, specifically the TPS25940, the “eFuse Power Switch”, a “compact, feature-rich power management device with a full suite of protection functions, including low power DevSleep support”. If that’s actually what this chip is, its proximity to the micro-USB power input therefore makes sense. But the product page also claims that the TPS25940 is intended for use in SSDs. Hmm…

Above and to the right of it is another chip with “TI” in the markings (U14), but the first line thankfully makes its function more obvious, at least as far as I’m guessing:

DAC
3203I
TI 88J
PL49

This, I believe, is Texas Instruments’ TLV320DAC3203 “stereo” audio DAC with a stereo 125-mW headphone driver and audio processing. Proximity is again part of the probable identity tip-off here, since it’s near the analog audio output. Plus, of course, there’s the first-line “DAC” mark…

Move further to the right and the next large(r) IC you encounter (U19), also seemingly chipped in one corner during my clumsy cages-removal surgery, has the following two-line primary markings (along with, above them, a combo mysterious swirl followed by a seeming QR code):

W902B108
SR3F2

Google searches on the markings proved fruitless but, based on some other research I’ve done on this system, I’m still going to take a guess. The Amazon product page indicates that in addition to the main system SoC (hold that thought), there’s also an “Intel Dual DSP with Inference Engine” inside. The relevant DeviWiki product page further clarifies that it’s an “Intel Quark S1000 Processor.” Indulge me in a brief history diversion: a bit more than a decade ago, Intel announced its Quark line of defeatured 32-bit x86 processors (even more so than its Atom CPUs) for wearables and other cost- and power-sensitive applications. The Quark family, which Intel obsoleted in 2019, also included at least one coprocessor, the S1000, which embedded two Cadence Tensilica LX6 DSP cores. Intended for speech recognition, I assume that the S1000 also handled echo cancellation, background noise suppression and other array mic functions in this particular design. And I’m also guessing that, although there’s no Intel logo mark, it’s this chip.

Now for the main system SoC (U23), which is to the right of the previous “mystery chip” and is thankfully more easily identifiable. It’s MediaTek’s MT7697, introduced in 2016 and described as a “highly integrated 1T1R 2.4GHz Wi-Fi/Bluetooth 4.2 application processor with an Arm Cortex-M4 and a power management unit”, MediaTek being another supplier with a longstanding Amazon relationship.

Which leads us to the last chip I’ll showcase, to its right, with a two-IC PCB identifier (U17/U18). At first, I thought the “MT” mark might also indicate MediaTek sourcing but, given that the MT7697 already also handles Bluetooth and power management functions, I couldn’t think of anything else this one could tackle. But then I remembered I hadn’t yet mentioned memory, either volatile or nonvolatile. This insight led me to suspect that “MT” probably instead stands for “Micron Technology” and that this is a stacked module containing both DRAM and flash memory (capacities and specific technology types and generations unknown).

In closing, I’ll (re)point out two other aspects of this side of the PCB; the eight MEMS microphones whose apertures you saw earlier on the other side, and the PCB-embedded top-edge Bluetooth antenna that I first noted when the PCB was still chassis-bound. And with that, having just passed through 2,000 words, I’ll wrap up with a reiteration of the invitation to assist me with any/all of the ICs I was unable to ID, and/or to share any other insights or other thoughts, in the comments. Thanks as always in advance!

Brian Dipert is the Editor-in-Chief of the Edge AI and Vision Alliance, and a Senior Analyst at BDTI and Editor-in-Chief of InsideDSP, the company’s online newsletter.

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Vietnam’s pivot to the IC design world

Mon, 02/03/2025 - 11:24

Vietnam has scored another victory in its bid to move beyond back-end assembly and packaging and establish an IC design and testing presence. Mixel, an analog and mixed-signal IP developer, is opening a design shop in Da Nang, Vietnam.

The San Jose, California-based design house provides interface IP solutions for MIPI, LVDS, and other multi-standard SerDes. It was the first IP provider to demonstrate silicon for MIPI D-PHY, MIPI C-PHY, and MIPI M-PHY. Mixel’s new design office in Vietnam—the first in Asia—will contribute to its IP development work.

Figure 1 A design house serving high-speed mixed-signal IP market will help develop engineering talent in Vietnam. Source: Mixel

It follows Vietnam’s inking of strategic pacts with two large EDA houses—Cadence and Synopsys—to advance design talent and cultivate a culture of semiconductor startups. Vietnam National Innovation Center (NIC), currently setting up the infrastructure for an IC design incubation center at Hoa Lac High-Tech Park in Hanoi, has joined hands with Cadence to accelerate IC design activities.

As part of this program, Cadence provides access to its design tools to academic institutes selected by NIC. University students and professors can use the Cadence tools and online training suites to gain real-world IC design expertise. Cadence is also introducing internships and job opportunities to Vietnamese engineers who are trained at NIC.

Next, Synopsys provides training licenses and educational resources to help NIC set up the chip design incubation center. Here, NIC investes in prototyping and emulation infrastructure to cultivate the IC design workforce in collaboration with Synopsys. The Sunnyvale, California-based EDA house also provides prototyping and emulation tools for software and hardware co-design in system-on-chip (SoC) devices.

Figure 2 Chip designers at NIC’s incubation center will be trained on the latest IC design tools. Source: Synopsys

Vietnam is striving to seize the moment amid trade tensions between China and the United States. In the so-called “China+1” investment strategy, Vietnam is emerging as a major beneficiary, so it wants to complement IC design with the existing back-end manufacturing, testing, and packaging businesses.

If Vietnam is successful in its bid to develop a vibrant IC design industry, it will also integrate the country into the global semiconductor ecosystem.

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Chip-scale atomic clock shrinks profile height

Sun, 02/02/2025 - 19:02

A low-noise chip-scale atomic clock (LN-CSAC), the SA65-LN from Microchip, features a profile height of less than 0.5 in. (12.7 mm). Aimed at aerospace and defense applications where size, weight, and power are critical, the SA65-LN delivers precise and stable timing, along with low phase noise and atomic clock stability.

Based on Microchip’s Evacuated Miniature Crystal Oscillator (EMXO) and integrated into a CSAC, the SA65-LN consumes under 295 mW. It also operates within a temperature range of -40°C to +80°C, maintaining its frequency and phase stability. Low power consumption and a wide temperature range enable battery-powered operation under extreme conditions.

The LN-CSAC combines the stability of an atomic clock with the precision of a crystal oscillator in a compact design. The EMXO offers low phase noise of <−120 dBc/Hz at 10 Hz and an Allan Deviation (ADEV) of <1E-11 at a 1-second averaging time. The atomic clock provides ±0.5 ppb initial accuracy, frequency drift of <0.9 ppb/month, and temperature-induced errors of <±0.3 ppb.

The SA65-LN is available now in production quantities. It is supported by Microchip’s Clockstudio software tool, a GUI, and developer kit.

SA65-LN product page

Microchip Technology

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Gate drivers serve EV traction inverters

Sun, 02/02/2025 - 19:02

Infineon has added five isolated gate drivers to its EiceDriver family optimized for driving IGBTs and SiC MOSFETs. AEC-qualified and ISO 26262-compliant, these third-generation drivers are well-suited for traction inverters in both cost-effective and high-performance xEV platforms. Additionally, they support Infineon’s HybridPack Drive G2 Fusion module, a plug-and-play power module that combines the company’s Si and SiC technologies.

The 1EDI302xAS series supports IGBTs up to 1200 V, while the 1EDI303xAS series is suited for SiC MOSFETs up to 1200 V. With an output stage of 20 A, the 1EDI3025AS, 1EDI3026AS, and 1EDI3035AS can drive inverters of all power classes up to 300 kW. The 1EDI3028AS and 1EDI3038AS variants have an output stage of 15 A, useful for entry-level battery EV and plug-in hybrid EV inverters. The gate drivers provide reinforced insulation per VDE 0884-17:2011-10, ensuring safe isolation.

All of the single-channel drivers are equipped with a configurable soft turn-off feature for enhanced short-circuit performance. Monitoring functions include overcurrent protection and an integrated self-test for desaturation protection. A continuously sampling 12-bit delta-sigma ADC with an integrated current source can read the voltage directly from temperature measurement diodes or an NTC.

Samples of the 1EDI3025AS, 1EDI3026AS, 1EDI3028AS, 1EDI3035AS, and 1EDI3038AS isolated gate drivers are available now.

EiceDriver product page

Infineon Technologies 

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Platform eases validation of LPDDR6 memory

Sun, 02/02/2025 - 19:02

Keysight provides an end-to-end LPDDR6 memory design and test platform that improves device and system validation. It includes new test automation tools necessary for advancing AI, especially in mobile and edge applications.

Based on the UXR oscilloscope and M8040A bit error ratio tester, the complete setup includes transmitter and receiver test apps paired with the Advanced Design System (ADS) Memory Designer and EDA software. The LPDDR6 memory standard’s combination of high performance and power efficiency makes it particularly suitable for AI and machine learning workloads, high-speed digital computing, automotive systems, and data centers.

When used for transmitter testing, the platform reduces validation time with fully automated compliance testing and characterization. Engineers can analyze device BER performance with extrapolated eye mask margin testing and achieve accurate signal measurements directly from BGA packages with specialized de-embedding capabilities.

For receiver testing, the setup validates designs using with BER test methodology and pinpoints performance issues by testing against multiple jitter, crosstalk, and noise scenarios. It also ensures interoperability with both device and host controller validation.

The receiver and transmitter solution made its public debut at DesignCon 2025.

Keysight Technologies

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Step-down converter trims quiescent current

Sun, 02/02/2025 - 19:02

The NEX30606 step-down converter from Nexperia delivers up to 600 mA of output current with an operating quiescent current of just 220 nA. Supporting input voltages from 1.8 V to 5.0 V, the converter offers 16 resistor-settable fixed output voltages and uses constant on-time control for fast transient response.

Ultra-low quiescent current makes the NEX30606 well-suited for consumer wearables like hearing aids, medical sensors, patches, and monitors. It can also be used in battery-powered industrial applications, including smart meters and asset trackers. The converter provides greater than 90% switching efficiency for load currents ranging from 1 mA to 400 mA. Additionally, it has only 10 mV of output voltage ripple when stepping down from 3.6 VIN to 1.8 VOUT.

Nexperia also offers the NEX40400, a step-down converter that combines high efficiency with an operating quiescent current of 60 µA typical. It provides up to 600 mA of output current from a wide 4.5-V to 40-V input voltage range. The device employs pulse frequency modulation for high efficiency at low to mid loads and spread spectrum technology to minimize EMI. Target applications include industrial distributed power systems and grid infrastructure.

Visit the NEX30606 and NEX40400 product pages to check pricing and availability.

NEX30606 product page 

NEX40400 product page 

Nexperia

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Wolfspeed debuts Gen 4 MOSFET portfolio

Sun, 02/02/2025 - 19:02

Wolfspeed introduced its Gen 4 SiC MOSFET platform, supporting long-term roadmaps for high-power, application-optimized products. Gen 4 offerings include power modules, discrete components, and bare die available in 750-V, 1200-V, and 2300-V classes.

According to Wolfspeed, it is the only producer with both silicon carbide material and silicon carbide device fabrication facilities based in the U.S. This factor is becoming increasingly important under the new U.S. Administration’s increased focus on national security and investment in U.S. semiconductor production.

The Gen 4 platform was designed to improve system efficiency and prolong application life, even in the harshest environments. It is expected to deliver performance enhancements in high-power automotive, industrial, and renewable energy systems, with key benefits including: 

  • Holistic system efficiency: Delivering up to a 21% reduction in on-resistance at operating temperatures with up to 15% lower switching losses.
  • Durability: Ensuring reliable performance, including a short-circuit withstand time of up to 2.3 µs to provide additional safety margin.
  • Lower system cost: Streamlining design processes to reduce system costs and development time.

Gen 4 SiC power modules, discrete components, and bare die are available now through Wolfspeed’s distributor network.

Wolfspeed

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