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Japan’s leading telecommunications company has partnered with quantum computing company D-Wave to use D-Wave’s equipment for network operational improvement.

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Introduction

Power supplies in data centers that measure the input power in real time and report the measurement to the host are conducting what’s known as electrical metering (e-metering). An e-meter has become a common requirement in power-supply units over the last decade because it brings these advantages to data centers [1]:

• Identifies abnormally low or high energy usage and potential causes, supporting such practices as peak shaving.
• Facilitates capacity planning around space and power utilization.
• Helps track and manage energy costs; verifies energy bills; and prioritizes, validates, and reduces energy costs through improved energy efficiency and energy management.
• Enables quantitative assessments of data center performance and benchmarking of that performance across a level playing field.
• Helps develop and validate energy-efficiency strategies, and identifies opportunities to improve energy efficiency by lowering energy and operational costs.
• Commission and detect faults in physical systems and diagnose their causes.

For all of these reasons, an e-meter must be exceptionally accurate. Figure 1 shows the Modular Hardware System-Common Redundant Power Supply (M-CRPS) e-meter accuracy requirement [2], which requires an input power measurement error within ±1% when the load is greater than 125 W, within ±1.25 W when the load is between 50 W and 125 W, and within ±5 W when the load is below 50 W.

Figure 1 The M-CRPS e-meter accuracy specification which requires an input power measurement error: within ±1% when the load is greater than 125 W; within ±1.25 W when the load is between 50 W and 125 W, and within ±5 W when the load is below 50 W. Source: Texas Instruments

To achieve such high measurement accuracy, traditionally the e-meter function is implemented through a dedicated metering device [3], as shown in Figure 2. A current shunt placed on the power factor correction (PFC) input side senses the input current, with a voltage divider (not shown in Figure 2) across the AC line and AC neutral senses the input voltage. A dedicated metering device receives this current and voltage information and calculates the input power and input root-mean-square (RMS) current information, sending the results to the host.

Figure 2 Traditional e-meter and PFC control configuration where: a current shunt is placed on the PFC input side to sense the input current, a voltage divider (not shown) senses the AC line, and AC neutral senses the input voltage. Source: Texas Instruments

To control the PFC input current, another current sensor, such as the Hall-effect sensor shown in Figure 2, senses the input current, then sends the input current information to an MCU for PFC current-loop control. However, both the Hall-effect sensor and dedicated metering device are expensive.

In this power tip, I’ll discuss a low-cost but highly accurate e-meter solution that uses a single current sensor for both e-metering and PFC current-loop control. Integrating e-meter functionality into PFC control code eliminates the need for a dedicated metering device, not only reducing system cost, but also simplifying printed circuit board (PCB) layout and expediting the design process.

E-meter solution

Figure 3 shows the proposed e-meter configuration. A current shunt senses the input current; an isolated delta-sigma modulator AMC1306 measures the voltage drop across the current shunt. The delta-sigma modulator output is sent to the PFC controller MCU. This current information will be used for both e-metering and PFC current-loop control. A voltage divider senses the input voltage, which is then measured by the MCU’s analog-to-digital converter (ADC) directly, just as in traditional PFC control.

Figure 3 New e-meter and PFC control configuration where: a current shunt senses the input currnet, an isolated delta-sigma modulator measures the voltage dropp acorss the shunt, and the output of the modulator is used to e-metering and PFC current-loop control. Source: Texas Instruments

Delta-sigma modulator

Compared to the successive approximation register (SAR) style ADC, which almost all digital PFC controller MCUs use, a delta-sigma modulator can provide high-resolution data. The modulator samples the input signal at a very high rate to produce a stream of 1-bit codes, as shown in Figure 4.

Figure 4 Delta-sigma modulator input and output; a higher positive input signal produces ones at the output a higher percentage of the time while a lower negative input signal produces ones a lower percentage of the time. Source: Texas Instruments

The ratio of ones to zeros represents the input analog voltage. For example, if the input signal is 0 V, the output has ones 50% of the time. A higher positive input signal produces ones a higher percentage of the time, while a lower negative input signal produces ones a lower percentage of the time. Unlike most quantizers, the delta-sigma modulator pushes the quantization noise to higher frequencies [4] making it suitable for high-precision measurements.

Delta-sigma digital filter

The C2000 MCU has a built-in delta-sigma digital filter which decodes the 1-bit stream. The effective number of bits (ENOB) of the filter output depends on the filter type, oversampling rate (OSR), and delta-sigma modulator frequency [5]. Typically, a higher OSR will result in a higher ENOB for a given filter type; however, the trade-off is increased filter delay.

It is important to choose the right filter configuration by studying the optimal speed versus resolution trade-offs. For PFC current-loop control, a short delay is more important, because it can help increase the control-loop phase margin and reduce the total current harmonic distortion. On the other hand, high-resolution current data is necessary to achieve high accuracy for e-metering. For this reason, the solution proposed here uses two delta-sigma digital filters: one configured with high speed but a relatively low resolution for PFC current-loop control, and the other configured with high resolution but a relatively low speed for e-metering; see Figure 5.

Figure 5 The proposed delta-sigma filter configuration uses two filters: one for high-speed but with a low resolution for PFC current-loop control and another with low-speed for e-metering but with a high resolution. Source: Texas Instruments

Firmware structure

Figure 6 is the firmware structure, which consists of three loops:

• A main loop used for slow and non-time-critical tasks.
• A fast interrupt service routine (IRS1) running at 100 kHz for the ADC, delta-sigma data reading, and current-loop control.
• A slower ISR2 running at 10 kHz for voltage-loop control and e-meter calculation.

Since the e-meter calculation is in ISR2, it has no effect on the PFC current loop. Integrating e-meter functionality into PFC control code with this structure does not affect PFC performance.

Figure 6 Firmware structure that consists of three loops: a main loop for low non-time-critical tasks; a 100 kHz IRS1 loop for ADC, delta-sigma data reading, and current loop control; and 10 kHz ISR2 lopo for voltage-loop control and e-meter calcuation. Source: Texas Instruments 

E-meter calculation

Now that there’s both input current data (through the delta-sigma modulator) and input voltage data (through the MCU’s ADC), it’s time to perform e-meter calculations. Equation 1 calculates the input voltage RMS value:

where Vin(n) is the Vin ADC sample data and N is the total number of ADC samples in one AC cycle.

The input current RMS value calculation consists of two steps. The first step is to calculate the measured current (inductor current) RMS value, as shown in Equation 2:

where Iin(n) is the delta-sigma digital filter output.

Referring back to Figure 3, because the shunt resistor is placed after the EMI filter, the reactive current caused by the X-capacitor of the EMI filter is not measured. Therefore, Equation 2 does not represent the total input current. This situation worsens at high line and light load, where the reactive current is not negligible; accurate input current reporting requires its inclusion.

In order to calculate the reactive current of the EMI capacitor, you first need to know the input voltage frequency. The ADC measures the AC line and neutral voltage; comparing the line and neutral voltage values will find the zero crossing. Since the input voltage is sampled at a fixed rate, it is possible to calculate the AC frequency by counting the number of samples between two consecutive zero-crossing points. Once you know the input voltage frequency, Equation 3 calculates the reactive current of the EMI capacitor:

where C is the total capacitance of the EMI filter and f is the input AC voltage frequency.

IEMI is a reactive current that leads the measured current (IL) by 90 degrees; therefore, Equation 4 calculates the total input current as:

Input power calculation also consists of two steps. First, calculate the measured power, as shown in Equation 5:

Since the input voltage is measured after the EMI filter, the power loss caused by the EMI filter is not measured. While this power loss is usually very small, you may need to include it for applications requiring extremely accurate measurements.

The total DC resistance of the EMI filter is R. Equation 6 calculates the power loss on the EMI filter as:

Finally, adding the EMI filter power loss to the measured power obtains the total input power (Equation 7):

Test results

I implemented the proposed e-meter function in a 3.6 kW (1.8 kW at low line) totem-pole bridgeless PFC. Figure 7, Figure 8 and Figure 9 show the test results at low line, high line and DC input, respectively. This implementation achieved <0.5% measurement error, which is two times better than the M-CRPS e-meter specification. Moreover, the implementation uses only 1-point calibration, which significantly reduces calibration time and cost.

Figure 7 E-meter test results at 1.8 kW low line with Vin set to 115 VAC showing an e-meter accuracy much better than the M-CRPS accuracy specification. Source: Texas Instruments

Figure 8 E-meter test results at 3.6 kW high line with Vin set to 230 VAC showing an e-meter accuracy much better than the M-CRPS accuracy specification. Source: Texas Instruments

Figure 9 E-meter test results at DC input showing an e-meter accuracy much better than the M-CRPS accuracy specification. Source: Texas Instruments

Low-cost, high-accuracy e-meter

This article described a low-cost and high-accuracy e-meter solution: an isolated delta-sigma modulator measures the input current which is then sent to an MCU for both e-metering and PFC current-loop control. The proposed solution achieves excellent measurement accuracy with only 1-point calibration. Compared to a traditional e-meter solution, it not only saves cost, but also simplifies PCB layout and expedites the design process.

Bosheng Sun is a Systems Engineer in Texas Instruments, focus on developing digital controlled high performance AC/DC solutions for server and industry application. Bosheng received the M.S. degree from Cleveland State University, Ohio, USA in 2003, the B.S degree from Tsinghua University, Beijing, China in 1995, both in Electrical Engineering. He holds 5 US patents.

 

Related Content

• Delta-sigma ADCs in a nutshell
• ADC noise article and all about delta-sigma converters
• Power Tips #124: How to improve the power factor of a PFC
• Power Tips #116: How to reduce THD of a PFC
• Power Tips #131: Planar transformer size and efficiency optimization algorithm for a 1 kW high-density LLC power module
• Power Tips #130: Migrating from a barrel jack to USB Type-C PD

 References

1. S. Department of Energy, (2017, Feb. 7). Data Center Metering and Resource Guide. [Online]. Available: https://datacenters.lbl.gov/sites/default/files/DataCenterMeteringandResourceGuide_02072017.pdf.
2. Modular Hardware System – Common Redundant Power Supply (M-CRPS) Base Specification. Open Compute Project, Version 1.00, Release Candidate 4, Nov. 1, 2022.
3. Analog Devices. 78M6610+PSU Hardware Design Guidelines. (2012). [Online]. Available: https://www.analog.com/media/en/technical-documentation/user-guides/78m6610psu-hardware-design-guidelines.pdf.
4. Bonnie Baker, “How Delta-Sigma ADCs Work.” Texas Instruments Analog Application Journal, August 2011.
5. Texas Instruments. TMCS320F28003x Real-Time Microcontrollers Technical Reference Manual. (2022). [Online]. Available: https://www.ti.com/product/TMS320F280039C.

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🎥 КПІ ім. Ігоря Сікорського – «Мелексіс-Україна»: співпраця поглиблюється kpi пн, 08/26/2024 - 15:19

Samsung has started providing more details about its backside power delivery network (BSPDN) roadmap, stating that its 2-nm process node will be optimized for this new technology when it enters mass production in 2027.

While trade media has been regularly reporting on the availability of BSPDN technology from large fabs—Intel, Samsung, and TSMC—according to TrendForce, it’s the first time a senior Samsung Foundry executive has provided details about the company’s BSPDN roadmap.

Source: Samsung

In a report published in Korea Economic Daily, Lee Sung-Jae, VP of PDK development team at Samsung, said that BSPDN will reduce the size of Samsung’s 2 nm chip by 17% compared to the traditional front-end power delivery. He added that BSPDN will allow Samsung to improve 2-nm chip’s performance and power efficiency by 8% and 15%, respectively.

According to an Intel study, power lines typically occupy around 20% of the space on the chip surface in a traditional front-end power delivery. The BSPDN technology puts the power rails on the back of the wafer to remove bottlenecks between power and signal lines, making the manufacturing of smaller chips easier.

Moreover, backside power delivery facilitates thicker, lower-resistance wires, thus delivering more power to enable higher performance and save power. According to a Samsung paper presented at the VLSI Symposium in 2023, BSPDN also facilitates a 9.2% reduction in wiring length.

In that paper, Samsung also claimed to have implemented backside power delivery in two Arm-based test chips, achieving a 10% and 19% die area reduction. The company didn’t disclose the process node for these test chips.

It’s worth noting that after being a pioneer in deploying gate-all-around (GAA) manufacturing technology in its 3-nm chips, Samsung is now following Intel and TSMC in implementing the BSPDN technique.

Intel, which calls its backside power delivery technology PowerVia, is expected to produce chips based on this technique this year. Next, TSMC is planning to integrate its backside power delivery technology—Super PowerRail architecture—in its 1.6 chips to be mass-produced in 2026.

Related Content

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• Intel 3 Represents an Intel Foundry Milestone
• Intel, Samsung, TSMC ‘Getting Serious’ About CFET
• TSMC adds two variants to 2-nm node, will Intel catch up?
• TSMC’s A16 Process Moves Goalposts in Tech-Leadership Game

The post Samsung’s backside power delivery network (BSPDN) roadmap appeared first on EDN.

For its fiscal full-year 2024 (ended 29 June), Lumentum Holdings Inc of San Jose, CA, USA (which designs and makes optical and photonic products for optical networks and lasers for industrial and consumer markets) has reported revenue of $1359.2m, down 23.1% on $1767m in fiscal 2023...

Author: STMicroelectronics

ST is launching the STM32WB05 and the STM32WB06/07, thus extending the STM32WB0 series inaugurated late last year with the introduction of the STM32WB09. The new family fully realizes the transition from BlueNRG-LP(S) devices to enable developers to take advantage of the STM32Cube ecosystem. Moreover, we are announcing the STM32WB05xN, our new network processor for Bluetooth LE applications, enabling a significantly lower bill of material and a more straightforward implementation for integrators wishing to use a simple radio link with a serial interface. Therefore, today’s announcement is highly symbolic as we promised to deliver the STM32WB0 series by about the first half of 2024 and are glad to meet this target.

STM32WB09, STM32WB06/07, STM32WB05, and STM32WB05xN: What is happening? The BlueNRG-LP(S) DNA The STM32WB0x

All the STM32WB0s share a lot of their DNA with the BlueNRG-LP(S). They use the same Cortex-M0+ and a similar Bluetooth stack. Aligning with the STM32Cube Ecosystem meant modifying some APIs and processes. However, migrating from the BlueNRG stack to the STM32WB0 remains straightforward. Integrators creating cost-effective and energy-sensitive solutions will thus inherit the BlueNRG modular software stack geared toward memory footprint optimizations and performance. The stack also stands out thanks to its interoperability and maturity. Similarly, developers enjoy the same advertising extensions, 2 Mbps high-speed, and 1.3 km (0.8 miles) unobstructed long-range and new ones, like Periodic Advertising with Response (PAwR), while reusing some of the BlueNRG-LPS PCB reference designs.

The electronic shelf labels demo on an STM32WB09

In essence, PAwR, is a bidirectional version of periodic advertising, a technology that enables a Bluetooth device to send an advertisement at deterministic intervals. Consequently, a system can stay in deep sleep and know exactly when to wake up to receive an advertisement, thus significantly extending battery life. Periodic advertisement with response builds on this technology by enabling the device receiving the advertisement to respond to the broadcaster. This is crucial for one-to-many topologies like electronic shelf labels (ESL) that need to send information to many systems simultaneously and have the receiving devices acknowledge that they received the message, for instance.

In fact, we will soon share the ESL demo we showcased at the last Embedded World. It uses PAwR on an STM32WB09 to show what an electronic label can do. The application is available on our STM32 Hotspot Github page for download to ensure any developers can reproduce it in their lab or learn from our implementation.

STM32WB05

When digging into the new portfolio, we see that the STM32WB05 is a direct descendant of the BlueNRG-LPS and is certified Bluetooth LE 5.4. Hence, as long it has the necessary hardware elements, it can perform angle of arrival (AoA) or departure (AoD) calculations for position tracking. Both are a favorite in applications like asset tracking, which benefits from the ability to locate items in a very cost-effective and power-efficient manner. AoA and AoD are also popular in large infrastructures, like airports or stadiums, where companies must track assets and the people they host. Like the BlueNRG-LPS, the STM32WB05 comes with 192 KB of flash and 24 KB of RAM.

STM32WB06/07

The STM32WB06/07 takes its DNA from the BlueNRG-LP. As such, just like all the STM32WB0s, it features functionalities like advertising extensions, 1.3 km (0.8 miles) unobstructed long-range, and a high-speed connection while providing 256 KB of flash and 64 KB of RAM. As the BlueNRG-LP(S), it also stands out thanks to its low power consumption (4.3 mA peak current in transmission at 0 dBm) and its ability to support an RX sensitivity of -104 dBm at 125 kbps. It doesn’t offer AoA and AoD because it targets applications that require more memory than the STM32WB05 but don’t perform asset tracking or people monitoring. It thus represents a compromise for teams looking to optimize their bill of materials.

STM32WB09

Integrators looking for more flash and AoA/AoD capabilities will gravitate toward the STM32WB09. Architecturally, the device is a BlueNRG-LPS with 64 KB of RAM instead of 24 KB to allow for more complex applications. It also has an updated radio that supports all Bluetooth LE 5.4 hardware features, like PAwR, and Isochronous Channels, which the other STM32WB0s don’t support. Very simply, Isochronous Channels is a new PHY layer that enables more complex data streams by ensuring the transmission of time-sensitive and synchronized information. In practice, it can carry a segregated audio stream beside the traditional channel, to ensure less current spike in sensitive devices like hearing aids.

The choice to release the STM32WB09 before the others stemmed from a desire to reach partners that are content with the processing capabilities and energy efficiency of the BlueNRG-LP(S) but need the memory afforded by some of the dual-core STM32WBs. For instance, the typical current draw of the device in shutdown mode is only 800 nA or almost half that of an STM32WB55.

STM32WB05xN

The STM32WB05xN takes the value proposition of the STM32WB0 series one step further by offering a network co-processor instead of an application processor. It still features the same +8 dBm output power or a sleep current consumption of 800 nA, but it is much more cost-effective and straightforward to implement. Developers just need a serial interface with the host MCU and send commands over the serial interface to control its Bluetooth radio. Obviously, engineers who need to run an application on their Bluetooth device will choose the other wireless MCUs in our portfolio.

However, those wishing for a drop-in solution for their BLE stack, now have an option that supports the STM32Cube Ecosystem. A common example is a company which already uses a Zephyr stack, although it will work with other software as well. By offering a secondary library that interfaces with the host controller interface instead of the host stack itself, ST ensures that the STM32WB05xN will work in existing projects and be vastly simpler to implement.

To make the adoption of the STM32WB05xN even more accessible, we are releasing the X-NUCLEO-WB05KN1 development board and making the X-CUBE-WB05N package available for download. Put simply, any developer, regardless of expertise, can grab an STM32U5 evaluation kit and compile our example code to run a proof-of-concept showcasing the STM32WB05xN. Developers can then send commands to show the network co-processor in action.

The STM32Cube ecosystem promised land

The initiative behind the STM32WB0 series partly stems from customers requesting to use the STM32Cube ecosystem with their BlueNRG devices. Hence, all STM32WB0s will enjoy the support of tools like STM32CubeMX and STM32CubeIDE that help with the initialization process, project generation, and code development. We are also working on updating STM32CubeProgrammer to debug and flash the device and STM32CubeMonitor-RF to test and optimize RF performances. Consequently, in time, moving from an STM32WBx to an STM32WB0, or vice versa, will be as simple as changing settings in STM32CubeMX, configuring a different pin-out, and adapting to a few different APIs. We’ve also started working on migration guides. The STM32 community is thus gaining in portability and flexibility.

Over time, ST will also bring some features and application demos from the BlueNRG Ecosystem to the STM32Cube Ecosystem. Customers have shared that some of those tools have helped them optimize their workflow, and we want to ensure that the transition doesn’t rob them of the solutions they’ve been relying on. Put simply, we are creating a unified portfolio to ensure developers can move up and down the price-per-performance ladder more fluidly, making this announcement a pivotal moment for our community.

Why is this happening? The success of the STM32WB

The announcement of the first STM32WB in 2018 was so significant that it disrupted high-end Bluetooth applications. For the first time, the radio and the Cortex-M0+ core driving the wireless stack sat right next to a Cortex-M4, thus allowing developers to create vastly more powerful applications without blowing up their bill of materials. For instance, the Jammy E guitar-shaped MIDI controller wouldn’t have been possible without the STM32WB running the Bluetooth MIDI profile. In fact, the idea of an all-in-one solution became so appealing that we released the STM32WB5MMG soon after. The module houses an STM32WB55, the antenna, baluns, and crystals, further facilitating the creation of robust Bluetooth systems.

Making cost-effective Bluetooth applications accessible to all

In early 2023, we released the STM32WBA, the first wireless Cortex-M33, thus showing our desire to provide powerful and secure systems since the STM32WBA opened the door to a SESIP Level 3 certification. However, teams that didn’t need all this computational power significantly favored BlueNRG. Today, ST updates its portfolio to release devices that can significantly lower a bill of materials without compromising features such as the +8 dBm output power, making them one of the best price-per-feature ratios in the industry. The STM32WB0 series is a testament to the success of the BlueNRGs and the STM32WBs as it harmonizes our portfolio while keeping our extensive price umbrella.

The fact that the STM32WB0s also showcases a Bluetooth LE 5.4-certified radio means that engineers enjoy features like Isochronous Channels. This new PHY layer enables more complex data streams by ensuring the transmission of time-sensitive and synchronized information. However, more than adding to a list of specifications, the Bluetooth LE 5.4 radio is symbolic because it shows that besides being cost-effective, like the BlueNRG-LP(S), the STM32WB0s are also cost-competitive, like the STM32WBs. Hence, more than a rebranding, the STM32WB05xN, STM32WB05, STM32WB06/07, and STM32WB09 represent a new beginning for engineers working on Bluetooth LE applications that want to make their products vastly more accessible.

The post STM32WB0x: Meet all the new wireless STM32WBs that will slash bills of materials everywhere! appeared first on ELE Times.

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Learn how anti-parallel diodes protect Class D amplifiers from the effects of reactive loads and inductive kickback.

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🤩 Дві перемоги київських політехніків у змаганнях з кібербезпеки! kpi нд, 08/25/2024 - 15:18

Using two commercial coils, 2 300nf capacitors and a ZVS driver I made a wirelessly charged rc car Spoiler: my desk is a little messy submitted by /u/jjiscool_264 [link] [comments]

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День Незалежності України kpi сб, 08/24/2024 - 00:00

Menlo Micro will develop a 1 kV/10 kA circuit breaker with enhanced performance for Navy electrical distribution systems.