ELE Times

Author: STMicroelectronics

The STSPIN32G4 integrates a three-phase gate driver, an STM32G431, and a power management system under one package to solve major engineering challenges, thus enabling new applications. While ST continues to offer STSPIN motor drivers, we also realized that engineers still face several conundrums. Designers want to run more powerful applications but must also shrink their PCBs and reduce costs. Similarly, applications demand more efficiency, but improving it by a few decimal percentage points remains a struggle. ST engineers thus launched the STSPIN32G4 because no other integrated motor controller offered such a powerful mainstream MCU and such a flexible power management system.

Let’s take the example of an engineer working on a high-end vacuum cleaner with a high-speed motor. The MCU inside the STSPIN32G4 will stand out, in this instance, because of its computational throughput. A lower-performance CPU core means a lower conversion rate when designing a field-oriented control (FOC) sensorless application. The engineer in the vacuum cleaner example would have to use two or three shunt resistors to compensate for the MCU’s lower performance. On the other hand, the greater computational throughput means a single shunt is sufficient. As a result, using the STSPIN32G4 enables the creation of a powerful application with fewer components.

A team working on a collaborative robot or a guided vehicle would also appreciate the MCU in the STSPIN32G4 for reasons other than the bump in DMIPS. In this instance, engineers must drive two sets of wheels, but traditional motor controllers don’t have enough analog-to-digital converters to handle such a task. As a result, engineers end up using two motor drivers. The STSPIN32G4 is unique because it provides two sets of PWM timers and 12-bit ADCs, among other things. It, therefore, becomes possible to drive two motors with just one integrated device.

While it’s impossible to enumerate all the features in the STSPIN32G4, the reality is that its integrated nature is one of the best ways to solve the space challenge. Motor control applications are increasingly smaller, whether for convenience, costs, or to stand out better. Thanks to its integrated nature, the STSPIN32G4 helps reduce the overall design size by 65% compared to discrete solutions. Practically, it allows engineers to put the control system at the back of the motor and design a much smaller e-bike, vacuum cleaner, or power tool, among other things.

According to our benchmarks, using the new device lowers the overall power consumption by 3% to 5% compared to a system that uses external components. A saving of just a single percent already has a significant impact. ST provided such power efficiency by bringing the typical standby consumption to only 15 µA thanks to a very low-quiescent regulator. Hence, we expect engineers to create significantly more compact designs without needing an external cooling system, thus lowering the BoM.

The motor controller also supports a supply voltage of up to 75 V, compared to only 48 V previously. Additionally, the STSPIN32G4 comes with an over-current protection mechanism and a drain-source voltage (VDS) monitoring system that acts as a redundancy. It monitors the external MOSFETs and turns all gate driver outputs off if it detects an over-voltage condition. As a result, we expect engineers to use the STSPIN32G4 in appliances. Indeed, a white good connected to a grid often suffers from wide voltage variations from the mains. The greater supply voltage range and protection features of the new device will better handle these abnormal conditions.

Engineers sometimes shy away from integrated solutions, fearing they may restrict their optimization capabilities. Hence, ST ensured a high level of customization. For instance, developers can program registers through an I2C interface to use the STSPIN32G4’s VCC buck converter. Moreover, we published an application note showing how to use the buck regulator in a buck-boost configuration by adding a few external components. Finally, engineers can bypass the buck and LDO regulators to rely on only an external Vcc supply.

Teams that designed a highly precise power supply to meet the stringent requirements of their application can, thus, ignore the STSPIN32G4 regulators. In contrast, others can simplify their designs by using its VCC buck converter to power a few external components, like a memory module. Similarly, developers can choose to enable or disable the standby mode. Such a feature is vital for products like power tools. When users pick a drill after months or even years, they must use it immediately. In such a case, engineers will want to completely disconnect their system from the battery to maximize its usage.

Engineers also get a lot more flexibility in how they drive a motor. They could use a 6-step driver circuit or a field-oriented control, both with or without a sensor and with one, two, or even three shunts. It gives developers the ability to control how much measurement data they gather. Consequently, it also becomes possible to qualify an STSPIN32G4 and use it in many different applications, which can help a company shorten its time to market and optimize its operations.

ST launched two development boards to enable teams to test and experiment with the STSPIN32G4. The EVSPIN32G4 uses STL110N10F7 power MOSFETs and a heat sink to allow an output current of up to 20 A RMS. As a result, teams can push the new devices to develop more powerful designs. However, ST is also mindful that not every designer will use the STSPIN32G4 in high-powered systems. Hence, we are also launching the EVSPIN32G4NH, a similar development board without passive cooling; NH at the end of the nomenclature stands for “no heat sink”. We also updated the X-CUBE-MCSDK to support the new boards and devices.

More recently, our teams released two reference designs. The EVLSPIN32G4-ACT drives a three-phase brushless motor supporting up to 5 ARMS and can manage a supply input of 48 V for a surprising 250 W total power in a board measuring only 62 mm x 50 mm. Additionally, it can connect to the STWIN.box (STEVAL-STWINBX1) to rapidly create a high-speed data logger. Thanks to our FP-IND-DATALOGMC software pack and Quick Start Guide, engineers have a step-by-step process to connect both boards and run applications that can gather data from the sensors on the STWIN.box and the motor itself. We even offer a GUI to help visualize the information.

The other board is the EVSPIN32G4-DUAL, which combines the STSPIN32G4 and the STDRIVE101, a triple half-bridge gate driver. As a result, the board can drive two three-phase brushless motors for up to 10 ARMS output current and a supply of 74 V thanks to two power stages. Thanks to the operational amplifiers of the STSPIN32G4, it’s possible to have a sensor-less system with a single shunt current sensing or use Hall sensors and encoders with the embedded MCU. Put simply, the reference design shows how to create a powerful dual motor application in a small factor for home appliances, e-mobility, pumps, tools, and more.

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Anritsu Corporation, in collaboration with NTT, will participate in the “OFCnet” state-of-the-art network demonstration environment at the Optical Fiber Communication Conference and Exhibition 2024 (OFC2024) to be held in San Diego, USA, from March 26 to March 28, 2024. We will showcase 400G Testing that supports IOWN Open APN[*1].

The demand for interconnection bandwidth between data centres has greatly increased due to the rapid spread of generative AI and cloud services, as well as advances in DX (Digital Transformation). To realize a Datacenter Exchange (DCX) that connects remotely distributed data centres while featuring ultra-high capacity, ultra-low latency, and ultra-low power consumption, the IOWN Global Forum has proposed the Open All-Photonic Network (Open APN) as a new network infrastructure.

At our exhibition, the IOWN Networking Hub (Booth 912), an interconnected booth utilizing OFCnet, will showcase an example Datacenter Exchange (DCX) based on the IOWN APN in a multi-vendor configuration. 400G optical transceivers compliant with the OpenZR+[*2] MSA will be mounted on data centre switches, being interconnected through an OpenROADM network constructed in an adjacent booth, in accordance with OpenROADM MSA[*3] and OpenLab@ University of Texas at Dallas (UTD). Anritsu will provide two interconnected compact and lightweight handheld measuring instruments, MT1040A, that will simultaneously transmit and receive high-bandwidth 400-Gbps traffic, thereby demonstrating the end-to-end performance of the multi-vendor network. The MT1040A flexibly supports standard protocols such as 400G Ethernet, OpenZR+, OpenROADM, and more. It provides real-time measurements of the physical layer (Layer 1) Pre/Post FEC BER, as well as Ethernet (Layer 2) latency and throughput.

Through this collaboration, Anritsu will contribute to forums such as the IOWN Global Forum, Open ROADM, and OpenZR+, with the realization of a data center exchange (DCX) based on the IOWN Open APN architecture. In addition, we will contribute to the construction of automated systems used for orchestration that integrate higher-level network management.

MT1040A is a B5 size 400G handheld tester with excellent expandability and operability. It is a touch panel-operated field measurement instrument equipped with a 9-inch screen that is small enough to carry with a single hand. It supports a range of interfaces from 10M up to 400G.

MU104014B is the test module and has the following futures to test 400ZR/ZR+

• Powerful hardware for easy handling 400ZR/ZR+ transceivers
• Flexible Settings for All Network Environments
  • Grid, Wavelength, Tx Power setting
  • Coherent monitoring (OSNR, SOP, CD, etc.) via OIF CMIS
  • Media-side FEC monitoring (PreFEC BER) via OIF CMIS
  • 1x 400G, 4x 100G, 2x 100G, 1x 100G client signal
  • Flexible Layer-2 to Layer-4 configuration
• History Function Monitoring Live Network
  • Auto-save all of the results at a minimum of 1 second
  • CSV output for detailed analysis and comparison

*1 Open APN
Abbreviation for Open All-Photonic Network – an open architecture proposed by the IOWN Global Forum (IOWN GF). It features low power consumption, high capacity, and low latency by configuring an entire section with a photonic network.

*2 OpenZR+
A transceiver interface standard is used mainly in data centre interconnect (DCI). It supports data rates of 100G, 200G, 300G, and 400G, and supports large-scale links of over 120 km with OFEC (forward error correction). Facilitates lower-cost connections between data centres than conventional wavelength division multiplexing (WDM) systems.

*3 OpenROADM MSA
Abbreviation for OpenROADM Multi-Source Agreement, the international organization established to promote OpenROADM.
OpenROADM specifies interconnection specifications for optical transmission equipment (ROADM), optical transponders, and detachable optical components, as well as YANG data model specifications, and defines interfaces for realizing interconnection and interoperability between each functional part of an optical transmission network in a multi-vendor environment.

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Nuvoton Technology introduces an endpoint AI platform based on microcontrollers, expanding the AI ecosystem into the microcontroller domain. This solution is based on Nuvoton’s newly designed microcontrollers and microprocessors, including the NuMicro MA35D1, NuMicro M467, and the NuMicro M55M1 series equipped with Arm Ethos-U55 NPU. Nuvoton provides a complete software stack and development tools to facilitate the rapid deployment of advanced machine learning and deep learning models, leveraging advantages such as low power consumption and cost-effectiveness to accelerate the adoption of AI applications, enhancing productivity, and improving human life.

As a leading microcontroller platform provider, Nuvoton not only offers advanced hardware chips but also provides developers with complete software development tools, significantly improving development efficiency. NuEdgeWise is an easy-to-use graphical Python machine learning development tool that provides rich machine learning sample code covering processes such as data collection, labeling, model training, and validation, making the machine learning development process easier.

Nuvoton’s latest microcontroller endpoint AI platform is designed to elevate a wide array of applications, including smart home, security access control, smart city, industrial automation, smart agriculture, interactive toys, fitness equipment, and wearable devices, by infusing embedded system products with advanced AI capabilities.

Endpoint AI microcontroller with Ethos-U55 NPU: NuMicro M55M1

The new NuMicro M55M1 series microcontroller is an innovative Endpoint AI solution that integrates comprehensive microcontroller features, including control, connectivity, security, and advanced machine learning inference capabilities. The M55M1 microcontroller features a 200 MHz Arm Cortex-M55 CPU and a 200 MHz Arm Ethos-U55 NPU, providing machine learning inference capability and supporting CNN and RNN operations. It includes built-in 1.5 MB SRAM and 2 MB flash memory and can expand HYPERRAM or HYPERFLASH via the HYPERBUS interface. To enhance the overall performance of application systems, the M55M1 microcontroller incorporates three unique features to optimize system performance, security, and power consumption. Firstly, it enables continuous operation of image sensors, microphones, and various sensors in a low-power sleep mode, allowing for constant monitoring of predefined events such as personnel presence or significant sound and vibration detection. Secondly, it stores machine learning model data in an area accessible only to the NPU but not to the CPU, to prevent malicious programs from stealing model data and thus protect intellectual property. Lastly, the M55M1 also implements sine and cosine hardware circuits, which are defined within Arm’s custom instructions for easy invocation by software. These unique features of M55M1 empower developers to develop endpoint AI applications that achieve performance, power efficiency, and security.

High-performance edge industrial IoT series: NuMicro MA35D1

The NuMicro MA35D1 series heterogeneous multicore microprocessor is designed to meet the high-end industrial IoT requirements, featuring dual-core Arm Cortex-A35 64-bit processors with a maximum frequency of 800 MHz and a 180 MHz Arm Cortex-M4F core. Combined with a USB camera and CNN models, MA35D1 can perform endpoint AI tasks such as object detection.

The Ethernet/Crypto MCU with excellent security and connectivity: NuMicro M467

The M467 series features a 200 MHz Arm Cortex-M4F core with a built-in DSP instruction set and a single-precision floating-point unit (FPU). With the tinyML software technology, the M467 can perform various endpoint AI applications, such as gesture recognition, equipment anomaly detection, and keyword spotting. The M467 series microcontrollers have also participated in the MLPerf Tiny Benchmark test, demonstrating excellent inference speed across four endpoint AI tasks.

Complete machine learning development tools – Accelerating the implementation of AI applications

In addition to innovative microcontroller specifications, Nuvoton also supports a complete machine-learning software development stack for developers to develop machine-learning applications. The software stack includes NuEdgeWise Python development environment and machine learning sample code, Tensorflow machine learning model training framework, Vela neural network compiler dedicated to Ethos NPU, Tensorflow Lite for microcontroller inference framework, Arm CMSIS-NN machine learning library, and Ethos-U55 NPU driver.

Nuvoton’s endpoint AI microcontrollers enhance products across a diverse range of applications – including smart home, security access control, smart city, industrial automation, smart agriculture, interactive toys, fitness equipment, and wearable devices – by seamlessly integrating AI capabilities to deliver added value.

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TrustFLEX devices along with the Trust Platform Design Suite tool will simplify the enablement of the root of trust from concept to production in a wide range of applications

As technology and cybersecurity standards continue to evolve, Microchip Technology is helping make embedded security solutions more accessible with its CEC1736 TrustFLEX devices. The CEC1736 Trust Shield family is a microcontroller-based platform root of trust solution enabling cyber resiliency for data centres, telecom, networking, embedded computing and industrial applications. Now, as part of the TrustFLEX platform, the devices are partially configured and provisioned with Microchip-signed Soteria-G3 firmware to reduce the development time needed to integrate the platform root of trust. These devices also help fast-track the provisioning of required cryptographic assets and signed firmware images, simplifying the process of secure manufacturing as required by the National Institute of Standards and Technology (NIST) and Open Compute Project (OCP) standards.

Specifically designed to meet NIST 800-193 platform resiliency guidelines, as well as OCP requirements, CEC1736 TrustFLEX devices can support security features necessary to enable hardware root of trust across various markets. The Trust Platform Design Suite tool will allow customers to personalize platform-specific configuration settings, including unique credentials, to support any application, host processor or SoC that boots out of an external SPI Flash device to extend the root of trust in the system.

“Microchip has led our industry in streamlining secure provisioning from design to deployment for devices and platforms of all scales. This rich range of solutions now include OCP-compliant root of trust devices,” said Nuri Dagdeviren, corporate vice president of Microchip’s secure computing group. “With the pre-configured CEC1736 TrustFLEX family, we are helping lower the barrier of entry and making it easier for customers to implement platform root of trust and enable faster prototyping and speed to market.”

Modern firmware security features enabled on the CEC1736 TrustFLEX—like SPI bus monitoring, secure boot, component attestation and lifecycle management—can keep both the pre-boot and real-time (time of check and time of use) environments shielded from both in-person and remote threats.

The highly configurable, mixed-signal, advanced I/O CEC1736 controllers integrate a 32-bit 96 MHz Arm Cortex-M4 processor core with closely coupled memory to offer optimal code execution and data access.

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Vertiv brings its high-density power and cooling infrastructure expertise to the NVIDIA Partner Network to better support adoption of accelerated computing and AI workloads

Vertiv, a global leader in critical infrastructure and continuity solutions, is now a Solution Advisor:Consultant partner in the NVIDIA Partner Network (NPN), providing wider access to Vertiv’s experience and a full portfolio of power and cooling solutions.

NPN is a global program for technology partners who offer solutions built on or powered by NVIDIA technologies. Among leading software vendors, cloud service providers, solution providers, and system integrators, Vertiv joins the network to offer its expertise in addressing the unique infrastructure challenges presented by accelerated computing. NPN provides access to a range of benefits, including technical support, training, and collaboration opportunities, helping partners deliver innovative solutions to their customers.

“Vertiv has collaborated with NVIDIA in research, development, and engineering for multiple years, designing innovative products and solutions that support the deployment of NVIDIA technologies globally,” said Giordano (Gio) Albertazzi, CEO at Vertiv. “We have combined our leadership in power and cooling solutions with NVIDIA’s cutting-edge platforms to help meet the demands of the most compute-intensive applications and support the deployment of AI infrastructure across the globe. Now, we are collaborating to build state-of-the-art liquid cooling solutions for next-gen NVIDIA accelerated data centers powered by GB200 NVL72 systems.”

Vertiv’s high-density power and cooling solutions are designed to support the next generation of GPUs running the most compute-intensive AI workloads safely, at optimal performance and with high availability. Vertiv’s portfolio of liquid cooling technologies, such as Vertiv Liebert XDU coolant distribution units, Vertiv Liebert XDM split indoor chillers, and Vertiv Liebert DCD rear-door heat exchangers, cover a wide range of application requirements. The Vertiv Geist rack power distribution units (PDUs) family has been extended to accommodate higher power draw within the rack, minimizing footprint while maintaining high efficiency.

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Infineon Technologies AG introduces the SSO10T TSC package with OptiMOS MOSFET technology. With its direct top-side cooling concept, the package offers excellent thermal performance. This eliminates heat transfer into or through the PCB of the automotive electronic control unit. The package enables a simple and compact double-sided PCB design and minimizes cooling requirements and system costs for future automotive power designs. The SSO10T TSC is therefore well suited for applications such as electric power steering (EPS), EMB, power distribution, brushless DC drives (BLDC), safety switches, reverse battery, and DCDC converters.

The SSO10T TSC has a 5 x 7 mm² footprint and is based on the established industry standard SSO8, a 5 x 6 mm² robust housing. However, due to its top-side cooling, the SSO10 TSC offers more than 20 percent and up to 50 percent higher performance than the standard SSO8 – depending on the thermal interface (TIM) material used and the TIM thickness. The SSO10T TSC package is JEDEC listed for open market and provides wide second source compatibility. As a result, the package can be introduced quickly and easily as the future standard for top-side cooling.

The SSO10T package enables a very compact PCB design and reduces the system footprint. It also lowers the cost of the cooling design by eliminating vias, resulting in lower overall system costs and design effort. At the same time, the housing offers high power density and efficiency, thus supporting the development of future-proof and sustainable vehicles.

The first 40 V automotive MOSFET products with SSO10T are now available: IAUCN04S6N007T, IAUCN04S6N009T, IAUCN04S6N013T, IAUCN04S6N017T. Further information is available at https://www.infineon.com/cms/en/product/promopages/SSO10T/.

Embedded World will take place from 9 to 11 April, 2024 in Nuremberg, Germany. Infineon will present its products and solutions for decarbonization and digitalization in hall 4A, booth #138 and virtually. Company representatives will also hold several TechTalks as well as presentations at the accompanying Embedded World Conference, followed by discussions with the speakers. If you are interested in interviewing an expert at the show, please email media.relations@infineon.com. Industry analysts interested in a briefing can email MarketResearch.Relations@infineon.com. Information about the Embedded World show highlights is available at www.infineon.com/embeddedworld.

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Infineon Technologies AG is expanding its XDP digital power protection controller product family with the XDP700-002, the industry’s first -48 V wide input voltage digital hot-swap controller with a programmable safe operating area (SOA) control designed for telecom infrastructure. It boasts superior current reporting accuracy of less than ±0.7 percent, enhancing the system’s fault detection and reporting accuracy. Furthermore, the product features boost-mode control technology for safer turn-on of field-effect transistors (FETs) in systems with non-optimal SOA. This new member of the XDP product family is tailored for a spectrum of telecom applications, including remote radio head power, base station power distribution, active and passive antenna systems, 5G small cell power, and telecom UPS systems.

The XDP700-002 employs a three-block architecture that combines high-precision telemetry for monitoring and fault detection, digital SOA control optimized for power MOSFETs, and integrated gate drivers for n-channel power MOSFETs. The XDP700-002 operates within an expansive -6.5 to -80 V input voltage range and can withstand transients up to -100 V for 500 ms, delivering current and voltage telemetry with a remarkable 0.7 percent and 0.5 percent accuracy respectively. It features precise PMBus compliant active monitoring for enhanced system reliability. A programmable gate shutdown during severe overcurrent (SOC) ensures robust shutdown operation within just 1 µs. The advanced closed-loop SOA control ensures higher MOSFET reliability, and the fully digital operating mode minimizes the need for external components offering a compact solution making it an optimal fit for space-constrained designes in a cost-effective way.

With options for external FETs selection and a one-time programmable (OTP) option, the XDP700-002 offers flexibility for programming faults and warnings detection as well as de-glitch levels for various usage models. Its analog-assisted digital mode offers backward compatibility with legacy analog hotswap controllers. By offering robust functionality and adaptability, the XDP700-002 exemplifies Infineon’s continuous commitment to innovation and system reliability in telecom infrastructure.

The controller perfectly matches Infineon’s OptiMOS and OptiMOS Linear FET portfolio for reliable and powerful system performance.

Availability

The XDP700-002 hot-swap and system monitoring controller IC is available in a VQFN-29 6×6 package and can be ordered now. More information is available at www.infineon.com/xdp700-002.

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Decarbonization and digitalization are the two central challenges of our time, but they rely on new and advanced technologies. At embedded world 2024 in Nuremberg, Infineon Technologies AG (FSE: IFX / OTCQX: IFNNY) will demonstrate how its innovative semiconductor solutions support and drive these advancements. Microcontrollers in particular play an important role as they are at the heart of a wide range of applications, from electric vehicles and renewable energy systems to smart homes and industrial automation. For this reason, Infineon showcases high-quality microcontrollers designed with the latest technologies and innovative features such as enhanced security and high accuracy, offering excellent performance with low power consumption.

Under the motto “Driving decarbonization and digitalization. Together.” Infineon invites its customers to embedded world 2024 to demonstrate innovative semiconductor solutions that contribute to a more sustainable future. In addition, customers can register for Infineon’s digital platform – the perfect place to dive deeper into the various technologies presented at EW during and after the event. The Infineon booth in Hall 4A (booth #138) will present highlights from the consumer and IoT, automotive, and industrial sectors.

Consumer and IoT: With its broad portfolio of IoT solutions, Infineon supports manufacturers in providing consumers with more comfortable, secure, and energy-efficient homes and buildings by utilizing the company’s latest microcontroller, sensor, security, and connectivity solutions. In this area, visitors will discover:

• Robotics development platform: The platform includes hardware and software solutions for key robotics subsystems such as main and motor controllers, battery management systems and sensors, which enable developers to get robots up and running faster and easier.
• Better sleep quality with XENSIV: Leveraging Infineon’s 60 GHz radar, PSoC and Wi-Fi® technologies, the XENSIV Sleep Quality Service is designed to measure and optimize the user’s sleep based on their individual needs.

Simplifying air quality monitoring and optimizing energy efficiency with the new XENSIV PAS CO2 5V kits: The XENSIV PAS CO2 5V Sensor2Go kit provides

• developers with seamless CO2 sensor integration and a plug-and-play solution. The effortless connection to the graphical user interface (GUI) allows users to accurately analyze CO2 data in real time from multiple kits.
• Land a rocket on the Edge: This fun game demonstrates the PSoC Edge device’s ability to integrate multiple functions such as high-performance computing, graphics processing and display, acoustic activity recognition, speech recognition, sensing and gesture recognition with ML in the same chip and application.

Automotive: As a leading supplier of automotive solutions, Infineon focuses on making smart cars a reality with proven microcontroller, connectivity, security, and sensor technologies for the industry. The company’s microelectronics play a critical role in delivering zero-emission vehicles that are smart, connected, safe and reliable.

• AI-based siren recognition: Infineon showcases an autonomous car that recognizes emergency vehicles by their characteristic siren sound and reacts accordingly without violating traffic regulations. This system solution combines MEMS microphones, a microcontroller unit (MCU), and AI software from Imagimob.
• Next generation eMobility: Infineon enables next-generation vehicles with the AURIX TC4x microcontroller family and the AURIX Development Studio (ADS). With these solutions, manufacturers can easily implement modern ADAS, advanced automotive E/E architectures and affordable Artificial Intelligence (AI) applications.
• TRAVEO T2G Cluster 6M Lite Kit: With the TRAVEO T2G CYT4DL device prototypes can be implemented in the shortest possible time and at minimal cost.

Industrial: Infineon supports smart factories and provides manufacturers with a broad sensor portfolio and an extensive partner network. In this way, the company enables reliable data acquisition and processing that enables condition monitoring and predictive maintenance in various Industry 4.0 use cases:

• Predictive maintenance: In this sector, Infineon will present a portable HVAC system equipped with the XENSIV Predictive Maintenance Evaluation Kit. The demo includes a TinyML model and a cloud-based AI service solution generator.

At the Infineon booth, the company has set up a comprehensive series of TechTalks. The seven presentations will cover a wide range of different topics, from software to products, and from consumers to industry. Full details of all Infineon conference presentations, technical workshops and TechTalks can be found here.

• “Ambient sensing: Infineon radar solutions: How Infineon’s tools and enablement can accelerate your time to market” at 10:00 a.m. presented by Firas Labidi
• “Embedded AI and safety – Embedded AI will enable the innovations for next generation of electric vehicle and autonomous driving” at 11:00 a.m. presented by Jürgen Schäfer
• “Accelerate your product development with system reference designs” at 12:00 p.m. presented by Jaya Bindra
• “Addressing the next generation of Edge AI devices with PSoC Edge” at 1:00 p.m. presented by Rebecca Phillips
• “TRAVEO T2G MCUs for automotive HD front lighting” at 2:00 p.m. presented by Maniacherry Devassy Anu
• “Unlocking the power of Edge AI with Imagimob and ModusToolbox” at 3:00 p.m. presented by Alexander Samuelsson
• “Infineon’s solutions for robotics” at 4:00 p.m. presented by Nenad Belancic

Embedded World will take place from 9 to 11 April, 2024 in Nuremberg, Germany. Infineon will present its products and solutions for decarbonization and digitalization in hall 4A, booth #138 and virtually. Company representatives will also hold several TechTalks as well as presentations at the accompanying Embedded World Conference, followed by discussions with the speakers. If you are interested in interviewing an expert at the show, please email media.relations@infineon.com. Industry analysts interested in a briefing can email MarketResearch.Relations@infineon.com. Information about the Embedded World show highlights is available at www.infineon.com/embedded-world.

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Embedded systems are the foundation of today’s electronic devices, spanning sectors as diverse as consumer electronics, telecommunications, industrial, medical, automotive and aerospace applications. Ensuring seamless operation is critical, which means that engineers encounter complex challenges as they design increasingly compact embedded systems and align them with today’s requirements for efficiency, safety, reliability and interoperability. Rohde & Schwarz offers comprehensive test and measurement solutions to meet these challenges and will present its highlights at the embedded world Exhibition & Conference 2024 in Nuremberg, Germany.

Rohde & Schwarz is showcasing its state-of-the-art test and measurement solutions tailored to the embedded industry at the embedded world Exhibition & Conference. At the company’s booth 4-218 in hall 4 of the Nuremberg Exhibition Center, visitors will have the opportunity to gain insights into embedded design testing, including testing of digital designs and interfaces, power electronics, electromagnetic compatibility, wireless connectivity and in-vehicle networks.

One-box test solution supports new Bluetooth® Low Energy test features

One highlight will be the R&S CMW wideband radio communication test platform (R&S CMW500, R&S CMW270) covering the new Low Energy (LE) feature Bluetooth Channel Sounding (CS). CS extends the positioning capabilities of low energy devices based on high accuracy distance measurements. The R&S CMW platform offers fully featured RFPHY test capabilities using the phase-based ranging (PBR) principle. High-performance internal signal generators and analyzers allow repeatable high-quality device verification.

The R&S CMW platform also supports Bluetooth® Low Energy over-the-air (OTA) receiver and transmitter measurements, as defined in the upcoming Unified Test Protocol (UTP) test mode. The OTA test capability allows easy RFPHY testing of devices that do not have a physical test connector. The new Bluetooth core specification defining the CS and UTP modes is expected to be released later this year.

The R&S CMW platform is a comprehensive, fully automated test solution for verifying the physical layer functions Bluetooth Low Energy and Bluetooth Classic with the addition of LE audio measurements. Visitors can experience the new LE test modes live at the Rohde & Schwarz booth.

Another highlight is the MXO 5 oscilloscope from Rohde & Schwarz, the world’s first eight-channel oscilloscope that can detect 4.5 million acquisitions and a total of 18 million waveforms per second across multiple channels. The MXO 5 shows more of a signal’s activity than any other oscilloscope in both the time and frequency domains. With a simultaneous acquisition memory of 500 Mpoints across all eight channels, it offers twice the standard memory of competitive models. As the first eight-channel oscilloscope with digital triggering, it sets a new standard for signal analysis. It is also the first oscilloscope to offer 45 000 FFTs per second. Visitors to the Rohde & Schwarz booth will have the opportunity to see this innovative instrument in action, testing system-on-chip (SoC) power designs with multiphase buck converters.

High-speed digital interfaces play a pivotal role in electronic designs. Increasing data rates and integration densities are a challenge for designs at the IC, board and system levels. Visitors to the show can learn about powerful tools for system verification and debug, as well as compliance testing for signal integrity in interfaces, PCBs and interconnects, directly from experts in the field. Demo setups at the Rohde & Schwarz booth include USB 3.2 signal integrity debugging with receiver equalization emulation and advanced eye diagram analysis with the R&S RTP164B oscilloscope, as well as protocol decoding with the MXO 4 oscilloscope.

In addition, visitors will find a solution for fully automated (pre-)compliance testing and verification of high-speed cables (IEEE 802.3bj/by/cd/ck and PCIe 5.0/6.0) using the R&S ZNrun automation test suite, an R&S ZNA or R&S ZNB vector network analyzer and the R&S OSP320 open switch and control platform. The multiport physical layer analysis of a PCIe 6.0 compliant cable is performed by accurately de-embedding the signal with the R&S ZNB43 vector signal analyzer.

The new Wi-Fi 7 standard supports up to 16×16 MIMO with 320 MHz wide channels and 4096 QAM modulation, providing extremely fast and stable connections. When developing Wi-Fi 7 devices, the RF TX and RX characteristics must be measured under real-world conditions in signaling mode. The R&S CMX500 multi-technology multi-channel signaling tester is now available with integrated Wi-Fi 7 test functions. Test environments with multiple RF chains are particularly important in Wi-Fi 7, where multilink operation (MLO) is a key feature. The tester’s flexibility, support for multiple radio technologies and embedded IP test capabilities make it a versatile solution for a wide range of Wi-Fi 7-specific tests, such as 2×2 MIMO, 6 GHz band with out-of-band discovery, coexistence and E2E test capabilities.

Accurate ranging, low power consumption, high security and reliability – these are the features of ultra-wideband (UWB) technology features that make it suitable for many secure ranging applications, especially as a digital key. At embedded world 2024, Rohde & Schwarz will present the R&S CMP200 radio communication tester with integrated UWB test capabilities for solving UWB test challenges in mass production as well as in R&D.

Because all electronic controllers are susceptible to conducted or radiated electromagnetic emissions, many finished electronic products fail their first EMC compliance test. Every day spent debugging, isolating and correcting the EMI problem increases the time to market. As a leader in EMC testing, Rohde & Schwarz will present solutions that integrate EMI testing into the product design process. Visitors can learn how to use the powerful R&S RTO6 oscilloscope for EMI debugging or the R&S FPL1000 signal and spectrum analyzer for EMC pre-compliance testing.

Rohde & Schwarz offers the R&S ESW EMI test receiver for final EMC compliance tests. With the new R&S ESW-B1000 wideband option, the R&S ESW can expand its FFT bandwidth to up to 970 MHz to measure the complete CISPR frequency Bands C and D in a single operation. The wide bandwidth helps to intercept sporadic interference and enables higher reliability and repeatability in commercial and MIL-STD tests. The extremely high measurement speed opens up new possibilities for compliance testing as well as for emissions analysis and debugging. The R&S EPL1000 EMI test receiver offers fast, accurate and reliable EMI compliance measurements up to 30 MHz at a competitive price in the full CISPR 16-1-1 compliance receiver class for both device developers and conformance test houses.

Battery life is usually one of the most important specifications for battery-powered devices. Visitors can explore the R&S NGM200 high-precision DC power supply in a battery testing and simulation setup. The application software facilitates battery discharging, as well as the repeated discharge and recharge of rechargeable batteries. Continuous monitoring and recording of open circuit voltage and voltage under load are integral features. The DC power supply can be remotely controlled from a PC with the application software installed.

Another test setup allows visitors to use various smartwatch apps to observe how GPS affects power consumption in real time. A new analysis tool helps developers analyze power consumption data collected with the R&S NGU power supply. These source measure units can be used for battery modeling and simulation. They measure the current consumption of battery-powered devices in all phases and during the transition from sleep to active mode, which is important for design engineers.

Rohde & Schwarz will present its R&S FSPN high-speed phase noise analyzer up to 50 GHz in a demonstration test setup with a VCO device under test. Equipped with two low phase noise synthesizers and a real-time cross-correlation engine for increased measurement sensitivity, it is ideal for characterizing sensitive synthesizers and oscillators in R&D. In addition, Rohde & Schwarz will showcase its R&S LCX200 LCR meters with customized impedance measurement functions that are suitable for all discrete passive components up to 10 MHz. Using the R&S LCX sweep software tool, they can even per­form sweep measurements displaying numerous charts. The MFIA impedance analyzer from Zurich Instruments AG (a subsidiary since 2021) will also be on display. The MFIA provides impedance analysis for both low and high impedance components and has a measurement mode for quickly tracking impedance changes in devices under test.

These and other test solutions can be found at the Rohde & Schwarz booth 4-218 in hall 4 at the embedded world Exhibition & Conference from April 9 to 11, 2024 in Nuremberg, Germany. For more information visit: www.rohde-schwarz.com/embedded-world

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Low-Power, Streamlined Devices Target Energy Management, Home Appliances, Building Automation and Medical Applications

• Core: 48MHz Arm Cortex-M23
• Memory: 512KB integrated, dual-bank Flash memory and 48KB SRAM
• Analog Peripherals: 24-bit Sigma Delta ADC with digital filter, 12-bit ADC, and temperature sensor.
• Packages: 100-, 80- and 64-pin LFQFP

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Cadence Reality Digital Twin Platform integrated with NVIDIA Omniverse and Orion molecular design platform accelerated with NVIDIA BioNeMo will transform the future of design

Cadence Design Systems, Inc. today announced an expansion of its multi-year collaboration with NVIDIA across EDA, system design and analysis, digital biology and AI with the unveiling of two transformative solutions to reinvent design using accelerated computing and generative AI.

First, the new Cadence Reality Digital Twin Platform is the industry’s pioneering comprehensive digital twin solution to facilitate speed-of-light acceleration of the design, simulation and optimization of data centers across multiple industries. The platform virtualizes the entire data center and uses AI, high-performance computing (HPC) and physics-based simulation to significantly improve data center energy efficiency by up to 30%.

The Cadence Reality platform’s integration with NVIDIA Omniverse brings OpenUSD data interoperability and physically based rendering to the digital twin solution—helping accelerate data center design and simulation workflows by 30X.

Second, the companies are collaborating on generative AI to dramatically accelerate approaches to drug discovery. Cadence’s cloud-native molecular design platform Orion® will now be supercharged with NVIDIA’s generative AI tool, NVIDIA BioNeMo , and NVIDIA microservices for drug discovery to broaden therapeutic design capabilities and shorten time to trusted results. The collaboration brings together decades of expertise in scientific software and accelerated computing from the two companies to deliver transformative approaches to drug discovery. Accelerated by on-demand GPU access at an unprecedented scale, pharmaceutical companies can quickly and reliably generate and assess design hypotheses across a range of therapeutic modalities, including biologics, peptides and small molecules.

“The broadening collaboration between NVIDIA and Cadence is having a transformative impact on everything from data center design to drug discovery,” said Dr. Anirudh Devgan, president and CEO, Cadence. “As AI rapidly becomes a keystone technology driving data center and data center workload expansion, the Cadence Reality Digital Twin Platform integration with NVIDIA Omniverse will optimize every aspect of data center design and operations, use energy more efficiently, and pave the way for a more efficient, resilient, and environmentally friendly future. Our groundbreaking efforts with NVIDIA to integrate BioNeMo with our industry-leading Orion molecular design tools hold great promise for unlocking new ideas and transforming the future of therapeutics and drug discovery. Together, NVIDIA and Cadence are leading the AI revolution.”

“Digital twins will transform manufacturing, drug discovery and countless other industries,” said Jensen Huang, founder and CEO of NVIDIA. “Using NVIDIA Omniverse and generative AI technologies, Cadence can deliver simulation and digitalization technologies to benefit individuals, companie and societies in ways we have yet to imagine.”

Digital twin technology is increasingly becoming critical to designers and operators of complex data center systems in the AI era as through creating a virtual replica of a physical system, it can use real-time data to simulate its behavior, performance and interactions in various conditions. The Cadence Reality platform provides visibility across the entire value chain, enabling data center designers and operators to simulate the performance of integrated liquid and air-cooling systems, visualize the performance of data centers and plan for what-if scenarios.

The company’s collaboration with NVIDIA also expands the capabilities of the Orion drug discovery platform by providing key capabilities, including access to BioNeMo models for structure prediction, small molecule generation and molecular property prediction. Molecules generated with BioNeMo may then be profiled and iteratively enhanced and designed with Orion tools.

Today’s announcements build upon Cadence and NVIDIA’s long-standing collaboration in areas such as:

• AI-driven digital and custom IC design, including PPA, schedule and cost reduction of NVIDIA GPUs with Cadence Innovus and Cadence Cerebrus solutions
• Over 20 years of partnership in hardware and software verification, including Palladium, Protium, and now Cadence Verisium technologies
• System design and analysis, including GPU-optimized Cadence Fidelity CFD Software and the revolutionary Cadence Millennium Enterprise Multiphysics Platform

These announcements also open a new chapter of Cadence’s Intelligent System Design strategy to help customers develop differentiated products across a wide range of industries and market verticals.

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STMicroelectronics, a global semiconductor leader serving customers across the spectrum of electronics applications, announced the resolutions to be submitted for adoption at the Annual General Meeting of Shareholders (AGM) which will be held in Amsterdam, the Netherlands, on May 22, 2024.

The resolutions, proposed by the Supervisory Board, are:

• The adoption of the Remuneration Policy for the Supervisory Board;

• The adoption of the Company’s statutory annual accounts for the year ended December 31, 2023, prepared in accordance with International Financial Reporting Standards (IFRS). The 2023 statutory annual accounts were filed with the Netherlands authority for the Financial Markets (AFM) on March 21, 2024 and are posted on the Company’s website (www.st.com) and the AFM’s website (www.afm.nl);

• The distribution of a cash dividend of US$ 0.36 per outstanding share of the Company’s common stock, to be distributed in quarterly installments of US$ 0.09 in each of the second, third and fourth quarters of 2024 and first quarter of 2025 to shareholders of record in the month of each quarterly payment as per the table below;

• The amendment to the Company’s Articles of Association;

• The adoption of the Remuneration Policy for the Managing Board;

• The reappointment of Mr. Jean-Marc Chery as member and Chairman of the Managing Board for a three-year term to expire at the end of the 2027 AGM;

• The approval of the stock-based portion of the compensation of the President and CEO;

• The appointment of Mr. Lorenzo Grandi as member of the Managing Board for a three-year term to expire at the end of the 2027 AGM;

• The approval of the stock-based portion of the compensation of the Chief Financial Officer;

• The approval of a new 3-year Unvested Stock Award Plan for Management and Key Employees;

• The reappointment of EY as external auditor for the 2024 and 2025 financial years;

• The reappointment of Mr. Nicolas Dufourcq, as member of the Supervisory Board, for a three-year term to expire at the end of the 2027 AGM;

• The reappointment of Ms. Janet Davidson, as member of the Supervisory Board, for a one-year term to expire at the end of the 2025 AGM;

• The appointment of Mr. Pascal Daloz, as member of the Supervisory Board, for a three-year term expiring at the 2027 AGM, in replacement of Mr. Yann Delabrière whose mandate will expire at the end of the 2024 AGM;

• The authorization to the Managing Board, until the conclusion of the 2025 AGM, to repurchase shares, subject to the approval of the Supervisory Board;

• The delegation to the Supervisory Board of the authority to issue new common shares, to grant rights to subscribe for such shares, and to limit and/or exclude existing shareholders’ pre-emptive rights on common shares, until the end of the 2025 AGM;

• The discharge of the member of the Managing Board; and

• The discharge of the members of the Supervisory Board.

The record date for all shareholders to participate at the Annual General Meeting of Shareholders will be April 24, 2024. The complete agenda and all relevant detailed information concerning the 2024 AGM, as well as all related AGM materials, are available on the Company’s website (www.st.com) and made available to shareholders in compliance with legal requirements as of March 21, 2024.

As for rule amendments from the Securities and Exchange Commission (SEC) and conforming FINRA rule changes, beginning on May 28, 2024, on US market the new standard for settlement will become the next business day after a trade or t+1. European settlement rule will remain at t+2.

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The aerospace industry in India is one of the fastest growing sectors with an increasingly strong domestic manufacturing base. To gain further competitive advantage, the implementation of new technologies such as additive manufacturing has been gaining importance in the recent past. While this method leads to cost reduction of building low-volume parts, as well as enables the industry to challenge the limits of efficiency through extremely accurate and complex design executions, the quality challenges faced by this new manufacturing processes should also be thoroughly addressed. High-precision metrology solutions are not only an opportunity to optimize the manufacturing process but also offer valuable insight for material sciences and ensure the quality of the output.

Air travel, a preferred mode of transportation, relies on aircraft parts meeting stringent quality standards. For instance, before a supplier commences production, up to 1500 inspection features of a turbine blade must be verified, adhering to tight tolerance ranges at every production step. Beyond this challenge, another is the vital maintenance and repair operations (MRO) which often involves replacing high-complexity, quality-intensive low-volume or single parts. Traditional manufacturing processes for MROs prove both time and cost-intensive, unable to meet the demanded complexity and accuracy efficiently. Consequently, additive manufacturing, specifically 3D printing, is increasingly integrated into the aerospace production chain in India, positioning the industry as a pioneer in additive manufacturing innovation. However, the adoption of this technology brings its own challenges, which our experience suggests can be effectively addressed through high-quality metrology solutions.

Powder is the building block of additively manufactured parts. The particles are small, typically ranging from a few micrometers to tens of microns in diameter. Their size distribution and shape influence spread ability and hence possible defects might occur during the process. The defect density is among other aspects and also a factor for recycling and aging of the powder. A uniformly distributed powder bed is the essential basis for a stable and reliable additive manufacturing process. Improper powder quality, powder rheology and the process parameters might cause voids to form in the final structure. The additive manufacturing process, unlike traditional manufacturing methods, requires powders to be melted layer by layer during the build. Melt temperatures and process parameters greatly affect the crystallography and, as a consequence, part properties. After printing, the part is still attached to the build plate. It is then heat-treated for stress relieving and removed from the build plate with a band saw or wire EDM. Some parts are then heat treated again for microstructure changes. These processes possibly influence the characteristic and accuracy of the part, impacting the quality and safety. Post which, Dimensional accuracy and surface finish are critical to ensure proper assembly and consistent matching across multiple parts. Even though additive manufacturing is an immense opportunity since it enables an unprecedented control over material microstructures. Analyzing and understanding these structures is key for an efficient and optimized process that ensures the demanded quality and safety.

Utilizing cutting-edge measurement and inspection equipment is crucial for meeting aerospace parts’ sophisticated requirements. Our metrology solutions support and can be implemented throughout the manufacturing process, enabling immediate corrective actions, ensuring high-quality output, and promoting sustainable resourcing. We employ Light or Electron Microscopes and CT for continuous powder characterization, identifying sources of quality issues in the powder bed during or after printing. Defective parts can be detected and fixed during the build, avoiding downstream costs and increasing yield. Optical 3D-scanners, Coordinate Measuring Machines, and high-resolution CT validate accuracy, inspect finished parts, and analyze internal structures, contributing to defining optimal settings for future processes. The comprehensive data analysis across the process chain, facilitated by metrology devices equipped with IoT and PiWeb software by ZEISS, ensures correlation and supports an efficient and optimized process. Investing in high-quality metrology and research equipment is indispensable for ensuring safety and quality in the aerospace industry, particularly as ‘Make in India’ propels the sector’s growth, with additive manufacturing playing a vital role in material science and process optimization.

ZEISS, as a key global provider, plays a pivotal role with its Blue Line process, contributing to the industry’s success through precise metrology and quality solutions. Moreover, the company’s commitment to excellence extends beyond mere provision, as it actively engages in collaborative ventures. The company’s globally unique application lab not only facilitates joint customer projects and scientific studies but also serves as a dynamic hub for hands-on demonstrations. This collaborative approach fosters a rich environment for learning and knowledge distribution, ensuring that the aerospace industry benefits not only from cutting-edge technology but also from shared insights and collective expertise.

In my opinion, the aerospace industry in India stands at the forefront of innovation and technological advancements, embracing additive manufacturing as a crucial element in its production chain. By leveraging cutting-edge measurement and inspection equipment throughout the entire manufacturing process, the industry can achieve immediate corrective actions, increase yield, and streamline resource utilization. With continued investments in high-quality metrology and research equipment, the aerospace sector can ensure the safety and quality of its intricate and complex components, further solidifying its position as a leader in technological innovation.

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With projections indicating a doubling of air passenger numbers to 8.2 million by 2037, the advancement of all-electric and hybrid-electric propulsion for powering Advanced Air Mobility (AAM) is evolving into a billion-dollar industry. Recent assessments by Rolls Royce suggest that approximately 15,000 Electric Vertical Take-Off and Landing (eVTOL) vehicles will be indispensable across 30 major cities by 2035 solely to meet the demand for intracity travel. By 2030, top players in the passenger Advanced Air Mobility (AAM) sector could boast larger fleets and significantly more daily flights than the world’s biggest airlines. These flights, averaging just 18 minutes each, will typically carry fewer passengers (ranging from one to six, plus a pilot).

The increasing urbanization, expanding population, aging infrastructure, and the surge in e-commerce and logistics underscore the need for a contemporary, safe, and cost-effective transportation solution for both people and goods. Urban Air Mobility (UAM) presents a seamless, reliable, and swift mode of transportation, addressing present and future urban challenges. With the capacity to transform intra and inter-city transportation, UAM offers a quicker and more effective alternative to conventional ground-based transportation methods. The adoption of Urban Air Mobility hinges on five primary factors:

• Growing demand for alternate modes of transportation in urban mobility.
• Need for convenient, efficient and last mile delivery.
• Zero emission and noise free mandates.
• Advancement in technologies (Energy storage, Autonomous, Connected, Power Electronics).
• Security.

Despite the growing Urban Air Mobility (UAM) sector, it faces significant challenges that need addressing for future growth and success. These challenges range from developing reliable electric propulsion systems to achieving autonomous flight capabilities and establishing necessary infrastructure like vertiports and charging stations. Overcoming these hurdles is vital for unlocking UAM’s transformative potential in urban transportation.

Utilizing AI for predictive maintenance enables analysis of sensor data and onboard sources to forecast maintenance needs, reducing downtime and increasing aircraft availability. AI-enabled maintenance inspections allow for rapid issue identification through image analysis of eVTOLs and UAVs, minimizing errors and oversights. AI aids in making better decisions for aircraft maintenance support by thoroughly analyzing various considerations, likely leading to improved outcomes. Additionally, robotic systems equipped with AI algorithms can autonomously repair or replace minor parts, enhancing safety for maintenance teams. Moreover, AI facilitates better diagnostics and targeted troubleshooting, expediting issue identification and repair suggestions. Ultimately, proactive maintenance, data integration, and improved safety are promised by AI in UAM, ensuring aircraft are maintained effectively from takeoff to landing.

The Intelligent Cabin Management System (ICMS), utilized in aviation and rail industries, undergoes continuous advancements fueled by emerging technologies. Enhanced facial recognition algorithms, driven by artificial intelligence (AI), significantly improve efficiencies and reliability in user authentication, behavior analysis, safety, threat detection, and object tracking. Moreover, ICMS prioritizes monitoring passengers’ vital signs onboard for health safety.

This solution ensures cabin operations with a focus on passenger safety, security, and health, suitable for various passenger cabins in aircraft and rail, and particularly ideal for UAM applications. It facilitates cabin entry by authorized crew and passengers, guides seating arrangements, enforces luggage placement regulations, ensures compliance with air travel advisories, monitors passenger behavior for preemptive intervention, identifies permitted and potentially threatening objects, flags left luggage, and detects vital health parameters for real-time monitoring and control.

AI-driven predictive maintenance involves analyzing sensor data and onboard sources to anticipate UAM maintenance needs, aiding in proactive scheduling and minimizing downtime. Similarly, AI-based inspections utilize image analysis to swiftly identify potential issues during regular checks, enhancing accuracy and reducing errors. Additionally, AI supports maintenance decision-making by analyzing various factors like repair costs and part availability, providing informed recommendations. Future advancements may see autonomous maintenance systems, powered by AI, performing routine tasks such as inspections and minor repairs, improving efficiency and safety. Furthermore, AI assists technicians in diagnostics and troubleshooting by analyzing data and historical records to pinpoint issues and suggest appropriate solutions, streamlining maintenance processes and ensuring UAM operational reliability.

The integration of AI into UAM maintenance offers numerous benefits that significantly enhance the efficiency, safety, and reliability of UAM operations. Through proactive maintenance enabled by AI’s predictive capabilities, maintenance teams can anticipate and address potential failures before they occur, reducing unplanned downtime and enhancing operational reliability. Furthermore, AI-supported maintenance increases aircraft availability, ensuring vehicles are consistently safe and reliable, thus contributing to higher customer satisfaction and overall operational performance.

Moreover, AI-driven maintenance optimization leads to cost reduction by accurately predicting maintenance needs and minimizing unnecessary inspections and component replacements, thereby reducing labor and material costs. Additionally, AI’s continuous monitoring of UAM vehicle conditions enhances safety by detecting anomalies or safety risks in real-time, preventing accidents and ensuring timely maintenance. Overall, the application of AI in UAM maintenance represents a transformative step towards a more efficient, safe, and reliable urban air transportation system.

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Courtesy : Microchip

The myths and false economy of direct chip-to-chip PCIe connect in ADAS and vehicle autonomy applications.

Before pondering the question of whether or not to switch, let’s first set the scene by considering why Peripheral Component Interconnect Express (PCIe) is becoming so popular as an interconnect technology in advanced driver assistance systems (ADAS) applications—and why it will be so crucial in the realization of completely autonomous driving (AD) as the automotive industry seeks standard interfaces that deliver performance while ensuring compatibility and ease-of-use.

With its roots in the computing industry, PCIe is a point-to-point bidirectional bus for connecting high-speed components. Subject to the system architecture (PCIe’s implementation), data transfer can take place over 1, 2, 4, 8 or 16 lanes, and if more than one lane is used the bus becomes a serial/parallel hybrid.

The PCIe specification is owned and managed by the PCI Special Interest Group (PCI-SIG), an association of 900+ industry companies committed to advancing its non-proprietary peripheral technology. As demand for higher I/O performance grows, the group’s scope and ecosystem reach are both expanding, and to paraphrase words from PCI-SIG’s membership page:

Current PCIe and other related technology roadmaps account for new form factors and lower power applications. Innovation on these fronts will remain true to PCI-SIG’s legacy of delivering solutions that are backward compatible, cost-efficient, high performance, processor agnostic, and scalable.

With vehicles becoming high-performance computing platforms (HPCs—and data centers, even) on wheels, these words are exactly what vehicle OEMs developing ADAS and AD solutions want to hear. Also, every generation of PCIe results in performance improvements – from gen 1.0’s data (giga) transfer rate of 2.5GT/s and total bandwidth of 4G/s (16 lanes) to today’s gen 6.0’s 64GT/s and 128G/s (16 lanes). Note: PCIe 7.0, slated to arrive in 2025, will have a data rate of 128GT/s and a bandwidth of 512GB/s through 16 lanes.

PCIe’s performance power cannot be disputed, and it will certainly be required to support the kind of real-time processing of large volumes of data needed for AI- and ML-enabled ADAS and AD applications.

But, as ever, there is debate around implementing PCIe-based architectures, not least when it comes to whether the connections between PCIe-enabled components should be direct or switched.

To provide higher levels of automation, vehicles must incorporate increasingly sophisticated combinations of electronic components including central processing units (CPUs), electronic control units (ECUs), graphics processing units (GPUs), system-on-chips (SoCs), “smart sensors” and high-capacity and high-speed storage devices (such as NVMe memory).

Of these components, the ECUs (there are many) combine across separate zones based on a common functionality. These zonal ECUs communicate with HPC platforms using Ethernet. But within those platforms, there is a need for high-bandwidth processing to achieve real-time decision making.

Accordingly, PCIe technology is being used by automotive designers in a manner very similar to the way in which a data center is designed. Connecting sensors with high-speed serial outputs to processing units is best addressed with an open standard called Automotive SerDes Alliance (ASA).

In essence, there are three pillars of automotive networking (see figure 1).

However, some SoC vendors are saying that for PCIe you can simply connect directly between chips without a switch. Well, yes, you can… but it doesn’t scale to higher ADAS levels and it’s a false economy do so.

An HPC system without a switch exponentially increases software complexity, as each end requires its own software stack. Also, there’s the “bigger picture” benefits of switched over unswitched PCIe to consider:

• IO Bandwidth Optimization: Packet switching reduces the SoC interconnection pin count requirement which lowers SoC power and cost.
• Peripheral Sharing: Single peripherals, such as SSD storage or ethernet controllers, may be shared across several SoCs
• Scalability: You can easily scale for more performance without changing the system architecture by increasing switch size, SoC count and peripheral count.
• Serviceability: PCIe has built-in error detection and diagnostic test features which have been thoroughly proven in the high-performance compute environment over many years to significantly ease serviceability.
• And as a result of the above points, a much better total cost of ownership (TCO) is possible.

When PCIe combines forces with Ethernet and ASA, it allows for the creation of an optimized, heterogeneous system architecture (as figure 2 illustrates with respect to an ADAS example).

Although the three communications technologies evolved at different times to support different needs, and have their respective pros and cons, the heterogeneous architecture makes the best of each.

As mentioned, PCIe provides point-to-point connection, meaning devices are not competing for bandwidth, which is fine if only a few devices need to connect. However, an autonomous vehicle is best realized as a set of distributed workloads, which means bandwidth needs to be shared between multiple sub-system components.

In this respect, PCIe switches provide an excellent solution as they are “transparent,” meaning that software and other devices do not need to be aware of the presence of switches in the hierarchy, and no drivers are required.

PCIe is ideal for ADAS, AD and other HPC applications within a vehicle, but its “point-to-point” connectivity has many thinking that that’s how it should be implemented—as chip-to-chip, for example. However, integrating switching using technologies such as the Microchip Switchtec family (the world’s first automotive-qualified PCIe switches) minimizes software complexity and realizes a host of other benefits for high-performance automotive systems with multiple sub-system components that demand low latencies and high data rates.

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JAMES KIM, Senior Semiconductor and Process Integration Engineer | Lam Research

Asymmetries in wafer map defects are usually treated as random production hardware defects. For example, asymmetric wafer defects can be caused by particles inadvertently deposited on a wafer during any number of process steps. In this article, I want to share a different mechanism that can cause wafer defects. Namely, that these defects can be structural defects that are caused by a biased deposition or etch process.

It can be difficult for a process engineer to determine the cause of downstream structural defects located at a specific wafer radius, particularly if these defects are located in varying directions or at different locations on the wafer. As a wafer structure is formed, process behavior at that location may vary from other wafer locations based upon the radial direction and specific wafer location. Slight differences in processes at different wafer locations can be exaggerated by the accumulation of other process steps as you move toward that location. In addition, process performance differences (such as variation in equipment performance) can also cause on-wafer structural variability.

In this study, structural defects will be virtually introduced on a wafer to provide an example of how structural defects can be created by differences in wafer location. We will then use our virtual process model to identify an example of a mechanism that can cause these types of asymmetric wafer map defects.

A 3D process model of a specific metal stack (Cu/TaN/Ta) on a warped wafer was created using SEMulator3D virtual fabrication (Figure 1). After the 3D model was generated, electrical analysis of 49 sites on the wafer was completed.

In our model, an anisotropic barrier/liner (TaN/Ta) deposition process was used. Due to wafer tilting, there were TaN/Ta deposition differences seen across the simulated high aspect ratio metal stack. To minimize the number of variables in the model, Cu deposition was assumed to fill in an ideal manner (without voids). Forty-nine (49) corresponding 3D models were created at different locations on the wafer, to reflect differences in tilting due to wafer warping. Next, electrical simulation was completed on these 3D models to monitor metal line resistance at each location. Serpentine metal line patterns were built into the model, to help simulate the projected electrical performance on the warped wafer at different points on the same radius, and across different directions on the wafer (Figure 2).

Using only incoming structure and process behavior, we can develop a behavioral process model and extend our device performance predictions and behavioral trend analysis outside of our proposed process window range. In the case of complicated processes with more than one mechanism or behavior, we can split processes into several steps and develop models for each individual process step. There will be phenomena or behavior in manufacturing that can’t be fully captured by this type of process modeling, but these models provide useful insight during process window development.

Of the 49 3D models, the models on the far edge of the wafer were heavily tilted by wafer warpage. Interestingly, not all of the models at the same wafer radius exhibited the same behavior. This was due to the metal pattern design. With anisotropic deposition into high aspect ratio trenches, deposition in specific directions was blocked at certain locations in the trenches (depending upon trench depth and tilt angle). This affected both the device structure and electrical behavior at different locations on the wafer.

Since the metal lines were extending across the x-axis, there were minimal differences seen when tilting the wafer across the x-axis in our model. X-axis tilting created only a small difference in thickness of the Ta/TaN relative to the Cu. However, when the wafer was tilted in the y-axis using our model, the high aspect ratio wall blocked Ta/TaN deposition due to the deposition angle. This lowered the volume of Ta/TaN deposition relative to Cu, which decreased the metal resistance and placed the resistance outside of our design specification.

X-axis wafer tilting had little influence on the device structure. The resistance on the far edge of the x-axis did not significantly change and remained in-spec. Y-axis wafer tilting had a more significant influence on the device structure. The resistance on the far edge of the y-axis was outside of our electrical specification (Figure 3).

Even though wafer warpage occurs in a circular manner due to accumulated stress, unexpected structural failures can occur in different radial directions on the wafer due to variations in pattern design and process behavior across the wafer. From this study, we demonstrated that asymmetric structures caused by wafer warping can create top-bottom or left-right wafer performance differences, even though processes have been uniformly applied in a circular distribution across the wafer.

Process simulation can be used to better understand structural failures that can cause performance variability at different wafer locations. A better understanding of these structural failure mechanisms can help engineers improve overall wafer yield by taking corrective action (such as performing line scanning at specific wafer locations) or by adjusting specific process windows to minimize asymmetric wafer defects.

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Sailesh Chittipeddi | Executive Vice President Operations | Renesas

Digital transformation has evolved quickly from a conceptual phase to a semiconductor industry change agent. The rapid take up of AI-enhanced product development is only accelerating this transformation and is further influenced by two connected trends: The movement of Moore’s Law from transistor scaling to system-level scaling, and the relatively recent redistribution of the global electronics supply chain due to the COVID-19 pandemic.

I spoke on this subject earlier this month at the Industry Strategy Symposium 2024 in Half Moon Bay, California, where leaders from across the chip industry gather annually to share their insights on technology and trend drivers and what they could mean for our respective businesses.

Between the early 1970s and around 2005, increased chip performance was largely a function of clock frequency improvements driven by advances in lithography, transistor density, and energy efficiency. With increasing transistor counts (and die size), clock frequencies are limited by interconnect delays and not by transistor performance. To overcome this challenge, designers moved to multi-core designs to increase system performance without blowing up energy. Novel packaging techniques such as chiplets and multi-chip modules are helping further improve system performance, particularly in AI chips.

A single chip package may be comprised of multiple chiplets each housing specific functions such as high-performance logic elements, AI accelerators, high-bandwidth DDR memory, and high-speed peripherals. Very often, each of these components is sourced from a different fab, a trend that has resulted in a fragmented global supply chain. This creates its own set of challenges as die from multiple fabs must be integrated into a package or system that must then be thoroughly tested. Test failures at this stage have enormous financial consequences. These challenges, require a “shift left” mindset in product development. The shift left mentality has major ramifications for how we, as an industry, should be managing our supply chains by moving the heavy emphasis from architecture/design to final system testing and quality.

Supply chain challenges during the COVID pandemic have resulted in further decentralization of the supply chain components. To illustrate the enormity of the change underway, consider that between 2022 and December 2024 construction began on 93 wafer fabs around the world. Compare that to the global construction of automated test facilities. In 2021 alone, the industry broke ground on 484 back-end test sites, which provides a measure of how committed the chip sector is to driving resiliency across the manufacturing landscape.

So, where does AI come into the picture?

A key area in which AI will exert its influence is the shift from an analytic to a predictive model. Today, we wait to detect a problem and then look at past data to identify the root cause of the problem and prevent it from reoccurring. This inefficient approach adds time, cost, unpredictability, and waste to the supply chain. AI, on the other hand, allows us to examine current data to predict future outcomes.

Instead of using spreadsheets to analyze old data, we build AI models that production engineers continuously train with new data. This “new” data is no longer merely a set of numbers or measurements but includes unstructured data such as die photos, equipment noise, time series sensor data, and videos to make better predictions.

In the end, it’s about pulling actionable information from a sea of data points. In other words, data without action is mostly useless. Why am I driving this point home? Because today, 90 percent of data created by enterprises is never used. It’s dark data. And when you think about AI implementation, 46 percent of them never make it from pilot to production because the complexity of the programs is not scoped appropriately.

Despite these challenges, equipment makers are already starting to implement digital transformation techniques into their product development processes. The benefits are palpable. Research from Boston Consulting Group found that companies that have built resiliency into their supply and design chains recovered from COVID-related downturns twice as fast as companies that have yet to embrace digital transformation.

At Renesas, we acquired a company called Reality AI that generates a compact machine learning model that runs on a microcontroller or microprocessor. This provides the unique ability to quickly detect deviations from normal patterns that may cause equipment problems. It allows manufacturing facilities to schedule preventive maintenance or minimize downtime associated with sudden equipment failure.

Digital transformation with AI is key to business success today. As the semiconductor industry undergoes a major evolution – embracing system-level design and adapting to a changing global supply chain – digital transformation and the shift left approach are powerful tools that deliver on two fronts.

The first is a productivity increase that comes from optimized tools and design processes. The closer you are to where the failure is likely to occur, the more quickly you learn and the more quickly you can fix things.

Second, and perhaps most importantly, digital transformation solves one of the biggest problems the industry has with chip design – the availability of talent. When we reduce the time taken to design a chip, we’re making our engineers far more efficient than they would be otherwise, which is increasingly important as the semiconductor industry demographic skews older.

The post Executive Blog – Companies that Embrace Digital Transformation Have More Resilient Design and Supply Chains appeared first on ELE Times.

By- Patty Felts, Product Marketing Manager, Product Center Services

Australian automation and positioning technology provider conduct static and kinematic tests

Locating people, animals, or objects on Earth with high precision requires the use of GNSS receivers and the support of network RTK correction services that account for errors caused by the atmosphere, satellite clock drift, and signal delays.

Three standard approaches to correct these errors are Real Time Kinematic (RTK), Precise Point Positioning (PPP) GNSS correction services, and a combination of the two, PPP-RTK. Beyond these, a pairing device such as a survey-grade GNSS receiver or a mass-market smart antenna is also required to enhance positioning accuracy. Combining any of these approaches with one device will optimize the positioning accuracy of the end-use application.

Many GNSS navigation applications require high accuracy. The accuracy of survey-grade GNSS receivers exceeds what mass-market smart antennas can provide. Of course, this comes at a price. Still, several high-precision GNSS navigation applications can do well with the accuracy offered by mass-market smart antennas. Examples include transportation, e-mobility, IoT use cases, and field robotics. Designers aim to equip devices with reliable, high-precision positioning at a reasonable cost.

GNSS users can verify the capabilities of setups by hitting the roads and testing them in real-world situations. Doing so enables them to understand the capabilities of these setups and differentiate them.

Aptella (formerly branded as Position Partners), an Australasian provider of automation and positioning technology solutions, had the opportunity to test the capabilities of network RTK vs PPP-RTK GNSS correction services and present the findings to their client.

We will discuss the findings, but as a first step, let us review how the RTK, PPP, and PPP-RTK approaches operate, the equipment needed, and the participants in this exercise.

The mentioned correction approaches follow different paths. RTK GNSS correction services calculate and correct GNSS errors by comparing satellite signals from one or more reference stations. Any errors detected are then transmitted using IP-based communications, which can be reliable beyond a radius of 30 km from the nearest base station. Network RTK typically requires bi-directional communication between the GNSS receiver and the service, making the solution more challenging to scale. This approach can provide centimeter-level positioning accuracy in seconds.

Precise Point Positioning GNSS correction services operate differently. They broadcast a GNSS error model valid over large geographic regions. Because this service requires only unidirectional communication (IP-based or via satellite L-band), it’s more scalable to multiple users, unlike RTK.

PPP high-precision positioning takes between three minutes and half an hour to provide a position estimate with an accuracy of less than 10 cm. Static applications such as surveying or mapping typically use this solution, but it can be a poor fit for dynamic applications such as unmanned aerial vehicles or mobile robotics.

More recently, both approaches have been combined into what is known as PPP-RTK GNSS correction services (or State Space Representation (SSR) correction services). This combination provides the accuracy of the RTK network and its fast initialization times with the broadcast nature of Precise Point Positioning. Similar to PPP, the approach is based on a model of GNSS errors that has broad geographic validity. Once a GNSS receiver has access to these PPP-RTK correction data through one-way communication, it computes the GNSS receiver position.

Survey-grade receivers are devices typically used for geodetic surveying and mapping applications. They are designed to provide highly accurate and precise positioning information for civil engineering, construction, GIS data, land development, mining, and environmental management.

Today’s modules can access data from multiple satellite constellations and network RTK support. These devices are typically very expensive, costing thousands of dollars each, because they are highly precise, with accuracies ranging from centimeters to millimeters.

Mass-market smart antennas are specialized receiver/antenna-integrated devices designed to receive signals from satellite constellations and GNSS correction services right out of the box. Smart antennas capture and process raw data to determine precise locations. Standalone GNSS antennas don’t have a precision rating, as this depends on the integrated GNSS receiver and correction service to which the antennas are coupled.

While mass-market smart antennas are more affordable than survey-grade GNSS receivers, there is a corresponding performance trade-off, with accuracies ranging from a few centimeters to decimeters.

The following tests used a survey-grade GNSS receiver to verify control coordinates in static mode and compare RTK versus PPP-RTK results in the kinematic mode. The GNSS smart antenna was also employed as a pairing device for these static and kinematic tests.

Aptella is the company that conducted the performance test and presented the results to their client. However, the participation of four other companies was crucial.

AllDayRTK operates Australia’s highest-density network of Continuously Operating Reference Stations (CORS). Its network RTK correction services were used to compare with PPP-RTK.

u-blox’s PointPerfect provided the PPP-RTK GNSS correction services used in these tests.

Both correction services were coupled with a survey GNSS receiver, Topcon HiPer VR, and a mass-market smart antenna, the Tallysman TW5790.

In the Australian city of Melbourne, Aptella conducted static and kinematic tests with several objectives in mind:

• Test RTK and PPP-RTK GNSS corrections using a mass-market GNSS device like the Tallysman TW5790.
• Demonstrate the capabilities of the Tallysman smart antenna coupled with PPP-RTK corrections.
• Evaluate PointPerfect PPP-RTK GNSS corrections and assess “real world” results against published specifications.
• Determine whether these specifications meet mass-market applications and e-transport safety requirements of 30 cm @ 95%.
• Provide insight into use cases and applications suitable for PPP-RTK corrections.

These tests allowed experts to compare the accuracy of RTK and PPP-RTK GNSS correction services supported by a mass-market Tallysman smart antenna.  They were also able to verify the PPP-RTK performance specifications published by u-blox.

First, a survey-grade Topcon HiPer VR GNSS receiver was used to verify the control coordinates in static mode. Once these were obtained, the Tallysman smart antenna took its place.

The table below summarizes representative results from both methods, PPP-RTK and RTK. Horizontal (planar) accuracy is similar for both, while the vertical accuracy is less accurate with PPP-RTK than RTK.

The horizontal accuracy level of RTK and PPP-RTK is in the centimeter range. In contrast, RTK maintains a centimeter range at the vertical accuracy level, but the PPP-RTK correction errors were in the decimeter range.

Furthermore, the accuracy of the mass market device is within published specifications to meet the 30 cm @ 95% for location (plan) even when obstructed. Still, when measuring heights, these were less accurate than 2D horizontal coordinates. Absolute horizontal location accuracy meets the mass market requirement of 30 cm @ 95%, although RTK is more accurate at a vertical level than PPP-RTK.

On the streets of Melbourne, Aptella experts tested RTK and PPP-RTK corrections operating in different kinematic modes with variable speeds, such as walking under open skies and driving in different environments.

The test setup using an RTK network consisted of AllDayRTK corrections and a survey-grade GNSS receiver. On the other hand, the PPP-RTK test setup was supported by u-blox PointPerfect and the Tallysman smart antenna. The antennas for both setups were mounted on the roof of the vehicle and driven through different routes to encounter various GNSS conditions.

Walking in the open sky: This test involved a walk along the riverbank. Comparing the results, both were similar, proving that PPP-RTK is well-suited for mass-market applications.

On-road driving with varying conditions: This test consisted of driving on Melbourne roads in different conditions, including open skies and partial or total obstructions to GNSS. The route included driving under bridges and areas with multipath effects. Vegetation in the area at the start of the test prevented the smart antenna’s IMU from initializing. No IMU/dead reckoning capability was used during the drive test.

The results obtained while the vehicle moved through a long tunnel under the railroad tracks were of utmost importance. In this situation, the PPP-RTK approach reported a position even in an adverse environment. In addition, PPP-RTK reconverged shortly after RTK.

Another revealing result of this second test was that the Tallysman smart antenna didn’t seem to deviate from its path when passing under short bridges.

Driving through an outage: The outage test took place in an extended, challenging environment for GNSS. This occurred when the car drove under the pedestrian overpass at the Melbourne Cricket Ground. The PPP-RTK solution maintained the travel trajectory and effectively tracked the route (in yellow). On the other hand, the RTK network solution reported positions off the road and on the railway tracks. In this outage condition, RTK took a long time to reconverge to a fixed solution.

Open-sky driving: The final on-road test was conducted in an open-sky environment where the two setups performed similarly. They provided lane-level accuracy and suitability for mass-market applications. However, ground truthing and further testing are required to fully evaluate the accuracy and reliability of PPP-RTK in these conditions.

The five static and dynamic tests conducted by Aptella were instrumental in assessing the effectiveness of different setups to determine the position of stationary and moving entities.

• From the static test, Aptella concluded that PPP-RTK, coupled with the Tallysman smart antenna, provides centimeter-level horizontal accuracy and performs similarly to RTK. However, this was not the case for vertical accuracy, with PPP-RTK at the decimeter level.
• Regarding the kinematic tests, Aptella obtained significant results, particularly when the environment impeded communication with GNSS. Even without IMU or dead reckoning, the PPP-RTK performed well with lane-level tracking. With short outages such as railway bridges and underpasses, PPP-RTK maintained an acceptable trajectory, while RTK required a long time to reconverge after emerging from these challenging conditions.
• Overall, Aptella has demonstrated that the PPP-RTK and GNSS smart antenna combination delivers results suitable for mass-market applications requiring centimeter-level horizontal accuracy.

As mentioned above, survey-grade devices are costly although highly accurate. A combination of survey-grade GNSS receiver and network RTK correction service is recommended in geodetic surveying use cases that require high height accuracy.

Conversely, mass-market smart antenna devices using PPP-RTK corrections are less expensive but also less accurate. Nevertheless, they are well suited for static applications that don’t require GNSS heights at survey grade.

For many high-precision navigation applications, such as transportation, e-mobility, and mobile robotics, PPP-RTK is sufficient to achieve the level of performance these end applications require. The relative affordability of smart antenna devices, combined with PPP-RTK’s ability to broadcast a single stream of corrections to all endpoints, makes it easier to scale from a few prototypes to large fleets of mobile IoT devices.

The post Network RTK vs PPP-RTK: an insight into real-world performance appeared first on ELE Times.

The compact and AEC-Q200-compliant EEH-ZL Series stands out with industry-leading capacitance and high Ripple Current specs

The ZL series is the latest offspring of Panasonic Industry’s Electrolytic Polymer Hybrid capacitor portfolio. Related to its compact dimensions, it offers unrivalled capacitance values – and hence might evoke a remarkable market echo:

Capacitance: For five case sizes from ø5×5.8 mm to ø10×10.2 mm, the ZL series offers the largest capacitance in the industry and exceeds the values of competitor standard products by approximately 170%.

Ripple Current performance outnumbers the competitor products’ specs besides lower ESR within the same case size.

The new ZL is AEC-Q200 compliant, enforcing strict quality control standards, particularly crucial for the automotive industry. It boasts high-temperature resistance, and is guaranteed to operate at 125°C and 135°C at 4000h. With a focus on durability, the ZL series offers vibration-proof variants capable of withstanding shocks up to 30G, making it a reliable choice.

In summary, this next-generation, RoHS qualified Hybrid Capacitor stands as the ultimate solution for automotive and industrial applications, where compact dimensions are an essential prerequisite.

Tailored for use in various automotive components including water pumps, oil pumps, cooling fans, high-current DC to DC converters, and advanced driver-assistance systems (ADAS), it also proves invaluable in industrial settings such as inverter power supplies for robotics, cooling fans, and solar power systems. Furthermore, it serves a pivotal role in industrial power supplies for both DC and AC circuits, spanning from inverters to rectifiers, and finds essential application in communication infrastructure equipment such as base stations, servers, routers, and switches.

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