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Amid the steadily increasing talk about Moore’s Law of transistor scaling hitting the wall, Marvell co-founder and CEO Sehat Sutardja presented the idea of modular chips (MoChi) at the International Solid State Circuits Conference (ISSCC) in 2015. This eventually culminated into what’s now widely known as chiplets.

He later discussed the idea of these daisy-chain multiple chips with AMD’s CTO Mark Papermaster, who thought the name was too complicated, calling them chiplets. Sehat’s passion and dedication to cobbling different pieces of silicon into a single package eventually led him to cofound the first chiplet foundry Silicon Box in 2021.

Sehat Sutardja, co-founder of Marvell and Silicon Box and investor and backer of several semiconductor startups, passed away on 18 September 2024. He was known as one of the pioneers of the modern semiconductor industry. “I am a bit narrow-minded. I only see things in terms of electronics,” he was quoted in a profile story, “Sehat Sutardja: An Engineering Marvell,” published in IEEE Spectrum in October 2010.

Born in a Chinese family in Jakarta, Indonesia, in 1961, he was drawn to the wonders of electronics early in his childhood. While in sixth grade, he visited his younger brother Pantas Sutardja, who lived with their grandparents in Singapore. During this time, he got hold of Pantas’ hobbyists DIY books and magazines and was fascinated by the idea of building a Van de Graaff generator. The two siblings ended up developing a crude but functioning device.

From Van de Graaff generator to storage chips

When back in Jakarta, Sehat started building a miniature version of the Van de Graaff generator. After a little research at a bookstore, he discovered that the improved device would require replacing mechanical switches with transistors. That led him to a nearby radio shop, and in a year or so, he’d received a radio repair license.

Figure 1 Sehat was very fond of the radio repair license he received at the tender age of 13; his wife kept a copy in her purse in case he wanted to show it to people. Source: Marvell

While playing with transistors, he often encountered company names such as Fairchild, National Semiconductor, Motorola, and Texas Instruments. These were all U.S. companies, which led to his inclination toward studying in the United States. A friend of his brother was enrolled at the University of San Francisco, and that connection took him there in the summer of 1980.

What happened next clearly shows Sehat’s intimate bond with electronics. After disacovering that the university doesn’t have electrical engineering program, he moved to Iowa State University and earned his bachelor’s in electrical engineering in 1983. Then he moved to the University of California, Berkley, where he completed his master’s in 1985 and Ph.D. in 1988 in electrical engineering and computer science.

That’s where he also met his wife, Weili Dai, who was a computer science major. Sehat began his professional career as an analog circuit designer with two Bay Area companies: Micro Linear and Integrated Information Technology. At Micro Linear, he worked on digital-to-analog converters (DACs) and other chips for hard disk drives (HDDs).

Next, at Integrated Information Technology, he worked on circuits for digital video compression and decompression, a technology that ended up in AT&T’s infamous VideoPhone. Meanwhile, his wife Weili wanted them to start their own company, so in 1995, they founded Marvell Technology Group along with Sehat’s brother Pantas Sutardja. The name Marvell came from their quest to create “marvelous” things; it ended with “el” following the names of successful tech companies like Intel, Novell, and Nortel.

Birth of Marvell

Pantas, who had recently left IBM’s Almaden Research Center, had worked on hard drive technology at IBM. That, combined with Sehat’s stint at Micro Linear and expertise in mixed-signal chips, led them to develop digital read channels for hard disk drives. At that time, analog read channels from companies like Infineon, STMicroelectronics, and TI depended on amplitude peaks to decode HDD data.

On the other hand, digital technology could utilize the newly arrived CMOS technology scaling to define bit patterns on a hard disk track. So, Marvell used high-speed sampling and DSP filtering to introduce digital read channels that significantly increased disk drive data densities. That put TI out of read-channel business.

Figure 2 Weili Dai, Sehat Sutardja, and Pantas Sutardja founded Marvel in February 1995 with their savings and money from Weili’s parents. Source: IEEE Spectrum

They had working chips by Christmas 1995, and Seagate became Marvell’s first customer. Marvell has dominated the disk drive controller market since then. The timing was impeccable from two standpoints. First, the fabless design movement was just taking off, and Marvell became one of the early success stories in the emerging fabless semiconductor business model.

Second, by adopting CMOS technology for its debut chip for a hard disk drive, Marvell became one of the early adopters and beneficiaries of the historic transition from bipolar to CMOS chip manufacturing. Marvell followed the CMOS-centric approach on other products like Ethernet switches and transceivers to create faster and more power savvy chips.

However, Marvell and Sehat kept a relatively low profile while laser focused on the company’s product and technology roadmaps. Sehat, known as humble and down to earth, didn’t make splashes in trade media like many other founders and CEOs of successful chip companies.

Then, in 2016, Marvell’s intensely quite world was hit by an accounting scandal. Though president and CEO Sutardja and his wife, Dai, chief operating officer, were cleared of any financial misconduct, the pressure on sales teams to meet revenue targets led both Sutardja and Dai to leave their respective positions. Sutardja remained the chairman of the board.

The chiplets man

In the aftermath of this accounting investigation, Sutardja and Dai remained highly respected in semiconductor industry circles. After turning a scrappy little startup into a formidable semiconductor outfit, the husband-wife duo had engaged in over dozen startups, including Alphawave and DreamBig.

They also co-founded a specialized fab built around chiplet and advanced packaging technologies. Silicon Box, after building a fab in Singapore, is setting up another chiplet fab in Northen Italy to better serve European chip companies.

Figure 3 Sehat Sutardja, known for his humility, kindness and generosity, made significant gifts to the University of California, Berkeley. He is seen here with his wife and two sons at the grand opening of UC Berkeley’s Sutardja Dai Hall on 27 February 2009. Source: University of California, Berkeley

Sehat’s focus on chiplets shows his foresight on the future of semiconductors. To express his relationship with semiconductor technology and how it kept him going, he once said, “I don’t know anything else.”

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NXP’s has extended its ultra-low power i.MX series line with the RT700, this device incorporates AI processing via the integrated eIQ® Neutron neural processing unit (NPU), enhanced compute with five total cores including two Arm® Cortex®-M33 cores and Cadence® Tensilica® HIFI1 and HIFI4 DSP blocks. The chip is designed to optimize time spent in sleep mode for up to a 50% improvement in power efficiency. With over 7.5 MB of SRAM, designers can split up the memory to either lock it down to either core or separate it to be shared between them. The large memory ensures users do not have to prune their NPU model or real-time operating system (RTOS) to fit the memory, easing the design process. The RT700 supports the embedded USB (eUSB) standard in order to connect to other USB peripherals at the lower 1.2 V I/O voltage instead of the traditional 3.3 V. Finally, an integrated DC-DC converter allows users to power up the onboard peripherals. A block diagram can be seen in Figure 1. 

Figure 1 Block diagram of the new i.MX RT700 crossover MCU with an upgrade in the number of cores, amount of memory, advanced peripherals, as well as a new NPU. Source: NXP

The crossover MCUs

NXP’s crossover family of MCUs were created to offer the performance of an applications processor, or a higher-end core running at higher frequencies, with the simplicity of the MCU. It is a direct alternative to customers that purchase low-end microprocessors with memory management units (MMUs) to run rich OSs where external DDR is often necessary as well as the desire to use an RTOS. Instead, crossover MCUs streamline this task by bumping up the performance of the MCU and including high speed peripherals such as GPUs. In essence, a microprocessor chassis with a RTOS running on an MCU core as the engine. 

Enhanced performance

While the 4-digit category of this crossover lineup concentrates more on performance running from 500 MHz to 1 GHz, the 3-digital subcategory is specialized for battery-powered, portable applications. The RT500 was optimized for its low-power 2D graphics capabilities while the RT600 introduced higher performance DSP capabilities, the RT700 combines the power efficiency and performance of these two predecessors (Figure 2). The five cores in the RT700 means the M33 can do the RTOS work with two DSPs and the 325 MHz eIQ Neutron NPU alongside them to accelerate complex, multi-modal AI tasks in hardware.

Figure 2:  The i.MX, RT700 family combines both existing RT500 and RT600 families, offering even lower power consumption while adding more performance through the increase of cores and other architectural enhancements. Source: NXP

Power optimization

The design revolves around NXP’s energy flex architecture with heterogeneous domain computing to size the power consumption to the application’s specific compute needs, all built optimized based upon the RT700’s specific process technology. Two different power domains, the compute subsystem and the sense subsystem, serve high-speed processing and low-power compute scenarios respectively. 

The RT700 can use as little as 9 µW in sleep mode while having more than 5 MB of memory content retention, ensuring that the device consumes as little power as possible in a deep sleep state with a short wakeup time while still retaining information within SRAM as it was kept on. The run mode power consumption has been reduced to 12 mW from the previous 17 mW of the RT500 (Figure 3). 

Figure 3: The i.MX RT700 exhibits a 30% improvement in power consumption while in run mode and a 70% improvement in sleep mode. 

The aptly named sense subsystem is generally geared towards sensor-hub type applications that are “always on”. The eIQ NPU will further optimize power consumption by minimizing time spent in run mode and maximizing sleep mode. Figure 4 shows the power consumption executing a typical ML use case on the Arm Cortex-M33 and the power consumption after the algorithm has been accelerated with the eIQ Neutron NPU with dynamically adjusting duty cycle. 

Figure 4: eIQ Neutron NPU acceleration will maximize the amount of time the device spends in sleep mode, ensuring processing is done as rapidly as possible to switch back into low power sleep modes. Source: NXP

Benchmarks

Benchmarks performed on MLPerf tiny benchmark suite for anomaly detection, keyword spotting, visual wakewords, and image classification on the Arm Cortex-M33 and the eIQ NPU can be seen in Figure 5. There is an immediate contrast showing up to 172x acceleration on models with the NPU. 

Figure 5: MLPerf tiny benchmark showing improvements in standard ML models for anomaly detection, keyword spotting, visual wakewords, and image classification. Source: NXP

This is a critical enhancement in the RT700 over previous generations as use cases for smart AI-enabled edge devices are cropping up exponentially. This can be seen with the increase in worldwide shipments for TinyML, or types of ML that are optimized to run on less powerful devices often at the edge compared. TinyML is a large shift in the conventional view of AI hardware with beefy datacenter GPUs for data-intensive deep tasks and model training. The rise of edge computing shares the processing burden between the cloud and the edge device, allowing for much lower latencies while also removing the bandwidth burden required to constantly communicate data to the cloud and back. This opens up many opportunities however, it does force a higher burden on smart data processing to optimize power management. The RT700 attempts to meet this demand with its integrated NPU while also easing the burden on developers by using common software languages for more simplified programmability. 

Aalyia Shaukat, associate editor at EDN, has worked in the design publishing industry for nearly a decade. She holds a Bachelor’s degree in electrical engineering, and has published works in major EE journals.

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The post New i.MX MCU serves TinyML applications appeared first on EDN.

In booth C81 at the European Conference on Optical Communication (ECOC 2024) in Frankfurt, Germany (23–25 September), TRUMPF Photonic Components GmbH of Ulm, Germany (part of the TRUMPF Group) — which makes vertical-cavity surface-emitting lasers (VCSELs) and photodiodes — is presenting upcoming advances in VCSEL technology aimed at meeting evolving demands of the future datacom market...

Axus Technology of Chandler, AZ, USA – a provider of chemical-mechanical planarization (CMP), wafer thinning and surface-processing solutions – has announced that its flagship Capstone CS200 platform tools offer what is claimed to be the industry’s lowest cost of ownership (CoO) for CMP processes on 200mm silicon carbide (SiC) wafers. Compared to its closest competitor, Axus’s small-footprint Capstone delivers twice the throughput at less than half the total cost per wafer...

Materials, networking and laser technology firm Coherent Corp of Saxonburg, PA, USA has announced the general availability and production release of what is claimed to be the industry’s first 100G ZR QSFP28 digital coherent optics (DCO) transceiver...

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КПІ — суб’єкт господарювання з незначним ступенем ризику! kpi вт, 09/24/2024 - 08:01

Contact resistance is the resistance that appears between conductors in contact with each other. Typically, contact resistance is required to be below 10-20 mΩ, though some switches may require it to be under 0.1-0.5 Ω. Variations in contact resistance can significantly affect sensitive circuits. Many great distributors like Heisener offer a wide range of components of Contact resistance to cater diverse application needs.

Contact resistance consists of several components:

Concentration Resistance: This is the resistance observed due to current constriction or concentration at the actual contact surface.

Film Layer Resistance: This arises from film layers and contaminants on the contact surfaces. It can include both solid film layers and loose impurity contamination.

Conductor Resistance: When measuring contact resistance, it also includes the resistance of the conductors and leads connected to the contact points. This conductor resistance depends on the conductivity of the metal and is characterized by its temperature coefficient.

In practical measurements of contact resistance, a milliohm meter designed based on the Kelvin bridge four-terminal method is commonly used. This device utilizes specialized clamps that attach to both ends of the contact points being tested. The total measured contact resistance, R, consists of three components:

R=Rc+Rf+Rp

where RC is the concentration resistance, Rf is the film layer resistance, and Rp is the conductor resistance. The purpose of contact resistance testing is to determine the resistance generated when current flows through the electrical contact points on the contact surfaces.

Working Principle of Contact Resistance

The working principle of contact resistance involves the complexity of the actual contact surface. Even with a smooth gold-plated layer, microscopic examination reveals surface protrusions of 5-10 micrometers. The actual contact area is often much smaller than the theoretical contact area because contact occurs at scattered points rather than across the entire surface. These contact points are formed where the interface film has been disrupted by contact pressure or heat, and they constitute about 5-10% of the actual contact area.

Furthermore, the actual contact surface includes portions where contact occurs through a contamination film at the interface. Metal surfaces have a tendency to form oxide films, and even clean metal surfaces quickly develop a few micrometers of oxide film once exposed to air. Even stable metals like gold form organic gas adsorption films on their surfaces. Additionally, dust and pollutants in the air contribute to the formation of a deposition film on the contact surface. Thus, from a microscopic perspective, any contact surface inevitably becomes a contaminated surface, which significantly impacts the actual contact resistance.

Influencing Factors

Factors affecting contact resistance include contact material, normal pressure, surface condition, operating voltage, and current.

Contact Material: Different materials have different standards for contact resistance. For instance, the resistance of copper alloy contacts should be less than 5 milliohms, while iron alloy contacts should be less than 15 milliohms.

Normal Pressure: This refers to the force perpendicular to the contact surface. Increasing normal pressure increases the number and area of contact points, thereby reducing contact resistance. Normal pressure is influenced by the geometry and material properties of the contact components.

Surface Condition: Contaminants and deposits on the contact surface can increase resistance. Common contaminants include dust, oil, and chemical adsorption films, all of which can reduce the contact area and increase resistance.

Operating Voltage: High voltage can break down surface films, lowering contact resistance, but it can also cause nonlinear resistance changes, which may lead to errors in testing and operation.

Current: Excessive current generates Joule heat, which can cause metal to soften or melt, thereby reducing contact resistance.

Measurement Methods

Measuring contact resistance accurately is crucial for ensuring the reliability of electrical connections. Here are common methods used for measuring contact resistance:

Four-Wire (Kelvin) Method

This method uses four separate wires to measure resistance, eliminating the impact of lead and contact resistances. Two wires supply the current, while the other two measure the voltage drop across the contact.

Procedure:

1. Connect the current-carrying wires to the contact points.
2. Attach the voltage-sensing wires to the same contact points but at different locations.
3. Measure the voltage drop and current. The contact resistance R is calculated using Ohm’s law: 𝑅=𝑉/𝐼

Two-Wire Method

This simpler method uses two wires, one for current and one for voltage measurement. It is less accurate due to the inclusion of lead and contact resistances in the measurement.

Procedure:

1. Connect one wire to supply current and the other to measure the voltage drop.
2. Calculate the resistance with 𝑅=𝑉/𝐼

Micro-Ohmmeter Method

A micro-ohmmeter is a specialized instrument designed to measure very low resistances with high precision.

Procedure:

1. Connect the micro-ohmmeter to the contact points.
2. The device applies a known current and measures the voltage drop to calculate the resistance.

Bridge Method

This method uses a bridge circuit (e.g., Wheatstone bridge) to measure resistance by balancing two legs of a bridge circuit.

Procedure:

1. Set up the bridge circuit with contact resistance in one leg and known resistors in the other legs.
2. Adjust the known resistors until the bridge is balanced.
3. Calculate the unknown resistance based on the known resistors and the bridge configuration.

Contact Resistance Testers

These are dedicated devices specifically designed to measure contact resistance quickly and accurately.

Procedure:

1. Connect the tester to the contact points.
2. The tester applies a current and measures the resulting voltage drop to calculate resistance.

Summary

Contact resistance refers to the electrical resistance measured at the point where conductors make contact. It is influenced by various factors including the materials used, contact pressure, surface conditions, voltage, and current. In practice, contact resistance is usually much higher than the theoretical value due to the small area of contact points, surface contamination, and the presence of oxidation films. When measuring contact resistance, it is important to consider these influencing factors to ensure accurate assessment of contact performance and to avoid electrical faults or performance degradation caused by poor contact.

The post What Is Contact Resistance? appeared first on Electronics Lovers ~ Technology We Love.

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There are several applications at home or industry for long delay timers (ON or OFF delay). Time delays on the order of seconds can be generated using 555 timer circuits, provided the timing capacitor values do not exceed the limit specified by 555 datasheets. When the time delay needed goes to minutes and hours, these circuits will not help.

Wow the engineering world with your unique design: Design Ideas Submission Guide

Figure 1’s circuit can generate time delay of seconds to hours without using high value capacitors. This simple, inexpensive circuit is basically an oscillator, divide by 4096 counter and followed by another divide by 10 circuit. The equation below can be used to obtain the time delay in seconds. The circuit draws very little current and is therefore suitable for battery powered gadgets.

Time delay = (4096X10)/F

Where F is the U1 (555) oscillator frequency in Hz.

Figure 1 The above circuit produces an OFF delay of 30 minutes. The switch SW1 can be thrown on the other side at starting to get a 30 minute ON delay. The capacitor C2 can be changed to get various timings. The required load can be connected in place of LED D1.

Circuit in Figure 1 generates a time delay of 25 minutes for the component values selected. In one position of switch SW1, an “ON” delay is generated. In another position, an “OFF” delay is generated. The load can be connected between Q1 and the power supply (across LED + R6), which can be switched “ON” or “OFF” after the time delay. U1 (555) is connected as an astable multivibrator where its output is given to U3 (4020 counter), its Q12 output is fed to U4 (4017counter and decoder). U4’s Q9 output goes “High” (up until this point, it was “LOW”), after receiving 10 cycles from Q12 of U3. It is inverted by U2C and given to U2A. This “LOW” output inhibits pulses reaching U3 causing the counters to stop after the required time delay. The Q9 output of U4 and output of U2C are connected to the SW1 switch to select an “ON” delay or “OFF” delay mode. In “ON” delay mode, the load/LED gets energized after the time delay. In “OFF” delay mode, the load / LED is energized as soon as timer is switched “ON” and gets de-energized after the time delay.

Jayapal Ramalingam has over three decades of experience in designing electronics systems for power & process industries and is presently a freelance automation consultant.

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The post Long delay timer sans large capacitors appeared first on EDN.

Вітаємо переможців конкурсу на здобуття премій за кращі підручники, навчальні посібники та монографії у 2024 році kpi пн, 09/23/2024 - 16:20

Hello everyone. Im new here. I have bought a couple of things for building my first of a more-proffesional project submitted by /u/Acensxandrea [link] [comments]

The electronics engineering landscape has experienced significant changes in the past half-decade, driven by technological advancements and global trends and disruptions. Significant limitations faced by electronics engineers and organizations include talent shortages, shortened product lifecycles, and a shift toward unpredictability in global trade and supply chains.

These macro-challenges impact the readiness and effectiveness of development teams in addressing complex electronic system requirements. To overcome these challenges, next-generation electronic design solutions must possess key components such as intuitiveness, artificial intelligence (AI) infusion, cloud connectivity, integration, and security.

By prioritizing usability, leveraging AI capabilities, embracing cloud connectivity, adopting an integrated approach, and ensuring robust security measures, engineers can navigate the dynamic landscape more effectively.

 

What modern electronics engineers want

In examining the evolution of electronic systems design and the role of electronic design automation (EDA) in meeting these needs, the focus has traditionally been on delivering design tools and solutions that address critical requirements such as increasing product complexity, cost management, and meeting tight schedules.

As design activities became more globalized in the 1990s, the need for automation and solutions to support geographically dispersed team collaboration and integrated verification became increasingly vital.

Over the past decade, there has been an expanded focus on managing the growing complexity of systems. This has necessitated support for multi-board development and collaboration across various engineering disciplines, with integration into product lifecycle management (PLM) systems for effective data management.

Figure 1 The above image provides a sneak peek of the evolution of electronics system design solutions. Source: Siemens EDA

However, the current reality is that complexity is now outpacing the capacity of organizations to effectively meet the challenges posed by modern electronic systems. As readers of this article, you are already well-informed about the reasons behind the increasing complexity of electronic systems.

Factors such as the convergence of electronics and software-driven products, the need for higher processing speeds, advanced IC packaging devices, edge-connectivity, and higher density are all examples of contributing factors.

This article will focus on macro-challenges that significantly impact engineering and organizational capacity. These macro challenges extend beyond specific design complexities and address broader issues that affect an organization’s overall effectiveness in tackling modern electronic system design.

The big picture: Macro challenges

As engineers, we often prioritize technology challenges, but it is crucial to recognize that these challenges are intensified by the macro realities of the global environment we operate in. Nowadays, we are tasked with designing extraordinarily complex products with a limited number of engineers, while also ensuring that these products stand out in a competitive market.

Moreover, we must navigate an environment of growing unpredictability, where the assumptions of a globalized supply chain system are no longer dependable and are susceptible to volatility. Engineers and their organizations are expected to “build the plane while flying it.”

One of the major challenges facing electronics development teams is the critical impact of long-anticipated engineering talent shortages on organizational readiness to meet market demands. Projections indicate that at least one-third of all engineering roles will remain unfilled due to an insufficient talent pipeline throughout this decade.

As a result, today’s electronics engineers are shouldering additional responsibilities, ranging from layout to high-speed simulation. Industry executives frequently express concerns about recruitment and workforce retention, recognizing it as a high-priority issue. The ongoing talent shortages and intense competition for skilled professionals will continue to significantly affect an organization’s ability to maintain competitiveness.

Figure 2 Workforce shortages will put acute stress on development organizations. Source: Boston Consulting Group

Another challenge arises from the fact that lifecycles of electronic products have significantly shortened. Factors such as innovation, connectivity, emerging economies, mass urbanization, and an abundance of consumer options are driving faster product replacement and upgrade cycles. In the past, consumers were content with maintaining their goods and services for several years. However, the landscape has shifted dramatically.

While trends in consumer markets are well known, it is important to acknowledge that this phenomenon is also present in the B2B space. A notable example is the rapid growth of the Internet constellation market, which did not exist just a decade ago. This market, along with other emerging services, has placed increased demands on electronics development teams.

To thrive in this dynamic environment, product differentiation has become essential. The ability to offer unique features and capabilities that set products apart from those of competitors is crucial for motivating the adoption of new products. Consequently, electronics development teams face even greater pressure to continually innovate and deliver products within tight timelines that are not only technologically advanced but also meet the market demand of the day.

Figure 3 Electronics innovation is driving down the lifecycle availability of products. Source: Pew Research

The last major challenge having significant impact on product development that design engineers should address is the shift toward unpredictability in the global electronics ecosystem. Unpredictability is the new normal, and there is no end in sight, requiring resilience across organizations.

Since the late 1980s, and particularly in the 1990s, we witnessed the development of a globalized supply chain that facilitated a “design-anywhere, build-anywhere” system. This system heavily relied on global cooperation fostered through trade agreements. But trade conflicts have become prominent over time.

Additionally, governments are now making significant investments to develop domestic capabilities, such as the US Department of Commerce’s CHIPS Act, which aims to ensure a robust American-based design and manufacturing capacity for semiconductors.

Contributing to this scenario, increasing regulations for sustainability in many countries and regions mean that to remain compatible and competitive, development teams from “across the border” must contend with new and often onerous requirements. The recent pandemic further exposed critical vulnerabilities, as supply chain shortages exposed the weak links of globalized networks.

In recent years, organizations like Siemens have emphasized the importance of designing for resilience, particularly to ride out supply chain volatility. However, resilience extends beyond the supply chain and applies to all aspects of electronics development. Organizational resilience is the ability to adapt and thrive in the face of constant change. Given the current landscape of unpredictability, the need for strategic resilience has become even more critical.

To navigate this terrain successfully, development teams must prioritize strategic planning, flexibility, and the ability to quickly adapt to unforeseen circumstances. They need to anticipate potential disruptions and build resilience into their processes, systems, and partnerships.

Road signs to successful system design

To thrive in this volatile environment, today’s electronics engineers require a next-generation electronics system design solution. This solution has five components that are essential for delivering a next generation electronic system design solution.

Intuitive

In the past, engineers and their organizations operated with a focus on specialization, where each individual or team had a specific area of expertise. However, due to talent shortages, engineers are now taking on additional tasks and expanding their skillset.

The traditional approach to EDA tools prioritized delivering specialized tools for specific tasks, often minimizing user-friendliness. But times have changed, and there is now a growing demand for highly intuitive tools. To address these and other workforce changes, it’s critical to ensure that engineers can quickly become productive with minimal learning curves, especially for tasks they do infrequently.

The ability to achieve productivity quickly is crucial, and engineers require tools that allow them to execute operations effectively and work in an environment that is logical and easy to navigate. By prioritizing usability, these tools enable engineers to work more efficiently, work with greater confidence, and increase their satisfaction.

AI-infused

AI has emerged as a powerful tool that can bridge the gap between the complexity of engineering tasks, talent shortages, and the rapid acceleration of design complexity. Rather than replacing engineers, AI is designed to enhance their capabilities by enabling intelligent human-machine interaction, providing on-demand assistance through deep learning, and offering surrogate modeling for comprehensive simulation and analysis. Just as AI has become prevalent in our digital experiences, its integration into next-generation engineering solutions is crucial to empower and extend the capabilities of engineers.

The potential for AI applications in electronics system design is profound. AI can provide in-design assistance, predictive engineering capabilities, and the ability to perform space exploration analysis. It can also extract and utilize actionable data from component suppliers, facilitating more efficient decision-making.

By leveraging AI, engineers can streamline their workflows, gain valuable insights, and optimize their designs for improved performance and efficiency. The integration of AI into electronics system design holds immense promise for advancing the field and pushing the boundaries of what is possible.

Cloud-connected

In today’s electronics system landscape, collaboration across the value chain is essential. From component suppliers to design service providers and manufacturing contractors, purposeful collaboration is crucial for maximizing development opportunities, staying synchronized, reacting to supply chain changes, and evaluating alternatives.

Cloud connectivity offers a wide range of potential services that can benefit electronics system design collaboration and more. These include manufacturing analysis, circuit exploration, component research, and scaling services, such as high-end simulation, which require powerful compute resources.

The ability to access services and resources in the cloud fosters agility, enabling engineers to rapidly adapt to changing requirements and leverage specialized expertise as needed. It also facilitates seamless collaboration, as multiple stakeholders can work on the same project simultaneously, regardless of their physical location.

Integrated

An integrated and multidisciplinary approach is essential for maximizing efficiency and productivity. This approach eliminates silos and fosters collaboration throughout the development process.

At the core of digital transformation initiatives lies the concept of digital threads, which, by definition, embody integration. These threads enable the seamless flow of data and information across various stages of processes, systems, and organizations. Examples of these threads include architectural, component lifecycle, electromechanical, verification, and manufacturing data.

By collecting, integrating, and managing data across various stages of a product’s lifecycle, digital threads provide a comprehensive view of the product. This, in turn, enables informed decision-making, fosters collaboration, and optimizes designs.

To enable this integration, a next-generation solution must include an electronics design data management environment that supports critical domain-specific data. This environment should seamlessly integrate with PLM systems for requirements management, digital mock-ups, configuration management, change management, and bill of materials management.

By embracing this integrated and multi-disciplinary approach, organizations can leverage digital threads to enhance their electronic systems design processes and be better positioned to meet their digital transformation goals.

Secure

Security is a critical concern across the electronics industry, with a focus on adhering to government regulations and protecting organizational IP from cybersecurity risks. As design activity becomes more connected in the cloud, controlling access to data in specific locations and at specific times becomes increasingly vital.

A next-generation electronics system design solution must prioritize security as a core principle. This includes implementing safeguards for IP protection and enforcing data-access restrictions. Additionally, it’s important to ensure that cloud service providers adhere to the strictest security protocols when you partner with them.

Figure 4 The next-generation system design solutions must prioritize core principles such as AI, cloud, and security. Source: Siemens EDA

Toward a brighter future

The challenges faced by electronics engineers and organizations today are significantly different from what they were just a few years ago. Recognizing this changing global landscape, Siemens understands that our customers’ challenges have accelerated since the beginning of this decade.

Therefore, we have undertaken the development of a next-generation electronics system design solution that not only addresses current needs but also anticipates future challenges. Set to launch in the second half of 2024, this solution has been developed following extensive customer testing and validation.

Our aim is to empower engineers, optimize workflows, foster collaboration, and enhance overall product development efficiency while increasing user satisfaction.

AJ Incorvaia is senior VP of electronic board systems at Siemens Digital Industries Software.

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The post Overcoming challenges in dynamic electronics design landscape appeared first on EDN.

Microchip Graphics Suite is designed to enable seamless portability between Microchip product families and environments to help designers significantly reduce development costs and speed time to market

Designers are incorporating Graphical User Interfaces, or GUIs, into more electronic devices to enhance the user experience by providing intuitive and visually appealing interactions with today’s modern applications. To support embedded developers with their designs, Microchip Technology announces Microchip Graphics Suite (MGS), an easy-to-learn, comprehensive solution that simplifies the process of incorporating GUIs, animations and images into a touchscreen display.

Developing a GUI can be a complex and lengthy process, requiring significant time and resources to debug and integrate code from various tools. MGS is designed to easily integrate with Microchip’s 32-bit microcontrollers (MCUs) and microprocessors (MPUs) and supports multiple development platforms, including MPLAB Harmony v3 and Linux environments. This comprehensive solution to build a GUI interface aims to help designers improve reusability across projects and simplify design complexities.

MGS offers compositional tools, including a simulator for hardware-free prototyping. By leveraging the MPLAB Code Configurator (MCC), the simulator builds the MCC-generated C code in either web or native mode. In web mode, the tool creates an HTML file that can run on most web browsers with simulated touch interactivity. In native mode, the simulator enables debugging of the GUI on Windows desktop computers. These features enable accurate display and functionality demonstrations that are independent of hardware availability.

MGS provides an intuitive WYSIWYG interface with a modern design, enabling users to directly see and manipulate the final output, reducing errors and increasing efficiency. To make GUIs more accessible, MGS is versatile and can support a wide range of devices of varying performance. They can range from resource-constrained devices with significantly lower memory and system performance requirements to high-performance devices supporting tablet-sized touchscreens with high-fidelity video playback.

This solution is optimal for developers who want superior graphical performance without costly hardware upgrades. Additionally, MGS supports a wide range of displays, from monochrome OLEDs to 1080p 16.7M color TFTs, including MIPI DSI, LVDS, RGB, SPI, and HDMI interfaces, along with touchscreens with 2D/3D gestures.

“At Microchip, we are committed to providing our customers with comprehensive solutions and cutting-edge tools that empower them to make high-quality products and get to market faster,” said Rod Drake, corporate vice president of Microchip’s MCU32 and MPU32 business units. “This innovative tool suite simplifies the process of creating engaging and responsive displays for everything from smart home devices to industrial equipment.”

This comprehensive solution simplifies the integration of a GUI from design phase to implementation across a wide range of applications. MGS is highly compatible with the company’s broad portfolio of PIC32 MCUs, SAM MPUs and maXTouch touchscreen controllers. Additionally, Microchip can provide other key components including memory, power management and connectivity solutions.

The post New Solution From Microchip Makes it Easier to Build Sophisticated Graphical User Interfaces For MPLAB Harmony v3 and Linux Environments appeared first on ELE Times.

Next-generation radar, pivotal for the evolution of ADAS and autonomous driving, requires test solutions that deliver unrivalled accuracy, efficiency and reliability. To drive this development further, Rohde & Schwarz launches a radical innovation in automotive radar testing. R&S RadEsT (Radar Essential Tester) automotive radar target simulator emerges as an ultra-compact versatile tool designed to meet a wide array of testing needs along radar sensors lifecycle, from lab-based functional testing to vehicle-level production checks, offering the industry a hitherto unseen price-performance point.

With its impressive array of features and exceptional value, it opens new possibilities for precise, reliable, and dynamic radar testing. The Radar Essential Tester addresses a wide spectrum of use cases, from system checks and debugging of radar module reference designs to software verification and functional tests on the radar module. It is an ideal fit for OEM end-of-line testing, that provides advanced testing capabilities for radar alignment and calibration as well as functional check during production beyond the limited functionality of passive reflective elements that have historically been used. Furthermore, the RadEsT has the capability to test advanced driver-assistance systems (ADAS) and autonomous driving (AD) functions.

R&S RadEsT captures radar sensor signals, modifies, and returns them as simulated radar targets. The dynamic target simulation allows for quick adaptation to simulate rapidly moving targets, which is crucial for qualifying autonomous driving functions like automatic emergency braking (AEB) and adaptive cruise control (ACC). The simulated target can dynamically be configured on the fly in terms of a distance, velocity/doppler, and attenuation/RCS.

The radar target simulator features 12 receive and 12 transmit patch antennas with different polarizations. This allows targets to be simulated from any angular direction, without the need for mechanical movement. Furthermore, its built-in detection mechanism adapts to different radar sensor polarizations.

R&S RadEsT also offers integrated analysis functionalities. It can directly measure key indicators of radar sensor quality, such as equivalent isotopically radiated power (EIRP) and occupied bandwidth. Despite its advanced capabilities, R&S RadEsT’s compact design and lightweight make it easy to set up and integrate into any test environment. It also offers optional battery-powered operation, providing even more portability and flexibility.

To ensure consistent performance over time, R&S RadEsT features a self-check capability. This feature monitors its performance metrics, identifying any discrepancies or drifts, and alerts users to any deviations or abnormalities in the measurement process.

R&S RadEsT has also been designed to reduce reflections and multipath effects. Small patch antennas together with an absorber covered surface provide a clean RF frontend with very low RCS, suppressing close-range targets and potential multipath reflections. Furthermore, R&S RadEsT offers compact shielding systems to provide an interference-free RF environment. The R&S RadEsT-Z50 pyramidal, or R&S RadEsT-Z55 straight, can be used from lab to vehicle level, minimizing reflections and providing better testing results.

The post ADAS testing: Rohde & Schwarz unveils the R&S RadEsT next-gen radar target simulator appeared first on ELE Times.

MACOM Technology Solutions Inc of Lowell, MA, USA (which designs and makes RF, microwave, analog and mixed-signal and optical semiconductor technologies) is showcasing its latest connectivity products at Stand C83 at the European Conference on Optical Communication (ECOC 2024) in Frankfurt, Germany (23-25 September)...

TRUMPF Photonic Components GmbH of Ulm, Germany (part of the TRUMPF Group) — which makes vertical-cavity surface-emitting lasers (VCSELs) and photodiodes — and its customer Optomind Inc of Suwon, South Korea, which provides optical interconnect solutions for data centers including artificial intelligence (AI) and high-performance computing (HPC) networks, are showcasing 100Gbps VCSEL performance at the European Conference on Optical Communication (ECOC 2024) in Frankfurt, Germany (23–25 September). TRUMPF Photonic Componentsis exhibiting in booth C81 and Optomind in booth E33...

Lumentum Holdings Inc of San Jose, CA, USA (which designs and makes optical and photonic products for optical networks and lasers for industrial and consumer markets) is showcasing its latest photonic solutions on Stand #A24 at the European Conference on Optical Communication (ECOC 2024) in Frankfurt, Germany (23–25 September). Highlights are as follows...

✅ Оголошується конкурс на заміщення посад kpi пн, 09/23/2024 - 11:00

🎥 Київські політехніки інтегруються до європейського дослідницького простору kpi пн, 09/23/2024 - 03:44