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Wolfspeed Inc of Durham, NC, USA — which makes silicon carbide (SiC) materials and power semiconductor devices — has completed its financial restructuring process and emergence from Chapter 11 protection...

Epirus Inc of Torrance, CA, USA says that, in an invitation-only demonstration on 26 August at Camp Atterbury, Indiana (attended by representatives from throughout the US Department of Defense, other US Government agencies and nine allied countries), its Leonidas solid-state high-power microwave (HPM) system — which uses gallium nitride (GaN) transistors to minimize size, weight and deployment time — delivered weaponized electromagnetic interference to counter swarms of robotic, asymmetric threats...

The global energy sector is at a historic turning point. Renewable energy integration, EV promotion, and AI-driven consumption create more demand on already complex grids. The transformation calls for a new era of energy professionals who can build a bridge between traditional engineering and digital technologies-the infrastructure upgrades alone cannot solve the equation.

The Digital Shift in Energy Systems

Modern power systems evolve into interconnected, intelligent networks. Smart grids, real-time balancing, and consumer-driven energy management are redefining how electricity flows. Still, the digital revolution carries many challenges requiring upskilling and interdisciplinary knowledge to solve.

Top Challenges Facing the Next Generation Workforce:

1. Dual-Skill Gap

Engineers today need expertise in network-relevant issues and traditional grid operations, plus in cybersecurity matters. Still, there are few professionals with an engineering background and digital expertise; this scarcity leads to inefficiency in troubleshooting and system reliability.

2. A Shift Toward Virtualization

Careful changes from hardware-based to software-driven operations have increasingly taken protection and control functions onto a virtual platform. Hence, engineers will have to embrace digital tools with data analytics and server technologies that are not traditional to the power area.

3. Cross-system Collaborations

Data exchanges must be smooth as renewable assets such as solar and battery storage interfacing with distribution and transmission networks. Therefore, engineers must manage various protocols and formats, settling voltage, frequency, and power flows after the interface in real time.

Building the Workforce of Tomorrow

Such challenges require: Full-training in digital communication, grid standards such as IEC 61850, and advanced networking.

Simplified Tools and Platforms that reduce technical complexity and enable engineers to focus on system optimization.

Collaborative Ecosystems where power engineers, IT experts, and operators work together to maintain resilience across distributed networks.

Conclusion:

The future of energy will be shaped as much by people as by technology. Companies that invest in digital skills, upskilling programs, and collaborative frameworks will lead the transition to resilient, intelligent grids. Industry leaders such as Moxa, with their training initiatives and global expertise, are playing a vital role in equipping professionals to thrive in this new era ensuring the workforce is ready to power the grids of tomorrow.

(This article has been adapted and modified from content on Moxa.)

The post Future-Proofing the Energy Workforce in a Digitally Driven Era appeared first on ELE Times.

ANRITSU CORPORATION has developed and launched its new 60 GHz optical sampling oscilloscope MP2110A-080 option for the BERTWave MP2110A. This option verifies the performance of 200G/Lane optical transceivers forming the foundation of faster data-center communications and growing AI deployment. It delivers high PAM4 TDECQ evaluation accuracy and measurement productivity for next-generation high-speed optical transceivers, such as 1.6T and 800G, supporting strong quality assurance of large-capacity, high-speed communications infrastructure.

This test solution was exhibited as a reference at the China International Optoelectronic Exposition (CIOE 2025) on September 10, 2025, and will also be showcased at the European Conference on Optical Communication (ECOC 2025), one of the world’s leading international conferences in the field of optical communications, to be held in Copenhagen, Denmark, from September 29 to October 1, 2025.

Development Background
With the growth of AI data centers, optical communication speeds are increasing from 800G to 1.6T, and transmission rates are shifting from 50 Gbaud (100G/Lane) to 100 Gbaud (200G/Lane). As transmission speeds increase, there is a growing need for wideband sampling oscilloscopes capable of evaluating higher frequency components in optical transceiver signals.

Product Features
The all-in-one MP2110A solution integrates the necessary functions for physical-layer evaluation of optical transceivers during development and manufacturing. This new 60 GHz oscilloscope MP2110A-080 option enables evaluation and analysis of next-generation high-speed 200G/Lane communication standards.

• High-Accuracy PAM4 TDECQ Measurement: With the performance of a reference receiver supporting PAM4 signals up to 120 Gbaud, the MP2110A offers reliable TDECQ evaluations by leveraging the high measurement accuracy of existing models.
• Improved Efficiency with Simultaneous 4-Channel Measurement: By measuring four optical signals simultaneously, the MP2110A cuts measurement time and improves operation efficiency. Batch evaluation of multiple channels simplifies measurement systems and processes to enhance productivity.
• Further Productivity Gains with Faster Measurement: Increasing the MP2110A sampling speed fourfold compared to previous models shortens measurement times even further. Stable operation with a built-in PC improves R&D and manufacturing efficiency.
• Cost-Effective 4-Channel Software Upgrade Option: With a software upgrade path to 4-channels, the 2-channel option lowers initial costs, allowing flexible deployment supporting future expansion matching budget and evaluation environment.

The post Anritsu introduces a 60 GHz Optical Sampling Oscilloscope for 200G/Lane 1.6T Transmission appeared first on ELE Times.

Built on Nordic’s 22-nm technology, the latest addition to the nRF54L series promises robust communication, long battery life, and compact designs.

OSHW Lab project link: OSHW Lab link Demonstration video on YT: YT video This is an active power splitter/divider/doubler which is meant as an addon for basically any lab PSU alowing it to produce symetrical output voltage, eg. split 30 V into +-15V for various power projects (audio amplifiers etc.). I designed this splitter for total maximum voltage of 60 V (eg. maximum output on Riden PSUs) and maximum peak virtual ground load of 6A on any voltage. It uses forced continuous conduction mode synchronous buck topology to create a virtual ground at half the total input voltage. As a side effect of forced synchronous CCM it is also reversible, meaning it can also work as a boost/inverting/doubling stage and be fed by eg. 15V, pass it through as one rail, and then produce the other rail (as shown on the second photo). Normally its self powered, but that limits its minimum input voltage to 12V, so when you need to split lower voltages, down to zero, you can use external power just for the switching circuitry. Efficiency is consistently greater than 85% for 12V and higher input voltages, however for lower voltages the efficiency drops quite rapidly. Virtual ground is stable across frequency with its low frequency impedance peaking at 160 mOhm (740Hz 12V input) and higher frequency response being dependant mainly on wiring inductance. Feel free to ask any questions or point out any weakspots I might have overlooked, I'll be happy to answer them or fix them. submitted by /u/MrSlehofer [link] [comments]

The board of directors of nanoelectronics research center imec of Leuven, Belgium has appointed Patrick Vandenameele as CEO. Effective 1 April 2026, he will succeed Luc Van den hove, who (after 17 years as CEO) will then become chair of the board...

In booth C1130 at the European Conference on Optical Communication (ECOC 2025) in Copenhagen, Denmark (29 September–1 October), CORNERSTONE Photonics Innovation Centre (C-PIC), formed in 2014 and the UK’s dedicated Innovation and Knowledge Centre (IKC) for silicon photonics (SiPh) prototyping foundry (affiliated with the University of Southampton and the University of Glasgow, as well as the UK government’s Science and Technology Facilities Council), has unveiled its new Open Platform...

The new feature makes the MCUs a fit for battery and low-power consumer electronics and industrial applications requiring capacitive touch control.

More than a decade ago, I visited my local doctor’s office, suffering from either kidney stone or back-spasm pain (I don’t recall which; at the time, it could have been either, or both, for that matter). As usual, the assistant logged my height and weight on the hallway scale, then my blood pressure in the examination room. I recall her measuring the latter, then re-measuring it, then hurriedly leaving the room with a worried look on her face and an “I’ll be back in a minute” comment. Turns out, my systolic blood pressure reading was near 200; she and the doctor had been conferring on whether to rush me to the nearest hospital in an ambulance.

Fortunately, a painkiller dropped my blood pressure below the danger point (spikes are a common body response to transient acute pain) in a timely manner, but the situation more broadly revealed that my pain-free ongoing blood pressure was still at the stage 2 hypertension level. My response was three-fold:

• Dietary changes, specifically to reduce sodium intake (my cholesterol levels were fine)
• Medication, specifically ongoing daily losartan potassium
• And regular blood pressure measurement using at-home equipment

Traditional measurement techniques

Before continuing, here’s a quick definition of the two data points involved in blood pressure:

• Systolic blood pressure is the first (top/upper) number. It measures the pressure your blood is pushing against the walls of your arteries when the heart beats.
• Diastolic blood pressure is the second (bottom/lower) number. It measures the pressure your blood is pushing against your artery walls while the heart muscle rests between beats.

How is blood pressure traditionally measured at the doctor’s office or a hospital, specifically via a device called a sphygmomanometer in conjunction with a stethoscope? Thanks for asking:

Your doctor will typically use the following instruments in combination to measure your blood pressure:

• a cuff that can be inflated with air,
• a pressure meter (manometer) for measuring the air pressure inside the cuff, and
• a stethoscope for listening to the sound the blood makes as it flows through the brachial artery (the major artery found in your upper arm).

 To measure blood pressure, the cuff is placed around the bare and extended upper arm, and inflated until no blood can flow through the brachial artery. Then the air is slowly let out of the cuff. As soon as blood starts flowing into the arm, it can be heard as a pounding sound through the stethoscope. The sound is produced by the rushing of the blood and the vibration of the vessel walls. The systolic pressure can be read from the meter once the first sounds are heard. The diastolic blood pressure is read once the pounding sound stops.

Home monitoring devices

What about at home? Here, there’s no separate stethoscope—or another person trained in listening to it and discerning what’s heard, for that matter—involved. And no, there isn’t a microphone integrated in the cuff to listen to the brachial artery, coupled with digital signal processing to analyze the microphone outputs, either (admittedly, that was Mr. Engineer here’s initial theory, until a realization of the bill-of-materials cost involved to implement the concept compelled me to do research on alternative approaches). This Reddit thread, specifically the following post within it, was notably helpful:

Pressure transducer within the machine. The pressure transducer can feel the pressure within the cuff. The air pressure in the cuff is the same at the end of the line in the machine.

So, like a manual BP cuff, the computer pumps air into the cuff until it feels a pulse. The pressure transducer actually senses the change in cuff pressure as the heartbeat.

That pulse is only looked at a little, get a relative beats per minute from the cuff. Now that the cuff can sense the pulse, keep pumping air until the pulse stops being sensed. That’s systolic. Now slowly and gently release air until you feel the pulse again. Check it against the rate number you had earlier. If it’s close, keep releasing air until you lose the sense. The last pressure that you had the pulse is the diastolic.

 It grabs the two numbers very similarly to how you do it with your ears and a stethoscope. But, it is able to measure the pressure directly and look at the pressure many times per second, instead of your eyes and ears listening to the pulse and watching the gauge.

That’s where the specific algorithm inside the computer takes over. They’re all black magic as to exactly how they interpret pulse. Peaks from baseline, rise and fall, rising wave, falling wave, lots of ways to count pulses on a line. But all of them can give you a heart rate from just a blood pressure cuff.

Another Redditor explained the process a bit differently in that same thread, specifically in terms of exactly when the systolic value is ascertained:

OK, imagine your arm is a like a balloon and your heartbeat is a drummer inside. The cuff squeezes the balloon tight, no drumming gets out. As it slowly lets air out, the first quiet drumbeat you “hear” is your systolic. When the drumming gets too lazy to rattle the balloon, that’s your diastolic. The machine just listens for those drum‑beats via pressure wobbles in the cuff, no extra pulse sensor needed!

I came across a couple of nuances in a teardown of a different machine than the one we’ll be looking at today. First off, particularly note the following bolded-by-me emphasis phrase:

The system seems to be quite simple – a DC motor drives a pump (PUMP-924A) to inflate the cuff. The port to the cuff is actually a tee, with the other port heading towards a solenoid valve that is venting to atmosphere by default. When the unit starts, it does a bit of a leak-check which inflates the cuff to a small value (20mmHg) and sits there for a bit to also ensure that the user isn’t moving about, and detect if the cuff is too tight or too loose. From there, it seems to inflate at a controlled pressure rate, which requires running the motor at variable speed depending on the tightness of the cuff and the pressure in the cuff.

Note, too, the following functional deviation of the device showcased at “Dr. Gough’s Tech Zone” (by Dr. Gough Lui, with the most excellent tagline “Reversing the mindless enslavement of humans by technology”) from the previous definition I’d quoted, which had described measuring systolic and diastolic pressure on the cuff-deflation phase of the entire process:

As a system that measures on the inflation stroke, it’s quicker but I do have my hesitations about its accuracy.

Wrist cuff-monitoring pros and cons

When I decided to start regularly measuring my own blood pressure at home, I initially grabbed a wrist-located cuff-based monitor I’d had sitting around for a while, through multiple residence transitions (therefore explaining—versus frequent usage, which admittedly would have been a deception if I’d tried to convince you of it—the condition of the packaging), Samsung’s BW-325S (the republished version of the press release I found online includes a 2006 copyright date):

I quickly discovered, however, that its results’ consistency (when consecutive readings were taken experimentally only a few minutes apart, to clarify; day-to-day deviations would have been expected) was lacking. Some of this was likely due to imperfect arm-and-hand positioning on my part. And, since I was single at the time, I didn’t have a partner around to help me put it on; an upper-arm cuff-based device, conversely, left both hands free for placement purposes. That said, my research also suggests that upper-arm cuff-located devices are also inherently more reliable than wrist cuff alternatives (or alternative approaches that measure pulse rate via photoplethysmography, computer vision facial analysis, or other techniques, for that matter)

I’ve now transitioned to using an Omron BP786N upper-arm cuff device, which also includes Bluetooth connectivity for smartphone data-logging and -archiving purposes.

Dissecting the Samsung BW-325S

Having retired my wrist cuff device, I’ll be tearing it down today to satisfy my own curiosity (and hopefully at least some of yours’ as well). Afterwards, assuming I’m able to reassemble it in a fully functional condition, I’ll probably go ahead and donate it, in the spirit of “ballpark accuracy is better than nothing at all.” That said, I’ll include a note for the recipient suggesting periodic redundant checks with another device, whether at home, at a pharmacy or a medical clinic.

Opening and emptying the box reveals some literature:

along with our patient, initially housed within a rugged plastic case convenient for travel (and as usual, accompanied by a 0.75″ (19.1 mm) diameter U.S. penny for size comparison purposes).

Open Sesame:

I briefly popped in a couple of AAA batteries to show you what the display looks like near-fully digit-populated on measurement startup:

More generally, here are some perspectives of the device from various vantage points, and with the cuff both coiled and extended:

There are two screw heads visible on both the right side, whose sticker is also info-rich:

And the left, specifically inside the hard-to-access battery compartment (another admitted reason why I decided to retire the device):

You know what comes next, right?

Easy peasy:

Complete with a focus shift:

The inside of the top half of the case is comparatively unmemorable, unless you’re into the undersides of front-panel buttons:

That’s more like it:

Look closely (lower left corner, specifically) and you’ll see what looks like evidence that one of the screws that supposedly holds the PCB in place has been missing since the device left the factory:

Turns out, however, that this particular “hole” doesn’t go all the way through; it’s just a raised disc formed in the plastic, to fit inside the PCB hole (thereby holding the PCB in place, horizontally at least). Why, versus a proper hole and associated screw? I dunno (BOM cost reduction?). Nevertheless, let’s remove the other (more accurately: only) screw:

Now we can flip the assembly over:

And rotate it 90° to expose the innards to full view.

We want to pump you up

The pump, valve, and associated tubing are located underneath the PCB:

Directly below the battery compartment is another (white-color) hole, into which fits the pressure transducer attached to the PCB underside:

“Dr. Gough” notes in the teardown of his unit that “The pressure sensor appears to be a differential part with the other side facing inside the case for atmospheric pressure perhaps.”

Speaking of “the other side,” there’s an entire other side of the PCB that we haven’t seen yet. Doing so requires first carefully peeling the adhesive-attached display away:

Revealing, along with some passives, the main control/processing/display IC marked as follows:

86CX23
HL8890
076SATC22 [followed by an unrecognized company logo]

Its supplier, identity, and details remain (definitively, at least) unknown to me, unfortunately, despite plenty of online research (and for what it’s worth, others are baffled as well). Some distributor-published references indicate that the original developer is Sonix, but although that company is involved in semiconductors, its website suggests that it focuses exclusively on fabrication, packaging, and test technologies and equipment. Others have found this same chip in blood pressure monitoring devices from a Taiwan-based personal medical equipment company called Health & Life (referencing the HL in the product code), which makes me wonder if Samsung just relabeled and sold a blood pressure monitor originally designed and built by Health & Life (to wit, in retrospect, note the “Healthy Living” branding all over the device and its packaging), or if Samsung just bought up Health & Life’s excess IC inventory. Insights, readers?

The identity of the other IC in this photo (to the right of the 86CX23-HL) was thankfully easier to ascertain and matched my in-advance suspicion of its function. After cleaning away the glue with isopropyl alcohol and my fingernail, I faintly discerned the following three-line marking:

ATMEL716
24C08AN
C277 D

It’s an Atmel (now Microchip Technology) 24C08 8 Kbit I²C-compatible 2-wire serial EEPROM, presumably used to store logged user data in a nonvolatile fashion that survives system battery expiration, removal, and replacement steps.

All that’s left is to reverse my steps and put everything back together carefully. Reinsert a couple of batteries, press the front panel switch, and…

Huzzah! It lives to measure another person another day! Conceptually, at least …worry not, dear readers, that 180 millimeters of mercury (mmHg) systolic measurement is not accurate. Wrapping up at this point, I await your thoughts in the comments!

 —Brian Dipert is the Editor-in-Chief of the Edge AI and Vision Alliance, and a Senior Analyst at BDTI and Editor-in-Chief of InsideDSP, the company’s online newsletter.

Related Content

• The Smart Ring: Passing fad, or the next big health-monitoring thing?
• Avoiding blood pressure measurement errors
• COVID-19: The long-term implications
• The Smart Ring: Passing fad, or the next big health-monitoring thing?
• Blood Pressure Monitor Design Considerations

The post (Dis)assembling the bill-of-materials list for measuring blood pressure on the wrist appeared first on EDN.

Hello, its my first post here and my first designed pcb board, so if you can please check if everything is okay and workable, before i give it to production. Thank you very much, bellow is the system description. System Description 1. Overview The system is a 24 V DC motor control unit based on the ESP32-WROOM-32E microcontroller module, combined with a Pololu G2 high-power motor driver (21 A version), a buck converter (XL4015), a 3.3 V LDO regulator, and a CAN bus transceiver (SN65HVD230). It is designed to: Control a 24 V brushed DC motor via PWM and direction control. Allow both local control (buttons and sensors) and remote control via CAN bus. Provide robust power supply and protection circuitry for safe operation in an industrial/vehicular environment. 2. Power Supply Chain Main input: +24 V DC from battery or industrial power supply. Protection: TVS diode (5KP30A-E3) clamps voltage surges and transients. 1 A fuse on the logic branch protects the buck converter and microcontroller. Conversion: Buck converter (XL4015) steps 24 V → 5 V. LDO regulator steps 5 V → 3.3 V for the ESP32-WROOM-32E and CAN transceiver. Decoupling capacitors (electrolytic + ceramic) are used at every stage to suppress noise and voltage ripple. 3. Motor Control Motor is driven by the Pololu G2 21 A driver, powered directly from the 24 V rail. ESP32 provides control signals: PWM (GPIO27) → controls motor speed via duty cycle. DIR (GPIO23) → sets rotation direction. SLP (GPIO21) → enables/disables the driver (sleep mode). FLT (GPIO22) → fault feedback from the driver (open-drain, pulled up to 3.3 V). 4. User Interface (Local Control) Buttons (GPIO25, GPIO26): Forward button → run motor forward. Reverse button → run motor in reverse. Sensors (GPIO34, GPIO35, GPIO36, GPIO39 – input only): Four digital sensors provide system feedback (limit switches, safety inputs, etc.). Buzzer (GPIO16): Used for audible alerts or status signaling. 5. Communication (Remote Control) CAN bus interface (SN65HVD230 transceiver): Connected to ESP32’s TWAI controller on GPIO32 (CANTX) and GPIO33 (CANRX). Provides differential CANH/CANL signals to external CAN bus. Used for remote commands (e.g., motor start/stop, direction, speed) and status reporting (sensor states, faults). Termination resistor (120 Ω) can be enabled only if the device is at the bus end. 6. ESP32-WROOM-32E Connections Essential pins: 3V3, GND → power supply. EN → 10 kΩ pull-up to 3.3 V, reset button to GND. IO0 → 10 kΩ pull-up to 3.3 V, boot button to GND (for programming). !!!THE BUTTONS EN AND BOOT WILL NOT BE ON THE BOARD!!! TXD0 (pin 35), RXD0 (pin 34) → connected to CP2102 USB-to-UART bridge for programming and debugging. Functional pins in this design: Motor: GPIO27 (PWM), GPIO23 (DIR), GPIO21 (SLP), GPIO22 (FLT). Sensors: GPIO34, 35, 36, 39. Buttons: GPIO25, 26. Buzzer: GPIO16. CAN bus: GPIO32 (TX), GPIO33 (RX). submitted by /u/kustajucan [link] [comments]

Mining exploration company Nimy Resources Ltd of Perth, Western Australia has signed a non-binding memorandum of understanding with Nevada-based M2i Global Inc (Minerals Metals Initiatives) for the sale of gallium from Nimy’s Block 3 discovery in Western Australia...

On stand #C2421 at the European Conference on Optical Communication (ECOC 2025) at the Bella Center in Copenhagen, Denmark (29 September–1 October), Lumentum Holdings Inc of San Jose, CA, USA (which designs and makes optical and photonic products for optical networks and lasers for industrial and consumer markets) is giving several live technology and product demonstrations, reinforcing its focus on enabling AI-driven data centers and the world’s largest communications networks...

When we ask if AI knows anything, we are, in the strictest sense, not referring to memory or experience as humans would. Instead, we are exploring a very complex mathematical domain in which AI predicts what comes next in a language. Upon realization, AI is not a particular source of truth; it is a system that simulates understanding through patterns, probabilities, and memory architecture. This article attempts to unravel the puzzle of how AI converts text into knowledge-like predictions, from tokens and embeddings to the machines that carry out these operations.

From Words to Tokens

AI does not interpret after human fashion. Upon encountering the sentence “The moral of Snow White is to never eat …,” it first converts it into some string of tokens-the smallest units it can process. Tokens can be whole words, parts of words, punctuations, or spaces. For example, the sentence above would be tokenized as:

[“The” | ” moral” | ” of” | ” Snow” | ” White” | ” is” | ” to” | ” never” | ” eat”]

This conversion is only the initial step of a highly structured process that takes human language and converts it into something an AI can work with.

Embeddings: From Tokens to Numbers

Upon tokenization, each token is mapped to an embedding-an abstract numerical representation revealing the statistical relationship S-theory between words. These embeddings exist in a high-dimensional embedding space-theoretical map of word associations learned after the analysis of great volumes of text. Words that appear in similar contexts cluster together-not really because the AI “understands” them in the human sense-but because language-based hypothesis-building patterns suggest they are related. For instance, “pirouette” and “arabesque” might cluster together, just as “apples” and “caramel.” The AI does not comprehend these words in human terms; it simply recognizes patterns of their co-occurrence.

Simulated Knowledge

Human beings derive meaning from experience, culture, and sensation. AI, on the other hand, simulates knowledge. So, when arguing for sentence completion, it invents statements: “food from strangers,” “a poisoned apple,” or simply “apples.” Each is statistically plausible, yet none comes from comprehension. AI is about predicting what is likely to be next, not what is “true” in a human sense.

The Abstract World of the Embedding Space

Embedding space is where AI’s predictions live. Each word becomes a point in hundreds or thousands of dimensions, having something to do with the patterns of meaning, syntax, and context. For example, in a simplified 2D space, “apple” might cluster near “fruit” and “red.” Add more dimensions, and it could relate to “knowledge,” “temptation,” or even “technology,” denoting its cultural and contextual associations.

Because such spaces are high-dimensional, they cannot be directly visualized, but serve as a backdrop against an AI’s scenario of language prediction. The AI does not consider concepts or narrative tension; it calculates statistically coherent sequences.

From Math to Memory

These embeddings are not just theoretical matrices; they require physical memory. The embedding of each token consists of hundreds or thousands of numerical entries, which are stored in various memory systems and worked upon by hardware. As the size of the AI model increases and it accords with more tokens, memory turns out to be one major issue, regarding the speed and complexity of predictions.

Originally created for scientific work, High-bandwidth memory (HBM) would be applied towards AI so models can efficiently handle overwhelming amounts of data. Memory is no longer merely a storage device; it determines the amount of context an AI remembers from training examples and how quickly it accesses this information to make predictions.

Looking Ahead

The knowledge base of an AI has always depended on what the AI can hold in-memory. As longer conversations or more complicated prompts would require more tokens and embeddings, so would the memory requirements. These limitations end up shaping the way the AI represents the context and keeps coherence in text generation.

Understanding AI’s statistical and hardware basis does not undermine the usefulness of AI; rather, it sets its interpretation to that of a very complex system of probabilities and memory, instead of some kind of conscious understanding.

(This article has been adapted and modified from content on Micron.)

The post Understanding AI’s “Knowledge” — Patterns, Probabilities, and Memory appeared first on ELE Times.

hi hi again. this is post about the simplest OP-amp you can imagine with just few components. But i feel like it’s still incorrect or i’m missing something. I will try to explain what is it for and why i made it this way and if you have something to say - please do ✨ what is it for? eeg / bci / ecg active electrode. it should help to reduce noise pickup from network, cable rattling, body movements. Regarding schematic - it will be paired with ADS1299. ADC itself provides bias and moves body potential to mid point of it’s own voltage range. that is why i don’t lift signal up, it should be in the middle between ground and +5V already as soon as bias done it’s job. Another moment - you don’t see reference because reference comes as any other signal from it’s separate electrode to ADC pin. So i just need to make sure that all my electrodes and reference are exactly the same (as in case of passive electrodes) and i will get common mode rejection on adc side as usual. why an active electrode. Skin has high impedance contact point, it means wire will pickup everything from network noise, body moments, cable rattling. Main goal if the active electrode is to pock up signal and convert load from high to low. Unity-gain, buffer, Voltage follower Operational amplifier. Based on what i found the best and simplest approach to start with is an operational amplifier in unity gain mode. It’s also called Voltage follower. Why? because it converts high impedance input into low impedance output - all affects of cables and network will go donw significantly even tho it just repeats signal. which OP-amp to get. with low bias, as high impedance you can and as low noise from 0 to 1kHz as possible. You need JFET / CMOS / Electrometer-grade OP-amps (some times they have a different section when you search, so just in case). I decided to use OPA392. it looks good enough for first version and it also looks relatively new. Power. I have my board in unipolar mode, so it means i need +5V and Ground (which is 0V). Power must be filtered so right at the pin of OP-amp we put 10uF and 100nF caps. i guess type of those does not matter to much, since they are mostly just for filtering of the noise. but, ceramic i guess. Low pass filter (LPF). in general, i don’t think i need it that much, since at the ADC pins we have RC LPF which cuts everything above 7 kHz or so. But! i see everyone uses some kind of filters and there is nothing for us to measure above 1kHz or so, so i decided to add filter like in other works i found and based on what i’ve heard from other people - Sallen-Key LPF. for that one, based on small research component tolerances are important. the best most stable and easiest ratios of Resistor and Caps are R1=R2 and cap which is in the feedback loop is twice the capacitance of the one which sits on the ground. Resistors are thin film 0.1%, caps are NP0/C0G. since it was hard to find exactly double of capacitance i just got 3 of the same ones and put two of them in parallel. Now we have unity gain and second order Butterwort LPF. should work just fine. If you google sallen-key you will find ton of calculators online and youtube lectures - pic the one you like, i’m not sure i have one i lime the most, i opened all of them and put the same numbers and checked that frequency response and all numbers are the same between them. you can see example i’ve added to the schematic. Decoupling resistor at the output of the board. R3 of 100 Ohm as it says on schematic is for decoupling from capacitive load of the wire. literature says OP-amp does not like capacitive load and i’ve seen almost all active electrodes have one. Driven guard / active guard. interestingly enough when i was trying to understand how to put ground around components and shield everything internet told me i better to use Active Guard, when instead of ground polygon around components i better to have Vout (after R3) as surrounding polygon and a small ring around the electrode. what it does, it decreases potential difference around the electrode and electrode pin reducing parasitic capacitance and noise as a result. Protection. i don’t have diodes anywhere because i don’t understand where to put them. Towards the body? on the ground? towards 5V? i’ve seen so many versions i just don’t understand where >__<. they also called clamping diodes. if you know how to set them up - please let me know. Regarding input resistance on the electrode itself - i found that there is a standard and it says something like you must have at least 10 kOhm for safety reasons on any lead / touching part. so two resistors i have kind of give that. Yes, there is a cap in between, but i hope it’s ok. Problems i wasn’t ready for. So, having active electrode means i have to connect all of them to my 5V rail. It means, that my pure clean 5V i have made for ADC power, which are hidden in the 3rd layer between ground layers, with no polygon breakouts and with ground guarding vias literally every few mm - so now i have 16 long wires which are low impedance i guess but still basicaly additional capacitance, inductance and noise sources… i’m not sure it’s good. but also other people use it… maybe it’s not that bad. But i feel like adding to my board option to connect active electrodes would need several changes to make sure i will not trash signal quality and will not add noise to it through power rail. that is it, thanks for reading. submitted by /u/Meow-Corp [link] [comments]

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Beyond 300 Layers of Memory

The race to make denser, more-powerful 3D NAND flash memory has led to huge innovation but also new manufacturing challenges. Taller devices-three-hundred-plus layers-could be threatened in yield, performance, and reliability due to constructive-tier bending and material collapse. In this sense, these challenges come from stress mismatches in alternating stacks of silicon nitride (SiN) and oxide (TEOS) layers that constitute this memory structure.

To comprehend and solve the problem, the Semiverse Solutions team used SEMulator3D virtual Design of Experiments (DOE) to replicate, measure, and analyze stress-induced deformation in the fabrication process. The outcomes emphasize the very important consideration of stress management and material properties in realizing manufacturable high-layer-count NAND architectures.

Understanding How 3D NAND Is Built

It achieves higher densities in 3D NAND by stacking SiN and oxide layers vertically in a staircase arrangement. Contacts are etched through such tall stacks to reach underlying transistors, and slit etchings divide the structure into functional memory blocks.

Until SiN can be replaced by conductive metal, an oxide cantilever is temporarily formed: it is anchored at one end while being unsupported at the other end. This rather fragile structure increasingly becomes vulnerable as the number of layers grows, expanding from ~550 nm at 200 layers to ~700 nm at 300 layers. Various contributors to tier collapse are as follows:

• Stress and strain mismatches between SiN and oxide
• Surface tension during SiN removal
• Cantilever length and geometry

What the Virtual Studies Revealed

Using SEMulator3D’s stress analysis tools, the team conducted two DOE studies to characterize how stress may evolve with tier bending and collapse.

Key findings from the first DOE:

• SiN Stiffness (Young’s Modulus, Ey) and oxide thickness are the dominant variables influencing stress-based deformation.
• Present at low Ey values (70 GPa) due to minimal displacement.
• At 125 GPa, collapse occurred at longer cantilever lengths (700 nm), especially with thinner oxides.
• At 256 GPa, severe displacement and voiding occurred across all test conditions.
• Increasing oxide thickness improved resistance but did not eliminate failure risks.

The second DOE compared the effects of intrinsic SiN stress (compressive vs. tensile). Results showed compressive SiN caused larger displacements, widening the range of potential collapse.

The manufacturing implications

These studies present obvious engineer methods that can be employed to maximize yields in ultra-high-layer NAND:

• The SiN and oxide stress values need to be matched and hopefully reduced.
• Shorten cantilever length by designing an etch profile.
• If possible, increase oxide thickness to stabilize the stack.

Through virtual simulation of these interactions, SEMulator3D engineers have the ability to realize the process changes that actually matter without being solely reliant on expensive experimental work on the actual silicon.

Conclusion

With NAND flash closing in on 300 layers and more, tier bending and collapse remain edge manufacturing threats. Stress analyses and virtual DOE studies by the Semiverse team have revealed that exacting control of material properties and stack geometry is key to both securing yields and shortening time to market.

With the SEMulator3D platform from Lam Research, chipmakers gain a powerful predictive lens helping transform potential failure points into opportunities for robust, scalable memory innovation.

(This article has been adapted and modified from content on Lam Research.)

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