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With first ASIC-based zone triggering for MXO oscilloscopes, Rohde & Schwarz breaks acquisition rate records

ELE Times - Thu, 07/18/2024 - 11:56

Rohde & Schwarz further strengthens its oscilloscope portfolio by introducing the industry’s first ASICbased zone triggering. With this new approach, the MXO series can offer the world’s fastest zone trigger update rate of up to 600.000 waveforms per second and less than 1.45 us blind time between trigger events. It is up to 10 000 faster than competitive zone triggering offerings. Thanks to the new ASICbased zone triggeringMXO oscilloscopes can precisely isolate events where traditional triggering does not provide the needed flexibility.

Rohde & Schwarz has developed the industry’s first ASICbased zone triggering, implemented in the new MXO series oscilloscopes. This new functionality enhances the oscilloscopes’ ability to precisely isolate events that are difficult or impossible to detect with traditional oscilloscope triggers. Furthermore, the MXO zone trigger implementation is the industry’s fastest, surpassing others by several orders of magnitude.

Traditional oscilloscope trigger types – such as edge triggering – are often difficult to set up and/or inadequate to visualize certain trigger events. Zone triggering, on the other hand, allows users to specify trigger conditions by drawing one or more zone areas on the instrument’s display. The oscilloscope then inspects each acquisition for these conditions and shows the acquisitions on the display for events that meet the graphical conditions. If an event does not meet the graphical conditions, the waveform is discarded and not shown. Zone triggering can be very effective for triggering on non-monotonic edges, serial bus patterns, math waveforms, events across multiple channels, and events in the frequency domain. For these use cases traditional oscilloscope triggers simply do not work. The new zone triggering from Rohde & Schwarz is the world’s first ASICbased solution that works on analog channel signals, math and spectrum.

Philip Diegmann, Vice President Oscilloscopes at Rohde & Schwarz, says: “The next-generation MXO-EP processing ASIC technology developed by Rohde & Schwarz is the foundation of the breakthrough signal visibility and user responsiveness of the MXO series. The chip design was laid out to have further hardware acceleration capabilities enabled down the road. This way we keep providing new functionalities to our oscilloscope customers never before seen in the industry. With MXO zone triggering, users obtain additional triggering capabilities without having to incur significant trigger blind times that historically have diminished the value of software-based zone triggering solutions.”

With the MXO zone triggering, users testing and debugging in the frequency domain using an oscilloscope can now draw specific zone areas. The oscilloscope will then trigger or activate when a certain tone exceeds a set power level within these zones. Or users can simply draw a zone for RF chirps or pulses. New to the industry is the MXO’s free run mode, where the oscilloscope captures as fast as possible without looking for an edge trigger event. Combining this with zone triggering can be very effective for power integrity measurements and EMI debug.

MXO zone triggering incorporates a new feature previously not found in the market: the ability to exclusively store waveforms in real time that match zone trigger criteria. This functionality enables users to exclusively focus on specific events relevant to their application.

Rohde & Schwarz offers the new ASICbased zone triggering functionality as a standard feature for all MXO 4, MXO 5, and MXO 5C series oscilloscopes, beginning with version 2.2 firmware. The firmware is available as a free download on the web. Existing MXO users can update their instruments for free.

The post With first ASIC-based zone triggering for MXO oscilloscopes, Rohde & Schwarz breaks acquisition rate records appeared first on ELE Times.

UK can capitalize on data-center boom, reckons CSA Catapult’s CEO

Semiconductor today - Thu, 07/18/2024 - 11:39
There is a significant opportunity for the UK to play a leading role in developing future technologies for data centers, according to Martin McHugh, CEO of the Compound Semiconductor Applications (CSA) Catapult in Newport, South Wales. ..

My first flyback high voltage generator

Reddit:Electronics - Thu, 07/18/2024 - 06:18

I recently made a 555 flyback high voltage generator. It uses a 555 timer whose output goes into a BJT to drive a mosfet which switches current to my primary coil (8 turns).

submitted by /u/irf3205
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Hold that peak with a PIC

EDN Network - Wed, 07/17/2024 - 18:57

Capturing transient analog signals with a microcontroller normally involves adding a full-fat peak-hold circuit as an external peripheral. This novel approach minimizes that extra hardware by using a µP’s ability to switch its pins between analog and digital modes on the fly. While this DI specifically uses a PIC, the principle can be applied to any device with that capability.

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Figure 1 shows the basics. We may want to add some complications later.

Figure 1 The basic peak-hold circuit. The PIC pin labelled ANA samples the voltage on C1 and then resets it to ground, ready for the next sample.

A1 and D1 form an “active diode”, which rapidly charges C1 to the peak input voltage through R1 whenever A1’s non-inverting input is higher than the diode’s output voltage and hence that on the inverting input. C1 holds its charge as it has no discharge path—leakages excepted—until the PIC needs to sample it, when the ADC is assigned to the relevant input pin (marked as ANA) which starts the acquisition period, during which C1’s charge is shared with the PIC’s internal CHOLD. Once this is done, the conversion can be started, which also immediately disconnects that pin from the ADC, allowing it to be changed from analog input to digital output (active low) to discharge C1, resetting the circuit ready for the next cycle. Thus, a single processor pin performs two functions. Figure 2 shows typical code for the essentials.

Figure 2 Simplified code for capturing the voltage held on C1 and then immediately discharging it to reset the circuit ready for the next sampling cycle.

Now that we’ve got it working, it’s time to point out its shortcomings and suggest some workarounds. 

The voltage across C1 can never be higher than a diode-drop below A1’s VDD, which limits the effective measurement range. (Although a Schottky diode with its lower forward voltage could be used for D1, the higher reverse leakage will compromise accuracy.) If the input must cover the full span, it’s easiest to pot it down first, and either accept a slightly limited resolution on measurements or use a lower reference voltage (2.55 V might be ideal) for the DAC. A1’s VDD can be boosted—see later on—to allow a full positive swing. Similarly, its VSS could be pushed negative if readings needed to be taken very close to ground. Again: see later.

Any input offset in A1 will affect precision. 1 LSB is about 13 mV when using 8 bits with a 3.3 V reference, or ~800 µV with 12 bits, so the allowable offset is half that. (The MCP6021’s offset is quoted as being 500 µV at most.)

Note that while C1’s voltage will be measured with respect to the PIC’s AVSS—or perhaps its VREF- pin—it will be discharged to DVSS. (The lower pin-count devices combine AVSS and DVSS on a single ground pin.) Be cautious of any relative offset between them if accuracy is paramount at low input levels. Microcontrollers are often put to sleep during analog measurements to minimize such errors, which can vary according to how hard the device is working.

A more subtle source of errors is inherent in the ADC’s operation. Internally, it uses a small capacitor (CHOLD), anywhere from 10 pF to 120 pF depending on the device’s vintage, to hold the input for processing. The charge on the external capacitor C1 is shared with the internal one during the acquisition time, so unless the ADC is actually connected to the pin when the input pulse arrives, it will read low, scaled by C1 / (C1 + CHOLD). With C1 = 10 nF and if the DAC’s CHOLD = 10 pF, as in the more modern PICs, the error will be ~1 LSB for a 10-bit result, but negligible for 8 bits; lower values of C1 will lead to greater errors.

If that input pulse is shorter than the reset period and arrives while the pin is being held low, it will be attenuated and effectively lost. (And make sure that A1’s decoupling cap can source the inevitable power transient.) Adding an extra MOSFET (extra GPIO pin required, as shown in Figure 2, below) allows ‘instant’ resetting (or around a thousand times faster, probably within a single instruction cycle), and to a genuine ground rather than the PIC’s internal one. (The ADC’s pin would then be left in analog mode.) A cure in ultra-critical situations might be to duplicate the hold circuitry on another pin and sample each channel alternately, selecting the higher reading in code.

In my original application, which was measuring the strength of RF signal bursts, none of these points was a problem, as the input was always between 0.2 and 2.5 V and lasted for hundreds of microseconds, while the output was scaled to read from 0 to 9.

Despite these reservations, this open-loop approach can be faster than the standard configuration which wraps an op-amp round the capacitor. Because C1 is driven directly, the rise-time of the input pulse can now be as fast as you like. A1’s output may overshoot momentarily, but the glitch will be absorbed by the longer time-constant of R1C1.

For accuracy, R1 should be chosen so that the op-amp’s output drive never exceeds its current-limit value, as that would break the feedback loop, resulting in overshoot and a falsely high reading. Also, for clean operation, time-constant R1C1 should be no less than A1’s rail-to-rail slewing time. The 10n + 47R (470 ns is about the same as the measured slew) allowed for accurate measurements of 2.5 V pulses as short as ~3 µs. Experiments showed that R1 could be reduced to 27R, giving a -10% error for 1 µs / 2.5 V input pulses.

C1’s discharge time to half an LSB will be ~1.6 × (NumberOfBits + 1) × C1 × ROUT(LOW), where the latter term will typically be ~100 Ω for PICs working at 3.3 V. (That “~1.6” is of course 1 / (1 – 1 / e).) For 8 bits, 10 nF, and 100 Ω; that’s about 14 µs, which can be reduced if you don’t need to measure right down to ground. (Some PICs can struggle there, anyway, especially if they use an internal op-amp in the ADC’s input path.) Choosing to cancel the reset and re-enable the analog input as soon as the A–D conversion finished, which took ~20 µs in my implementation, was more than adequate and simplified the code.

A1 is shown as a Microchip MCP6021 (CMOS, RRIO, 2.5–5.5 V, 10 MHz GBW, <500 µV offset). The MCP6001 is cheaper but less well-specified. As an aside, the dual MCP6022 is great for 5 V experimenting and prototyping because it is available in DIP-8.

As drawn in Figure 1, A1 can be fed from a GPIO pin, allowing it to be powered down when the PIC is asleep. This obviously limits its VDD to the PIC’s supply voltage, restricting the input range as noted above. If you need the full range and a higher switched rail is available, use that; if not, a simple voltage-doubler, probably fed from a PWM output, provides a fix.

The MCP6021’s output drives low to within ~5 mV of its VSS (<1/2 LSB with 8 bits). To operate right down to ground, another voltage-doubler can provide a boosted negative feed, with a simple regulator reducing this to -0.6 V for low-voltage op-amps. Make sure that the total voltage across A1 is within its limits; an extra diode in the positive doubler—D6 in Figure 3—may be needed to guarantee this. All these add-ons are lumped together in Figure 3. PICs’ pin-protection diodes are rated at 25 mA and should be safe with the increased voltages under any fault conditions. While these simple PIC-driven voltage-doublers are only good for a few milliamps, they could help power other devices if need be.

All this raises a reality-checking question: what’s powering the upstream circuitry, and is it really delivering a rail-to-rail signal? If not, we don’t need to fuss.

Figure 3 Boosting the op-amp’s supply rails can give true rail-to-rail operation while an extra MOSFET allows “instantaneous” resetting of C1.

Another reality check: if both boosted rails are available, why not use a higher-voltage, non-RRIO op-amp? The negative regulator Q2/3, etc. then becomes unnecessary. The extra complications shown in Figure 2 probably won’t be needed here anyway but may come in handy elsewhere.

Largely because of a PIC’s limitations, the simple circuit of Figure 1 is accurate rather than absolutely precise, but has still proved reliable and useful, especially where board space was at a premium. It could also be appropriate as a front end for an external peak-sensing A–D peripheral. The underlying principle could also be used in microprocessor-based kit to clamp a signal line to ground, albeit with 100 Ω or so effectively in series, perhaps where a MOSFET would add too much capacitance.

Nick Cornford built his first crystal set at 10, and since then has designed professional audio equipment, many datacomm products, and technical security kit. He has at last retired. Mostly. Sort of.

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MACOM dedicates Lowell Campus to John Ocampo

Semiconductor today - Wed, 07/17/2024 - 18:02
MACOM Technology Solutions Inc of Lowell, MA, USA (which designs and makes RF, microwave, analog and mixed-signal and optical semiconductor technologies) has held a special dedication ceremony to inaugurate the John L. Ocampo Technology Campus, in memory of the late John Ocampo, who passed away in November 2023. The campus in Lowell is home to one of MACOM’s semiconductor wafer fabrication facilities, research and development centers, and its corporate headquarters...

Automotive processor IP complies with ISO 21434 cybersecurity

EDN Network - Wed, 07/17/2024 - 16:26

After the widespread adoption of the ISO 26262 functional safety standard in automotive designs, another standard is taking hold to protect connected vehicles from malicious cyberattacks. The ISO/SAE 21434 standard defines the engineering requirements for cybersecurity risk management to ensure that cyber risks are monitored, detected, and mitigated throughout the vehicle’s lifecycle.

Today, Synopsys announced that SGS-TṺV Saar has certified its ARC HS4xFS processor IP for ISO/SAE 21434 cybersecurity standard. This processor IP has already been certified to the ISO 26262 standard and meets ASIL D Random and ASIL D Systematic compliance for safety-critical systems.

Figure 1 The ARC HSxFS processors simplify the development of high-performance safety-critical applications and accelerate ISO 26262 safety and ISO/SAE 21434 cybersecurity certification of automotive SoCs. Source: Synopsys

The Synopsys ARC HSxFS functional safety processors—optimized for high-performance embedded applications—feature a dual-issue, 32-bit superscalar architecture with a small area footprint and low power consumption. Its compliance with cybersecurity requirements will reduce design risk and accelerate time-to-market for safe and robust systems-on-chips (SoCs).

But what’s driving the adoption of the ISO/SAE 21434 cybersecurity standard? For a start, cars are increasingly becoming software-defined while automakers add new features or functions remotely through over-the-air (OTA) software updates. Then there are other connected applications like vehicle telematics and smartphone connectivity.

So, the United Nations Economic Commission for Europe’s UN R155 regulation now mandates that automotive OEMs adopt a cybersecurity management system like ISO/SAE 21434. Automotive chip vendors are also acknowledging the critical importance of ISO 21434-certified IPs.

“As a supplier of highly reliable microcontrollers for use in automotive systems, it is critical that our products meet automotive cybersecurity standards to minimize the vulnerability to cyberattacks,” said Joerg Schepers, VP for automotive microcontrollers at Infineon.

Figure 2 Automotive vendors must adhere to tougher cybersecurity regulations amid increased hardware and software vulnerabilities in connected cars. Source: Synopsys

IP suppliers like Synopsys complying with the ISO/SAE 21434 cybersecurity standard show that the automotive industry is starting to address evolving cybersecurity threats. After the automotive industry recognized the vital need for safety, engineers are now focusing on security in chips for connected vehicles.

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Rocket Lab celebrates CHIPS Act funding preliminary agreement

Semiconductor today - Wed, 07/17/2024 - 16:25
The executive leadership of launch services and space systems provider Rocket Lab USA Inc of Long Beach, CA, USA welcomed government and community leaders (including Congressional leaders and state and local officials) at its space-grade solar cell manufacturing facility in Albuquerque, New Mexico on 15 July to celebrate its signed preliminary agreement under the US CHIPS and Science Act...

🐧 Конкурс у 30-ту Українську антарктичну експедицію

Новини - Wed, 07/17/2024 - 14:50
🐧 Конкурс у 30-ту Українську антарктичну експедицію
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kpi ср, 07/17/2024 - 14:50
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Стартував відкритий конкурс у 30-ту Українську антарктичну експедицію, учасники якої працюватимуть на станції «Академік Вернадський» у 2025–2026 роках.

Navitas teams with Japanese sales & marketing partner J Rep at Techno-Frontier

Semiconductor today - Wed, 07/17/2024 - 12:04
Gallium nitride (GaN) power IC and silicon carbide (SiC) technology firm Navitas Semiconductor of Torrance, CA, USA is teaming up with its Japanese sales & marketing partner J Rep (which specializes in power electronics) at Japan’s largest power electronics trade show, Techno-Frontier 2024, at the Tokyo Big Sight Exhibition Center (24–26 July) to highlight solutions including a hybrid GaN-SiC AI server power supply unit (PSU), a 3-phase GaN industrial motor drive requiring no heat-sink, and a GaN-based 8K-LED TV power supply that enables the thinnest and highest-efficiency solution...

Axus wins orders for Capstone CMP system from SiC device makers

Semiconductor today - Wed, 07/17/2024 - 11:10
Axus Technology of Chandler, AZ, USA – a provider of chemical-mechanical planarization (CMP), wafer thinning and surface-processing solutions – has reported strong sales momentum for its Capstone CS200 Series of CMP processing tools. In recent months, the firm has received orders from silicon carbide (SiC) semiconductor makers in Europe, Asia and North America...

Leading our industry towards Viksit Bharat: Progressing through Policies & Reforms

ELE Times - Wed, 07/17/2024 - 10:04

The government of India is in the process of revamping the National Policy on Electronics to boost various sectors and integrating India into global value chains to tackle the discrepancies in the current policy and ensure that India’s electronics manufacturing sector meets its ambitious targets.

This revamping aims to address the industry’s current challenges and align with the goal of generating USD400 billion from the ESDM sector by 2025 and rejuvenate electronics manufacturing industry and bolster exports.

India’s electronics manufacturing sector has seen tremendous growth, with output reaching $115 billion and exports totalling $29.1 billion, making it the country’s fifth-largest export category.

Since the Union Budget 2024-25 is round the corner which may be presented on 24th July, the government has the chance to realise the dreams of the electronics industry by working on the recommendations of the industry associations on the key domains including mobile phones, IT hardware, capital goods, components, consumer electronics, automotive electronics, medical electronics, industrial and strategic electronics, closed-circuit televisions (CCTVs), wearable and hearable devices, and LED lighting. The industry bodies are urging the government to consider significant changes in the upcoming Union Budget to enhance the competitiveness of India’s electronics industry.

Industry’s recommendations of bringing components used in electronic goods under the PLI scheme and rationalising tariffs on inputs in the upcoming budget seems to be valid demands. The demands aimed at attracting global value chains and scaling up production and exports in the next years to come.

The industry bodies have few recommendations for this budget. It includes: duty for input parts of sub-assemblies to 0%; Peak duties for sub-assemblies: Reduce from 20% to 15%; Remove 2.5% nuisance tariffs on input parts and Allocate Rs 35K-40K crore for parts PLI.

The following recommendations are also worth consideration in the long-term development of the industry Viz. Rs 75,000 crore over 3-5 years to establish collaborative R&D centres, Rs 10,000 crore over 3 years to train manpower for high-end semiconductor and parts manufacturing, higher local value addition, requiring significant improvement, one-day customs clearance turnaround, reduced from the current 3 days, zero duties on raw materials for electronics parts in the national technology policy for 3 years.

In order to create a self-reliant and sustainable electronics manufacturing industry, it is important to develop a components and sub-assembly ecosystem in India. For the same the government should provide appropriate policy and financial support for building large-scale components and sub-assembly ecosystems.

At the time when the electronics companies are shifting from China to other parts of the world, our vision should be to make the congenial and investment friendly atmosphere along with offering the level playing ground to domestic manufacturers so as to elevate the current growth trajectory of electronics manufacturing to new heights.

By implementing focused policies, providing financial support, and maintaining globally competitive tax regimes, India can emerge as a leader in the global electronics industry. This is the moment to harness our potential through innovation, self-reliance, and strategic planning.

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STMicroelectronics reveals new single-zone direct-ToF sensor with extended operating temperature for industrial applications

ELE Times - Wed, 07/17/2024 - 08:27

STMicroelectronics has introduced the VL53L4ED single-zone Time-of-Flight (ToF) sensor, which has an extended operating temperature range from -40°C to 105°C. Ready for harsh environments, the VL53L4ED enhances proximity detection and ranging under high ambient light conditions in applications such as industrial tools, smart-factory equipment, robot guidance systems, outdoor lighting controls, and security systems.

Expanding ST’s VL53L4 family of direct-ToF sensors, the VL53L4ED integrates a laser emitter and a single-photon avalanche-diode (SPAD) detector array in a convenient all-in-one module which ensures reliable measurement even in extreme temperature conditions. The next-generation laser provides enhanced performance in high ambient light environments and excellent short-distance ranging accuracy. In addition, the sensors embed a processor that allows power-saving autonomous operation and lowers demand for host-system resources.

ST’s new ToF sensor provides high-accuracy distance measurement to objects up to 1150mm away, throughout the entire field of view and over the full extended temperature range. Special settings allow accurate distance measurement up to 800mm under strong ambient light conditions. The VL53L4ED sensor maintains distance-measurement linearity down to 1mm and supports ranging frequency up to 100Hz.

Developers can take advantage of the X-CUBE-TOF1 expansion software package for the STM32Cube ecosystem to accelerate projects using the VL53L4 sensor family. Ready-to-use software includes as well the STSW-IMG034 driver that lets an interrupt command turn the VL53L4ED or VL53L4CD into an ultra-low-power proximity detector for user detection, system activation, and touchless control. In addition, the STSW-IMG039 software pack contains code examples for liquid-level monitoring. Hardware includes the X-NUCLEO-53L4A3 expansion board for the NUCLEO-F401RE microcontroller board, which eases running code examples and building applications, as well as the SATEL-VL53L4ED breakout board for prototyping.

All the VL53L4 sensors are pin-compatible and offered in a 4.4mm x 2.4mm x 1mm-high LGA package. The new VL53L4ED is in production now, priced from $2.3 for 4500 pieces.

For more information, please visit www.st.com/en/imaging-and-photonics-solutions/vl53l4ed.html

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Протокол засідання ректорату від 15 липня 2024 року

Новини - Tue, 07/16/2024 - 18:59
Протокол засідання ректорату від 15 липня 2024 року
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kpi вт, 07/16/2024 - 18:59
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Протокол засідання ректорату - оперативного штабу реагування та забезпечення життєдіяльності університету від 15 липня 2024 року

Walmart’s onn. UHD streaming device: Android TV at a compelling price

EDN Network - Tue, 07/16/2024 - 18:28

As I most recently mentioned back in March, I’ve dissected a lot of media streamers over the years, most of them from well-known suppliers such as Amazon, Apple, Google and Roku. One manufacturer you might not be aware of, although seemingly a growing presence in this segment of the electronics business, is Walmart, with its line of streamers and other products branded via the onn. moniker. Walmart? Why?

Originally, I thought that the company’s media streamer “push” might be related to its 2010 acquisition of Vudu, one of the early pioneers in online media content distribution (where it competed against, for example, the then-embryonic online division at then-optical-disc-still-dominant Netflix). But then I learned while researching this particular piece that Walmart had subsequently sold Vudu to Fandango a decade later (in 2020), which made Walmart’s subsequent partnership with Paramount+ more sensical…on that note, the onn. UHD Streaming Device we’re looking at today wasn’t introduced until mid-2021.

So again, why? I suspect it has at least something to do with the Android TV-then-Google TV commodity software foundation on which Google’s own Chromecast with Google TV series along with the TiVo box I tore down for March 2024 publication (for example) are also based, which also allows for generic hardware. Combine that with a widespread distribution network:

Today, Walmart operates more than 10,500 stores and clubs in 19 countries and eCommerce websites.

and a compelling (translation: impulse purchase candidate) price point ($30 at intro, vs $20 more for the comparable-resolution 4K variant of Google’s own Chromecast with Google TV). And you’ve got, I suspect Walmart executives were thinking, a winner on your hands, starting with the original Android TV-based UHD (3840×2160 pixel, alternately stated as 4-times 1920×1080 pixel FHD) Streaming Device “box”, soon afterward joined by a FHD “stick” sibling, and both subsequently obsoleted by Google TV-based successors…all of which are queued up on the bookshelf to my right for sooner-or-later teardown purposes.

When I bought the UHD Streaming Device we’ll be dissecting today in October 2021 (with a teardown in mind from the very beginning…clearly, it took me a while to actualize this particular aspiration!), it was even less expensive, $19.88 online. Here are “stock” images of it:

its companion remote control:

the full kit contents, also including a HDMI cable and a microUSB-connection power supply:

and a representation of what it all looks like hooked up and operational:

And here are the outer box shots of today’s actual patient:

Cute, huh?

Let’s see what’s inside…

The smaller of the two internal cardboard enclosures houses the Bluetooth-interface remote control and its pair of AAA batteries. I’ll take a pass on dissecting the former, instead keeping it as a spare under the assumption that it’ll also work with newer-generation Walmart onn. devices. The latter will assuredly find alternative use elsewhere:

The larger inside box contains the media streamer device, along with its companion power supply and a HDMI cable (which will also assuredly find alternative use elsewhere):

Here are a couple of closeup shots of the PSU, showcasing its microUSB output and specs:

Post-teardown, I happened to also notice a bit of documentation still stuck inside the outer box:

And now for our patient, as usual accompanied by a 0.75″ (19.1 mm) diameter U.S. penny for size comparison purposes (per the product page, the device has dimensions of 4.90” x 4.90” x 0.80” and weighs 1.2 lbs., which seems overly heavy to me. Mebbe that latter spec also included the box and everything else in it?). Top first:

Now the bottom:

Here’s a closeup of the underside sticker, revealing (among other things) FCC ID H8N-8822CS. Note, too the “Contains” prefix, which I hadn’t encountered before. Hold that thought:

I hesitate a bit to call this next viewpoint the “front” because I wouldn’t personally be enthralled with seeing a microUSB cable sticking out of a device sitting on top of my TV, but absent any better idea I’ll go with it per the “representation of what it all looks like hooked up and operational” stock photo I showed earlier (a reminder, too, that the blue glow seen here and in other shots is from the OWC MiniStack STX on my desk behind the teardown victim):

If the previous shot was indeed of the “front”, then I guess this one’s of the bare left side:

Around back is the HDMI connector:

And last but not least, on the right side, are an activity LED and a remote control pairing (along with multi-function undocumented factory reset and recovery mode access) switch:

That underside sticker I showed you earlier is often a pathway inside a device (specifically, via screws or other latching mechanisms underneath it), but not so in this case (bad pun intended). Instead, I focused my “spudger” attention on the seam running around the bottom edges:

That did the trick!

See the two screw heads, one in the upper right and the other at lower left?

You know what comes next, right?

Be free, little PCB!

And now the PCB topside is exposed to view, too:

Note the sizeable heatsink here! Heat rises, don’cha know, therefore the topside presence.

You probably already saw those Faraday cages on both sides, too. And regular readers already know what comes next now. Bottom side first:

I couldn’t get the cage to pop cleanly off but ripping it to shreds instead accomplished the same “see what’s underneath” objective 😀 albeit with a less cosmetically attractive outcome. That’s a Nanya Technology NT5AD512M16H4-HR 8 Gbit DDR4-2666 x16 SDRAM under the lid. And below it, normally exposed to view, is a Samsung KLM8G1GETF-B041 8 GByte eMMC flash memory module.

Now back to the topside. The cage top popped off cleanly this time:

Here’s a closeup:

Easy stuff first: at top is the HDMI connector. At bottom is the microSD power input. To the right is the multi-function switch. And above/next to it is the LED, which points straight up from the board. How does it end up shining out the side of the device? Via this nifty light pipe, of course!

Now for the various ICs on this side of the board. Exposing to view, therefore identifying, the first one necessitated a bit more upfront surgery:

It’s another Nanya 8 Gbit DDR4 SDRAM. The markings on the large square IC to its right are faint, so you’ll have to take my word on the identity, but its proximity to the earlier noted heatsink should be a tipoff: it’s the system’s “brains”, an Amlogic S905Y2. Can I just say that I’m not surprised to find the exact same SoC inside as the one found in the TiVo RA2400 Stream 4K I tore down just a couple months back? Along with the exact same DRAM and flash memory allocation? “Straight-to-production private-labeled reference design”, anyone?

That said, the two products’ guts aren’t completely identical. The Wi-Fi/Bluetooth module in the TiVo was the AP6398S, based on Broadcom’s BCM43598. Here, conversely, it’s Askey Computer’s 8822CS, which seemingly has Realtek wireless transceiver silicon inside. And if the H8N-8822CS FCC ID conveniently also stamped atop the module sounds familiar, it should: that’s the same code that was on the case-underside sticker I showed you earlier!

One other set of wireless-related deviations between the two designs also bears mentioning. The TiVo RA2400 Stream 4K had PCB-embedded its Bluetooth and Wi-Fi antennae. Here, on the other hand, they’re jutting out of the board, and funny looking (at least to me) to boot. The one in the upper right corner handles Wi-Fi, I’m guessing; note the black wire extending to it from a connector below it and to the left of the switch. And by the process of elimination, I’m guessing the one in the lower right must handle Bluetooth. The system’s Bluetooth remote facilities are an Achilles Heel, apparently, judging from this video:

along with various reviews and user-complaint posts I came across while doing my research.

I’ll wrap up with four side-view shots (oh, that poor mangled bottom-side Faraday cage…):

And in closing, here’s a lengthy forum thread for any of you who are interested in hacking yours. And with that, I’ll close and turn it over to you for your thoughts in the comments!

Brian Dipert is the Editor-in-Chief of the Edge AI and Vision Alliance, and a Senior Analyst at BDTI and Editor-in-Chief of InsideDSP, the company’s online newsletter.

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Nexperia orders Aixtron G10-SiC and G10-GaN systems for Hamburg fab

Semiconductor today - Tue, 07/16/2024 - 15:34
Discrete device designer and manufacturer Nexperia of Nijmegen, the Netherlands (which operates wafer fabs in Hamburg, Germany, and Hazel Grove Manchester, UK) is expanding its 200mm-wafer volume production of silicon carbide (SiC) and gallium nitride (GaN) power devices by placing a follow-up order for G10-SiC chemical vapor deposition (CVD) systems, complemented by another order for G10-GaN metal-organic chemical vapor deposition (MOCVD) systems, from deposition equipment maker Aixtron SE of Herzogenrath, near Aachen, Germany...

Materials unveiled for scaling copper wires at 2-nm and beyond

EDN Network - Tue, 07/16/2024 - 14:12

A new material claims to increase the performance-per-watt of chips by enabling copper wiring to scale to the 2-nm node and beyond while reducing resistance by as much as 25%. This new material with enhanced low-k dielectric material reduces chip capacitance and strengthens logic and DRAM chips for 3D stacking.

At this year’s SEMICON West, held from 9 to 11 July in San Francisco, California, Applied Materials unveiled the material engineering advances that extend copper chip wiring to the 2-nm node and below. But why are these material engineering efforts critical now?

As Applied Materials’ VP of technology, Dr. Mehul Naik, writes in his blog, if we don’t dramatically improve the efficiency of chips and systems, then the growth of artificial intelligence (AI) computing could be gated by the limits of the power grid. Below is a closer look at this premise.

The advances in patterning and subsequently continued lithographic scaling are making it possible to print ever-smaller transistor features on a chip. However, while chipmakers continue to shrink transistors with each generation, they must also shrink the trenches for the wiring. And, as chipmakers further scale the wiring, the barrier and liner take up a larger percentage of the volume intended for wiring.

As a result, it becomes physically impossible to create low-resistance, void-free copper wiring in the remaining space. That’s because while wires get thinner, electrical resistance increases. Moreover, as wires get closer together and the insulating dielectric material between the wires decreases, capacitance and electrical crosstalk increase, resulting in signal delays and distortion. The outcome of these wiring scaling issues is slower and more power-hungry chips.

Figure 1 To create wiring, engineers etch trenches into dielectric material and then line them with a thin stack of metals that typically includes a barrier layer to prevent copper from migrating into the chip, a liner to promote copper adhesion, and finally bulk copper that completes the signal wires. Source: Applied Materials

“While advances in patterning are driving continued device scaling, critical challenges remain in other areas, including interconnect wiring resistance, capacitance, and reliability,” said Sun-Jung Kim, VP and head of the Foundry Development Team at Samsung Electronics. He calls for materials engineering innovations to overcome these challenges.

So far, the semiconductor industry has addressed the performance-per-watt challenge through materials innovation in the smallest wires closest to the transistor layer. More than two decades ago, low-dielectric-constant or “low-k” dielectrics were introduced as the insulating materials between wires, replacing aluminum wiring with copper.

The combination of low-k dielectrics and copper became the semiconductor industry’s workhorse, continuously aided by exotic materials and materials engineering techniques. However, as the industry scales to 2 nm and below, thinner dielectric material renders chips mechanically weaker. Furthermore, narrowing the copper wires creates steep increases in electrical resistance that can reduce chip performance and increase power consumption.

That calls for new material solutions that enable the industry to scale low-resistance copper wiring to the emerging smaller nodes. “These low-k dielectric materials must reduce capacitance and strengthen chips to take 3D stacking to new heights,” said Dr. Prabu Raja, president of the Semiconductor Products Group at Applied Materials. “The AI era needs more energy-efficient computing, and chip wiring and stacking are critical to performance and power consumption.”

Applied Materials’ Black Diamond material surrounds copper wires with a k-value film engineered to reduce the buildup of electrical charges that increase power consumption and cause interference between electrical signals. Now, the Santa Clara, California-based company has unveiled an enhanced version of Black Diamond, which reduces the minimum k-value to enable scaling to 2 nm and below.

Figure 2 The Producer Black Diamond PECVD dielectric film enables chip scaling to 2 nm and below while offering increased mechanical strength for 3D logic and memory stacking. Source: Applied Materials

The enhanced version of Black Diamond also offers increased mechanical strength, which is critical as chipmakers and systems companies advance 3D logic and memory stacking. According to Applied Materials, several logic and DRAM chipmakers have adopted the new Black Diamond technology.

At SEMICON West 2024, Applied Materials also unveiled its Integrated Materials Solution (IMS), which combines six different technologies in one high-vacuum system. It includes a combination of materials that enables chipmakers to scale copper wiring to the 2-nm node and beyond.

It’s a binary metal combination of ruthenium and cobalt (RuCo), which simultaneously reduces the thickness of the liner by 33% at a 2-nm node. That, in turn, produces better surface properties for void-free copper reflow and reduces electrical line resistance by up to 25% to improve chip performance and power consumption.

Figure 3 The new binary metal combination of ruthenium and cobalt (RuCo) enables copper chip wiring to be scaled to the 2-nm node and beyond and reduces electrical line resistance by as much as 25%. Source: Applied Materials

While trade media is abuzz with advances in patterning and resulting lithographic scaling of chips, the smaller nodes will also lead to copper wiring hitting physical scaling limits. The materials engineering advances outlined in this blog are designed to increase the performance-per-watt of chips by enabling copper wiring to scale to the 2-nm node and beyond.

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Zurich Airport starts trial operation of Rohde & Schwarz security scanners

ELE Times - Tue, 07/16/2024 - 12:54

Trials of two digital security scanners produced by German manufacturer Rohde & Schwarz have begun at Zurich Airport. The long-term plan is to equip all security checkpoints at the airport with the new technology.

Flughafen Zürich AG is currently testing two R&S QPS201 security scanners. They are in use on two of a total of 26 passenger-screening lanes in the security inspection building. During the trial phase, the new devices will not replace conventional metal detectors, instead serving as supplementary inspection devices. Passengers stand in the security scanner for a short time, while possible threats on their body are displayed on a standardized digital avatar without revealing personal attributes.

The Rohde & Schwarz security scanner is attractive due to its market-leading safety performance combined with high efficiency and intuitive operation for passengers. The scanner works with millimeter-wave technology. It renders the captured image data anonymous, while also analyzing it in order to detect prohibited items on passengers quickly and accurately. The automatic detection function is based on AI algorithms that aim to identify a wide range of object classes of all materials, such as metals, liquids, ceramics, plastics, granulates, powders, organic substances and much more, with extremely low false alarm rates. This reduces the effort required by security personnel for manual follow-up inspections.

This Rohde & Schwarz technology has been proving its worth in the aviation industry since 2015, with over 1,000 scanners already in use at airports worldwide. They are approved by the European Civil Aviation Conference (ECAC), the US Transportation Security Administration (TSA) and many other national authorities.

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