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To enhance production of its proprietary high-power distributed feedback (DFB) laser and laser array technology, Sivers Semiconductors AB of Kista, Sweden is partnering with WIN Semiconductors Corp of Taoyuan City, Taiwan — which provides pure-play gallium arsenide (GaAs) and gallium nitride (GaN) wafer foundry services for the wireless, infrastructure and networking markets. The strategic collaboration paves the way for high-volume manufacturing of critical components for coarse wavelength division multiplexing (CWDM) and dense wavelength division multiplexing (DWDM) applications...

1. Fundamental Quantum Mechanical Foundations

1.1 Quantum Spin Dynamics

Spintronics represents a revolutionary paradigm that fundamentally challenges traditional electronic technologies by exploiting the quantum mechanical spin property of electrons. Unlike conventional charge-based electronics, spin-based technologies leverage the intrinsic angular momentum of electrons, characterized by two quantum states: spin-up (|↑⟩) and spin-down (|↓⟩). This binary quantum nature provides an unprecedented foundation for information storage and processing, opening new frontiers in computational architecture.

The mathematical representation of spin dynamics is elegantly captured by the Heisenberg Hamiltonian:

H = -∑(J_ij * S_i · S_j)

This equation encapsulates the quantum mechanical interaction between spin operators, where J_ij represents the exchange coupling constant, and S_i and S_j describe spin operators at specific lattice sites. The fundamental interaction demonstrates the complex quantum mechanical spin correlation mechanisms that underpin spintronic technologies.

1.2 Spin-Orbit Coupling Phenomena

Spin-orbit coupling (SOC) emerges as a critical quantum mechanical interaction where an electron’s spin precession becomes intrinsically coupled with its orbital motion. This phenomenon introduces sophisticated spin-dependent electronic transport mechanisms that are crucial for advanced spintronic devices.

The field of spin-orbit coupling encompasses several profound physical manifestations. The Rashba effect represents a quantum mechanical spin splitting mechanism primarily observed in two-dimensional electron systems with broken inversion symmetry. This effect generates a spin-momentum locking phenomenon where electron spin becomes intrinsically linked to its momentum direction, creating unique quantum transport behaviors.

The Dresselhaus effect complements the Rashba mechanism, representing a bulk spin-orbit coupling phenomenon prevalent in non-centro-symmetric crystal structures. Originating from bulk inversion asymmetry, this effect generates spin-dependent electron scattering mechanisms that fundamentally deviate from traditional electronic transport models.

2. Magnetoelectric RAM: Advanced Architectural Insights

2.1 Magnetoelectric Coupling Mechanisms

Magnetoelectric RAM (MeRAM) represents a sophisticated memory paradigm that exploits the intricate coupling between magnetic and ferroelectric materials. The fundamental interaction can be described by a phenomenological free energy expression:

F = F_magnetic + F_electric + F_magnetoelectric

This sophisticated approach enables electric-field-induced magnetic state modulation with unprecedented precision, bridging quantum mechanical principles with advanced computational memory technologies.

The material design for effective magnetoelectric RAM demands a nuanced approach to material selection and interface engineering. Critical material characteristics include the magnetoelectric coefficient (α_ME), which quantifies the material’s ability to couple magnetic and electric polarization states. Magnetic anisotropy energy plays a crucial role in determining the stability of magnetic configurations, while ferroelectric polarization magnitude determines the efficiency of electric-field-based switching mechanisms.

2.2 Magnetic Tunnel Junction (MTJ) Architectures

Magnetic Tunnel Junctions (MTJs) represent the core computational element in MeRAM, utilizing quantum mechanical tunneling phenomena for information storage and transfer. The typical MTJ multilayer configuration consists of carefully engineered ferromagnetic electrodes separated by an ultrathin insulating barrier, enabling sophisticated quantum mechanical information processing.

3. Advanced Quantum Transport Mechanisms

3.1 Spin-Transfer Torque (STT)

Spin-transfer torque emerges as a sophisticated quantum mechanical mechanism for manipulating magnetic moments through spin-polarized current injection. The Landau-Lifshitz-Gilbert-Slonczewski (LLGS) equation provides a comprehensive mathematical framework for describing the complex magnetization dynamics inherent in this mechanism.

The quantum mechanical principles involve direct momentum transfer from spin-polarized electrons to magnetic moments within a material system. When a spin-polarized current passes through a magnetic multilayer structure, electron spins interact with local magnetic moments, exerting a torque that can rotate or manipulate the magnetic configuration with unprecedented precision.

3.2 Magnetoelectric Switching Dynamics

Electric-field-induced magnetic switching represents a pinnacle of quantum mechanical interface engineering. This sophisticated mechanism transcends traditional electronic switching by directly manipulating magnetic states through electric field application.

The underlying physics encompasses multiple interrelated quantum mechanical phenomena, including strain-mediated magnetic coupling, direct exchange interactions, and interfacial charge redistribution mechanisms. These complex interactions enable precise control of magnetic configurations through electrical means, representing a quantum leap in computational memory technologies.

4. Performance Characterization and Metrics

4.1 Advanced Performance Parameters

The evaluation of magnetoelectric RAM technologies requires a multidimensional approach that extends beyond traditional memory performance metrics. Key performance indicators include:

• Energy Consumption: Targeting switching energies below 0.1 picojoules per bit
• Write Latency: Approaching near-ballistic regime switching speeds of a single nanosecond
• Data Retention: Targeting retention times exceeding decade-long scales
• Endurance: Approaching or exceeding 10^12 write operations

4.2 Thermal Stability Considerations

Thermal stability represents a fundamental challenge in advanced memory technologies. The Arrhenius equation provides a mathematical framework for understanding magnetic state lifetime, relating it to material-specific energy barriers and operational temperatures.

5. Material Science Innovations

5.1 Emerging Magnetoelectric Materials

The frontier of MeRAM technologies hinges on material science innovations that push quantum mechanical engineering boundaries. Key approaches include:

• Multiferroic composites combining ferromagnetic and ferroelectric properties
• Engineered heterogeneous interfaces with atomically precise boundaries
• Topological magnetic materials providing inherent quantum decoherence protection
• Rare-earth metal substitutions enabling fine-tuned material properties

5.2 Nanostructuring Techniques

Advanced nanostructuring methodologies include:

• Molecular beam epitaxy (MBE) for atomic-layer-precise material deposition
• Pulsed laser deposition for creating complex material architectures
• Focused ion beam lithography for nanoscale structural modifications
• Atomic layer deposition (ALD) for ultra-thin, precisely controlled material layers

6. Industry and Research Implications

6.1 Technological Disruption Potential

MeRAM technologies offer transformative capabilities across multiple domains:

• High-performance computing with extraordinary energy efficiency
• Internet of Things (IoT) devices with ultra-low power consumption
• Neuromorphic computing architectures mimicking biological neural networks
• Bridging classical and quantum computational paradigms

6.2 Economic and Computational Impacts

• Projected market value: $500 million by 2028
• Potential 70% reduction in computational energy consumption
• Enabling more sustainable and efficient computing infrastructures

Conclusion

Spintronics and MeRAM represent a quantum leap in computational memory technologies, bridging fundamental quantum mechanical principles with advanced engineering methodologies. By leveraging sophisticated quantum mechanical interactions, these technologies promise to revolutionize computational architectures, offering unprecedented performance, energy efficiency, and computational capabilities.

Disclaimer: Technological developments are ongoing, and specific implementations may vary.

The post Spintronics and Magnetoelectric RAM: A Comprehensive Technical Exploration appeared first on ELE Times.

A few weeks ago, I told you about (among other things) the iPhone 16e, Apple’s latest “entry-level” smartphone and the pricier successor to the three-generation iPhone SE series:

I couldn’t resist noting that Google had responded to Apple’s news with a (temporary, as it turned out) price cut on its (then-)latest-generation entry-level smartphone, the Pixel 8a, to $399. That said, I’d already suspected (rumor-aided) that this likely wasn’t just a competitive counterpunch. Google was probably also doing some inventory-clearing in advance of a pending unveil of its own next-gen entry-level smartphone, presumably to be called the Pixel 9a.

The Pixel 9a reveal

I was right; this year Google didn’t even wait until the late May I/O conference to reveal it (that said, in retrospect the haste may not have been wise). Behold the Pixel 9a, which starts at $499:

and which (currently, at least) comes in four color options:

I chose the above image not only because it shows the color variants but because it also highlights one of the key differences between the Pixel 9a and its most recent three generational precursors. Look, for example, at the backside of the Pixel 8a:

Beginning with the Pixel 6 family, Google had switched to a backside style that grouped the camera (or multi-camera cluster), scene-illumination flash LED, microphone, and other related sensors into a horizontal raised bar, continuing that same style with “a” variants. With the Pixel 9a, conversely, Google seems to have returned to the (near-)flush approach exemplified by, for example, the Pixel 4a 5G handsets I owned prior to my current Pixel 7s:

I dunno why…mebbe the raised-bar approach made them more breakage-prone? Or mebbe they wanted it to look like an iPhone? Regardless, per Aalyia’s request , here’s a broader comparison table of the most recent two “a” generations, as well as the Pixel 9 introduced in-between them late last summer (to keep things simple, I left out the two Pixel 9 Pro variants):

	Pixel 8a	Pixel 9	Pixel 9a
Price	$499/$559	$799/$899	$499/$599
Storage	128 GB/256 GB	128 GB/256 GB	128 GB/256 GB
DRAM	8 GB (LPDDR5X)	12 GB (LPDDR5X)	8 GB (LPDDR5X)
Size	Height: 5.99 in (152.1 mm) Width: 2.86 in (72.7 mm) Depth: 0.35 in (8.9 mm)	Height: 6.02 in (152.8 mm) Width: 2.83 in (72 mm) Depth: 0.33 in (8.5 mm)	Height: 6.09 in (154.7 mm) Width: 2.89 in (73.3 mm) Depth: 0.35 in (8.9 mm)
Weight	6.63 oz (188g)	6.98 oz (198g)	6.56 oz (186g)
Screen	6.1-inch 20:9 aspect ratio 1080 x 2400 OLED at 430 PPI  60-120 Hz Up to 1400 nits (HDR) and up to 2000 nits (peak brightness)	6.3-inch 20:9 aspect ratio 1080 x 2424 OLED at 422 PPI 60-120Hz Up to 1800 nits (HDR) and up to 2700 nits (peak brightness)	6.3-inch 20:9 aspect ratio 1080 x 2424 pOLED at 422.2 PPI 60-120Hz Up to 1800 nits (HDR) and up to 2700 nits (peak brightness)
SoC	Google Tensor G3	Google Tensor G4	Google Tensor G4
CPU	Nona-core: 1× 2.91 GHz Cortex-X3 4× 2.37 GHz Cortex-A715 4× 1.7 GHz Cortex-A510	Octa-core: 1× 3.1 GHz Cortex-X4 3× 2.6 GHz Cortex-A720 4× 1.92 GHz Cortex-A520	Octa-core: 1× 3.1 GHz Cortex-X4 3× 2.6 GHz Cortex-A720 4× 1.92 GHz Cortex-A520
GPU	Mali-G715 MP7 890 MHz	Mali-G715 MP7 940 MHz	Mali-G715 MP7 940 MHz
NPU	3rd Gen Edge TPU	3rd Gen Edge TPU	3rd Gen Edge TPU
Cellular modem	Exynos 5300i	Exynos 5400c	Exynos 5300i
Front camera	13 MP camera ƒ/2.2 aperture 96.5° ultrawide field of view	10.5 MP Dual PD camera with autofocus ƒ/2.2 aperture 95° ultrawide field of view	13 MP camera ƒ/2.2 aperture 96.1° ultrawide field of view
Rear camera(s)	Dual rear camera system: optical zoom at 0.5x and 1x, digital zoom up to 8x 64 MP Quad PD wide camera ƒ/1.89 aperture 80° field of view 13 MP ultrawide camera ƒ/2.2 aperture 120° field of view	Dual rear camera system: optical zoom at 0.5x, 1x and 2x, digital zoom up to 8x 50 MP Octa PD wide camera ƒ/1.68 aperture 82° field of view 48 MP Quad PD ultrawide camera with autofocus ƒ/1.7 aperture 123° field of view	Dual rear camera system: optical zoom at 0.5x and 1x, digital zoom up to 8x 48 MP Quad PD Dual Pixel with closeup AF ƒ/1.7 aperture 82° field of view Optical + electronic image stabilization 13 MP ultrawide camera ƒ/2.2 aperture 120° field of view
Wireless charging	7.5W	15W	7.5W
Wired charging	18W USB-PD	27W USB-PD	23W USB-PD
Battery capacity	4492 mAh	4700 mAh	Typical 5100 mAh (minimum 5000 mAh)
Dust/water resistance	IP67	IP68	IP68

Pixel 9a observations

Several particularly interesting bits jump out at me:

• As I’d mentioned late last summer, Google had originally only planned for Gemini deep learning support to be enabled for the Pixel 8 Pro with 12 GBytes of RAM; the company subsequently developed a “Nano” variant of Gemini capable of being shoehorned into the 8 GBytes of RAM in other Pixel 8 versions. So, you might assume that the Pixel 9a, also with 8 GBytes of RAM, would also be Gemini-cognizant. And you’d be right…except this time, Google’s referring to the Gemini version as “Gemini Nano 1.0 XXS (extra extra small)”. Then again, the version available for Pixel smartphones with 12 GBytes or more of RAM is no longer just “Gemini Nano”, it’s “Gemini Nano XS (extra small)”. My guess as to what’s happening is just some rebranding of what already exists; as baseline Gemini becomes more feature-filled, the need to differentiate it from the version(s) running on phones and other resource-constrained devices therefore becomes more necessary.
• The selective mixing-and-matching within each device’s SoC is interesting. The Pixel 9a gets the Pixel 9’s CPU and other processing subsystems, but the cellular modem is a generational backstep, reverting to what was in the Pixel 8s (and 7s, for that matter). The modems and CPUs listed in this particular table are actually all fabricated on 4 nm Samsung processes, but I’m guessing that everything’s not integrated within a single die. Instead, the CPU and modem die are likely side-by-side (or alternatively sandwiched) within a common package, simplifying the mix-and-match process. Keep in mind, too, that whereas Google (generally speaking) is more forthright about its phones’ specs than is Apple, neither company publishes clock speeds. While my table shows the maximum documented speeds of various processing cores, it’s not guaranteed that they run at that speed in a particular system-implementation configuration.
• In many respects, the Pixel 9a is the latest in a long line of handsets derived from their earlier-announced, fuller-featured generational siblings. It swaps out the Pixel 9’s glass-and-aluminum frame back for plastic, for example, and its wireless charging support is conventional in power, therefore speeds, not “supercharged”. That said, there were some surprising deviations from usual form. The Pixel 9a is the only one of the three to explicitly list as features both optical and electronic image stabilization, for example, for its rear wide-angle camera. And its wired charging power-therefore-speed was nearly as fast as that of the Pixel 9, as well as being a significant improvement on the Pixel 8a.
• Further comparing the Pixel 9a to its direct forebear, the Pixel 8a, the aforementioned rear wide camera, for example, has also decreased in resolution by 25%, although both image sensors have equivalent 0.8µm pixel pitch (i.e., light-gathering capability). Plus, the new camera’s maximum aperture is larger, for improved low-light performance, further aided by the already-noted enhanced image stabilization support. The Pixel 9a offers slightly improved dust and moisture resistance than its Pixel 8a predecessor, too. That said, curiously, the 256GB version of the Pixel 9a costs $40 more than the 256GB Pixel 8a, $599 versus $559, although the 128GB versions of both handset generations are identically priced at $499.
• And check out that comparatively sizeable battery in the Pixel 9a versus either of the others! It’s particularly impressive given that the Pixel 9a is still lighter than the Pixel 8a. But what’s with the charge capacity variability; multiple battery suppliers, mebbe?

Pixel 9a vs iPhone 6e

Speaking of comparisons (and of Apple), how does the Pixel 9a stack up against the iPhone 16e? This analysis is simultaneously easier (from a hardware standpoint) and harder (from a usability perspective). Specs first; the Pixel 9a has (for example):

• A lower price tag ($499 vs $599, in both cases for versions with 256 GBytes of storage)
• A slightly larger display (6.3” diagonal versus 6.1”) with a 2x higher peak refresh rate (120 Hz versus 60 Hz), albeit at slightly lower resolution (1080 x 2,424 pixels/421ppi vs 1,170 x 2,532 pixels/460 ppi)
• Two rear cameras versus one, and
• A ~25% larger battery (5,100mAh versus 4,005mAh), along with
• Slightly more advanced Wi-Fi (6E vs 6) and Bluetooth (6 versus 5.3)

And now that Apple has indefinitely delayed the more personalized aspects of its Apple Intelligence capabilities, Google (with Gemini) has an advantage here as well, conceptually, at least. The thing is, though, AI doesn’t yet seem to be tangibly propelling smartphone sales. More generally, the fierce loyalty divide between Android and iOS users is akin to that between “blue” and “red” states. Take my household as an example; although originally a periodic “switcher”, I’ve settled on Android for a while now, although my tablets run iPadOS. Conversely, paraphrasing Charlton Heston, my wife would likely only give up her iPhone if you pried it from her cold, dead hands. And speaking of “indefinite delays”, Google (presumably driven by a decision made at the last pre-launch minute) is no longer saying exactly when the Pixel 9a will start shipping (only a nebulous “April”, and isn’t even yet accepting pre-orders for the handset, all due to an unspecified “component quality issue”.

Swollen battery

Maybe the problem’s with the battery? I jest (maybe), in transitioning (in closing) to the “distended” portion of this piece mentioned in the title. Long-time readers may remember that back in September 2020, I mentioned that in-parallel (fortuitously) with their replacement by Pixel 3as, my original Google Pixels were beginning to exhibit swollen-battery symptoms:

Well, look at what I noticed a couple of weeks ago on one of my Pixel 7s:

Lest you think that’s just an artifact of the case or the screen protector, here’s a “naked” view:

The left-side swell isn’t as pronounced:

which makes sense when, as iFixit’s teardown guide makes clear, you learn that the battery’s placement is right-side dominant:

This was my “work” phone, which was used less often (therefore spent more time just sitting trickle-charging) than its “personal” sibling. And although I had Adaptive Charging enabled, I hadn’t taken the extra step of limiting the peak charge point to 80% of total capacity.

Plus, the phone (purchased in June 2023) was beyond its one year of factory warranty support. That said, I’d fortunately also purchased Asurion’s 36-month extended warranty coverage at that same time. This writeup’s already in “extra innings”, so I’ll save the rest of the (good ending, mind you) story for another post at another time to come. Until then, please share your thoughts on what I’ve so-far discussed in the comments!

—Brian Dipert is the Editor-in-Chief of the Edge AI and Vision Alliance, and a Senior Analyst at BDTI and Editor-in-Chief of InsideDSP, the company’s online newsletter.

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• The 2024 Google I/O: It’s (pretty much) all about AI progress, if you didn’t already guess
• A holiday shopping guide for engineers: 2022 edition
• Cracking the case of a smartphone and its unfairly crack-accused case
• Playin’ with Google’s Pixel 7

The post Google’s Pixel Smartphone Line: Extended and…Distended? appeared first on EDN.

What is Selective Soldering?

Selective soldering is an advanced soldering technique used in electronics manufacturing to solder specific components on a printed circuit board (PCB) without affecting adjacent parts. Unlike traditional wave soldering, which exposes the entire board to molten solder, selective soldering focuses only on designated areas, making it ideal for complex PCB assemblies with mixed technology components.

This method is essential in industries where high precision and reliability are required, such as aerospace, automotive, medical devices, and telecommunications. Selective soldering helps manufacturers meet stringent quality standards while reducing thermal stress on sensitive components.

How Selective Soldering Works

Selective soldering involves applying molten solder to specific areas of the PCB using a programmable system. It typically follows these key steps:

1. Flux Application: A controlled amount of flux is selectively applied to solder joints to improve wetting and prevent oxidation.
2. Preheating: The PCB is preheated to activate the flux and reduce thermal shock, ensuring better solder flow.
3. Soldering Process: A programmable soldering nozzle or mini-wave applies molten solder to the designated areas, forming high-quality solder joints.
4. Cooling and Inspection: The board is cooled down gradually, and automated inspection methods such as X-ray or AOI (Automated Optical Inspection) are used to ensure quality.

Selective Soldering Process

The selective soldering process can be categorized into three main techniques:

1. Mini-Wave Soldering

This method involves using a small nozzle that creates a miniature solder wave, selectively soldering through-hole components. The PCB moves over the wave, allowing precise solder application.

2. Jet Wave Soldering

In this approach, a high-precision nozzle dispenses solder in a controlled manner. It is ideal for densely populated PCBs where precise control is required.

3. Laser Selective Soldering

This technique utilizes a laser to heat the solder and create joints without physical contact. It is beneficial for highly sensitive components that require minimal thermal exposure.

Each of these methods is chosen based on factors such as board complexity, component density, and production volume.

Selective Soldering Uses & Applications

Selective soldering is widely used across various industries due to its precision and reliability. Some of the primary applications include:

• Automotive Electronics: Used in engine control units (ECUs), infotainment systems, and safety modules where high-reliability soldering is required.
• Aerospace and Defense: Essential for high-reliability PCBs used in avionics and military communication systems.
• Medical Devices: Applied in medical instrumentation where strict quality standards are necessary.
• Consumer Electronics: Used in complex PCB assemblies for smartphones, tablets, and wearables.
• Industrial Automation: Ensures robust connections in industrial control systems and robotics.

Selective Soldering Advantages

1. Precision and Selectivity

Selective soldering allows targeted soldering, reducing the risk of damage to nearby components. This is particularly useful for mixed-technology PCBs.

2. Reduced Thermal Stress

Unlike wave soldering, which exposes the entire board to heat, selective soldering minimizes thermal exposure, protecting heat-sensitive components.

3. Higher Reliability

With precise solder control, the process ensures consistent joint quality, reducing defects such as solder bridges or cold joints.

4. Cost-Effectiveness

Selective soldering reduces solder and flux consumption while minimizing rework and scrap rates, leading to cost savings in production.

5. Automation Compatibility

Modern selective soldering systems can be fully automated, improving repeatability and efficiency in high-volume manufacturing.

Selective Soldering Disadvantages

1. Slower Process Compared to Wave Soldering

Since each component is soldered individually, the process is slower than wave soldering, making it less ideal for extremely high-volume production.

2. Higher Initial Investment

Selective soldering machines are more expensive compared to traditional soldering equipment, requiring a significant upfront investment.

3. Complex Programming and Setup

Proper setup and programming are required to achieve optimal results, necessitating skilled operators and additional setup time.

Conclusion

Selective soldering is a vital technique in modern electronics manufacturing, providing high precision, reliability, and cost-efficiency. While it has certain limitations, its advantages make it indispensable for industries requiring robust and precise soldering solutions. As technology advances, selective soldering is expected to become even more efficient, further enhancing its role in electronic assembly processes.

The post Selective Soldering: Definition, Process, Working, Uses & Advantages appeared first on ELE Times.

Since lighting is no longer confined to a simple on-and-off function, ams OSRAM GmbH of Premstätten, Austria and Munich, Germany says that, with advances like pixelated lighting, its new EVIYOS Shape (available now) gives it the power to create innovative tailored scenarios...

For fourth-quarter 2023, epitaxial deposition and process equipment maker Veeco Instruments Inc of Plainview, NY, USA has reported revenue of $182.1m, down 1% on $184.8m last quarter but up 5% on $173.9m a year ago, and well above the midpoint of both early November’s original guidance of $165–185m and mid-January’s revised guidance of $175–185m...

High-bandwidth memory (HBM) is again in the limelight. At GTC 2025, held in San Jose, California, from 17 to 21 March, SK hynix displayed its 12-high HBM3E devices for artificial intelligence (AI) servers. The Korean memory maker also showcased a model of its 12-high HBM4, currently under development, claiming that it’s now completing the preparatory works for large-scale production of the 12-high HBM4 in the second half of 2025.

Micron, another leading memory supplier, is signaling strong demand for its HBM chips in AI and high-performance computing (HPC) applications. Micron’s chief business officer, Sumit Sadana, told Reuters that all of Micron’s HBM chips are sold out for the calendar year 2025.

Figure 1 HBM is creating a new “near memory” space between cache and main memory. Source: IDTechEx

HBM—essentially a 3D structure of vertically stacked DRAM dies on top of a logic die—relies on advanced packaging technologies like through silicon vias (TSVs) while using a silicon interposer for interconnection with the processor. It’s proving highly suitable in parallel compute environments such as HPC and AI workloads.

That’s because it can handle multiple memory requests simultaneously from various cores in GPUs and AI accelerators to facilitate parallel workload processing. In fact, HBM has become the main venue for overcoming memory bottlenecks in data-intensive HPC and AI workloads. Otherwise, these memory bottlenecks lead to underutilization of AI processors.

What’s also pivotal about HBM devices is their continued development to improve AI accelerator performance. For instance, the current generation HBM3E devices use thermal compression with micro-bumps and underfills to stack DRAM dies. Next, HBM makers like Micron, Samsung and SK hynix are transitioning toward HBM4 devices, which employ advanced packaging technologies such as copper-copper hybrid bonding to increase input/outputs, lower power consumption, improve heat dissipation, and reduce electrode dimensions.

Market research firm IDTechEx’s report “Hardware for HPC, Data Centers, and AI 2025-2035: Technologies, Markets, Forecasts” assesses the key developments and trends in HBM devices serving AI and HPC workloads. It also projects that compared to 2024, the unit sales of HBM are forecast to increase 15-fold by 2035.

Figure 2 The booming AI and HPC hardware is forecast to increase HBM sales 15-fold by 2035. Source: IDTechEx

HBM was a prominent technology highlight in 2024 for its ability to overcome the memory wall for AI processors. With the emergence of HBM4 memory devices, that trend is likely to continue in 2025 and beyond.

Related Content

• HBM Flourishes, But HMC Lives
• AI boom and the politics of HBM memory chips
• Memory Bottlenecks: Overcoming a Common AI Problem
• HBM memory chips: The unsung hero of the AI revolution
• High-bandwidth memory (HBM) options for demanding compute

The post HBM memory and AI processors: Happy together appeared first on EDN.

A new joint venture between Welsh Government, South Wales-based Compound Semiconductor Applications (CSA) Catapult, and electronic design automation (EDA) software provider Cadence Design Systems Inc of San Jose, CA, USA (whose more than 13,000 staff generated $4.6bn in revenue in fiscal-year 2024) is to address long-term skills needs within the semiconductor design sector and support the industry’s growth by providing critical design services to SMEs and scale-up companies across the UK...

POET Technologies Inc of Toronto, Ontario, Canada — designer and developer of the POET Optical Interposer, photonic integrated circuits (PICs) and light sources for the hyperscale data-center, telecom and artificial intelligence (AI) markets — has fulfilled orders from three global customers for samples of its advanced optical transmit engines...

The first photo is a cross section from a 12pF 3kV capacitor along it's width. The second photo is that same capacitor along it's length. The third photo is of a 47uF capacitor along it width, but with the layers in the wrong direction giving this damascus like texture. The fourth and fifth photo is this same capacitor along the width (the same orientation as the first photo). Unfortunately, not much can be seen here. I assume that the capacitor plates are too thin and densely packed for my microscope. The sixt photo is of a (pretty bad) crimp terminal. It's just a random terminal I had laying around and I didn't know which cable size and crimping die I had to use for it. The last photo is a cross section of a piece of solder wire, clearly showing its flux core within. I used it to hold the crimped terminal in place while the epoxy was hardening. That's why the crimp terminal can be seen behind it. I still need to get vacuum pump to get rid of the air bubbles, and I also used very cheap epoxy so the clarity of it is not great. But for some first experiments, I think I can call it a success. Next up, I would like to capture some PCB details such as burried and capped via's. submitted by /u/0x4A47 [link] [comments]

I ran across this today for $5. I believe it is a PNP Germanium power transistor. Along with mica insulators it has a note that looks original. It reads “2N278 transistors are not recommended for replacement in Delco built car radios.” Max Voltage: 45VCEO, 50VCBO. Max Current: 15 Amp. Dissipation: 170 watt. Package: TO-36. That is a lot higher dissipation spec than I expected. submitted by /u/Alive-Bid1024 [link] [comments]

My buddy dead bugged a QFN, he is so much more patient than I am. Apparently the engineer connected the belly pad to the wrong voltage submitted by /u/robs2287 [link] [comments]

submitted by /u/Rdp616 [link] [comments]

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But ıt burned because ı forgot to add rezistors a and b submitted by /u/Careful-Rich9823 [link] [comments]

Wire soldering is a fundamental technique in electronics and electrical engineering that involves joining two or more metal wires using a filler metal, known as solder. This process ensures a strong, conductive, and durable connection between components. Soldering is widely used in circuit board assembly, electrical wiring, and microelectronics, offering a reliable means of creating robust electrical and mechanical bonds.

What is Wire Soldering?

Wire soldering is a method of joining electrical wires and components by melting a filler metal (solder) at the joint. The solder, typically composed of a lead-tin alloy or a lead-free alternative, melts at a lower temperature than the workpieces, allowing it to flow and solidify, creating a permanent bond. The process ensures excellent electrical conductivity and mechanical strength, making it essential in various industrial and DIY applications.

How Wire Soldering Works

Wire soldering works on the principle of wetting and capillary action. Temperature control plays a critical role, as solder melts at specific temperatures, typically 180–200°C for tin-lead solder and 217°C for lead-free solder. Proper heat application ensures strong joints and prevents damage to sensitive electronic components. The use of flux is essential in wire soldering, as it removes oxidation and improves adhesion by enhancing the flow of solder and preventing contaminants from interfering with the bond. Surface preparation is another crucial factor, as clean wire surfaces result in stronger solder joints. Any contaminants like oxidation or dirt can weaken the bond and should be removed before soldering. Additionally, the cooling rate must be managed properly. Gradual cooling prevents joint brittleness and ensures a reliable bond, whereas sudden cooling may introduce stress and weak points in the joint.

Wire Soldering Process

The wire soldering process consists of several key steps to ensure a high-quality joint. The first step is preparation, where essential tools such as a soldering iron, solder wire, flux, helping hands or clamps, and wire strippers are gathered. The wire surfaces must be cleaned with alcohol or a wire brush to remove oxidation and dirt, and flux should be applied to improve solder flow and reduce oxidation.

The next step is heating the joint. The soldering iron must be heated to the required temperature, typically between 300–400°C depending on the type of solder being used. The iron tip should be placed in contact with both wires to ensure even heating before applying solder. Once the joint reaches the correct temperature, solder is applied. The molten solder should flow into the joint via capillary action, forming a strong bond. The soldering process should be completed quickly to prevent excessive heat damage to components. The final step is cooling and inspection. The joint must be allowed to cool naturally without disturbance to maintain structural integrity. A visual and mechanical inspection should be performed to ensure proper bonding and electrical continuity.

Wire Soldering Uses & Applications

Wire soldering finds applications in various industries due to its reliability and efficiency. In the electronics and PCB assembly sector, soldering is used for mounting components on printed circuit boards (PCBs) and is essential in assembling microelectronics and integrated circuits. In the automotive industry, it is widely employed in vehicle wiring, sensors, and electronic control modules, ensuring durable electrical connections resistant to vibrations and environmental stress. The aerospace and defense sectors also rely heavily on wire soldering, particularly in avionics, satellite electronics, and military-grade circuit assemblies. High-reliability soldering techniques are required to withstand extreme environments.

Beyond these industries, wire soldering is commonly used in home electrical repairs, such as fixing household wiring, power cords, and electrical appliances. It provides secure and long-lasting connections in low-voltage circuits. Additionally, industrial manufacturing relies on wire soldering for robotics, automation systems, and power distribution modules, ensuring robust and long-lasting connections for heavy-duty machinery.

Wire Soldering Advantages

Wire soldering offers multiple benefits, making it a preferred method for electrical connections. One of the primary advantages is strong electrical conductivity, as it provides minimal resistance and efficient signal transmission in electronic circuits. It also ensures reliable mechanical strength, offering durable joints that withstand mechanical stress and vibrations. Wire soldering allows for compact and lightweight connections, enabling miniaturization of electronic components, which is ideal for modern gadgets and compact devices. Another key advantage is cost-effectiveness and efficiency, as it requires minimal tools and materials, making it an economical and accessible solution. The process is also quick and versatile, with applications spanning from delicate electronics to heavy-duty electrical work.

Wire Soldering Disadvantages

Despite its advantages, wire soldering has some limitations. One of the main drawbacks is temperature sensitivity. Overheating can damage sensitive components, requiring careful temperature control to avoid such issues. Another potential issue is weak joints. Cold solder joints or insufficient flux application can lead to poor connectivity and reliability problems over time. Additionally, lead-based solder emits toxic fumes, posing health risks. Proper ventilation and safety precautions, such as using fume extractors and protective equipment, are necessary. Lastly, solder joints provide limited structural support. They are not mechanically strong enough for high-load applications and may require additional reinforcement to ensure durability in certain use cases.

Conclusion

Wire soldering remains an indispensable technique in electronics, automotive, aerospace, and industrial applications. By understanding its principles, process, advantages, and limitations, engineers and technicians can optimize soldering quality for reliable electrical connections. With advancements in lead-free soldering and automated soldering technologies, the future of wire soldering continues to evolve, ensuring improved safety, efficiency, and performance in electrical and electronic manufacturing.

The post Understanding Wire Soldering: Definition, Process, Working, Uses & Advantages appeared first on ELE Times.

Neuromorphic computing represents a groundbreaking paradigm shift in computing, designed to replicate the structure and functionality of biological neural networks. Traditional Von Neumann architectures suffer from inefficiencies due to the separation of memory and processing units, leading to bottlenecks in handling AI and real-time workloads. Neuromorphic chips address these challenges through event-driven computation, parallel processing, and biologically inspired synaptic plasticity. Companies such as Intel, IBM, BrainChip, and SynSense are spearheading the development of these chips, promising enhanced AI acceleration, real-time data processing, and ultra-low power consumption. This article explores the fundamental principles, architectural advancements, diverse applications, industry trends, and future prospects of neuromorphic computing.

Principles of Neuromorphic Computing

Neuromorphic computing is grounded in the principles of spiking neural networks (SNNs) and synaptic plasticity, enabling energy-efficient and event-driven information processing. Unlike traditional deep learning architectures that rely on dense matrix multiplications, SNNs leverage discrete electrical impulses (spikes) for data transmission. This asynchronous operation ensures that computations occur only when necessary, significantly reducing energy consumption. Another core principle is in-memory processing, where neuromorphic chips integrate memory and computation units to eliminate data transfer bottlenecks, a limitation of conventional architectures.

Adaptive learning mechanisms further distinguish neuromorphic chips from traditional AI accelerators. Inspired by Hebbian learning and long-term potentiation, these chips modify synaptic weights dynamically based on data patterns, mirroring human cognitive processes. Additionally, neuromorphic architectures exhibit massive parallelism, as thousands or even millions of artificial neurons and synapses operate simultaneously. This makes them ideal for real-time, low-latency AI inference applications in power-constrained environments such as edge devices and wearables.

Architectures of Neuromorphic Chips

Neuromorphic chip architectures vary widely, encompassing digital, analog, and hybrid designs. Digital neuromorphic processors, such as Intel’s Loihi 2, leverage asynchronous spike-based processing with over one million programmable neurons and hierarchical synaptic plasticity mechanisms. Loihi 2 features optimized learning rules, improved interconnectivity, and enhanced support for complex AI workloads, making it a leading candidate for next-generation AI acceleration.

BrainChip’s Akida platform, another prominent digital neuromorphic processor, is tailored for ultra-low power AI inference at the edge. It employs event-based processing, leveraging hierarchical temporal memory (HTM) principles to achieve highly efficient pattern recognition. The Akida chip is designed to optimize convolutional neural network (CNN) inference while maintaining minimal power consumption, making it suitable for applications such as smart surveillance, autonomous systems, and health monitoring.

Analog and mixed-signal neuromorphic chips offer even greater efficiency by utilizing physical transistor properties to mimic neuronal activity. IBM’s TrueNorth, a hybrid digital-analog neuromorphic system, incorporates one million neurons and 256 million synapses, enabling large-scale SNN processing with extremely low power consumption. Memristor-based neuromorphic architectures, such as those under development at MIT and HP, integrate non-volatile resistive RAM (RRAM) elements to implement synaptic weights directly in hardware, further reducing energy overheads.

Another emerging approach is 3D neuromorphic architectures, where stacked layers of artificial neurons are fabricated to enhance computational density and minimize interconnect delays. Researchers at ETH Zurich and Stanford University are exploring hybrid 3D CMOS-memristor designs to enable brain-scale neuromorphic computing, opening new frontiers in AI efficiency and scalability.

Applications of Neuromorphic Chips

Neuromorphic computing has transformative applications across diverse sectors, revolutionizing AI-driven decision-making, robotics, medical diagnostics, and edge intelligence.

Edge AI and IoT

Neuromorphic chips excel in ultra-low power AI inference, making them ideal for always-on smart sensors, real-time environmental monitoring, and security surveillance. They enable real-time AI processing in IoT devices, allowing predictive maintenance, autonomous energy management, and adaptive user interfaces in smart homes and industrial automation.

Robotics and Autonomous Systems

Neuromorphic processors are redefining robotics by enabling real-time, low-latency decision-making. Their ability to process sensory inputs dynamically makes them well-suited for applications in humanoid robots, collaborative automation, and autonomous vehicles. For instance, neuromorphic vision sensors enhance object detection and navigation by replicating biological vision processing, enabling real-time adaptation in self-driving cars and drones.

Healthcare and Biomedicine

In healthcare, neuromorphic chips power advanced neural interfaces, brain-machine interaction (BMI) systems, and real-time biomedical signal processing. They facilitate ultra-fast EEG and ECG analysis, enabling rapid diagnosis of neurological disorders such as epilepsy and Parkinson’s disease. Additionally, neuromorphic AI enhances medical imaging, assisting in early disease detection with significantly reduced computational overhead.

Cybersecurity and AI at the Edge

The adaptive learning capabilities of neuromorphic chips make them well-suited for AI-driven cybersecurity solutions. Their ability to detect anomalous patterns in real-time enhances intrusion detection systems (IDS) and fraud prevention mechanisms. Moreover, neuromorphic architectures support biometric authentication technologies, such as facial recognition and voice-based identity verification, ensuring energy-efficient, secure access control solutions.

Industry Insights and Market Trends

The neuromorphic computing landscape is evolving rapidly, with significant investments from semiconductor giants, startups, and government agencies.

Key Players and Research Initiatives

Intel has established the Neuromorphic Research Community (INRC) to accelerate the adoption of Loihi-based computing platforms. IBM continues to explore hybrid analog-digital neuromorphic accelerators, while BrainChip expands the Akida ecosystem for low-power AI applications. Emerging startups like SynSense and Innatera are focusing on commercializing neuromorphic AI accelerators for edge computing, demonstrating a growing market appetite for these technologies.

Investment and Commercialization Trends

Venture capital funding for neuromorphic startups has increased, with investors recognizing the potential of brain-inspired computing in AI acceleration and IoT. Government and defense organizations, including DARPA, are investing in neuromorphic architectures for autonomous surveillance systems, next-generation military drones, and AI-powered secure communications. Academia-industry collaborations, particularly in the U.S., Europe, and China, are driving advancements in neuromorphic hardware scalability and software frameworks.

Challenges and Opportunities

Despite significant progress, neuromorphic computing faces challenges in software compatibility, standardization, and large-scale fabrication. Existing AI frameworks, such as TensorFlow and PyTorch, are not natively optimized for SNNs, necessitating new programming paradigms. Scalability remains a concern, as manufacturing neuromorphic chips with millions of interconnected artificial neurons requires advanced semiconductor fabrication techniques.

Future Prospects

The next decade will witness the convergence of neuromorphic computing with emerging technologies such as quantum computing, biohybrid systems, and 3D-integrated AI architectures. Quantum neuromorphic computing, which combines quantum-inspired neural networks with spike-based processing, holds promise for solving complex optimization problems with unprecedented efficiency. Furthermore, brain-on-chip innovations, integrating living neuronal cultures with synthetic neural networks, could pave the way for biologically realistic AI models.

As AI workloads become increasingly complex, neuromorphic chips will play a crucial role in advancing edge intelligence, real-time robotics, and human-like cognition in machines. By mimicking the energy efficiency and adaptability of the human brain, neuromorphic architectures are poised to redefine the future of computing, unlocking unparalleled capabilities across diverse technological domains.

The post Brain-Inspired Neuromorphic Chips Redefining AI Acceleration appeared first on ELE Times.

electronica China 2025 will take place from April 15 to 17, 2025 at the Shanghai New International Expo Centre (SNIEC), in halls W3-W5 and N1-N5. It is expected to attract a total of almost 1,800 high-quality exhibitors from domestic and international markets covering 100,000 square meters. Register now and check out the latest updates on the exhibition area!

Click to register now: https://ec.global-eservice.com/?lang=en&channel=enmd

Fairgrounds Map

Overview some important exhibition areas

Semiconductors & Sensors

In recent years, the rapid development of the Internet of Things (IoT) industry in China has positioned sensors as one of the core components of the country’s “Strong Foundation Project”. As a result, the market scale and application scenarios for sensors in China have continued to grow. electronica China 2025 will include exhibition areas for semiconductors and sensors, gathering numerous high-quality exhibitors to discuss industry development on-site.

Test and Measurement & Power Supplies

The power supply industry in China has seen rapid growth fueled by international industrial relocation, the ongoing development of China’s information technology, and the continuous advancements in the defense and military sectors. The 2025 exhibition will feature bring together companies to showcase their products and participate in technological discussions in the test and measurement, and power supply exhibition areas.

Connectors, Switches and Cable Harness

In recent years, the connector market has experienced overall growth, fueled by the rapid development of downstream industries such as consumer electronics, new energy vehicles, communications, and industrial control. electronica China 2025 will feature a connector exhibition area, inviting numerous leading exhibitors from the connector industry to showcase their new products.

PCB & EMS

With the maturation of the EMS industry model and ongoing technological advancements and capacity upgrades by companies, the global EMS market is experiencing greater diversity in its downstream customer sectors. At present, EMS is extensively applied across a range of sectors, including consumer electronics, automotive electronics, industrial control electronics, etc. electronica China 2025 will set up PCB and EMS exhibition areas.

Passive Components & Distributors

The development of technologies like 5G communication, artificial intelligence (AI), and the IoT is presenting substantial opportunities for the passive components industry. Additionally, passive components are widely used in such fields as telecommunications, power, automotive electronics, and healthcare, providing substantial growth opportunities for the industry. electronica China 2025 will set up passive components and distributors exhibition areas.

Click to register now: https://ec.global-eservice.com/?lang=en&channel=enmd

Learn more about electronica China: https://www.electronicachina.com.cn/en

The post electronica China 2025: High-quality Chinese and International Companies Gather at this Can’t-miss Electronics Event with 100,000 Square Meters appeared first on ELE Times.

I'm in the process of stripping this old scoring machine down to replace the insides with an Arduino. I think this machine dates back to the 1960s. Interestingly, it only has modes for Épée and foil (no saber), but yeah it is a fairly interesting piece of history. submitted by /u/Spyhawkguy [link] [comments]

submitted by /u/weirdal1968 [link] [comments]