Feed aggregator

The plan was to make 32 bit Countdown timer using ESP 01, which has only 4 pins. submitted by /u/Defiant-Dot-5311 [link] [comments]

The Rubin CPX GPU brings million-token context windows to coding and generative video, with 8 exaflops of AI performance in a single rack.

Microchip’s DualPack 3 (DP3) IGBT7 power modules come in six variants at 1200 V and 1700 V with current ratings from 300 A to 900 A. They reduce power losses by 15% to 20% compared to IGBT4 devices and operate reliably up to 175°C under overload conditions.

Available in a phase-leg configuration, the 152×62×20-mm DP3 modules support a frame size jump to increase power output. This packaging eliminates the need to parallel multiple modules, reducing system complexity and BOM cost. DP3 modules also serve as a second-source alternative to industry-standard EconoDUAL packages, improving design flexibility and supply chain security.

The IGBT power modules support motor drive, data center, and renewable energy systems with a compact design that simplifies power converters. They are well-suited for general-purpose motor drives and address challenges such as dv/dt, drive complexity, conduction losses, and limited overload capability.

DualPack 3 IGBT7 power modules are now available in production quantities. Additional information and datasheets can be found here.

Microchip Technology 

The post IGBT7 modules cut power losses up to 20% appeared first on EDN.

The IM69D129F low-power MEMS microphone, part of Infineon’s XENSIV lineup, helps extend battery life in portable devices. In high-performance mode, it consumes only 450 µA at 3.072 MHz, dropping to just 170 µA at 768 kHz in low-power mode.

Designed for space-constrained designs, the IM69D129F provides reliable audio performance with a 69-dB(A) SNR in a compact 3.50×2.65×0.98-mm package. Infineon’s sealed dual-membrane (SDM) technology adds IP57-rated protection again water and dust, making the microphone well-suited for active noise cancellation (ANC) headphones and earbuds, voice-enabled devices, laptops, tablets, conference systems, and cameras.

The IM69D129F microphone integrates a low-noise preamplifier and a sigma-delta ADC, delivering digital pulse density modulation (PDM) output for seamless use in modern audio systems. Its 11-Hz flat frequency response and ±1-dB sensitivity tolerance enable accurate audio capture across multi-microphone arrays.

The IM69D129F is available to order, with customer samples offered on request.

IM69D129F product page 

Infineon Technologies 

The post Mic balances low power use with high audio quality appeared first on EDN.

SiTime’s Titan series of MEMS resonators occupy 4× to 12 × less PCB area than the smallest legacy quartz crystal alternatives. Their 0.46×0.46-mm chip-scale package enables miniaturization in small battery-powered devices such as wearable/implantable medical devices, smart watches, fitness rings, smart home sensors, and industrial IoT trackers.

Built on the company’s sixth-generation FujiMEMS technology, the Titan platform delivers improved performance and reliability compared to quartz resonators. Key benefits include:

• Small footprint: 0505 CSP saves up to 7× PCB area versus 1210 quartz and 4× versus 1008 quartz.
• Low power: Reduces oscillator circuit consumption by up to 50%.
• Fast startup: Starts up to 3× quicker with 3× lower startup energy.
• Improved aging stability: Up to 5× better, specified for 5 years at maximum temperature.
• Tight temperature stability: Maintains performance from –40°C to +125°C.
• Enhanced mechanical resilience: Withstands up to 50× more shock and vibration.

The Titan family of resonators comprises five devices, ranging from 32 MHz to 76.8 MHz. Production samples of the 32‑MHz SiT11100 are available now. Engineering samples of the remaining devices—38.4‑MHz SiT11102, 40‑MHz SiT11104, 48‑MHz SiT11103, and 76.8‑MHz SiT11101—will be available starting December 15, 2025.

Titan product page 

SiTime

The post Tiny resonators unlock ultra-compact devices appeared first on EDN.

A pre-certified module with edge intelligence, the Digi XBee 3 BLU provides secure Bluetooth LE 5.4 connectivity for industrial IoT. Embedded MicroPython programmability with access to on-module I/O enables the implementation of custom logic, sensor data processing, and decision-making at the edge.

Based on Silicon Labs’ EFR32MG transceiver, the XBee 3 BLU interoperates with Bluetooth LE 5.4 devices that support 1M (1-Mbit/s) and 2M (2-Mbits/s) PHY modes. It provides +8-dBm transmit power, -97-dBm receiver sensitivity, and beaconing capabilities for proximity detection and asset tracking. The module operates across a temperature range of -40°C to +85°C.

The XBee 3 BLU is offered in two standard XBee form factors—through-hole and micro—and comes pre-certified to speed regulatory approvals worldwide. Built-in Digi TrustFence delivers secure boot, protected JTAG, and hardware-accelerated encryption. The module also supports the Secure Remote Password (SRP) protocol for zero-knowledge authentication and 256-bit AES encryption.

The XBee 3 BLU module and development kits are now available through Digi’s authorized distributors.

XBee 3 BLU product page 

Digi International 

The post Bluetooth LE 5.4 module adds edge programmability appeared first on EDN.

Entry-level MCUs in the Renesas RA0L1 group combine low current consumption with capacitive touch sensing for responsive HMIs. A 32-bit Arm Cortex-M23 core running at 32 MHz makes them well-suited for consumer electronics, appliances, industrial control, and building automation.

The devices draw 2.9 mA in active mode and 0.92 mA in sleep mode. Fast wakeup lets them remain in software standby longer, where power drops to just 0.25 µA—reducing current consumption by up to 90% compared with other MCUs, according to Renesas.

The RA0L1 devices target cost-sensitive applications with up to 64 KB of code flash, 16 KB of SRAM, and a 1.6-V to 5.5-V operating range that removes the need for level shifters in 5-V systems. A high-speed on-chip oscillator with ±1.0% precision ensures baud rate accuracy without a standalone oscillator, maintaining stability from -40°C to +125°C. Integrated communications, analog, safety, and security functions help cut BOM cost.

RA0L1 MCUs are available now in a variety of packages, including a compact 4×4-mm, 24-pin QFN.

RA0L1 product page

Renesas Electronics 

The post Low-power 32-bit MCUs enable touch HMIs appeared first on EDN.

Візит делегації КПІ ім. Ігоря Сікорського до Віденського технічного університету kpi чт, 09/18/2025 - 23:00

After lurking here forever, I finally get to share something I’m genuinely proud of. This is my power schematic made using KiCad 9 LT8641 buck + MIC5234 LDO chain (my 5 V → 3.3 V power path) submitted by /u/Cautious-Ninja-000 [link] [comments]

📯 Відзначення студентської молоді Солом’янського району kpi чт, 09/18/2025 - 22:00

All About Circuits met with the Tektronix engineers behind the 7 Series to uncover the myriad of design challenges that most people never hear about.

Українська монета сяє на світовій арені kpi чт, 09/18/2025 - 17:53

I recently came across a disturbing piece of news about a recall of Ryobi pressurized washers on FOX Business (Figure 1). I got some pictures from there and elsewhere, which, with a little rearrangement and supplementation, point out a very real danger.

Figure 1 Screenshot of the news article on the pressure washer recall. Source: Fox Business

The so-called overheating capacitors can apparently be identified as shown in Figure 2.

Figure 2 The overheating motor starting capacitor under question. Source: Amazon.com

This component provides 300 µF, which is a magnitude of capacitance that can only be obtained in aluminum electrolytic capacitors. Such capacitors cannot be allowed to experience reverse voltage, though, so to achieve the 250 VAC capability, a pair of capacitors must be used in series as shown in Figure 3.

Figure 3 Capture of a schematic that combines two aluminum-electrolytic capacitors.

Each capacitor is paired with a diode that limits the reverse polarity that can appear across each capacitor to one forward diode voltage drop, call that 0.7 V. Supposedly, that voltage limit is still safe as reverse voltage across an aluminum electrolytic capacitor.

However!!!! If one diode fails as an open circuit, the reverse voltage that can be imposed on its associated capacitor can rise way above the diode limit, and that capacitor can fail.

Figure 4 A SPICE example of reverse voltage when one diode fails as an open circuit. Source: John Dunn

Such a failure can lead to a capacitor explosion.

When I was in college, I had a lab partner with whom I would perform each class experiment. One experiment involved a 22-µF 16-V electrolytic capacitor. It was a tiny little thing.

Unfortunately, my partner (It was NOT me!) put that capacitor in the circuit board backwards, and it was driven into reverse bias. It sat there for a while as the two of us were discussing the circuit under test when suddenly that capacitor exploded!!

That explosion was LOUD!! Everybody within fifty feet was looking in our direction. The aluminum shell of the capacitor had been torn open like a Tootsie Roll wrapper.

I suspect that the Ryobi capacitor issue was not from “overheating” as Figure 5 suggests, but that one of the diodes within the CD60 capacitor failed as an open circuit, which allowed excessive reverse bias to appear across its associated capacitor. (If a diode had failed as a short circuit, I doubt if the motor would start.)

Figure 5 An unwise reassurance that the capacitor may not blow when installed backwards. Source: LeftyMaker, YouTube

One would think that the CD60 capacitor would have a pressure release plug that would vent if internal pressure got too high. If there is such a mechanism, it seems that sometimes it is not working properly. The sheer physical size of the CD60 capacitor in the Ryobi product versus that little itty-bitty capacitor in my lab class makes me think of the CD60 capacitor as a potential hand grenade.

John Dunn is an electronics consultant and a graduate of The Polytechnic Institute of Brooklyn (BSEE) and of New York University (MSEE).

Related Content

• Would better electrolytic capacitors reduce e-waste?
• Capacitors–the old decoupling standbys
• Ensure long lifetimes from electrolytic capacitors: A case study in LED light bulbs
• Determining end-of-life, ESR, and lifetime calculations for electrolytic capacitors at higher temperatures
• Power Tips #50: Avoid these common aluminum electrolytic capacitor pitfalls

The post Pressure washer recall and aluminum electrolytic capacitors appeared first on EDN.

КПІ ім. Ігоря Сікорського бере участь у 69-й сесії Генеральної конференції МАГАТЕ kpi чт, 09/18/2025 - 14:17

Artificial Intelligence has come a long way, transforming what was once called a far-fetched notion into a makeover across industries. The conscious discourse has always been about computing accelerators such as CPUs, GPUs, or NPUs, while an invisible, but equally important, element is quietly shaping the future for AI: memory and storage. At Micron, this shift in perception has only served to deepen our commitment to innovation with a fresh standpoint whereby memory and storage became no longer just supporting elements but key drivers influencing AI in performance, scalability, and efficiency.

Breaking Through the Memory Wall

Scaling AI models into billions and even trillions of parameters makes the need for high-speed access to data shoot up exponentially. This really brings to the fore the age-old memory wall problem-the ever-widening gap between the fast processor and the comparatively slower memory bandwidth/latency. For AI workloads, in particular, large-scale training and inference, this can very well be a serious bottleneck.

Micron is attacking this challenge head-on through a full suite of products that ensure memory and storage become accelerators rather than impediments for AI performance.

Micron’s AI-Ready Portfolio

Near Memory: High Bandwidth Memory (HBM) and GDDR reduce latency and ensure fast access to AI model parameters by closely integrating with CPUs.

Main memory that balances capacity, low latency, and power efficiency for workloads like training and inference includes DIMMs, MRDIMMs, and low-power DRAM.

Expansion Memory: By increasing scalable memory capacity, Compute Express Link (CXL) technology reduces total cost of ownership.

High-performance NVMe SSDs and scalable data-lake storage are two storage alternatives that can be used to meet the I/O needs of AI applications that depend significantly on data.

These innovations come together to form Micron’s AI data center pyramid, which increases throughput, scalability, and energy efficiency by addressing bottlenecks at every level.

Why AI Metrics Are Important

AI performance is assessed using common system-level KPIs across platforms, including mobile devices and hyperscale data centers:

Time to First Token (TTFT): The speed at which a system starts producing output.

A metric for inference throughput is tokens per second.

A measure of power efficiency is tokens per second per watt.

Memory and storage both have a significant impact on these parameters, guaranteeing that AI workloads are carried out quickly, reliably, and with the least amount of energy consumption.

Enhanced Central AI Memory and Storage Set Up

The very frontier that used to separate compute from memory is getting blurred. Given the blend of demand for energy-efficient yet high performing solution, LPDDR and other low-power memories that were being used in mobile are now gradually entering into the data center space. Micron’s portfolio of DDR, LPDDR, GDDR, and HBM memories is marketed to new levels of being optimized for every step of AI inference-from embedding to decoding, thus eliminating bottlenecks.

Conclusion:

AI is being viewed as the era for bigger models and faster processors; it is a point of rethinking compute, memory, and storage interoperability. Memory is indeed a performer in the guest list of AI scalability and efficiency, thanks to the DRAM and NAND memory innovations from Micron. Breaking memory wall and setting new system-level metrics will help make the next step for AI performance, thanks to Micron.

(This article has been adapted and modified from content on Micron.)

The post From Compute to Memory: Redefining AI Performance with Next-Gen Memory and Storage appeared first on ELE Times.

2025 Student Tech Challenge від Huawei Ukraine kpi чт, 09/18/2025 - 11:59

Іменні стипендії з нагоди Дня національного визволення Республіки Корея kpi чт, 09/18/2025 - 11:49

The surge in demand for large-scale AI training is straining today’s cloud infrastructure, pushing electrical packet switches (EPS) toward their performance and power limits. As GPUs scale into massive clusters to support ever-growing large language models, the need for faster, more efficient data transport is becoming critical. Optical Circuit Switches (OCS) are emerging as a powerful alternative, offering high bandwidth over long distances with far lower energy consumption.

Unlike EPS even those integrated with co-packaged optics OCS relies on all-optical connections to link GPUs through switched ports and optical transceivers. This enables GPU clusters to operate as a unified, high-performance computing fabric while delivering significant efficiency gains.

Applied Ventures recently co-led a Series A funding round for Salience Labs, a startup pioneering OCS solutions based on Semiconductor Optical Amplifier (SOA) technology. Their Photonic Integrated Circuits (PICs) are available in two configurations: a high-radix switch designed for HPC workloads and a lower-radix version optimized for AI data centers. This flexibility allows hyperscalers, GPU makers, and even financial trading firms to balance cost, performance, and scalability.

The urgency of these innovations is underscored by energy trends. The U.S. Energy Information Administration projects data centers will consume 6.6% of U.S. electricity by 2028, more than double the share in 2024. Networking equipment switches, transceivers, and interconnects represents a growing portion of this footprint.

To address this, companies are rethinking chip and system design:

• Google’s TPU aims for a 10× cost-efficiency advantage over GPUs by tailoring silicon to specific AI tasks.
• Lumentum projects that without optical efficiency improvements, training GPT-5 could require 122 MW, nearly six times more than GPT-4. Energy-efficient optical interfaces combined with OCS could cut that by 79%, aligning power use with GPT-4 levels.
• Arista Networks estimates energy-efficient optical modules could save up to 20W per 1,600Gbps module.

By combining scalability with low-latency, long-reach connectivity, OCS technology could reshape how tens or hundreds of GPUs interconnect, enabling them to act as one massive supercomputer while containing the energy surge.

Conclusion:

Optical Circuit Switches are more than an incremental upgrade they represent a fundamental shift toward sustainable high-performance computing. With almost very high bandwidth, low latency, and massive energy savings, OCS will stand tall in next-generation AI data centers so that performance scaling is not done at the unsustainable power cost.

(This article has been adapted and modified from content on Applied Materials.)

The post Redefining Data Infrastructure: Optical Circuit Switches Could Transform AI Data Centers appeared first on ELE Times.

High-speed data acquisition is made simple with a 12-bit digitizer that offers up to 10 GSPS sampling rate and 2 Gbyte/s sustained data transfer to a host PC. Teledyne’s ADQ3-series digitizer provides high-performance data acquisition in a compact, standalone USB 3.2 form factor.

Digitizers—crucial in analytical and sensing systems such as automated test equipment (ATE), distributed fiber optic sensing platforms, LiDARs, mass spectrometers, and swept-source optical coherence tomography—are undergoing a transformation amid growing demand for faster data acquisition. It inevitably calls for higher resolution, faster imaging speeds, and more granular real-time analysis.

That’s because new use cases in sensing systems generate gigabytes of data per second, demanding efficient real-time processing and high-speed data transfer. Then there is the issue of preserving signal integrity in compact and noise-sensitive environments, which mandates compact form factors that can be placed close to the detector within the system enclosure.

ADQ3-USB, housed in a robust, fanless enclosure, allows engineers to place the digitizer close to the detector. This also minimizes cable length and reduces signal reflections, a crucial factor for optimizing analog performance in high-speed applications.

ADQ3-USB is compatible with a wide range of digitizer models within the ADQ3 series, including ADQ30, ADQ32, ADQ33, and ADQ35. Source: Teledyne SP Devices

ADQ3-USB features onboard FPGA capabilities for real-time signal processing. That enables it to support continuous data streaming at up to 2 Gbyte/s via USB 3.2. Moreover, even large volumes of raw data up to 20 Gbyte/s can be efficiently reduced and transferred without bottlenecks.

Next, it eliminates the need for PCIe slots, leading to fast and simple integration with mini-PCs and laptops. This also makes it suitable for mobile setups, embedded systems, and OEM applications.

ADQ3-USB’s open FPGA architecture also allows design engineers to implement application-specific algorithms directly on the 1/2 digitizer. That, in turn, reduces the need for post-processing and enables real-time decision-making.

Finally, this digitizer supports multiple firmware packages tailored to specific application needs. That includes FWDAQ for standard data acquisition, FWATD for waveform averaging, FWPD for pulse detection, and DEVDAQ for custom FPGA development.

Related Content

• Analysis of large data acquisitions
• Data acquisition systems and SoCs—A guide
• Trending into data-acquisition: a mini-study in contrasts
• Data Acquisition and Instrumentation: The DAS and Sensors
• Data Acquisition and Instrumentation: Data Processing and Calibration

The post High-speed digitizer boasts open FPGA architecture appeared first on EDN.

submitted by /u/Riverspoke [link] [comments]