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Beneq launches Transform XP second-generation ALD platform
Beneq launches Transform XP second-generation ALD platform
Beneq unveils Transmute high-throughput ALD tool for power, RF and μLED device production
Beneq unveils Transmute high-throughput ALD tool for power, RF and μLED device production
The Linksys MX4200C: A retailer-branded router with memory deficiencies

How timely! My teardown of Linksys’ VLP01 router, submitted in late September, was published one day prior to when I started working on this write-up in late October.

What’s the significance, aside from the chronological cadence? Well, at the end of that earlier piece, I wrote:
There’s another surprise waiting in the wings, but I’ll save that for another teardown another (near-future, I promise) day.
That day is today. And if you’ve already read my earlier piece (which you have, right?), you know that I actually spent the first few hundred words of it talking about a different Linksys router, the LN1301, also known as the MX4300:

I bought a bunch of ‘em on closeout from Woot (yep, the same place that the refurbished VLP01 two-pack came from), and I even asked my wife to pick up one too, with the following rationale:
That’ll give me plenty of units for both my current four-node mesh topology and as-needed spares…and eventually I may decide to throw caution to the wind and redirect one of the spares to a (presumed destructive) teardown, too.
Last month’s bigger brotherHold that thought. Today’s teardown victim was another refurbished Linksys router two-pack from Woot, purchased a few months later, this February to be exact. Woot promotion-titled the product page as a “Linksys AX4200 Velop Mesh Wi-Fi 6 System”, and the specs further indicated that it was a “Linksys MX8400-RM2 AX4200 Velop Mesh Wi-Fi 6 Router System 2-Pack”. It cost me $19.99 plus tax (with free shipping) after another $5 promotion-code discount, and I figured that, as with the two-VLP01 kit, I’d tear down one of the two routers for your enjoyment and hold onto the other for use as a mesh node. Here’s its stock image on Woot’s website:

Looks kinda like the MX4300, doesn’t it? I admittedly didn’t initially notice the physical similarity, in part because of the MX8400 product name replicated on the outer box label:

When I started working on the sticker holding the lid in place, I noticed a corner of a piece of literature sticking out, which turned out to be the warranty brochure. Nice packing job, Linksys!

Lifting the lid:

You’ll find both routers inside, along with two Ethernet cable strands rattling around loose. Underneath the thick blue cardstock piece labeled “Setup Guide” to the right:

are the two power supplies, along with…umm…the setup guide plus a support document:

Some shots of the wall wart follow:

including the specs:

and finally, our patient, as usual, accompanied by a 0.75″ (19.1 mm) diameter U.S. penny for size comparison purposes. Front view:

left side:

back, both an overview and a closeup of the various connectors: power, WAN, three LAN, and USB-A. Hmm…where have I seen that combo before?


right side:

top, complete with the status LED:

and…wait. What’s this?

In addition to the always-informative K7S-03580 FCC ID, check out that MX4200C product name. When I saw it, I realized two key things:
- Linksys was playing a similar naming game to what they’d done with the VLP01. Quoting from my earlier teardown: “…an outer box shot of what I got…which, I’ve just noticed, claims that it’s an AC2400 configuration
(I’m guessing this is because Linksys is mesh-adding the two devices’ theoretical peak bandwidths together? Lame, Linksys, lame…)” This time, they seemingly added the numbers in the two MX4200 device names together to come up with the “bigger is better” MX8400 moniker. - The MX4200(C, in this case) is mighty close to MX4300. Now also realizing the physical similarity, I suspected I had a near-clone (and much less expensive, not to mention more widely available) sibling to the no-longer-available router I’d discussed a month earlier, which, being rare, I was therefore so reticent to (presumably destructively) disassemble.
Some background from my online research before proceeding:
- The MX4200 came in two generational versions, both of them integrating 512 Mbytes of flash memory for firmware storage. V1 of the MX4200 included 512 Mbytes of RAM and had dimensions of 18.5cm (7.3 inches) high and 7.9cm (3.1 inches) wide. The larger, 24.3cm (9.57 inches) high and 11cm (4.45 inches) wide, V2 MX4200 also doubled the internal RAM capacity to 1 GByte.
- This MX4200C is supposedly a Costco-only variant (meaning what beyond the custom bottom sticker? Dunno), conceptually reminiscent of the Walmart-only VLP01 I’d taken apart last month. I can’t find any specs on it, but given its dimensional commonality with the V2 MX4200, I’ll be curious to peer inside and see if it embeds 1 GByte of RAM, too.
- And the MX4300? It’s also dimensionally reminiscent of the V2 MX4200. But this time, there are 2 GBytes of RAM inside it. Last month, I’d mentioned that the MX4300 also bumps up the flash memory to 1 GByte, but the online source I’d gotten that info from was apparently incorrect. It’s 512 GBytes, the same as in versions of the MX4200.
Clearly, now that I’m aware of the commonality between this MX4200C and the MX4300, I’m going to be more careful (but still comprehensive) than I might otherwise be with my dissection, in the hope of a subsequent full resurrection. To wit, here we go, following the same initial steps I used for the much smaller VLP01 a month ago. The only top groove I was able to punch through was the back edge, and even then, I had to switch to a flat-head screwdriver to make tangible disassembly progress (without permanently creasing the spudger blade in the process):

Voila:


Next to go, again as before, are those four screws:


And now for a notable deviation from last month’s disassembly scheme. That time, there were also screws under the bottom rubber “feet” that needed to be removed before I could gain access to the insides. This time, conversely, when I picked up the assembly in preparation for turning it upside-down…

Alrighty, then!

Behold our first glimpses of the insides. Referencing the earlier outer case equivalents (with the qualifier that, visually obviously, the PCB is installed diagonally), here’s the front:

Left side:

Back, along with another accompanying connectors closeup (note, by the way, the two screws at the bottom of the exposed portion of the PCB):


And right side:

Let’s next get rid of the plastic shield around the connectors, which, as was the case last month, lifted away straightaway:

And next, the finned heatsink to its left (in the earlier photo) and the rear right half of the assemblage (when viewed from the front):



We have liftoff:


Oh, goodie, Faraday cages! Hold that thought:

Rotating the assemblage around exposes the other (front left) half and its metal plate, which, with the just-seen four heatsink screws also no longer holding it in place, lifts right off as well:




You probably already noticed the colored wires in the prior shots. Here are the up-top antennas and LED assembly where they end up:


And here’s where at least some of them originate:



Unhooking the wire harness running up the side of the assemblage, along with removing the two screws noted earlier at the bottom of the PCB, enables the board’s subsequent release:

Here’s what I’m calling the PCB backside (formerly in the rear right region) which the finned heatsink previously partially covered and which you’ve already seen:

And here’s the newly-exposed-to-view frontside (formerly front left, to be precise), with even more Faraday cages awaiting my pry-off attention:

I’m happy to oblige. Upper left corner first:

Temporarily (because, as previously mentioned, I aspire to put everything back together in functionally resurrected form later) bend the tab away, and with thanks to Google Image search results for the tip, a Silicon Labs EFR32MG21 Series 2 Multiprotocol Wireless SoC, supporting Bluetooth, Thread, and Zigbee mesh protocols, comes into view. The previously shown single-lead antenna connection on the other side of the PCB is presumably associated with it:

To its left, uncaged, is a Fidelix FMND4G08S3J-ID 512 Mbyte NAND flash memory, presumably for holding the system firmware.
Most of the rest of the cages’ contents are bland, unless you’re into lots of passives; as you’ll soon see, their associated ICs on the other side are more exciting:




Note in all these so-far cases, as well as the remainder, that thermal tape is employed for heat transfer purposes, not paste. Linksys’ decision not only makes it easier to see what’s underneath it will also increase the subsequent likelihood of tape-back-in-place reassembly functional success:

And after all those passives, the final cage at bottom left ended up being IC-inclusive again, this time containing a Qualcomm PMP8074 power management controller:

Now for a revisit of the other side of the PCB, starting with the top-most cage and working our way to the bottom. The first one, with two antenna connectors notably above it, encompasses a portion of the wireless networking subsystem and is based on two Qualcomm Wi-Fi SoCs, the QCN5024 for 2.4 GHz and QCN5054 for 5 GHz. Above the former are two Skyworks SKY85340-11 front-end modules (FEMs); the latter is topped off by two Skyworks SKY85755-11s:


The next cage is for the processor, a quad-core 1.4 GHz Qualcomm IPQ8174, the same SoC and speed bin as in the Linksys MX4300 I discussed last month, and the volatile memory, two ESMT M15T2G16128A 2 Gbit DDR3-933 SDRAMs. I guess we now know how the MX4200C differs from the V2 MX4200; Linksys halved the RAM to 512 GBytes total, reminiscent of the V1 MX4200’s allocation, to come up with this Costco-special product spin.



The third one, this time with four antennae connectors below it, houses the remainder of the (5 GHz-only, in this case) Wi-Fi subsystem; four more Qualcomm QCN5054s, each with a mated Skyworks SKY85755-11 FEM:


And last but not least, at bottom right is the final cage, containing a Qualcomm QCA8075 five-port 10/100/1000 Mbps Ethernet transceiver, only four ports’ worth of which are seemingly leveraged in this design (one WAN, three LAN, if you’ll recall from earlier). Its function is unsurprising given its layout proximity to the two Botthand LG2P109RN dual-port magnetic transformers to its right:


And with that, I’ll wrap up for today. More info on the MX4200 (V1, to be precise) can be found at WikiDevi. Over to you for your thoughts in the comments!
—Brian Dipert is the Principal at Sierra Media and a former technical editor at EDN Magazine, where he still regularly contributes as a freelancer.
Related Content
- A fresh gander at a mesh router
- The pros and cons of mesh networking
- Teardown: The router that took down my wireless network
- Is it time to upgrade to mesh networking?
The post The Linksys MX4200C: A retailer-branded router with memory deficiencies appeared first on EDN.
STMicroelectronics launches GaNSPIN system-in-package family
Understand quadrature encoders with a quick technical recap

An unexpected revisit to my earlier post on mouse encoder hacking sparked a timely opportunity to reexamine quadrature encoders, this time with a clearer lens and a more targeted focus on their signal dynamics and practical integration. So, let’s get a fresh restart and dive straight into the quadrature signal magic.
Starting with a flake of theory, a quadrature signal refers to a pair of sinusoidal waveforms—typically labeled I (in-phase) and Q (quadrature)—that share the same frequency but are offset by 90° in phase. These orthogonal signals do not interfere with each other and together form the foundation for representing complex signals in systems ranging from communications to control.

Figure 1 A visualization illustrates the idealized output from a quadrature encoder, highlighting the phase relationship. Source: Author
In the context of quadrature encoders, the term describes two square wave signals, known as A and B channels, which are also 90° out of phase. This phase offset enables the system to detect the direction of rotation, count discrete steps or pulses for accurate position tracking, and enhance resolution through edge detection techniques.
As you may already be aware, encoders are essential components in motion control systems and are generally classified into two primary types: incremental and absolute. A common configuration within incremental encoders is the quadrature encoder, which uses two output channels offset in phase to detect both direction and position with greater precision, making it ideal for tracking relative motion.
Standard incremental encoders also generate pulses as the shaft rotates, providing movement data; however, they lose positional reference when power is interrupted. In contrast, absolute encoders assign a unique digital code to each shaft position, allowing them to retain exact location information even after a power loss—making them well-suited for applications that demand high reliability and accuracy.
Note that while quadrature encoders are often mentioned alongside incremental and absolute types, they are technically a subtype of incremental encoders rather than a separate category.
Oh, I almost forgot: The Z output of an ABZ incremental encoder plays a crucial role in precision positioning. Unlike the A and B channels, which continuously pulse to indicate movement and direction, the Z channel—also known as the index or marker pulse—triggers just once per revolution.
This single pulse serves as a reference point, especially useful during initialization or calibration, allowing systems to accurately identify a home or zero position. That is to say, the index pulse lets you reset to a known position and count full rotations; it’s handy for multi-turn setups or recovery after power loss.

Figure 2 A sample drawing depicts the encoder signals, with the index pulse clearly marked. Source: Author
Hands-on with a real-world quadrature rotary encoder
A quadrature rotary encoder detects rotation and direction via two offset signals; it’s used in motors, knobs, and machines for fine-tuned control. Below is the circuit diagram of a quadrature encoder I designed for a recent project using a couple of optical sensors.

Figure 3 Circuit diagram shows a simple quadrature encoder setup that employs optical sensors. Source: Author
Before we proceed, it’s worth taking a moment to reflect on a few essential points.
- A rotary encoder is an electromechanical device used to measure the rotational motion of a motor shaft or the position of a dial or knob. It commonly utilizes quadrature encoding, an incremental signaling technique that conveys both positional changes and the direction of rotation. On the other hand, linear encoder measures displacement along a straight path and is commonly used in applications requiring high-precision linear motion.
- Quadrature encoders feature two output channels, typically designated as channel A and channel B. By monitoring the pulse count and identifying which channel leads, the encoder interface can determine both the distance and direction of rotation.
- Many encoders also incorporate a third channel, known as the index channel (or Z channel), which emits a single pulse per full revolution. This pulse serves as a reference point, enabling the system to identify the encoder’s absolute position in addition to its relative movement.
- Each complete cycle of the A and B channels in a quadrature encoder generates square wave signals that are offset by 90 degrees in phase. This cycle produces four distinct signal transitions—A rising, B rising, A falling, and B falling—allowing for higher resolution in position tracking. The direction of rotation is determined by the phase relationship between the channels: if channel A leads channel B, the rotation is typically clockwise; if B leads A, it indicates counterclockwise motion.
- To interpret the pulse data generated by a quadrature encoder, it must be connected to an encoder interface. This interface translates the encoder’s output signals into a series of counts or cycles, which can then be converted into a number of rotations based on the encoder’s cycles per revolution (CPR) counts. Some manufacturers also specify pulses per revolution (PPR), which typically refers to the number of electrical pulses generated on a single channel per full rotation and may differ from CPR depending on the decoding method used.

Figure 4 The above diagram offers a concise summary of quadrature encoding basics. Source: Author
That’s all; now, back to the schematic diagram.
In the previously illustrated quadrature rotary encoder design, transmissive (through-beam) sensors work in tandem with a precisely engineered shaft encoder wheel to detect rotational movement. Once everything is correctly wired and tuned, your quadrature rotary encoder is ready for use. It outputs two phase-shifted signals, enabling direction and speed detection.
In practice, most quadrature encoders rely on one of three sensor technologies: optical, magnetic, or capacitive. Among these, optical encoders are the most commonly used. They operate by utilizing a light source and a photodetector array to detect the passage or reflection of light through an encoder disk.
A note for custom-built encoder wheels: When designing your own encoder wheel, precision is everything. Ensure the slot spacing and width are consistent and suited to your sensor’s resolution requirements. And do not overlook alignment; accurate positioning with the beam path is essential for generating clean, reliable signals.
Layers beneath the spin
So, once again we circled back to quadrature encoders—this time with a bit more intent and (hopefully) a deeper dive. Whether you are just starting to explore them or already knee-deep in decoding signals, it’s clear these seemingly simple components carry a surprising amount of complexity.
From pulse counting and direction sensing to the quirks of noisy environments, there is a whole layer of subtleties that often go unnoticed. And let us be honest—how often do we really consider debounce logic or phase shift errors until they show up mid-debug and throw everything off?
That is the beauty of it: the deeper you dig, the more layers you uncover.
If this stirred up curiosity or left you with more questions than answers, let us keep the momentum going. Share your thoughts, drop your toughest questions, or suggest what you would like to explore next. Whether it’s hardware oddities, decoding strategies, or real-world implementation hacks—we are all here to learn from each other.
Leave a comment below or reach out with your own encoder war stories. The conversation—and the learning—is far from over.
Let us keep pushing the boundaries of what we think we know, together.
T. K. Hareendran is a self-taught electronics enthusiast with a strong passion for innovative circuit design and hands-on technology. He develops both experimental and practical electronic projects, documenting and sharing his work to support fellow tinkerers and learners. Beyond the workbench, he dedicates time to technical writing and hardware evaluations to contribute meaningfully to the maker community.
Related Content
- Decode a quadrature encoder in software
- Understanding Incremental Encoder Signals
- AVR takes under 1µs to process quadrature encoder
- Linear position sensor/encoder offers analog and digital evaluation
- How to use FPGAs for quadrature encoder-based motor control applications
The post Understand quadrature encoders with a quick technical recap appeared first on EDN.
Rohde & Schwarz presents multi-purpose R&S NGT3600 high-precision dual-channel power supply
Rohde & Schwarz showcases at productronica 2025 the R&S NGT3600 series, a new line of DC power supplies offering up to 1800 W per channel. These power supplies are highly versatile, providing adjustable output voltages of up to 80 V. The two channels of the R&S NGT3622 model can be combined in series or parallel, allowing users to double either the voltage or the current. For applications requiring even more power, up to three units can be connected, delivering up to 480 V or 300 A across six channels.
Exceptionally clean and stable power
The R&S NGT3600 series delivers exceptionally clean and stable power, featuring very low voltage and current ripple and noise. With a resolution of 100 µA for current and 1mV for voltage, the instruments offer precise measurements needed for a wide range of applications.
Adjustable dual-channel power for various test and measurement tasks
The unique two-channel model, the R&S NGT3622, sets a new benchmark for high-performance DC power supplies by combining up to two fully independent 1800 W outputs in a single compact instrument. This represents a significant breakthrough for labs and test systems that demand versatility, space efficiency, and uncompromised precision. Thus, it is ideally suited for measurement and testing tasks in various industries, including power electronics, mobile and satellite communications, renewable energies, automotive, aerospace & defense, among others. The R&S NGT3622 enables precise current and voltage testing under load, efficiency measurements and thermal characterization of components such as DC/DC converters, power supplies, motors, and semiconductors.
Engineers can use a R&S NGT3600 to test high-current prototypes, such as base stations, validate MPPT algorithms for solar inverters, or inspect charging stations. In the automotive sector, it supports the transition to 48 V on-board networks, making it ideal for simulating on-board networks and powering communication systems, sensors, and control units during testing. These capabilities are equally valuable in the aerospace and defense sectors. In short, the R&S NGT3600 is a comprehensive solution for the development and verification of modern DC power supply systems and battery-powered devices.
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IEEE Wintechon 2025 Powering India’s Semiconductor Future through Data, Diversity and Collaboration
The sixth edition of IEEE WINTECHCON 2025 convened over 800 women engineers, technologists, industry leaders, academia, students, and researchers from November 12 – 13, 2025, under the theme “Transforming the Future with Data-Driven Innovations in the Semicon-Verse.”
Organized by IEEE Bangalore Section, IEEE CAS Bangalore Chapter, and Women in Engineering AG Bangalore Section, the conference was hosted by Samsung Semiconductor India Research (SSIR), this year.
Dr. Chandrakanta Kumar, Chair of the IEEE Bangalore section, said, “IEEE Wintechcon 2025 showcased the strength and momentum of India’s semiconductor innovation engine. The shift toward data-driven and AI-enabled design is redefining what is possible in chip and system development, and this forum brought together the leaders shaping that future. The strong industry and academic participation reflects a clear belief that advancing semiconductor technology demands both technical excellence and inclusive leadership”.
The conference featured keynotes by Jaya Jagadish, Country Head and Senior Vice President of Silicon Design Engineering at AMD; Rajesh Krishnan, Senior Vice President and Managing Director, SSIR; Savithri Seetharaman, Vice President at Texas Instruments; and Sonali Jayswal, Director of System Software at NVIDIA. Garima Srivastava (SSIR) and Puneet Mishra (IEEE) served as the General Chairs for this event.
Rajesh Krishnan, Senior Vice President and Managing Director, SSIR. “Hosting IEEE Wintechcon 2025 was a privilege to showcase the engineering excellence driving the next generation of semiconductor and systems innovation. India stands at a pivotal juncture — with exceptional talent and strong technical rigor, the sector is poised to lead globally. At SSIR, we are advancing this trajectory through cutting-edge R&D, long-term ecosystem partnerships, democratising AI adoption and a focused commitment to nurturing women engineers into technical and product leadership roles that will shape the industry’s future.”
Key takeaways
The two-day program included deep technical sessions across both virtual and in-person formats. Tracks such as “Intelligent Silicon” and “Interstellar Innovations” covered GenAI-powered digital twins, 3D IC integration, advanced packaging, and design-for-test architectures, featuring speakers from Samsung, IBM, Western Digital, Cadence, and Texas Instruments. Day two hosted five parallel paper tracks on AI accelerators, embedded systems, VLSI architectures, and semiconductor packaging, complemented by technology booths, poster sessions, and hands-on demos. A special Masterclass, “From Engineer to Executive,” offered career and leadership insights for emerging women in STEM.
The next edition of IEEE WINTECHCON will be held in November 2026, in Bengaluru, India.
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PowerAmerica issues request for proposals for 24-month projects
🚀 КПІ ім. Ігоря Сікорського долучається до Тижня доброчесності 2025!
Готуйтесь до насичених подій, лекцій і можливостей з 1 по 10 грудня 2025 року!
Rohde & Schwarz collaborates with Broadcom to enable testing and validation of next-gen Wi-Fi 8 chipsets
Rohde & Schwarz, deepened its collaboration with Broadcom Inc. to enable testing and validation of Wi-Fi 8 chipsets using the CMP180 radio communication tester.
Wi-Fi 8, based on the IEEE 802.11bn specification, promises a significant leap forward in wireless connectivity. It is anticipated to bring higher throughput, lower latency, improved efficiency in congested spectrum environments and enhanced performance for XR (extended reality), AI-assisted applications, real-time cloud gaming and ultra-high-definition content streaming.
With their collaboration, the Rohde & Schwarz and Broadcom ensure that the industry has the tools to manufacture products that deliver on the promise of Wi-Fi 8:
- Validation of CMP180 for Wi-Fi 8: Rohde & Schwarz and Broadcom have jointly carried out test campaigns that demonstrate that the CMP180 meets the demanding technical requirements of Wi-Fi 8 chipsets.
- Support Across Device Lifecycle: The CMP180 will be available as an end-to-end test solution – from early development (R&D), through design validation, to production and quality assurance – for devices that adopt Wi-Fi 8 technology.
- Future-Proof Hardware & Bandwidth: The CMP180, with its coverage up to 8 GHz, bandwidths up to 500 MHz, dual independent channels (2 x VSA / 2 x VSG), 4 x 4 MiMo support for Wi-Fi networking products, enhanced RF ports, is positioned to handle the new challenges Wi-Fi 8 will present.
- Accelerating Time to Market: With automated test routines created in close cooperation between Rohde & Schwarz and Broadcom, device manufacturers will gain early access to test vectors, calibration protocols, and software frameworks.
- UHR (Ultra-High Reliability) for Wi-Fi 8: This collaboration will ensure Wi-Fi 8 devices deliver consistently stable and robust connections. The CMP180’s advanced testing capabilities will validate performance under challenging conditions, ensuring the ultra-high reliability demanded by applications like XR, Al, cloud gaming, and critical IoT deployments.
Goce Talaganov, Vice President of Mobile Radio Testers at Rohde & Schwarz, said: “We are excited to strengthen our partnership with Broadcom to provide a comprehensive testing solution for the next generation of Wi-Fi technology. The CMP180’s advanced features and our close collaboration with Broadcom will empower device manufacturers to bring innovative Wi-Fi 8 products to market quickly and confidently.”
Gabriel Desjardins, director of marketing for the Wireless Communications and Connectivity Division at Broadcom, said: “Our partnership with Rohde & Schwarz is accelerating the future of wireless innovation. Together, we’re empowering Broadcom’s customers and partners to lead the transition to Wi-Fi 8 and redefine what’s possible in connectivity.”
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First Solar inaugurates $1.1bn AI-enabled Louisiana manufacturing facility
Nuvoton Introduces High-Quality 24-bit Stereo DAC Solution NAU8421YG
Nuvoton announced NAU8421YG, a new high quality DAC audio solution. The NAU8421YG is a 24-bit stereo DAC with 8Vpp differential analog output capability, 128dB SNR and -99dB THD+N. This device includes an I 2 C control interface with additional pin selectable features and standalone operation. It operates from a 3.3V digital I/O supply voltage and an analog 5V supply voltage. Additionally, the NAU8421YG includes automatic clock detection sequences for smooth power up & power down control. This enables fast and efficient system integration.
The NAU8421YG’s preliminary function is to provide a high-quality and efficiency differential line level output (Line-Out), converting digital audio sources (such as computer, instrument, mixer, effect or streamers) into an analog signal, which is then sent to equipment that requires external or built-in amplification circuitry.
Leap forward in Efficiency, Power and auto clock detection sequences
The NAU8421YG includes automatic clock detection sequences for smooth power up and power down control. This enables fast and efficient system integration. It can serve as the core decoder, replacing the DAC built into a playback system or streamer to improve the quality, outputting to an integrated or pre-amplifier. Pairs with a pre-amplifier provide the purest analog source signal, achieving source separation for critical listening. Act as part of an audio interface to provide accurate, low distortion analog output to studio monitor controllers or mixing consoles.
Superior Isolation and dynamic range for multi-channel system
The 140dB channel signal separation at 1kHz represents the leakage (cross talk) between channels, which secures the over system’s dynamic range and ensures the maximum limit offered by 24-bit resolution without crosstalk issue. It allows users to accurately measure both extremely loud (high amplitude) and extremely low (low amplitude) signals simultaneously with the highest accuracy. This is crucial for multi- track recording in studios or for multi-sensor data acquisition in industrial measurements, ensuring the independence and integrity of each channel’s signal.
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STMicroelectronics introduces the industry’s largest MCU model zoo to accelerate Physical AI time to market
STMicroelectronics has unveiled new models and enhanced project support for its STM32 AI Model Zoo to accelerate the prototyping and development of embedded AI applications. This marks a significant expansion for what is already the industry’s largest library of models for vision, audio, and sensing to be embedded in equipment such as wearables, smart cameras and sensors, security and safety devices, and robotics.
“Turning data science into a working application tuned for an embedded platform is a complex engineering challenge, and developers need support throughout the journey,” said Stephane Henry, Edge AI Solution Group VP at STMicroelectronics. “While expanding the selection of models available, to help the STM32 developer community jump-start their projects, we are also strengthening the infrastructure all the way to deployment with STM32 AI Model Zoo 4.0. This is part of our commitment to make Physical AI a reality.”
ST’s latest AI Model Zoo empowers designers to maximize available resources, enabling the creation of highly efficient models that operate with minimal power consumption.
This Model Zoo is part of ST Edge AI Suite, which offers a comprehensive collection of tools, libraries, and utilities that further simplify and accelerate the development and deployment of AI algorithms on ST hardware, ensuring seamless integration from prototype to production.
For over a decade, ST has been at the forefront of research, innovation, and development in edge AI, with the goal of helping developers overcome the complexities of deploying AI at the edge with both software and hardware accelerated models. Today, ST’s AI tools continue to support over 160,000 projects annually.
ST’s STM32 family features the world’s most widely adopted microcontrollers, used in a diverse range of applications, including consumer appliances, wearables, communication infrastructure, smart grids, smart cities, industrial automation, and even low-earth-orbit satellites. By strategically enabling AI deployment on general-purpose MCUs across these sectors, ST delivers cutting-edge technology to end users rapidly and cost-effectively, while enhancing sustainability.
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STMicroelectronics introduces the industry’s first 18nm microcontroller for high-performance applications
STMicroelectronics has unveiled the STM32V8, a new generation of high-performance microcontrollers (MCUs) for demanding industrial applications. The STM32V8 is designed with ST’s most advanced 18nm process technology with best-in-class embedded phase-change memory (PCM). It is manufactured in ST’s 300mm fab in Crolles, France, and also in collaboration with Samsung Foundry.
“The STM32V8 is our fastest STM32 microcontroller to date, designed for high reliability in harsh operating environments, with the ability to replace much larger and power-hungry application processors. The STM32V8 represents the future of what a high performance MCU can do for demanding embedded and edge AI applications such as industrial control, sensor fusion, image processing, voice control, and others,” said Remi El-Ouazzane, President, Microcontrollers, Digital ICs and RF products Group at STMicroelectronics.
Its Arm Cortex-M85 core and the 18nm process help the STM32V8 achieve clock speeds of up to 800 MHz, making it the most powerful STM32 MCU ever shipped. High levels of faster and larger embedded memory are a key enabler of a broad range of secure and connected applications.
One such demanding environment is the high-radiation conditions encountered in Low Earth Orbit (LEO). SpaceX has selected the STM32V8 for its Starlink constellation, using it in a mini laser system that connects the satellites traveling at extremely high speeds in LEO.
“The successful deployment of the Starlink mini laser system in space, which uses ST’s STM32V8 microcontroller, marks a significant milestone in advancing high-speed connectivity across the Starlink network. The STM32V8’s high computing performance and integration of large embedded memory and digital features were critical in meeting our demanding real-time processing requirements, while providing a higher level of reliability and robustness to Low Earth Orbit environment, thanks to the 18nm FD-SOI technology. We look forward to integrating the STM32V8 into other products and leveraging its capabilities for next-generation advanced applications,” said Michael Nicolls, Vice President, Starlink Engineering at SpaceX.
The STM32V8 is in early-stage access for selected customers with key OEMs availability as of the first quarter 2026 and with broader availability to follow.
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Navigating urban roads with safety-focused, human-like automated driving experiences
Courtesy: Qulacomm
| What you should know:
● Dense urban traffic and highway driving can be complex and often dangerous for road users, but crash avoidance technologies such as ADAS can reduce road incidents. ● Traditional, rule-based planning methods for controlling ADAS functionality can’t scale to include enough potential scenarios. ● The Snapdragon Ride platform employs an AI planner to learn and adapt in real-time as well as a traditional planner as a safety guardrail and verifier. |
The dense urban traffic at crowded intersections with vehicles, two-wheelers, and pedestrians and highly congested arterial roadways, can be complex and often dangerous for road users. Approximately 1.19 million people died in traffic crashes in 2023. In the U.S., 59% of these road fatalities occurred in urban areas, and 73% were at intersections.
Crash avoidance technologies such as advanced driver assistance systems (ADAS) can reduce road incidents, helping to save lives in these complicated scenarios. For example, automatic emergency braking has been shown to reduce front-to-rear crashes by 50% and pedestrian crashes by 27%.
Achieving these results across cities, countries, and driving styles is no small task. Traditional, rule-based planning methods for controlling ADAS functionality often struggle to negotiate and adapt to real-time sensor data in dense urban driving scenarios. These human-defined, logic-based planners rely on pre-specified rules, which can’t scale to include enough potential scenarios for the planner to react appropriately in any given traffic situation.
AI planner
Introducing an AI-based planner into the system can help to handle the massive amount of input coming into a vehicle as it travels through highly variable and dynamic urban environments. Capable of running large language models while simultaneously processing input from multiple perception systems, an AI planner uses a data-driven approach to learn and adapt in real-time.
Because it is a decision-based transformer, an AI planner understands what information is contextually relevant to the scenario, so the driver assistance system can act upon it quickly and effectively. This ability to quickly and holistically process data allows the planner to solve complex urban traffic problems and achieve a more accurate and human-like driving experience.
Best of both with Snapdragon Ride
To provide a human-like experience, the Snapdragon Ride platform employs a hybrid architecture that blends both types of planning. The AI planner is a fully data-driven, transformer-based model, while the traditional planner serves as a safety guardrail and verifier. The models co-exist on the same heterogeneous system-on-a-chip (SoC), running on separate blocks, so there is no computational interference. The AI planner benefits from AI acceleration in the neural processing unit (NPU) while traditional planners run on the central processing unit (CPU).
Validated in both simulations and real-world scenarios, the AI planner has demonstrated its ability to solve complex traffic scenarios, including unprotected turns, navigating roundabouts, and handling dense traffic merges.
Incorporating both traditional and AI planning gives automakers a robust solution for tackling the challenges posed by dense urban environments, allowing them to fine-tune and customize ADAS features to meet unique market needs. The move toward AI planning will help them to create a more human-like driving experience, potentially revolutionizing urban traffic management.
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7 Challenges Facing Fab Operations and How Providers Can Solve Them
Courtesy: Monikantan Ayyasamy, General Manager, Equipment Engineering & Supply Chain Management at Orbit & Skyline
Semiconductor manufacturing facilities, or fabs, are some of the most complex and technologically sophisticated industrial plants on earth. Their success isn’t just a matter of how they’re constructed, but how effectively and dependably they’re operated.
For fab operators around the globe, there is a shared set of challenges that can impact yield, uptime, and competitiveness. With increasingly complex fabs, the requirement for specialist operational support has never been more important. Below are seven of the most important challenges and what specialist service providers are doing to address them.
- Tool Installation and Commissioning
It is possible to fit thousands of precision tools into one fab that need to be correctly installed and calibrated in cleanroom environments. A faulty installation at this stage leads to sequential delays and expensive downtime.
Solution:
Specialised vendors adopt systematic methodologies and apply extensive cleanroom know-how for precision during commissioning. Their established commissioning frameworks reduce risk and get tools into production within timing, a critical parameter for enabling fabs to operate at faster time-to-yield.
- Preventive and Corrective Maintenance
In semiconductors production, the loss caused by a single tool failure can be millions. But running periodic preventive maintenance schedules for big-sized facilities is still a daunting experience.
Solution:
There are now external engineering suppliers that complement 24/7 on-site assistance with predictive analytics and AI-driven monitoring systems. With it, possible breakdowns are identified prior to occurrence, reducing downtime and ensuring maximum longevity of the tools at the same time, maintaining production lines in balance.
- Process Optimisation and Yield Enhancement
Yield, the number of useful chips made, is the final measure of fab performance. But yield improvement requires thorough knowledge of both process chemistry and equipment interactions.
Solution:
Specialized process engineering teams employ data-driven control systems, root cause analysis, and worldwide best practices to optimize recipes, reduce defects, and increase yield. By continuous optimization, they allow fabs to remain competitive in a market in which every fraction of a percent in yield counts.
- Legacy Tool Lifecycle Management
Most fabs continue to use legacy deposition, etch, and clean tools that remain functional but are becoming obsolete as OEM support decreases. If left unmanaged, such systems become production bottlenecks or create operational hazards.
Solution:
Technical services providers with older tool platform experience come in to refit, reverse-engineer, and retrofit equipment. Through extending tool life and guaranteeing parts availability, they enable fabs to maintain capital investments and keep production consistent without requiring full equipment replacement.
- Supply Chain and Spare Parts Availability
Global supply chain disruptions have revealed the vulnerability of fabs to spare parts and consumables delays. Internal stockpiling of inventory can appear to be secure but can turn cost-prohibitive very quickly.
Solution:
Global providers with supply networks allow just-in-time parts delivery and centralized logistics. Their combined procurement systems assist fabs in balancing reliability and cost-effectiveness, making sure critical components are at hand precisely when required without incurring undue overhead.
- Workforce Readiness and Talent Gaps
As the fabrication of semiconductors grows worldwide, there is increased demand for fab-ready technicians and engineers. Creating such specialized talent requires resources and time. Newer fabs usually fail to become ready for operation because of a lack of trained people.
Solution:
Engineering service partners are filling the gap with structured training programs, simulation-based learning, and certification modules that are designed to simulate actual fab environments. This way, all technicians and engineers are deployment-ready from day one, which strongly improves fab ramp-up times.
- Integration of New Technologies: AI, Automation, and Sustainability
Contemporary fabs need to adopt next-gen technologies like Artificial Intelligence (AI), Machine Learning (ML), robotics, and green energy practices while ensuring production steadiness. Shifting to these technologies while not affecting continuous operations is a major challenge.
Solution:
Specialized suppliers act as technology transition partners. They pilot automation equipment, implement AI-based process analytics, and integrate sustainable solutions like energy optimization and waste reduction systems. By strategical scaling adoption, they assist fabs in transforming without sacrificing productivity.
Conclusion
Operating a semiconductor fab is significantly more complicated than constructing one. The seven challenges described, ranging from installation and maintenance to process optimisation, supply chain reliability, and workforce readiness, are essential to the long-term success of a fab.
Specialised service providers are critical to filling these capability gaps, providing operational continuity, and sustaining the high standards required of the global semiconductor industry.
Ultimately, the fate of semiconductor production rests not solely on state-of-the-art infrastructure or money, but on the resilience of the ecosystem that ensures these fabs operate day in, day out, wafer after wafer.
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Introducing Ethernet Scale-Up Networking: Advancing Ethernet for Scale-Up AI Infrastructure
Courtesy: Broadcom
With the increase in scale and complexity of AI systems, Ethernet is once again evolving to meet the challenge. At the OCP Global Summit 2025, Broadcom, along with AMD, ARM, Arista, Cisco, HPE Networking, Marvell, Meta, Microsoft, NVIDIA, OpenAI, and Oracle, announced a new collaborative effort called Ethernet for Scale-Up Networking (ESUN).
With the initiation of this workstream, the OCP Community now has the opportunity to address areas that enhance scale-up connectivity across accelerated AI infrastructure. The scale-up domain in XPU-based systems can be viewed in two primary areas: 1) network functionality, and 2) XPU-endpoint functionality.
First, the network aspect of scale-up focuses on how traffic is sent out across the network switches themselves, including protocol headers, error handling, and lossless data transfer. This is what ESUN intends to address and what the planned OCP workstream by the same name will focus on. The workstream itself is planned to kick off shortly after the OCP Global Summit.
Second, in the XPU-endpoint domain, the design depends on factors such as workload partitioning, memory ordering, and load balancing, and it is often tightly co-designed with the XPU architecture itself.
What is ESUN?
ESUN is a new workstream collaboration designed as an open technical forum to advance Ethernet in the rapidly growing scale-up domain for AI systems. This initiative brings together operators and leading vendors to collaborate on leveraging and adapting Ethernet for the unique demands of scale-up networking.
Key Focus Areas:
- Technical Collaboration: ESUN serves as an open forum where operators, equipment and component manufacturers can jointly advance Ethernet solutions optimized for scale-up networking.
- Interoperability: The initiative emphasizes the development and interoperability of XPU network interfaces and Ethernet switch ASICs for scale-up.
- Technical Focus: Initial focus will be on L2/L3 Ethernet framing and switching, enabling robust, lossless, and error-resilient single-hop and multi-hop topologies.
- Standards Alignment: ESUN will actively engage with organizations such as UEC (Ultra-Ethernet Consortium) and IEEE 802.3 (Ethernet) to align with open standards, incorporate best practices, and accelerate innovation.
- Ecosystem Enablement: By leveraging Ethernet’s mature hardware and software ecosystem, ESUN will encourage diverse implementations and drive rapid adoption across the industry.
Ethernet for Scale-Up Networking
What Are the Focus Areas for ESUN?
ESUN focuses solely on open, standards-based Ethernet switching and framing for scale-up networking—excluding host-side stacks, non-Ethernet protocols, application-layer solutions, and proprietary technologies.
How is this Different from SUE?
OCP has previously launched an effort to advance the endpoint functionality for scale-up networking through the SUE-Transport (Scale-Up Ethernet Transport) workstream (originally named SUE; it has been renamed and clarified as SUE-T in contrast to ESUN). SUE-T will carry forward some of the SUE work, which was seeded with the Broadcom contribution of the version 1.0 specification.
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