Feed aggregator

submitted by /u/imgeo [link] [comments]

Engineers working on embedded systems or Internet of Things (IoT) projects must contend with the trade-offs between performance and cost that affect every aspect of that design. Security is as much a part of that equation as processing speed and memory capacity.

When it comes to enforcing security in any cost-constrained application, a balance needs to be struck between the protections that the application needs and the capabilities of a device that meets the cost profile of the target market. It is easy to assume that a microcontroller that incorporates some security mechanisms will deliver the protections needed.

But there are many ways in which the hardware, firmware and system environment interact that can lead to unforeseen vulnerabilities. Developers need to be aware of the distinctions between different forms of hardware support for embedded-systems security.

Ideally, a hardware platform will contain several elements designed to protect firmware, data and communications that act together to provide a root of trust.

Figure 1 A hardware root of trust is the foundation of a IoT device and network security. Source: PSA Certified

Manufacturers will often incorporate those functions into a module integrated into the main processor or system-on-chip (SoC) in the IoT device. Alternatively, a secure element connected to a serial port of the main processor provides the required functionality.

Hardware suppliers must make choices that balance cost and functionality, which will affect development and could compromise security more than expected if the developer does not consider details of the implementation. Even within the same product family, the support for hardware security can vary widely.

For example, the Espressif ESP32 SoC is used in many IoT platforms. Some will be accompanied by a separate secure element, such as the Microchip’s ATECC608. Some versions of the ESP32 include an on-chip controller that manages the device’s security infrastructure. This on-chip controller often includes features like a digital signing peripheral with eFuse support, which enhances the security capabilities of the device.

The electrical fuse (eFuse) technology facilitates permanent storage of security-critical data, such as encryption keys or device-specific information, making it harder for attackers to compromise the system. However, some platforms include neither the on-chip controller nor a separate secure element, which means more of the security apparatus needs to be implemented in software.

Basic protections

Microcontrollers for many years have offered a basic level of memory protection, such as protecting firmware and configuration memory against illegal writes by application code. Another common protection mechanism, usually to protect intellectual property (IP), is to encrypt the firmware, which is typically stored in flash memory. This protects against basic reverse engineering techniques and provides a way to protect data, such as data-encryption keys, that should remain private.

A microcontroller will usually store the memory-decryption key in on-chip configuration memory, possibly using e-fuses to guarantee immutability and strong protection. At rest, the data encrypted using that key sits in flash memory. This protects it from being used by an attacker who tries to read the block directly.

However, once sensitive data and keys held in the encrypted flash blocks are moved into memory, they are available in plaintext form. If an attacker can probe the memory of a running device, the presence of the copies makes the keys far more vulnerable than in devices where more advanced security measures are in place.

Developer choices can affect the efficacy of security even for the basic option of flash-memory encryption. Historically, device makers have used an encryption key that is common to all members of a product family. If a key is compromised on one device, all the others in that family are equally vulnerable. Ideally, OEMs and integrators make the memory-encryption key unique for each device. They also need to follow through with individual keys for higher-level functions.

Management at the individual device level is vital for the overall security of an IoT service. When devices enrol on the network to exchange data with the cloud, operators and users need to be sure that all the connected devices are legitimate and have not been compromised.

Online services verify the identity and the legitimacy of devices using a set of digital certificates and signatures implemented using a public key infrastructure (PKI). Each device needs its own unique set of keys and certificates, ideally inserted at the point of manufacture, to show to other legitimate users that it is not a counterfeit and is running approved firmware.

Firmware checks

Valid certificates cannot on their own guarantee that an individual device has not been compromised. They do, however, support processes such as secure or measured boot. These processes provide high confidence in the authenticity of the firmware the device is running. Secure boot uses digital certificates and signatures to check the provenance of any software update the device receives. It ensures that only valid images are used to boot the device to readiness.

If an image fails any of the checks performed using a secure boot, the device will reject the firmware and will instead try to load a known good version if it is available. Unless valid firmware is available, the device cannot start up and connect to the IoT, which protects the rest of the network.

Secure boot relies on the presence of a bootloader image that a user cannot change without the required credentials. To achieve this, the hardware platform stores the bootloader together with root keys and certificates in one-time-programmable (OTP) memory to provide immutability.

For the highest level of protection against changes, manufacturers will implement this memory using e-fuses. However, some devices instead reserve an area of flash to be used in OTP mode once a protection fuse is blown.

In principle, secure boot is possible without further hardware support. However, entirely software-based boot-management processes cannot protect against runtime interference where an attacker can tamper with the SRAM or DRAM into which the bootloader code may need to be loaded before it can run.

Microcontrollers with hardware-based separation between secure and non-secure operating modes provide a higher degree of protection. An example is Arm’s TrustZone, implemented in different forms in the Cortex-A and Cortex-M series of embedded processors. TrustZone provides the ability to restrict access to peripherals and memory regions based on security attributes.

Access should be granted only if the attributes are in place for that I/O or memory access command. By default, the processor starts in its secure mode, which provides access to secure areas. When the processor completes its boot process and moves out of secure mode, it will deny a return to the secure areas unless the code passes authentication checks. In principle, systems such as TrustZone can successfully protect the boot process.

However, care needs to be taken to ensure there is no opportunity for an attacker to snoop on data in plaintext form. For example, the processor should load encrypted data into internal SoC memory before decryption takes place to avoid memory-bus snooping.

Figure 2 TrustZone architecture separates secure and non-secure operating modes in hardware. Source: Arm

A hardware secure element provides a way of providing greater security to the boot and encryption processes with or without secure execution modes. Its strongest guarantee comes from its ability to implement a root of trust that guards the keys and certificates stored in non-volatile memory. Every off-chip transaction involving a key will be encrypted.

The secure element may be implemented on the microcontroller or embedded-processor SoC, such as the digital-signature unit on an ESP32 or a full Trusted Platform Module (TPM) on multicore SoCs, or deployed in an external device, such as the ATECC608, and accessed through a direct serial port.

Even in the presence of secure elements, some attacks remain possible if not addressed directly. One is the rollback attack. This is where the attacker tries to load an old, but valid software image that contains a vulnerability that can be exploited. Anti-rollback uses a device’s secure storage to hold a counter that is allowed only to increase monotonically. Some IC vendors support this using a combination of hardware and firmware.

Solving hardware dependencies

Though hardware vendors may offer broadly similar features, there will often be significant differences in implementation and support for standards. For example, some secure elements are designed to implement RSA protocols for PKI alongside AES. Others will use elliptic-curve technologies or even newer technologies.

To access and control these features, developers will need to understand and employ different APIs, which adds to overall project time on top of the analysis needed to perform the threat modelling needed to assess the importance of each hardware and software components of the security model.

One way of addresses these complex device security issues is to deploy a common security framework that interfaces with the diverse silicon architectures. That determines which hardware features are available on a target platform, such as the presence of a trusted-execution mode or a TPM and uses those to deliver a framework that achieves the highest possible security for that combination of features.

Figure 3 Platforms like QuarkLink are multi-function tools that can be used to automate and streamline the process of implementing IoT security during and after embedded development. Source: Crypto Quantique

Though there are many choices hardware suppliers make when implementing security features on their products, each of which has a knock-on effect on firmware and lifecycle management, a comprehensive, integrated platform enables developers to work on a common programming interface and take full advantage of the hardware security features implemented in each of the devices they use.

David Haslam is head of software engineering at Crypto Quantique. He is a strong advocate for agile methodologies and DevOps practices, driving efficiency and collaboration across cross-functional teams.

Related Content

• Getting Ready for IoT Security in the AI Era
• Navigating IoT security in a connected world
• Security standard for consumer IoT emerges
• Hardware Root of Trust: The Key to IoT Security in Smart Homes
• What’s Driving the Shift from Software to Hardware in IoT Security?

The post Understand the hardware dependencies of IoT security appeared first on EDN.

At the Société des Ingénieurs de l'Automobile’s SIA Vision 2024 international congress in Paris, France (16–17 October), ams OSRAM GmbH of Premstätten, Austria and Munich, Germany has launched EVIYOS HD 25 gen2 as the latest generation of its EVIYOS LED technology...

GÖPEL electronic introduces the new Multi Line product family, an innovative platform of inspection systems that supports the entire manufacturing process. The centerpiece of this solution is a modular base system with a uniform and powerful software interface. This reduces training requirements, enables flexible employee scheduling, and optimizes the exchange of knowledge between production staff. This can be especially important when there may be a shortage of skilled workers.

The all-rounder can be configured for all inspection tasks throughout the entire manufacturing process: for solder paste inspection (SPI), for surface mount technology (SMT) and through-hole technology (THT) automated optical inspection (AOI), and also for conformal coat inspection (CCI). For THT printed circuit board assemblies (PCBA), Multi Line provides flexible transport options, with or without carriers, and all the necessary camera modules for this application. It also allows THT solder inspection, even during return on the optional lower transport conveyor. Thanks to 3D technology, solder joints can be inspected not only for soldering quality and for shorts, but also for solder volume and pin length, without flipping the PCBA.

The system’s configuration versatility also makes it suitable for use in the SMT process, where optional double-sided inspection offers the advantage of fully testing SMT assemblies without flipping the PCBA.

Furthermore, Multi Line is available as an SPI system for the inspection of solder paste deposits in regard to shape, height, area, bridges, volume, X/Y offset, and co-planarity. A closed-loop interface to the solder paste printer is available, and a link to PILOT Verify software makes fault analysis more efficient by displaying associated AOI, AXI, and SPI result data.

Multi Line CCI can automatically inspect protective coatings by making fluorescent coatings glow using UV LEDs of different wavelengths. With telecentric optics and a color camera, the system delivers high-contrast images and enables fast programming using CAD data and coating plans. As a special feature, the PCBA can be simultaneously inspect both top and bottom without turning, and, if necessary, can also be transported back to the beginning of the line using a lower level return conveyor.

Thanks to the modular design of the Multi Line platform, camera modules can be flexibly combined and, if necessary, retrofitted later for new applications in the manufacturing process.

With this comprehensive solution, GÖPEL electronic is utilizing its many years of experience in quality assurance and setting new standards in inspection technology for the electronics manufacturing process.

GÖPEL electronic develops and manufactures innovative electrical and optical test, measurement, and inspection equipment for electronic components and printed circuit board assemblies as well as industrial and automotive electronics systems. GÖPEL electronic is comprised of four business units:

• Automotive Test Solutions
• Embedded JTAG Solutions
• Inspection Solutions AOI-AXI-SPI-IVS
• Industrial Function Test

The company is a global supplier with its own subsidiaries as well as distribution, and generated sales of approximately 40 million Euros in 2023 with 240 employees.

Further information: www.goepel.com/en

Press Contact:

GÖPEL electronic GmbH                                                    Tel.: +49 (0)3641-6896-779

Bettina Richter                                                                     Fax: +49 (0)3641-6896-944

Göschwitzer Straße 58/60                                                 E-Mail: presse@goepel.com

07745 Jena, Germany.                                                        Web: www.goepel.com

 

The post Press release of GÖPEL electronic GmbH about one platform, one software appeared first on ELE Times.

                                                                                  News Release

Microchip’s RTG4 FPGAs with Lead-Free Flip-Chip Bumps Achieve Highest Space Qualification

QML Class V designation recognizes exceptional reliability and longevity for critical space missions

 

October 18, 2024 — Satisfying mission assurance requirements for the most critical space programs, Microchip Technology’s (Nasdaq: MCHP) Radiation-Tolerant (RT) RTG4 Field- Programmable Gate Arrays (FPGAs) with lead-free flip-chip bumps have earned the Qualified Manufacturers List (QML) Class V status. As designated by the Defense Logistics Agency (DLA), QML Class V is the highest level of qualification for space components and a necessary step to satisfy mission assurance requirements on the most critical space missions such as human-rated, deep space and national security programs. Because QML qualifications are standardized based on specific performance and quality requirements governed by the DLA, customers can streamline their design and certification processes by using QML-qualified products.

 

In 2018, RTG4 FPGAs became the first RT FPGAs offering more than 150,000 logic elements to achieve a QML Class V qualification, and this next-generation solution with lead-free flip-chip bumps is the first of its kind to achieve QML Class V status. In advanced flip-chip package construction, such as that used in the RTG4 FPGA, flip-chip bumps are utilized to connect the silicon die and the package substrate. Lead-free bump material will help extend the longevity of the product, which is critical to space missions.

 

“This is another milestone for our RTG4 FPGAs that will provide customers with added confidence in designing these devices in space flight systems, while allowing them to take advantage of our high-reliability, zero-configuration-upset and low-power consumption FPGAs,” said Bruce Weyer, corporate vice president for Microchip’s FPGA business unit. “For more than 60 years, Microchip solutions have powered space flight missions, and we are dedicated to product longevity and providing the highest quality solutions.”

 

RTG4 FPGAs are designed to bring high levels of density and performance to space applications, saving cost and engineering efforts through low power consumption and immunity to configuration upsets. Unlike SRAM-based FPGA alternatives, the programming technology used in RTG4 FPGAs provides low static power, which assists in managing thermal issues common in spacecraft. RTG4 FPGAs consume only a fraction of the total power compared to equivalent SRAM FPGAs, while exhibiting zero configuration upsets in radiation and thus requiring no mitigation, reducing engineering expenses and total system costs.

 

To achieve QML Class V qualification, the RTG4 FPGA with lead-free bump has undergone extensive reliability testing, enduring up to 2,000 thermal cycles from −65°C to 150°C junction temperature. The lead-free flip-chip bump interface connections passed MIL-PRF-38535 inspection criteria and exhibited no signs of tin whiskers. The flip-chip bump is inside the FPGA package, so there is no impact on the user’s design, reflow profile, thermal management or board assembly flow when converting to lead-free bump RTG4 FPGAs.

 

Microchip boasts one of the industry’s most comprehensive space product portfolios of radiation-hardened and RT solutions that include QML Class Q RT PolarFire® FPGAs and sub-QML FPGAs that bridge the gap between traditional Qualified Manufacturers List (QML) components and Commercial Off-The-Shelf (COTS) components. For a comprehensive listing of Microchip FPGA and mixed-signal part numbers alongside their corresponding Defense Logistics Agency (DLA) drawing numbers, please refer to the DLA Cross Reference Guide.

 

Development Tools

The RTG4 FPGAs are supported by development kits, mechanical samples and daisy chain packages for board validation and testing. Libero® SoC Design Suite enables RTL entry through programming and includes a rich IP library, complete reference designs and development kits.

 

Availability

For additional information or to purchase, contact a Microchip sales representative, authorized worldwide distributor or visit Microchip’s Purchasing and Client Services website, www.microchipdirect.com.

 

Resources

High-res images available through Flickr (feel free to publish):

• Application Image: https://www.flickr.com/photos/microchiptechnology/54037604837/sizes/l/

 

About Microchip:

Microchip Technology Inc. is a leading provider of smart, connected and secure embedded control and processing solutions. Its easy-to-use development tools and comprehensive product portfolio enable customers to create optimal designs which reduce risk while lowering total system cost and time to market. The company’s solutions serve approximately 123,000 customers across the industrial, automotive, consumer, aerospace and defense, communications and computing markets. Headquartered in Chandler, Arizona, Microchip offers outstanding technical support along with dependable delivery and quality. For more information, visit the Microchip website at www.microchip.com.

###

Note: The Microchip name and logo, the Microchip logo, Libero and PolarFire are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. All other trademarks are the property of their respective companies.

 

Editorial Contact:

Samheetha Ravi Bhat

samheetha@prhub.com

9731054124

The post Press release of Microchip Technology about how RTG4™ FPGAs with lead-free flip-chip bumps achieve the highest space qualification appeared first on ELE Times.

Rohde & Schwarz has successfully achieved full coverage of Skylo’s comprehensive test plan for devices operating in Narrowband-IoT in Non-Terrestrial Networks (NB-NTN). This milestone also enables SMS services over NB-NTN, paving the way for unlimited connectivity on smartphones, wearables, and IoT devices.

Munich, October 17, 2024 — Rohde & Schwarz and Skylo Technologies have verified and validated all of the test cases defined in Skylo’s network operator acceptance criteria, including newly added test cases for SMS over NB-NTN, using the advanced CMW500 wideband radio communication tester. This marks a significant milestone in device certification and paves the way for a successful adoption of NB-NTN technology.

Skylo is a global NTN service provider, whose network takes advantage of dedicated satellite spectrum across various partner constellations, allowing smartphone and IoT cellular devices to connect directly over existing satellites. This technology facilitates seamless communication even in remote areas lacking traditional network coverage. Skylo’s certification process involves rigorous testing and evaluation to ensure that devices meet the stringent performance and reliability standards.

The successful validation of SMS over NB-NTN marks a significant step in bringing satellite connectivity to consumer devices. As a consequence, users of smartphones and wearables can rely on messaging services regardless of their location, which will enhance their safety and communication capabilities in areas without terrestrial network access.

For more information NTN test solutions from Rohde & Schwarz, visit: https://www.rohde-schwarz.com/_256719.html

Proposal for caption: Rohde & Schwarz achieves full coverage of Skylo’s test plan for NB-NTN devices using the advanced CMW500

Press contacts:

Europe (headquarters): Christian Mokry (phone: +49 89 4129 13052; email: press@rohde-schwarz.com)

North America: Dominique Loberg (phone: +1 503 523-7951; email: Dominique.Loberg@rsa.rohde-schwarz.com)

Asia Pacific: Sze Ming Ng (phone: +603 5569 0011; email: press.apac@rohde-schwarz.com)

Contact for readers:

www.rohde-schwarz.com/contact

 

Rohde & Schwarz

Rohde & Schwarz is striving for a safer and connected world with its Test & Measurement, Technology Systems and Networks & Cybersecurity Divisions. For 90 years, the global technology group has pushed technical boundaries with developments in cutting-edge technologies. The company’s leading-edge products and solutions empower industrial, regulatory and government customers to attain technological and digital sovereignty. The privately owned, Munich based company can act independently, long-term and sustainably. Rohde & Schwarz generated net revenue of EUR 2.78 billion in the 2022/2023 fiscal year (July to June). On June 30, 2023, Rohde & Schwarz had around 13,800 employees worldwide.

R&S® is a registered trademark of Rohde & Schwarz GmbH & Co. KG.

All press releases, including photos for downloading, are available on the internet at www.press.rohde-schwarz.com.

The post Press release of Rohde & Schwarz about achieving its full coverage of Skylo’s test plan for NB-NTN devices, enabling SMS services appeared first on ELE Times.

Rohde & Schwarz has successfully achieved full coverage of Skylo’s comprehensive test plan for devices operating in Narrowband-IoT in Non-Terrestrial Networks (NB-NTN). This milestone also enables SMS services over NB-NTN, paving the way for unlimited connectivity on smartphones, wearables, and IoT devices.

Munich, October 17, 2024 — Rohde & Schwarz and Skylo Technologies have verified and validated all of the test cases defined in Skylo’s network operator acceptance criteria, including newly added test cases for SMS over NB-NTN, using the advanced CMW500 wideband radio communication tester. This marks a significant milestone in device certification and paves the way for a successful adoption of NB-NTN technology.

Skylo is a global NTN service provider, whose network takes advantage of dedicated satellite spectrum across various partner constellations, allowing smartphone and IoT cellular devices to connect directly over existing satellites. This technology facilitates seamless communication even in remote areas lacking traditional network coverage. Skylo’s certification process involves rigorous testing and evaluation to ensure that devices meet the stringent performance and reliability standards.

The successful validation of SMS over NB-NTN marks a significant step in bringing satellite connectivity to consumer devices. As a consequence, users of smartphones and wearables can rely on messaging services regardless of their location, which will enhance their safety and communication capabilities in areas without terrestrial network access.

For more information NTN test solutions from Rohde & Schwarz, visit: https://www.rohde-schwarz.com/_256719.html

Proposal for caption: Rohde & Schwarz achieves full coverage of Skylo’s test plan for NB-NTN devices using the advanced CMW500

Press contacts:

Europe (headquarters): Christian Mokry (phone: +49 89 4129 13052; email: press@rohde-schwarz.com)

North America: Dominique Loberg (phone: +1 503 523-7951; email: Dominique.Loberg@rsa.rohde-schwarz.com)

Asia Pacific: Sze Ming Ng (phone: +603 5569 0011; email: press.apac@rohde-schwarz.com)

Contact for readers:

www.rohde-schwarz.com/contact

 

Rohde & Schwarz

Rohde & Schwarz is striving for a safer and connected world with its Test & Measurement, Technology Systems and Networks & Cybersecurity Divisions. For 90 years, the global technology group has pushed technical boundaries with developments in cutting-edge technologies. The company’s leading-edge products and solutions empower industrial, regulatory and government customers to attain technological and digital sovereignty. The privately owned, Munich based company can act independently, long-term and sustainably. Rohde & Schwarz generated net revenue of EUR 2.78 billion in the 2022/2023 fiscal year (July to June). On June 30, 2023, Rohde & Schwarz had around 13,800 employees worldwide.

R&S® is a registered trademark of Rohde & Schwarz GmbH & Co. KG.

All press releases, including photos for downloading, are available on the internet at www.press.rohde-schwarz.com.

The post Press release of Rohde & Schwarz about achieving its full coverage of Skylo’s test plan for NB-NTN devices appeared first on ELE Times.

Media Alert

 

Vicor releases highest density automotive-grade power modules, enabling 48V power systems for electric vehicles

Andover, Mass., October 16, 2024 – Vicor has released three automotive-grade power modules for 48V EV systems which deliver industry-leading power density and support automotive OEM and tier one production in 2025. The BCM6135, DCM3735 and PRM3735 use AEC-Q100 certified Vicor-designed ICs and have completed the PPAP process with automotive customers.

“Vicor has set a new standard for power density in the automotive industry with these scalable and flexible miniature power modules,” said Patrick Wadden, VP of the Vicor Automotive business unit. “Our high-performance converters enable new possibilities for automotive manufacturers to reduce the size and weight of power systems throughout the vehicle.”

The BCM6135 is a 98% efficient 2.5kW BCM® bus converter which converts 800V from the traction battery to 48V to provide a safety extra-low voltage (SELV) power supply for the vehicle. The BCM6135 internally provides the isolation between high voltage and low voltage which creates a large reduction the space required for the DC-DC conversion. The BCM6135’s power density of 158kW/L allows EV system designers to reduce size of the primary DC-DC converter and reduce vehicle weight. The bidirectional rapid current transient response rate of 8 mega amps per second allows the BCM6135 to replace a 25lb 48V battery — by serving as a virtual 48V battery in the xEV vehicle and delivering additional cost and weight savings.

The DCM3735 2.0kW DCM DC-DC converter transforms an unregulated 48V input into a regulated 12V output. The DCM3735 has a wide input range that is compatible with a variety of automotive applications because the output can be trimmed within a range of 8 – 16V. The DCM3735 has a power density of 300kW/L making it an attractive choice for architectures bridging a 48V distribution to 12V subsystems in zonal ECU applications.

The PRM3735 is a 2.5kW PRM regulator for 48V power that is 99.2% efficient. Its small footprint and 260kW/L power density frees up packaging space and reduces the overall volume and weight of the DC-DC power supply. It is best suited to support regulated 48V loads that are implemented in new vehicle architectures.

The newly released Vicor modules can be arranged in over 300 configurations, offering extreme flexibility and scalability to support innovation for a variety of vehicle subsystems. Further, as the market shifts from 12V to 48V Zonal Architecture, these products are highly efficient in converting to and from 48V. All three modules can be arrayed easily to increase power supply levels, and they have automatic power sharing for optimum performance in an array.  These modules solve complex challenges with 800V, 400V, 48V and 12V systems.

“Our power modules make it easy to convert from the primary battery (800V or 400V) to 48V and down to load,” said Wadden. “They are very versatile, and our customers are using the modules to improve efficiency while also removing size and weight from their power systems.”

Vicor power modules are improving power delivery networks throughout the vehicle in innovative ways:

• Active suspension comes of age in EVs
  Power needs of active suspension system are too high to be met with 12V power. Switching to a 48V bus and converting down with the bidirectional BCM6135 is an efficient way to deliver high performance. This application also capitalizes on the BCM6135’s high slew rate as the active suspension is a regenerative power load, which requires immediate current flow reversal to pass regenerated power back to the battery.
• Deleting or reducing the low-voltage battery

The industry-leading slew rate of the BCM6135 presents an opportunity to replace a 48V battery — with the BCM serving as a virtual 48V battery in the xEV vehicle, delivering cost and weight savings. Since the BCM6135 can switch from zero current to full current at 8.0MA/s, it can step down the traction battery’s 800 to 48V and power a load as fast as drawing the power from an auxiliary 48V battery. No other DC-DC converter can match this speed and enables customers to reduce vehicle weight by up to 25kg while reducing vehicle costs by up to $100.

• 48V zonal architecture adoption is on every roadmap
  The new power modules can be easily configured to make this transition easier. The DCM3735 is used in conjunction with BCM3735 to create a regulated 12V power supply off the BCM6135 48V output. When used as a part of the 48V zonal architecture, the DCM3735 can be mounted remotely to create a local 12V supply in a vehicle zone, for example on the right hand side. This application method allows the PDN designer to effectively support 12V loads while achieving up to 90% of the cost and weight savings that come from transitioning to a 48V bus.
• Precharging prevents current surges and saves weight

Precharging is a necessary step of the start-up process. It prevents current surges at battery engagement that will damage the loads (such as pumps and compressors). Currently this is done using high voltage contactors and resistors, which add 1kg and over $50 in cost. The alternative is to use BCM6135 and a PRM3735 as the main DC-DC converters and one of the low-voltage batteries installed in the vehicle. The BCM6135 can boost the low-voltage battery power up to high voltage and achieve the needed precharge, eliminating the legacy precharge contactor and power resistor.

The flexibility of the power modules enable a host of automotive applications to be powered.  More importantly, they deliver on the promise of 48V adoption. Whether converting the high voltage traction battery to 48V, delivering point-of-load power from a 48V bus, or enabling legacy 12V sub-systems to live in new 48V zonal architectures, Vicor’s high performance, automotive grade power modules deliver the highest power density while reducing power loss and simplifying designs.

 

Learn more about the three new automotive-grade Vicor power modules

 

About Vicor

Vicor is the leader in high-performance power modules, enabling customer innovation with easy-to-deploy modular power system solutions for power delivery networks that provide the highest density and efficiency from source to point-of-load. We continuously advance the density, efficiency and power delivery capabilities of our power modules by staying on the forefront of distribution architectures, conversion topologies and packaging technology. Vicor serves customers in high-performance computing, industrial equipment, automotive and aerospace and defense markets. With over 40 years of experience in designing, developing and manufacturing power modules for demanding markets, the Vicor patented, high-frequency DC-DC power conversion technology is ideally suited for the automotive market.

 

www.vicorpower.com

 

Vicor is a registered trademark of Vicor Corporation.

 

For more information contact:

 

Stephen Germino,

sgermino@vicr.com

978 749-8243

The post Press release of Vicor about the highest-density automotive-grade power modules appeared first on ELE Times.

submitted by /u/ThrowAwaySalmon1337
[link] [comments]

The answers to the following questions shall bring forth few pertinent facts about Auto EV India Expo 2024:

1. With EV sales surging by 35% in 2023, how does Auto EV India 2024 plan to showcase the latest trends driving this rapid market growth?

Answer: Auto EV India 2024 shall bring to fore all companies dealing with latest innovations and advancements in the field of electric vehicle and automotive technology. All of them shall be brought under one roof. They shall exhibit all their latest advancements and products in the exhibition hall of our event. There shall be a free flow of information. This shall enable an un-interrupted exchange of ideas. It shall be a great opportunity to liaison with many industry stalwarts.

 

 

2. As fast-charging infrastructure becomes more widespread, what solutions and collaborations do you expect to be highlighted at the 3rdedition of the Expo?

Answer: All major companies dealing with fast-charging solutions shall exhibit their products and services at Auto EV India 2024. For instance, companies installing charging stations and using over-the-air technology for charging electric vehicles.

 

 

3. How is the Expo promoting collaboration among OEMs, Tier 1 suppliers, and tech innovators to enhance India’s global EV position?

Answer: In collaboration, the original equipment manufacturers and Tier 1 suppliers develop core software solutions. Such as operating systems, middleware, and applications. Besides, Tier 1 suppliers develop specific software solutions. For instance, connectivity, ADAS, in-vehicle experiences, and offering software-as-a-service (SaaS) solutions. Their partnership is based on a shift from hardware-centric partnerships to joint software development.

The Auto EV Expo 2024 is leveraging this domain by bringing together concerned companies on one forum for discussion during the conference and exhibition of their products and services to the concerned stakeholders during the exhibition.

 

 

4. How is the expo positioning itself in the realm of advancing hydrogen fuel cell technology as a key alternative in the automotive sector?

Answer: Traditionally, the automotive industry used to use internal combustion engine. Now, it is being replaced by hydrogen fuel cell. The benefit of using the latter is that it is based completely on renewable source of energy. Besides, it is highly efficient in generating energy. Also, it can be recharged in a very short span of time.

Auto EV Expo 2024 shall endeavour to bring forth all latest advancements in the field of utilising hydrogen fuel cells for a discussion during the conference. And later, for exhibition by all concerned companies during the exhibition. It would be an excellent opportunity to liaison with the technical, marketing, and sales team of concerned companies.

 

 

5. How is the government initiatives like the PLI Scheme and ACC Battery Storage impacting India’s EV future, and how will Auto EV India 2024 contribute in this scenario?

Answer: The Government of India’s Production Linked Incentive (PLI) scheme for Advanced Chemistry Cell (ACC) Battery Storage aims to scale up the production of electric vehicle’s batteries to the tune of 95 GWh. It was approved with an outlay of ₹ 18, 000 crore. It would convert India into a global manufacturing hub. This would lead to reduction in India’s import dependence.

Auto EV India 2024 will bring together all major firms driving benefit under the aforesaid scheme for their display in the exhibition. This would enable them to interact with various industry stakeholders and prospective clients.

The post Few pertinent facts about Auto EV India Expo 2024 appeared first on ELE Times.

Lynred of Grenoble, France — which designs and manufactures infrared (IR) sensors for aerospace, defense and commercial applications — has completed its biggest space contract so far, worth tens of millions of euros. After beginning in 2004 with Lynred conducting pre-development technology studies followed by a design and production phase in 2011, the firm recently delivered to Thales Alenia Space the last of 26 IR detector flight models destined for the more than 20-year operational lifespan of the MTG (Meteosat Third Generation) mission, a European Space Agency (ESA) program that aims to revolutionize storm prediction and enhance weather forecasting...

Renesas has introduced the CCE4511 four-channel IO-Link master IC and the ZSSC3286, an IO-Link-ready sensor signal conditioner IC. Widely used in industrial automation, the IO-Link digital communication protocol enables seamless communication between sensors, actuators, and other devices in an automation system.

The CCE4511 four-channel master transceiver delivers 500 mA of drive current per channel. It integrates an IO-Link frame handler to offload lower-layer communication tasks, reducing microcontroller loads. This high-voltage interface IC offers both overvoltage and overcurrent protection and operates at ambient temperatures up to 125°C. It also detects ready pulses from IO-Link devices, supporting the IO-Link Safety System Extension.

With its embedded IO-Link compliant stack, the ZSSC3286 dual-path sensor signal conditioner eliminates the need for an external microcontroller for stack operation. It accurately amplifies, digitizes, and corrects sensor signals, supporting most resistive bridge sensors and external voltage-source elements. A 32-bit Arm-based math core handles digital compensation for offset, sensitivity, temperature drift, and nonlinearity, using a correction algorithm with calibration data stored in reprogrammable nonvolatile memory.

Both the CCE4511 and ZSSC3286 are available now from Renesas and authorized distributors.

CCE4511 product page 

ZSSC3286 product page 

Renesas Electronics 

Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.

The post ICs optimize IO-Link communications appeared first on EDN.

Infineon is set to debut its HybridPack Drive G2 Fusion, a power module combining silicon and silicon carbide (SiC), at next month’s electronica 2024 trade show. Intended for traction inverters in the e-mobility sector, the plug-and-play module balances performance and cost for optimized inverter design.

SiC offers higher thermal conductivity, breakdown voltage, and switching speed than silicon, making it more efficient but also more expensive. The new module reduces SiC content per vehicle while maintaining performance and efficiency at a lower cost. Infineon reports that system suppliers can achieve near full-SiC efficiency with just 30% SiC and 70% silicon.

The HybridPack Drive G2 Fusion delivers up to 220 kW in the 750-V class, ensuring high reliability across a temperature range of -40°C to +175°C with enhanced thermal conductivity. Infineon’s CoolSiC MOSFET and silicon IGBT EDT3 technologies support a single or dual gate driver, facilitating the transition from full silicon or full SiC inverters to fusion inverters.

To learn more about Infineon’s HybridPack Drive power modules, click here.

Infineon Technologies 

Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.

The post SiC hybrid module drives e-mobility systems appeared first on EDN.

Marketed under the Crucial brand, Micron’s DDR5 clocked unbuffered dual in-line memory modules (CUDIMMs) and clocked small-outline dual in-line memory modules (CSODIMMs) run at speeds up to 6400 MT/s. According to Micron, this is twice as fast as standard DDR4 speeds and 15% faster than conventional DDR5 without a clock driver.

These commercially available JEDEC-standard modules offer improved speed stability, faster downloads, and enhanced refresh rates for AI PCs and high-end workstations. While most systems rely on the CPU clock signal, Micron’s CUDIMMs and CSODIMMs integrate a clock driver directly into the memory module to maintain stability.

Intel has validated Micron’s DDR5 CUDIMMs and CSODIMMs for capacities up to 64 GB for use with its Intel Core Ultra desktop processors (Series 2). These modules enable system capacities up to 256 GB for workloads requiring substantial memory density and performance. The validation of these client memory modules by Intel will empower leading PC manufacturers and integrators to adopt Micron’s clock driver-based memory in their PC platforms.

Consumers can purchase the CUDIMM and CSODIMM in 16-GB capacities at Crucial.com, with 64-GB options expected to be available in the first half of 2025.

Micron Technology 

Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.

The post Clock driver DDR5 memory boosts AI computing appeared first on EDN.

An RF wireless power tester prototype from Rohde & Schwarz helps to advance AirFuel Alliance RF standardization efforts. The setup, built with the company’s test and measurement equipment and available wireless charging development kits, features test automation and a user-friendly web interface.

R&S demonstrated the proof of concept for testing far-field wireless power systems at the 2024 IEEE Wireless Power Technology Conference and Expo. The R&S Wireless Power Tester (WPT) project aims to provide a comprehensive testing solution for wireless power transmitters and receivers. As an active member of the AirFuel Alliance, R&S contributes to the development of the AirFuel RF standard, a global initiative for standardized RF wireless charging technology.

The test setup includes the SMB100B RF and microwave signal generator, FSV3000 signal and spectrum analyzer, an NGU source measure unit used as a battery emulator, and two HMC8012 digital multimeters. It supports the AirFuel Alliance Conformance Test Specification for RF charging.

To learn more about RF wireless power transfer, click here.

Rohde & Schwarz  

Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.

The post Wireless power tester supports AirFuel RF appeared first on EDN.

JEDEC announced upcoming raw card designs for memory modules, which will complement two DDR5 clock driver standards published earlier this year. These raw card memory device standards are intended for use in client computing applications, such as laptops and desktop PCs, and will be supported by related appendix specifications.

Currently, JEDEC’s JC-45 Committee for DRAM Modules is developing the raw card designs in collaboration with the JC-40 Committee for Digital Logic and the JC-42 Committee for Solid-State Memories. The DDR5 clock driver standards include JESD323 (Clocked Unbuffered Dual Inline Memory Module) and JESD324 (Clocked Small Outline Dual Inline Memory Module).

Integrating a clock driver into a DDR5 DIMM improves memory stability and performance while enhancing signal integrity and reliability at high speeds. By locally regenerating the clock signal, the clock driver ensures stable operation at elevated clock rates. The initial version of the DDR5 clock driver enables data rates to increase from 6400 Mbps to 7200 Mbps, with future versions targeting up to 9200 Mbps.

According to JEDEC, member DIMM suppliers can provide advance solutions today, while non-members will gain access to design files once published. Available configurations include 1R×8, 1R×8 with EC4, 2R×8, 2R×8 with EC4, and 1R×16.

JEDEC

Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.

The post JEDEC unveils memory designs with DDR5 clock drivers appeared first on EDN.

https://github.com/TannerNelson16/sprinkler_controller Not sure if this belongs here, but this was originally mostly a software project that's morphed into a little bigger project. It's currently open source, but I may look into selling complete units in the future. Currently designing the enclosure for this unit. Features: MQTT compatibility (Works with Home Assistant) Micropython on ESP32 controller Web Server (Configurable via IP Address) Maintains Operation Regardless of maintained connections. Will broadcast an Access Point if necessary 24VAC input with Custom Voltage Regulator and input capacitors to mitigate ripple from the full wave rectifier LED power Indicators https://preview.redd.it/yr0xq0jdqdvd1.jpg?width=4032&format=pjpg&auto=webp&s=0decb64ef085baee13b635ccc5ed2d1cf6fbe0f2 (I still have to install the remaining LED indicators and the other resistor network if you're confused by the image. Just wanted to get everything tested.) submitted by /u/Tanner234567 [link] [comments]

EDN was able to tour the Si Labs engineering facility in Austin during Embedded world North America. The headquarters were located a convenient 15 minute walk from the convention center, making it a pretty natural choice to explore. The tour mainly covered the analog and RF testing and validation processes with senior applications engineer Dan Nakoneczny and RF engineer Efrain Gaxiola-Sosa. Upon entering, it was readily apparent that the facility was nicely stocked with high-spec test equipment to conduct the range of tests required. The lab managed to host large windows that let in the Texas sun instead of the usual test lab experience—an “instrumentation cave” tucked away in a basement or some windowless-wing of a building. The unfortunate side effect of this was an increase in the necessary cooling required, causing a constant hum of white noise.

Analog testing

Dan Nakoneczny began by showing us the benches to test analog peripherals such as comparators, ADCs, voltage regulators, and oscillators. Generally, the team uses sockets to hold down the device under test (DUT) which could be any of Silicon Labs’ SoCs where the various current, voltage, and timing measurements were not massively impacted by the socket and they allow for one test setup between devices. “We can use the sockets for most of our tests but for other tests, like DC/DC converters, we have to solder the parts down to our boards,” explained Dan. The test bench included oscilloscopes, power supplies, function generators, and a binary counter, “with analog peripherals, you don’t have pins so you’ll have to rely on simulations and have a more indirect way of taking measurements of your system.”

For this lab in particular, the DUTs can range from the typical devices in production to prototypes, “we’re building platform devices and a lot of this IP will be used in the next device that will come out at the end of the year or in a couple of months, so the validation team is between the product engineering and design team trying to find the small parts per million bugs, or issues that a customer might find during high volume production ten years down the road. We can make changes now before it gets stamped into subsequent designs, where we might have to do 10 different revisions,” said Dan.

The automated test setup shown in Figure 1 includes a pick and place robotic arm that uses computer vision to grab and place DUTs in the socket before pressing down the socket and locking the device in place. All measurements go up to the cloud to Silicon Labs’ database where there are special tools used to visualize the data to, for instance, compare it with past devices. 

Figure 1 Automated test setup that can be left for a weekend to test 20 to 50 parts.

RF validation Receiver station

Efrain then guided us through the RF test stations scattered throughout the lab and began at the receiver test setups that sat within large Faraday cages that provided up to 135 dB of isolation to prevent any interference. The PCB presented in Figure 2 shows the Silicon Labs motherboards that are able to receive several daughter cards, “these are developed for each of our products so that the very same infrastructure, connectivity, and flexibility in our lab can be used across multiple platforms. It’s a little challenging to keep them updated all the time, but it makes our life easier,” said Efrain. The RF tests have the unique challenge of requiring soldered down DUTs so a proper test fixture is key and using the same ones across the various RF test stations and, as much as possible, across new production devices must be a challenge. There are specialized motherboards that can go into the oven for temperature testing from -40oC to 135oC. “We have a bunch of switches and so we can test serially, but we cannot test in parallel because our equipment has a single channel for receiving information.” Efrain stressed that the most critical parameter from this test was receiver sensitivity; the better the sensitivity, the more range the wireless signal had. These test setups are also largely automated and can be remotely logged into and controlled outside of the annual calibration required to ensure there are no test errors due to drift.

Figure 2 Setup for the receiver testing with power supply, a microwave switch system, signal generator, and PXI Express backplane chassis/modules.

In-band transmit station

The next stop was the test station for in-band transmissions, “we transmit in several protocols where OFDM modulation is one of the most complex. So we want to make sure we can transmit the high data rates and that it is good enough for the receiver to actually get this information.” Efrain reminded us that the quality of the transmit signals depends largely on its error vector magnitude (EVM), causing this to be one of the more critical parameters this station was meant to measure; however, the setup only measured within the ISM bands (e.g., 2.4 GHz and 5 GHz).

Figure 3 Test station for measuring in-band transmissions.

Transmitter out-of-band station

For out of band testing (Figure 4), test and validation engineers will take a look at the emissions on other bands including cellular, radar, etc. “Ideally you want to transmit on your channel at a particular frequency alone, but you’re going to have harmonics that exist in frequencies that are a multiple of the fundamental frequency,” explained Efrain, “these cannot be higher than what the FCC allows.” He expressed how the nonlinear nature of fast-switching transistors are often the culprit of this EMI.

The out-of-band station is used for pre-compliance testing before sending their part off to an accredited test lab for full compliance testing. “Our equipment allows us to transmit and analyze some of this data (conducted emissions), so the output goes to the switch, the switch multiplexes the signal from the chip being tested, and this goes to the port of the spectrum analyzer where we can do several operations,” Efrain stated. An oscilloscope can be used in the place of the spectrum analyzer as well to perform other measurements. The power supplies within the setup must be quiet and clean to remove any unnecessary inference from the test instruments themselves. There are also battery emulators within the setup since many of Silicon Labs’ devices function with batteries. 

Efrain continued, “We are sending a signal with a given power say, 1 mW or 0 dBm, where we can go up to 20 dBm. We want to transmit at the highest power possible where one of the key figures is the output power of our power amplifiers; however, if we reach high output powers and we do not pass FCC or ETSI requirements, we cannot sell.” In this station the power of the fundamental is isolated and a notch filter is used to remove it and look at what is appearing at the harmonic frequencies. “If we leave the fundamental there, some energy will leak and the measurement we perform won’t be as accurate,” explained Efrain. 

Figure 4 Test rack for conducted emissions testing. 

Radiated emissions testing

This test setup, naturally, will not perform radiated emissions testing. The Austin facility did house a small chamber for this designed by ETS-Lindgren with a robotic arm used to adjust the DUT for testing at various orientations. This is also used for pre-compliance testing. 

Receiver out-of-band emissions

At this point, we enter yet another Faraday cage, this one much larger to see how Silicon Labs tests how the receivers of their SoCs perform with interference at different bands. “We have specialized equipment to emulate a real RF environment so we test a particular set of signals that could potentially interfere with our DUT, and we want to make sure they don’t.” The setup shown in Figure 5, hosts a lot of switches so that the engineers can test at all the bands/channels of interest.  

Figure 5 Test station to measure how out-of-band interference could impact the receivers on the DUT.

Load-pull stations

The load-pull stations in Figure 6 were a newer test that the validation lab used to make sure that the power amplifiers (PA) were delivering the maximum power efficiency. Efrain explained how fabrication could slightly adjust the load behavior of the DUT from being that more ideal ~50 ohms to something more reactive or capacitive, “in these two stations we are pulling the load that the PA is going to see. The change in impedance will mean that the power we are delivering is not the same and we need to identify what conditions will make our power amplifiers not behave properly and bring that back to our design.” The goal of the test was to build a robust product that meet customer expectations, “You can say you promise a certain performance only under ideal conditions, but can you control the output power and do a feedback loop to make sure that what you say is happening all the time?” 

Figure 6 Load-pull stations used to find the optimal load impedance at the chip pin for maximum power transfer and PA efficiency. 

Radio regression test system

The small shielded enclosures found in Figure 7 are a benchtop solution for isolation (~80 dB) used by the PHY MAC team to conduct the battery of tests necessary. There are four of these boxes carrying test fixtures with 5 different DUTs, all connected to the Keithley’s S46 microwave switch system, configured as a 2:28 multiplexer (MUX). “The team does validation at the PHY and MAC level to identify what we need to change or fix, and to make sure we don’t break anything if we make changes to firmware,” said Efrain, “when you’re working with multiple radio protocols in a single hardware platform, you need to reconfigure your radio to support these different protocols.” The test is also used to emulate the fixes that Silicon Labs develops for customers that face issues in the field, “once those issues are fixed, they’ll come here and hopefully they won’t break anything else.” The regression stations run 24/7 with daily reports on testing.

Figure 7 Radio regression testing with shielded enclosures to test PHY and MAC protocols of the various radio models used in Silicon Labs SoCs.

Aalyia Shaukat, associate editor at EDN, has worked in the engineering publishing industry for nearly a decade with published works in EE journals and other trade publications. She holds a BSEE from Rochester Institute of Technology. 

Related Content

• Combating noise and interference in oscilloscopes and digitizers
• EMC: How to write a good benchtop test report
• Not all oscilloscopes are made equal: Why ADC and low noise floor matter
• How to control your impulses—part 2
• DIY RTD for a DMM
• Why deep memory matters

The post An engineer’s playground: A tour of Silicon Labs’ labs appeared first on EDN.

submitted by /u/Careful_Volume_3935 [link] [comments]

Made some mistakes in the design, but got them sorted and now I’m very happy with the final results! submitted by /u/careyi4 [link] [comments]