Новини світу мікро- та наноелектроніки

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Made during challenge "12hours to 200kv". It's not safe, it's not wise but looks kind of cool. submitted by /u/Alexandria_Cinis [link] [comments]

Edwin Henry Colpitts (January 19, 1872 – March 6, 1949)
James Kilton Clapp (December 03, 1897 – 1965)

The two persons above are the geniuses who gave us two classic oscillator circuits as shown in Figure 1.

Figure 1 The two classic oscillators circuits: Colpitts (left) and Clapp (right).

We’ve looked at these two oscillators individually before in “The Colpitts oscillator” and “Clapp oscillator”.

However, a side-by-side examination of the two oscillators is additional time well spent.

The Clapp oscillator was devised as an improvement over the Colpitts oscillator by virtue of adding one capacitor, C3, in the above image.

The amplifier “A” is nominally at a gain value of unity, but as a matter of practicality, the gain value is slightly lower than that because the amplifier is really a “follower”. If made with a vacuum tube, then “A” is a cathode follower. If made with a bipolar transistor, then “A” is an emitter follower. If made with a field effect transistor, then “A” is a source follower. The concept itself remains the same.

Each oscillator works because the RLC network develops a voltage step-up at the frequency of oscillation. The “R” is not an incorporated component though. The “R” (R1 or R2) simply represents an output impedance of the follower. The 10 ohms that we see here is purely an arbitrary value guess on my part. The other components are also of arbitrary value choices, but they are convenient values for illustrating just how these little beasties work.

We use SPICE simulations to examine the transfer functions of the two RLC networks as shown in Figure 2.

Figure 2 Colpitts versus Clapp spice simulations using the transfer functions of the two RLC networks.

Each RLC network has a peak in its frequency response which will result in oscillation at that peak frequency. However, the peak of the Clapp circuit is much sharper and narrower than that of the Colpitts circuit. This narrowing has the beneficial effect of suppressing spectral noise centered around the oscillation frequency.

Note in the examples above that the oscillation peaks differ by 0.16% and that the reactance of the L1 inductor and the reactance of the L2 C3 pair differ by 1.12%. That’s just a matter of my having chosen some convenient numbers with the intent of having the two curves match in that regard at the same peak frequency. (I almost succeeded.)

The Clapp oscillator has several advantages over the Colpitts oscillator. The transfer function peak of the Clapp circuit is narrower than that of the Colpitts which tends to yield an oscillator output with less spurious off-frequency energy meaning a “cleaner” signal.

Another advantage of the Clapp circuit is that capacitors C4 and C5 can be made very large as the L2 C3 combination is made to look like a very small inductance value at the oscillation frequency. The larger C4 and C5 values mean that any variations of those capacitance values brought about by variations of the input capacitance of the “A” stage have a minimal effect on the oscillation frequency.

That’s because frequency control of the Clapp circuit is primarily set by the series resonance of the L2 C3 pair rather than the parallel resonance of L1 versus the C1 C2 pair in the Colpitts circuit. If the “A” input capacitance tends to vary for this reason or that, the Clapp circuit is far less prone to an unwanted frequency shift as shown in Figure 3.

Figure 3 A Clapp versus Colpitts frequency shift comparison showing how the Clapp circuit (right) is far less prone to this unwanted shift in frequency.

John Dunn is an electronics consultant, and a graduate of The Polytechnic Institute of Brooklyn (BSEE) and of New York University (MSEE).

Related Content

• The Colpitts oscillator
• Clapp oscillator
• Emitter followers as Colpitts oscillators
• Oscillator has voltage-controlled duty cycle

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Polar Light Technologies (PLT) — which stems from research by founder professor Per-Olof Holtz and his team at Linköping University (with support from Sweden’s innovation agency Vinnova) — has fabricated 625nm-wavelength red-light-emitting pyramidal micro-LED based on its non-etching bottom-up concept. The firm has hence achieved red, green and blue pyramidal micro-LEDs using the same material compound...

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DigiKey, a leading global commerce distributor offering the largest selection of technical components and automation products in stock for immediate shipment, is proud to sponsor the Eleckart competition during the 2025 Shaastra Technical Festival in Chennai, India, from Jan. 3-7, 2025.

The Eleckart event will test students’ understanding of digital electronics and their problem-solving capabilities using a minimal set of resources. The event consists of two rounds. The first round will test participants’ knowledge of creating electronic circuit diagrams using DigiKey’s Scheme-it platform. The final round will be on circuit building using actual components while managing the points that are deducted through components taken. Winners will receive prizes up to ₹50,000.

The festival is hosted by the Indian Institute of Technology Madras (IITM) and showcases engineering, science and technology with competitions, lectures, exhibitions, demonstrations and workshops. Students can register for technology-related workshops focusing on the Internet of Things (IoT), rocket propulsion, Arduino, CAD for industrial designs, AI and machine learning, and quantum computing.

“DigiKey is excited to sponsor the Eleckart competition during IITM’s Shaastra Technical Festival and have a chance to connect with the 60,000 attendees that will visit the summit,” said Y.C. Wang, director of global academic programs at DigiKey. “India is one of DigiKey’s top markets and this opportunity allows us to interact with students, engineers and designers who will foster future innovations in India and around the world.”

On Jan. 4, DigiKey representatives will showcase Sparkfun’s Experiential Robotics Platform (XRP) at the Eleckart event. Students can visit the DigiKey table to learn about the organization’s largest selection of technical components and about DigiKey’s tech resources such as online conversion calculators, PCB builders and design tools. Students can also receive free DigiKey PCB rulers.

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GigaDevice has introduced the GD32H75E 32-bit MCU, featuring an integrated GDSCN832 EtherCAT subdevice controller, which is also available as a standalone device. Both components target industrial automation applications, including servo control, variable frequency drives, industrial PLCs, and communication modules.

Powered by an Arm Cortex-M7 core running at up to 600 MHz, the GD32H75E microcontroller includes a DSP hardware accelerator, double-precision floating-point unit, hardware trigonometric accelerator, and filter algorithm accelerator. It also comes with 1024 KB of SRAM, up to 3840 KB of flash memory with security protection, and a 64-KB cache to enhance CPU efficiency and real-time performance.

The MCU’s integrated EtherCAT subdevice controller, licensed from Beckhoff Automation, manages EtherCAT communication, acting as an interface between the EtherCAT fieldbus and the sub-application. It includes two internal PHY ports and an external MII. With 64-bit distributed clock support, it enables synchronization with other EtherCAT devices, achieving DC synchronization accuracy to within 1 µs.

The GD32H75E MCU is available in two variants: one with two internal Ethernet PHYs and another that supports bypass mode, both housed in BGA240 packages. Samples and development boards are available now, with mass production planned for Q2 2025.

GD32H75E product page

GigaDevice 

Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.

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Airoha Technology’s AB1595 Bluetooth audio chip features a 6-core architecture and a built-in AI hardware accelerator. It consolidates functions typically spread across multiple chips into a single SoC and achieves Microsoft Teams Open Office certification.

The AB1595 uses AI algorithms and input from up to 10 microphones to improve speech clarity by reducing background noise. This collaboration allows it to accurately distinguish between the user’s voice and environmental sounds, achieving professional-grade speech quality. In noisy environments like offices and cafes, it enhances voice noise suppression from 10 dB up to 40 dB, optimizing speech quality and elevating consumer headsets to professional teleconference standards.

Real-time adaptive active noise cancellation (ANC) in the AB1595 boosts environmental noise attenuation across a wide frequency range. It detects the user’s wearing condition (e.g., fit or leakage) and adjusts compensation accordingly. Internal filters automatically adapt to both the fit and surrounding noise, balancing effective noise cancellation with comfort for a superior wearing and listening experience.

Airoha reports that the AB1595 has been adopted by customers, with products expected to be available in Q1 2025. A datasheet was not available at the time of this announcement. Contact Airoha Technology here.

Airoha Technology 

Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.

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Designed for automotive LED lighting systems, Diodes’ AL8866Q driver supports buck, boost, buck-boost, and single-ended primary-inductance converter (SEPIC) topologies. This DC-switching LED driver-controller operates over an input voltage range of 4.7 V to 85 V, accommodating 12-V, 24-V, and 48-V battery power rails. It is suitable for applications such as daytime running lights, high/low beams, fog lights, turn signals, and brake lights.

The AL8866Q employs a 400-kHz fixed-frequency peak current-mode control architecture. Spread spectrum frequency modulation enhances EMI performance and aids compliance with the CISPR 25 Class 5 standard.

The device enables analog or PWM dimming via its DIM pin. A 1% reference tolerance ensures better brightness control and matching between lamps. With an analog dimming range of 1% to 100%, the AL8866Q maintains ±12% output current accuracy at 20% dimming. Alternatively, PWM dimming, ranging from 0.1 kHz to 1 kHz, provides a 100:1 dynamic range.

An integrated soft-start function gradually increases the inductor and switch current, minimizing potential overvoltage and overcurrent at the output. The driver also includes an open-drain fault output to signal various fault conditions.

Prices for the AEC-Q100 Grade 1 qualified AL8866Q driver start at $0.48 each in lots of 1000 units.

AL8866Q product page

Diodes

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The P400 V4 from Patriot Memory is a PCIe Gen 4 x4 M.2 SSD, offering read speeds up to 6200 MB/s and write speeds up to 5200 MB/s. Optimized for PC and PS5 compatibility, it provides gamers and content creators with high-speed performance and enhanced thermal management. Its compact M.2 2280 form factor makes it well-suited for space-constrained systems, including thin laptops and small form-factor PCs.

With a read speed of 6200 MB/s, the P400 V4 achieves a total bytes written (TBW) rating of 1280 TB. Available in storage capacities ranging from 500 GB to 4 TB, the drive features SmartECC technology for improved reliability. To maintain consistent peak performance during intensive operations, the P400 V4 incorporates a graphene heatshield that helps prevent thermal throttling and efficiently manages thermal output.

The P400 V4’s PCIe Gen 4 x4 controller is NVMe 2.0 compliant, offering improved performance and support for the latest features. The SSD comes with a 5-year warranty and supports Windows 7, 8.0, 8.1, 10, and 11 (drivers may be required for older versions).

P400 V4 product page

Patriot Memory 

Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.

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Hon Hai Technology Group (Foxconn) of Taipei, Taiwan (the world’s largest electronics manufacturer and technology service provider) has entered the augmented reality (AR) glasses market by partnering with fabless micro-LED company Poro Technologies Ltd (a spin off from the Cambridge Centre for Gallium Nitride at the UK’s University of Cambridge that has developed porous GaN material and has an R&D center in Hsinchu, Taiwan). The firms will leverage Porotech’s gallium nitride (GaN) technology and Foxconn’s vertical integration capabilities to develop micro-LED display technology and AR applications...

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Neo Performance Materials Inc of Toronto, Canada has completed the sale of its equity ownership interest in Neo Rare Metals (Oklahoma) LLC in Quapaw, OK, USA – which produces gallium trichloride – to the facility’s general manager & co-founder Kevin Reading...

Co-packaged optics (CPO)—the silicon photonics technology promising to transform modern data centers and high-performance networks by addressing critical challenges like bandwidth density, energy efficiency, and scalability—is finally entering the commercial arena in 2025.

According to a report published in Economic Daily News, TSMC has successfully integrated CPO with advanced semiconductor packaging technologies, and sample deliveries are expected in early 2025. Next, TSMC is projected to enter mass production in the second half of 2025 with 1.6T optical transmission offerings.

Figure 1 CPO facilitates a shift from electrical to optical transmission to address the interconnect limitations such as signal interference and overheating. Source: TrendForce

The report reveals that TSMC has successfully trialled a key CPO technology—micro ring modulator (MRM)—at its 3-nm process node in close collaboration with Broadcom. That’s a significant leap from electrical to optical signal transmission for computing tasks.

The report also indicates that Nvidia plans to adopt CPO technology, starting with its GB300 chips, which are set for release in the second half of 2025. Moreover, Nvidia plans to incorporate CPO in its subsequent Rubin architecture to address the limitations of NVLink, the company’s in-house high-speed interconnect technology.

What’s CPO

CPO is a crucial technology for artificial intelligence (AI) and high-performance computing (HPC) applications. It enhances a chip’s interconnect bandwidth and energy efficiency by integrating optics and electronics within a single package, which significantly shortens electrical link lengths.

Here, optical links offer multiple advantages over traditional electrical transmission; they lower signal degradation over distance, reduce susceptibility to crosstalk, and offer significantly higher bandwidth. That makes CPO an ideal fit for data-intensive AI and HPC applications.

Furthermore, CPO offers significant power savings compared to traditional pluggable optics, which struggle with power efficiency at higher data rates. The early implementations show 30% to 50% reductions in power consumption, claims an IDTechEx study titled “Co-Packaged Optics (CPO): Evaluating Different Packaging Technologies.”

This integration of optics with silicon—enabled by advancements in chiplet-based technology and 3D-IC packaging—also reduces signal degradation and power loss and pushes data rates to 1.6T and beyond.

Figure 2 Optical interconnect technology has been gaining traction due to the growing need for higher data throughput and improved power efficiency. Source: IDTechEx

Heterogeneous integration, a key ingredient in CPO, enables the fusion of optical engine (OE) with switch ASICs or XPUs on a single package substrate. Here, the optical engine includes both photonic ICs and electronic ICs. The packaging in CPO generally employs two approaches. The first one involves the packaging of optical engine itself and the second one focuses on the system-level integration of the optical engine with ICs like ASICs or XPUs.

A new optical computing era

TSMC’s approach involves integrating CPO modules with advanced packaging technologies such as chip-on-wafer-on-substrate (CoWoS) or small outline integrated circuit (SOIC). It eliminates traditional copper interconnects’ speed limitations and puts TSMC at the forefront of a new optical computing era.

However, challenges such as low yield rates in CPO module production might lead TSMC to outsource some optical-engine packaging orders to other advanced packaging companies. This shows that the complex packaging process encompassing CPO fabric will inevitably require a lot of fine-tuning before commercial realization.

Still, it’s a breakthrough that highlights a tipping point for AI and HPC performance, wrote Jeffrey Cooper in his LinkedIn post. Cooper, a former sourcing lead for ASML, also sees a growing need for cross-discipline expertise in photonics and semiconductor packaging.

Related Content

• Optical interconnects draw skepticism, scorn
• TSMC crunch heralds good days for advanced packaging
• Intel and FMD’s Roadmap for 3D Heterogeneous Integration
• Heterogeneous Integration and the Evolution of IC Packaging
• CEA-Leti Develops Active Optical Interposers to Connect Chiplets
• Road to Commercialization for Optical Chip-to-Chip Interconnects

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