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Patented antenna digital twin solution from Rohde & Schwarz and IMST optimizes automotive connectivity
Rohde & Schwarz, in collaboration with wireless communications engineering experts IMST GmbH, has developed a patented antenna digital twin solution, effectively addressing a multitude of challenges and delivering considerable benefits for vehicle manufacturers and their suppliers to optimize automotive connectivity. The solution combines measurements of the antenna characteristics with simulation of the electromagnetic wave propagation to optimize the antennas’ design and their position to ensure for example optimal WiFi coverage inside the vehicle.
Vehicle manufacturers face several challenges when integrating antennas out- or in-side their vehicles. Performing antenna simulations is complex and time consuming, and simulation results have to be proven by physical measurements. Accurate measurements in-side the vehicle are simply not possible due to the closed vehicle environment. A combination of measurements and simulation is needed in order to achieve the best antenna position and therefore also connectivity performance for the user in-side the vehicle.
Rohde & Schwarz has joined forces with IMST to develop a process, divided into three steps. The first involves the characterization of physical antennas using Rohde & Schwarz test equipment, including an anechoic chamber, a R&S ZNA vector network analyzer, and the R&S AMS32 software. The second step focuses on the creation of a digital twin by involving the easy to use Near Field to Far Field Transformation Algorithm (FIAFTA). This is followed by a 3D EM simulation of a virtual scenario using EM-TWIN software from IMST.
The antenna digital twin solution from Rohde & Schwarz and IMST offers multiple benefits. Notably, it brings about a significant reduction in cost and time for antenna suppliers and vehicle manufacturers through the front-loading of antenna validation by combining measurements and simulations. It ensures the accurate and consistent characterization of physical antennas through the use of anechoic chambers and vector network analyzers in conjunction with the R&S AMS32 automation software.
Moreover, the solution significantly reduces development time as EM-TWIN simulation results are available within hours, not days. The performance of the antenna can be enhanced as production tolerances and reflections from the vehicles’ bodies are considered. The patented EM-TWIN digital antenna twin source technology provides an exceptional high level of modeling accuracy.
This solution allows for the optimal location of the antenna to be found before the physical vehicle is available, thereby avoiding expensive and time-consuming development cycles. The ability to identify the optimal location of the antenna and verify in-vehicle wireless coverage is a significant advantage, particulalry because conventional measurements are extremely difficult and unreliable within the physical contriants of the vehicle. In summary, the patented antenna digital twin solution from Rohde & Schwarz and IMST accelerates design cycles and optimizes the location of antennas on vehicles, thereby improving coverage and performance before prototypes and chassis become available.
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Infineon and AWL-Electricity partner to improve wireless power
Vishay Intertechnology 1 Form A Solid-State Relay Is Industry’s First to Offer AEC-Q102 Qualification and a 100 V Load Voltage
Available in the Space-Saving SOP-4 Package, Automotive Grade Device Delivers Industry’s Fastest Turn-On and Turn-Off Times of 0.1 ms Typical
Vishay Intertechnology, Inc. today introduced the industry’s first 1 Form A solid-state relay to offer AEC-Q102 qualification and a 100 V load voltage. Offered in the low profile SOP-4 package, the Vishay Semiconductors VORA1010M4 delivers the industry’s fastest turn-on and turn-off times of 0.1 ms typical, in addition to the highest operating temperature to +125 °C.
The fast turn-off time of the optically isolated device released today is a result of its integrated turn-off circuit, while its combination of a state-of-the-art infrared emitter and photovoltaic diode array delivers its fast turn-on time. This switching performance makes the solid-state relay ideal for safety-critical applications, while its compact SOP-4 package saves space over competing solutions in the DIP-4 package.
Offering an isolation voltage of 3750 VRMS, the Automotive Grade VORA1010M4 is designed to provide clean, bounce-free switching for glass dimming, lighting control, inverters, motor controls, and battery management systems (BMS) in electric (EV) and hybrid electric (HEV) vehicles; industrial motor drives and controls; security and automation systems; and telecom servers and datacenters.
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PWM controllers drive FETs and IGBTs
Optimized for AC/DC power supplies in industrial applications, Rohm’s PWM controller ICs support a wide range of power semiconductors. Mass production has begun for four variants: the BD28C55FJ-LB for low-voltage MOSFETs; BD28C54FJ-LB for medium- to high-voltage MOSFETs; BD28C57LFJ-LB for IGBTs; and BD28C57HFJ-LB for SiC MOSFETs.
The parts come in standard SOP-J8 packages (equivalent to JEDEC SOIC8), offering pin-to-pin compatibility with commonly used power supply components to minimize redesign and modification efforts. Each variant includes a self-recovery undervoltage lockout function with voltage hysteresis. According to Rohm, this improves application reliability by reducing threshold voltage error to ±5%, compared to the typical ±10% of standard products.
With an input voltage range of 6.9 V to 28.0 V, the PWM controllers provide a circuit current of 2.0 mA, a maximum startup current of 75 µA, and a maximum duty cycle of 50%. The lineup will be expanded to include products for driving GaN devices and variants that support a maximum duty cycle of 100%.
The BD28C55FJ-LB, BD28C54FJ-LB, BD28C57LFJ-LB, and BD28C57HFJ-LB are now available through Rohm’s authorized distributors.
Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.
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System performs one-pass wafer test up to 3 kV
Keysight’s 4881HV wafer test system enables parametric tests up to 3 kV, accommodating both high and low voltage in a single pass. Its high-voltage switching matrix facilitates this one-pass operation, boosting productivity and efficiency.
The system’s switching matrix scales up to 29 pins and integrates with precision source measure units, allowing flexible measurements from low current down to sub-pA resolution at up to 3 kV on any pin. High-voltage capacitance measurements with up to 1-kV DC bias are also possible. This switching matrix enables a single 4881HV to replace separate high-voltage and low-voltage test systems, increasing efficiency while reducing the required footprint and testing time.
Power semiconductor manufacturers can use the 4881HV to perform process control monitoring and wafer acceptance testing up to 3 kV, meeting the future requirements of automotive and other advanced applications. To safeguard operators and equipment during tests, the system features built-in protection circuitry and machine control, ensuring they are not affected by high-voltage surges. Additionally, it complies with safety regulations, including SEMI S2 standards.
To request a price quote for the 4881HV test system, click the product page link below.
Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.
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Sink controllers ease shift to USB-C PD
Diodes’ AP33771C and AP33772S sink controllers enable designers to transition from proprietary charging ports, legacy USB ports, and barrel-jack ports to a standard USB Type-C PD 3.1 port. These controllers can be embedded into battery-powered devices and other types of equipment using a USB Type-C socket as a power source.
Both ICs manage DC power requests for devices with USB Type-C connectors, supporting the PD 3.1 extended power range (EPR) of up to 140 W and adjustable voltage supply (AVS) of up to 28 V. The AP33771C provides multiple power profiles for systems without an MCU, featuring eight resistor-settable output voltage levels and eight output current options. In contrast, the AP33772S uses an I2C communications interface for systems equipped with a host MCU.
The sink controllers’ built-in firmware supports LED light indication, cable voltage-drop compensation, and moisture detection. It also offers safety protection schemes for overvoltage, undervoltage, overcurrent, and overtemperature. No programming is required to activate the firmware in the AP33771C, while designers have the option of using I2C commands to configure the AP33772S.
Housed in a 3×3-mm, 14-pin DFN package, the AP33771C is priced at $0.79 each in 1000-unit quantities. The AP33772S, in a 4×4-mm, 24-pin QFN package, costs $0.84 each in like quantities.
Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.
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Platform advances 800G Ethernet AN/LT validation
Teledyne LeCroy has announced an integrated platform for validating the limits of auto-negotiation and link training (AN/LT) in 800-Gbps Ethernet. As an extension to the existing LinkExpert software, the new functionality leverages the Xena Z800 Freya Ethernet traffic generator and the SierraNet M1288 protocol analyzer to test Ethernet’s AN/LT specifications.
The fully automated test platform simplifies interoperability testing across various Ethernet switches and network interface cards. It tests each equalizer tap to its maximum limit to verify protocol compliance and ensure links re-establish if limits are exceeded. The system also verifies the stability of the SerDes interface and validates that all speeds can be negotiated to support backward compatibility.
The SierraNet M1288 protocol analyzer provides full stack capture, deep packet inspection, and analysis for links up to 800 Gbps. It also offers jamming capabilities for direct error injection on the link at wire speed. The Xena Z800 Freya Ethernet traffic generator can test up to 800G Ethernet using PAM4 112G SerDes, achieving the best possible signal integrity and bit error rate performance.
LinkExpert with the AN/LT test functionality is now shipping as part of the SierraNet Net Protocol Suite software.
Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.
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Tulip antenna delivers 360° stability for UWB
A tulip-shaped antenna from Kyocera AVX is designed for ultra-wideband (UWB) applications, covering a frequency range of 6.0 GHz to 8.5 GHz. The surface-mount antenna is manufactured using laser direct structuring (LDS) technology, which enables a 3D pattern design. LDS allows the antenna to operate both on-board and on-ground, offering an omnidirectional radiation pattern with consistent 360° phase stability.
The antenna’s enhanced phase stability, constant group delay, and linear polarization are crucial for signal reconstruction, improving the accuracy of low-energy, short-range, and high-bandwidth USB systems. It can be placed anywhere on a PCB, including the middle of the board and over metal. This design flexibility surpasses that of off-ground antennas, which require ground clearance and are typically positioned along the perimeters of PCBs.
The tulip antenna is 6.40×6.40×5.58 mm and weighs less than 0.1 g. It is compatible with SMT pick-and-place assembly equipment and complies with RoHS and REACH regulations. When installed on a 40×40-mm PCB, the antenna typically exhibits a maximum group delay of 2 ns, a peak gain of 4.3 dBi, CW power handling of 2 W, and an average efficiency of 61%.
Designated P/N 9002305L0-L01K, the tulip antenna is produced in South Korea and is now available through distributors Mouser and DigiKey.
9002305L0-L01K antenna product page
Find more datasheets on products like this one at Datasheets.com, searchable by category, part #, description, manufacturer, and more.
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Analog Devices’ approach to heterogeneous debug
Creating a software-defined version of ADI
Embedded World this year has had a quite clear focus on the massive growth in the application space of edge computing and the convergence of IoT, AI, security, and underlying sensor technologies. A stop by the Analog Devices Inc (ADI) booth reveals quite clearly that the company aims to address the challenges of heterogeneous debugging and security compliance in embedded systems. “For some companies, an intelligent edge refers to the network edge or the cloud edge, for us it means right down to sensing, taking raw data off sensors and converting them into insights,” says Jason Griffin, managing director of software engineering and security solutions at ADI. “So bridging the physical and digital words, that’s our sweet spot.” ADI aims to bolster embedded solutions and security software where “as the signal chain becomes more digital, we add on complex security layers.” As an established leader in the semiconductor industry, ADI’s foundational components now require more software enablement, “so as we move up the stack, moving closer to our customer’s application layer, we’re starting to add an awful lot more software where our overall goal is to create a software-defined version of ADI and meet customers at their software interface.” The company is focusing their efforts on open source development “we’re open sourcing all our tools because we truly believe that software developers should own their own pipeline.”
Enter CodeFusion StudioThis is where CodeFusion Studio comes into play, the software development environment was built to help develop applications on all ADI digital technologies. “In the future, it will include analog too,” notes Jason. “There’s three main components to CodeFusion Studio: the software development kit that includes usage guides and reference guides to get up and running; the modern Visual Studio Code IDE so customers can go to the Microsoft marketplace and download it to facilitate heterogenous debug and application development; and a series of configuration and productivity tools where we will continue to expand CodeFusion Studio.” The initial release of this software includes a pin config tool, ELF file explorer, and a heterogeneous debug tool.
Config toolsKevin Townsend, embedded systems engineer offered a deeper dive into the open source platform starting with the config tools. “There’s not a ton of differentiation in the config tools themselves, every vendor is going to give you options to configure pin mux, pin config, and generate code to take those config choices and set up your device to solve your business problem.” The config tools themselves are more or less standard, “in reality, you have two problems with pin mux and pin config: you’ve got to capture your config choices, and every tool will do that for you, for example, I could want ADC6 on Pin B4, or UART TXD and RXD on C7 and D9, the problem with most of those tools today is that they lock you into a very opinionated sense of what that code should look like. So most vendors will generate code for you like everybody else but it will be based on the vendor-specific choices of RTOSs (real-time operating systems), my SDKs; and if I’m a moderately complex-to-higher-end customer, I don’t want to have anything to do with those, I need to generate code for my own scheduler, my own APIs in-house.”
So CodeFusion Studio’s tool has done is decouple config choice capture from code generation, “we save all of the config choices for your system, we save all of that into a JSON file which is human and machine readable and rather than just generating opinionated code for you right away, we have an extensible command-line utility that takes this JSON file and it will generate code for you based upon the platform that you want.” The choices can include MSDK (microcontrollers SDK), Zephyr 3.7, ThreadX, or an in-house scheduler maybe used by a larger tech company. “I can take this utility and we have a plug-in based architecture where it’s relatively trivial for me to write my own export engine.” This gives people the freedom to generate the code they need.
Figure 1: CodeFusion Studio Config tool demo at the ADI booth at Embedded World 2024.
Kevin bemoaned that half of a software developer’s day was spent doing meetings while the other half was spent doing productive work where so much of that already-reduced time had to include debug, profiling, and instrumentation. “That’s kind of the bread and butter of doing software development but traditionally, I don’t feel like embedded has tried to innovate on debug, it’s half of my working day and yet we’re still using 37-year-old tools like gdb on the command line to debug the system we’re using.”
He says “if I want to have all my professional profiling tools to understand where all my SRAM or flash is going, I have to buy an expensive proprietary tool.” Kevin strongly feels that making a difference for ADI customers does not involve selling another concrete tool but an open platform that does not simply generate code, but to generates code that enables customers to get the best possible usage of their resources. “MCUs are a commodity at the end of the day, people are going to buy them for a specific set of peripherals, but it’s a lot of work to get the best possible usage out of them.”
The ELF file explorer is one such example to improve the quality of life for developers. The ELF file is analogous to the .exe file for Windows desktop application, “it’s like an embedded .exe” , says Kevin. “It is kind of the ultimate source of the truth of the code that I am running on my device but it is a block box.” ELF file explorer attempts to take these opaque systems and build “windows” into them so see what is going on in the final binary. “There’s nothing in this tool that I couldn’t do on the command line but I would need 14 different tools, an Excel spreadsheet, and a piece of paper with pencil, and it would take me three hours.” Instead, developers can finalize debugging in a fraction of the time to potentially speed up time-to-market.
“So for example, I can see the 10 largest symbols inside my image where I’m running out of flash; where is it all going?” In this case, the tool allows the user to readily see the 10 largest functions (Figure 2) with the ability to right click on it to go to the symbol source and get a view directly into the source code.
Figure 2: CodeFusion Studio ELF file explorer tool demo.
Heterogenous DebugThe heterogenous debug tool is aimed at simplifying multi-core architecture debugging, this is quickly becoming a necessity in modern embedded development environments where implementing 2 cores or beyond is becoming commonplace. Kevin Townsend explains “almost all the debug tools that exist in the MCU space today are designed for one core at a time, they’re designed to solve one and analyze one thread of data on one architecture. You could have a design with an Arm core, a RISC-V core, an Xtensa DSP core, and maybe some proprietary instruction set from a vendor, all on the same chip; and I need to trace data as it moves through the system in a very complex way.” An example is used with an analog front end that goes to DSP for processing and then to an Arm core for further processing, and a final RISC-V core that might control a BLE radio to send a signal out to a mobile device.
“It breaks down the ability to debug multiple cores in parallel inside the same IDE, in the same moment in time”, this diverges from the traditional approach with different IDEs, pipelines, and debuggers where the developer has to set a breakpoint on one core and switch over the the next processor’s tools to continue the debug process. This process is inherently cumbersome and fraught with human error and oversight where quite often, different cores might be controlled with different JTAG connectors causing the developer to manually switch connections as well while switching (alt-tabbing) between tools.
In the heterogenous debug tool, users with multiple debuggers connected to multiple cores can readily visualize code for all the cores (there is no limit to the number) and they can set breakpoints on each (Figure 3). Once the offending line of code is found and fixed, the application can be rebuilt with the change and run to ensure that it works.
Figure 3: The heterogenous debug tool demo at showing how a user can debug a system using a RISC-V and Arm core to play the game 2048.
Trusted Edge Security Architecture“We have our Trusted Edge Architecture which we’re embedding into our SDK as well as having security tooling within CodeFusion Studio itself, its all SDK-driven APIs so customers can use it pretty easily,” said Jason Griffin. Kevin Townsend also adds “traditional embedded engineers haven’t had to deal with the complexities of security, but now you have all this legislation coming down the pipeline there is a pressure that has never existed before for software developers to deliver secure solutions and they often don’t have the expertise.” The Trusted Edge Security Architecture is a program that offers access to crypto libraries all embedded within the software that can be used on an MCU (Figure 4). The secure hardware solutions include tamper-resistant key storage, root of trust (RoT), and more to provide a secure foundation for embedded devices. “How do we give you, out of the box, something that complies with 90% of the requirements in cybersecurity,” says Kevin, “We can’t solve everything, but we really need to raise the bar in the software libraries and software components that we integrate into our chips to really reduce the pressure on software developers.”
Figure 4: ADI Trusted Edge Security Architecture demo.
Aalyia Shaukat, associate editor at EDN, has worked in design publishing industry for six years. She holds a Bachelor’s degree in electrical engineering from Rochester Institute of Technology, and has published works in major EE journals as well as trade publications.
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